# HG changeset patch
# User Keir Fraser <keir@xen.org>
# Date 1285340079 -3600
# Node ID 71f836615ea211ac4e6f3b9793f58c6f6934c030
# Parent  eb247ea9db8c8b541a7f8c9cdc51c064c4c9e41c
x86: adjust MSR_IA32_MISC_ENABLE handling

In the warning message issued on writes, the Xen-modified value should
be printed (and used to determine whether anything needs to be printed
at all), as the guest kernel will usually do a read-modify-write
cycle.

A question is whether Dom0 shouldn't be allowed control over some
bits, or whether some bits shouldn't be fully virtualized. I'm
particularly thinking of MSR_IA32_MISC_ENABLE_FAST_STRING, which
recent Linux kernels want to disable for CONFIG_KMEMCHECK.

While putting this together I also noticed that rdmsr_safe() failed to
initialize its output registers in the failure path, thus leading to
printing of uninitialized data in the guest WRMSR warning message.

Further, the default case value-changed check can be simplified.

Signed-off-by: Jan Beulich <jbeulich@novell.com>

--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -1661,6 +1661,16 @@ unsigned long guest_to_host_gpr_switch(u
 
 void (*pv_post_outb_hook)(unsigned int port, u8 value);
 
+static inline uint32_t guest_misc_enable(uint32_t eax)
+{
+    eax &= ~(MSR_IA32_MISC_ENABLE_PERF_AVAIL |
+             MSR_IA32_MISC_ENABLE_MONITOR_ENABLE);
+    eax |= MSR_IA32_MISC_ENABLE_BTS_UNAVAIL |
+           MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL |
+           MSR_IA32_MISC_ENABLE_XTPR_DISABLE;
+    return eax;
+}
+
 /* Instruction fetch with error handling. */
 #define insn_fetch(type, base, eip, limit)                                  \
 ({  unsigned long _rc, _ptr = (base) + (eip);                               \
@@ -2258,6 +2268,13 @@ static int emulate_privileged_op(struct 
             if ( wrmsr_safe(MSR_FAM10H_MMIO_CONF_BASE, eax, edx) != 0 )
                 goto fail;
             break;
+        case MSR_IA32_MISC_ENABLE:
+            if ( rdmsr_safe(regs->ecx, l, h) )
+                goto invalid;
+            l = guest_misc_enable(l);
+            if ( eax != l || edx != h )
+                goto invalid;
+            break;
         case MSR_IA32_MPERF:
         case MSR_IA32_APERF:
             if (( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ) &&
@@ -2364,11 +2381,7 @@ static int emulate_privileged_op(struct 
         case MSR_IA32_MISC_ENABLE:
             if ( rdmsr_safe(regs->ecx, regs->eax, regs->edx) )
                 goto fail;
-            regs->eax &= ~(MSR_IA32_MISC_ENABLE_PERF_AVAIL |
-                           MSR_IA32_MISC_ENABLE_MONITOR_ENABLE);
-            regs->eax |= MSR_IA32_MISC_ENABLE_BTS_UNAVAIL |
-                         MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL |
-                         MSR_IA32_MISC_ENABLE_XTPR_DISABLE;
+            regs->eax = guest_misc_enable(regs->eax);
             break;
         case MSR_EFER:
         case MSR_AMD_PATCHLEVEL:
--- a/xen/include/asm-x86/msr.h
+++ b/xen/include/asm-x86/msr.h
@@ -39,7 +39,8 @@ static inline void wrmsrl(unsigned int m
     __asm__ __volatile__( \
         "1: rdmsr\n2:\n" \
         ".section .fixup,\"ax\"\n" \
-        "3: movl %5,%2\n; jmp 2b\n" \
+        "3: xor %0,%0\n; xor %1,%1\n" \
+        "   movl %5,%2\n; jmp 2b\n" \
         ".previous\n" \
         ".section __ex_table,\"a\"\n" \
         "   "__FIXUP_ALIGN"\n" \