# HG changeset patch
# User Keir Fraser <keir@xen.org>
# Date 1285340011 -3600
# Node ID eb247ea9db8c8b541a7f8c9cdc51c064c4c9e41c
# Parent  105c938eacbbc250447a676bb2088f804033b82b
x86: check CPUID level before enabling xsave
References: bnc#640773

While not as relevant after c/s 21894, is still seems safer to check
the CPUID level here, just like Linux does. The is particularly
relevant for the 4.0 tree (which doesn't have said c/s), but also
possibly for nested environments where writing MSR_IA32_MISC_ENABLE
may not actually take effect (Xen itself ignores such writes).

Signed-off-by: Jan Beulich <jbeulich@novell.com>

--- a/xen/arch/x86/i387.c
+++ b/xen/arch/x86/i387.c
@@ -132,6 +132,8 @@ void restore_fpu(struct vcpu *v)
     }
 }
 
+#define XSTATE_CPUID 0xd
+
 /*
  * Maximum size (in byte) of the XSAVE/XRSTOR save area required by all
  * the supported and enabled features on the processor, including the
@@ -148,7 +150,12 @@ void xsave_init(void)
     int cpu = smp_processor_id();
     u32 min_size;
 
-    cpuid_count(0xd, 0, &eax, &ebx, &ecx, &edx);
+    if ( boot_cpu_data.cpuid_level < XSTATE_CPUID ) {
+        printk(XENLOG_ERR "XSTATE_CPUID missing\n");
+        return;
+    }
+
+    cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
 
     printk("%s: cpu%d: cntxt_max_size: 0x%x and states: %08x:%08x\n",
         __func__, cpu, ecx, edx, eax);
@@ -169,7 +176,7 @@ void xsave_init(void)
      */
     set_in_cr4(X86_CR4_OSXSAVE);
     set_xcr0(eax & XCNTXT_MASK);
-    cpuid_count(0xd, 0, &eax, &ebx, &ecx, &edx);
+    cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
     clear_in_cr4(X86_CR4_OSXSAVE);
 
     if ( cpu == 0 )