xen/18943-amd-32bit-paging-limit.patch

29 lines
1.1 KiB
Diff

# HG changeset patch
# User Keir Fraser <keir.fraser@citrix.com>
# Date 1230557552 0
# Node ID 0af9fbf3f05306d4972cf05e4b6d7be2199a41cb
# Parent c54d6f871de8f271aaeb571c3b87eae9165e3183
x86: Do not restrict 32-bit EPT to 4GB.
Signed-off-by: Xin, Xiaohui <xiaohui.xin@intel.com>
Index: xen-3.3.1-testing/xen/arch/x86/mm/p2m.c
===================================================================
--- xen-3.3.1-testing.orig/xen/arch/x86/mm/p2m.c
+++ xen-3.3.1-testing/xen/arch/x86/mm/p2m.c
@@ -935,11 +935,12 @@ guest_physmap_add_entry(struct domain *d
#if CONFIG_PAGING_LEVELS == 3
/*
- * 32bit PAE nested paging does not support over 4GB guest due to
+ * 32bit AMD nested paging does not support over 4GB guest due to
* hardware translation limit. This limitation is checked by comparing
* gfn with 0xfffffUL.
*/
- if ( paging_mode_hap(d) && (gfn > 0xfffffUL) )
+ if ( paging_mode_hap(d) && (gfn > 0xfffffUL) &&
+ (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) )
{
if ( !test_and_set_bool(d->arch.hvm_domain.svm.npt_4gb_warning) )
dprintk(XENLOG_WARNING, "Dom%d failed to populate memory beyond"