136 lines
4.4 KiB
Diff
136 lines
4.4 KiB
Diff
# HG changeset patch
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# User Keir Fraser <keir.fraser@citrix.com>
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# Date 1231930540 0
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# Node ID 59274c49a0298fd73f60759c0842a293b5816057
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# Parent cc542ebe48539b9ca0534ca241209734234fdff2
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x86: restore ability to work on systems without APIC
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This got broken with the default-enabling of MSI. Apart from fixing
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the base issue, the patch also addresses
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- the 'i' command crashing where there is no IO-APIC,
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- the 'i' command needlessly printing information for all 256 vectors
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when the use of IO-APIC(s) is disabled, and
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- the need to specify both "nolapic" and "noapic" when "nolapic" alone
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should already have the intended effect.
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Signed-off-by: Jan Beulich <jbeulich@novell.com>
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--- a/xen/arch/x86/apic.c
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+++ b/xen/arch/x86/apic.c
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@@ -40,7 +40,7 @@
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/*
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* Knob to control our willingness to enable the local APIC.
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*/
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-int enable_local_apic __initdata = 0; /* -1=force-disable, +1=force-enable */
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+static int enable_local_apic __initdata = 0; /* -1=force-disable, +1=force-enable */
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/*
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* Debug level
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@@ -719,7 +719,7 @@ static void apic_pm_activate(void)
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static void __init lapic_disable(char *str)
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{
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enable_local_apic = -1;
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- clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
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+ setup_clear_cpu_cap(X86_FEATURE_APIC);
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}
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custom_param("nolapic", lapic_disable);
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@@ -852,6 +852,7 @@ void __init init_apic_mappings(void)
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if (!smp_found_config && detect_init_APIC()) {
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apic_phys = __pa(alloc_xenheap_page());
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clear_page(__va(apic_phys));
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+ msi_enable = 0;
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} else
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apic_phys = mp_lapic_addr;
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@@ -1280,8 +1281,10 @@ int __init APIC_init_uniprocessor (void)
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if (enable_local_apic < 0)
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clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
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- if (!smp_found_config && !cpu_has_apic)
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+ if (!smp_found_config && !cpu_has_apic) {
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+ msi_enable = 0;
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return -1;
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+ }
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/*
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* Complain if the BIOS pretends there is one.
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@@ -1290,6 +1293,7 @@ int __init APIC_init_uniprocessor (void)
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printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
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boot_cpu_physical_apicid);
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clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
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+ msi_enable = 0;
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return -1;
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}
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--- a/xen/arch/x86/cpu/common.c
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+++ b/xen/arch/x86/cpu/common.c
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@@ -29,6 +29,14 @@ struct cpu_dev * cpu_devs[X86_VENDOR_NUM
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*/
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u64 host_pat = 0x050100070406;
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+static unsigned int __cpuinitdata cleared_caps[NCAPINTS];
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+
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+void __init setup_clear_cpu_cap(unsigned int cap)
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+{
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+ __clear_bit(cap, boot_cpu_data.x86_capability);
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+ __set_bit(cap, cleared_caps);
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+}
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+
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static void default_init(struct cpuinfo_x86 * c)
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{
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/* Not much we can do here... */
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@@ -235,6 +243,7 @@ static void __init early_cpu_detect(void
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if (c->x86 >= 0x6)
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c->x86_model += ((tfms >> 16) & 0xF) << 4;
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c->x86_mask = tfms & 15;
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+ cap0 &= ~cleared_caps[0];
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if (cap0 & (1<<19))
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c->x86_cache_alignment = ((misc >> 8) & 0xff) * 8;
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c->x86_capability[0] = cap0; /* Added for Xen bootstrap */
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@@ -395,6 +404,9 @@ void __cpuinit identify_cpu(struct cpuin
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if (disable_pse)
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clear_bit(X86_FEATURE_PSE, c->x86_capability);
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+ for (i = 0 ; i < NCAPINTS ; ++i)
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+ c->x86_capability[i] &= ~cleared_caps[i];
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+
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/* If the model name is still unset, do table lookup. */
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if ( !c->x86_model_id[0] ) {
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char *p;
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--- a/xen/arch/x86/io_apic.c
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+++ b/xen/arch/x86/io_apic.c
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@@ -87,7 +87,9 @@ int disable_timer_pin_1 __initdata;
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static struct irq_pin_list {
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int apic, pin, next;
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-} irq_2_pin[PIN_MAP_SIZE];
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+} irq_2_pin[PIN_MAP_SIZE] = {
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+ [0 ... PIN_MAP_SIZE-1].pin = -1
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+};
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static int irq_2_pin_free_entry = NR_IRQS;
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int vector_irq[NR_VECTORS] __read_mostly = {
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@@ -1020,11 +1022,6 @@ static void __init enable_IO_APIC(void)
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int i, apic;
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unsigned long flags;
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- for (i = 0; i < PIN_MAP_SIZE; i++) {
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- irq_2_pin[i].pin = -1;
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- irq_2_pin[i].next = 0;
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- }
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-
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/* Initialise dynamic irq_2_pin free list. */
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for (i = NR_IRQS; i < PIN_MAP_SIZE; i++)
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irq_2_pin[i].next = i + 1;
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--- a/xen/include/asm-x86/processor.h
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+++ b/xen/include/asm-x86/processor.h
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@@ -191,6 +191,7 @@ extern int phys_proc_id[NR_CPUS];
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extern int cpu_core_id[NR_CPUS];
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extern void identify_cpu(struct cpuinfo_x86 *);
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+extern void setup_clear_cpu_cap(unsigned int);
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extern void print_cpu_info(struct cpuinfo_x86 *);
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extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
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extern void dodgy_tsc(void);
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