8724a18868
config handling stack overflow 55a62eb0-xl-correct-handling-of-extra_config-in-main_cpupoolcreate.patch - bsc#907514 - Bus fatal error & sles12 sudden reboot has been observed - bsc#910258 - SLES12 Xen host crashes with FATAL NMI after shutdown of guest with VT-d NIC - bsc#918984 - Bus fatal error & sles11-SP4 sudden reboot has been observed - bsc#923967 - Partner-L3: Bus fatal error & sles11-SP3 sudden reboot has been observed 552d293b-x86-vMSI-X-honor-all-mask-requests.patch 552d2966-x86-vMSI-X-add-valid-bits-for-read-acceleration.patch 5576f143-x86-adjust-PV-I-O-emulation-functions-types.patch 55795a52-x86-vMSI-X-support-qword-MMIO-access.patch 5583d9c5-x86-MSI-X-cleanup.patch 5583da09-x86-MSI-track-host-and-guest-masking-separately.patch 55b0a218-x86-PCI-CFG-write-intercept.patch 55b0a255-x86-MSI-X-maskall.patch 55b0a283-x86-MSI-X-teardown.patch 55b0a2ab-x86-MSI-X-enable.patch 55b0a2db-x86-MSI-track-guest-masking.patch - Upstream patches from Jan 552d0f49-x86-traps-identify-the-vcpu-in-context-when-dumping-regs.patch 559bc633-x86-cpupool-clear-proper-cpu_valid-bit-on-CPU-teardown.patch 559bc64e-credit1-properly-deal-with-CPUs-not-in-any-pool.patch 559bc87f-x86-hvmloader-avoid-data-corruption-with-xenstore-rw.patch 55a66a1e-make-rangeset_report_ranges-report-all-ranges.patch 55a77e4f-dmar-device-scope-mem-leak-fix.patch OBS-URL: https://build.opensuse.org/package/show/Virtualization/xen?expand=0&rev=373
56 lines
1.6 KiB
Diff
56 lines
1.6 KiB
Diff
References: bsc#907514 bsc#910258 bsc#918984 bsc#923967
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# Commit aa7c1fdf9dd04a1287f4770906b2c41b88a28228
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# Date 2015-07-23 10:16:27 +0200
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# Author Jan Beulich <jbeulich@suse.com>
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# Committer Jan Beulich <jbeulich@suse.com>
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x86/MSI: properly track guest masking requests
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... by monitoring writes to the mask register.
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This allows reverting the main effect of the XSA-129 patches in qemu.
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Signed-off-by: Jan Beulich <jbeulich@suse.com>
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Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
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--- a/xen/arch/x86/msi.c
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+++ b/xen/arch/x86/msi.c
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@@ -1303,6 +1303,37 @@ int pci_msi_conf_write_intercept(struct
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return 1;
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}
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+ entry = find_msi_entry(pdev, -1, PCI_CAP_ID_MSI);
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+ if ( entry && entry->msi_attrib.maskbit )
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+ {
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+ uint16_t cntl;
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+ uint32_t unused;
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+
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+ pos = entry->msi_attrib.pos;
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+ if ( reg < pos || reg >= entry->msi.mpos + 8 )
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+ return 0;
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+
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+ if ( reg == msi_control_reg(pos) )
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+ return size == 2 ? 1 : -EACCES;
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+ if ( reg < entry->msi.mpos || reg >= entry->msi.mpos + 4 || size != 4 )
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+ return -EACCES;
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+
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+ cntl = pci_conf_read16(seg, bus, slot, func, msi_control_reg(pos));
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+ unused = ~(uint32_t)0 >> (32 - multi_msi_capable(cntl));
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+ for ( pos = 0; pos < entry->msi.nvec; ++pos, ++entry )
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+ {
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+ entry->msi_attrib.guest_masked =
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+ *data >> entry->msi_attrib.entry_nr;
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+ if ( entry->msi_attrib.host_masked )
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+ *data |= 1 << pos;
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+ unused &= ~(1 << pos);
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+ }
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+
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+ *data |= unused;
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+
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+ return 1;
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+ }
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+
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return 0;
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}
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