4b4fa7f68d
21317-xend-blkif-util-tap2.patch suse-disable-tap2-default.patch - Match upstreams cpu pools switch from domctl to sysctl - Upstream replacements for two of our custom patches (to ease applying further backports) - Fixed dump-exec-state.patch (could previously hang the system, as could - with lower probability - the un-patched implementation) - bnc#593536 - xen hypervisor takes very long to initialize Dom0 on 128 CPUs and 256Gb 21272-x86-dom0-alloc-performance.patch 21266-vmx-disabled-check.patch 21271-x86-cache-flush-global.patch - bnc#558815 - using multiple npiv luns with same wwpn/wwnn broken - bnc#601104 - Xen /etc/xen/scripts/block-npiv script fails when accessing multiple disks using NPIV block-npiv - bnc#595124 - VT-d can not be enabled on 32PAE Xen on Nehalem-EX platform 21234-x86-bad-srat-clear-pxm2node.patch bnc#585371 - kdump fails to load with xen: locate_hole failed 21235-crashkernel-advanced.patch - bnc#588918 - Attaching a U-disk to domain's failed by "xm usb-attach" init.xend OBS-URL: https://build.opensuse.org/package/show/Virtualization/xen?expand=0&rev=44
66 lines
2.2 KiB
Diff
66 lines
2.2 KiB
Diff
# HG changeset patch
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# User Keir Fraser <keir.fraser@citrix.com>
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# Date 1272973271 -3600
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# Node ID 6c7b905b03ff1cf171187bafe7129e3e213e5787
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# Parent bd52f2e040e5a5ca58e956b3d0780a86934a429e
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x86: add support for domain-initiated global cache flush
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Newer Linux' AGP code wants to flush caches on all CPUs under certain
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circumstances. Since doing this on all vCPU-s of the domain in
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question doesn't yield the intended effect, this needs to be done in
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the hypervisor. Add a new MMUEXT operation for this.
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Signed-off-by: Jan Beulich <jbeulich@novell.com>
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--- a/xen/arch/x86/mm.c
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+++ b/xen/arch/x86/mm.c
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@@ -2887,6 +2887,27 @@ int do_mmuext_op(
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}
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break;
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+ case MMUEXT_FLUSH_CACHE_GLOBAL:
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+ if ( unlikely(foreigndom != DOMID_SELF) )
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+ okay = 0;
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+ else if ( likely(cache_flush_permitted(d)) )
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+ {
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+ unsigned int cpu;
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+ cpumask_t mask = CPU_MASK_NONE;
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+
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+ for_each_online_cpu(cpu)
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+ if ( !cpus_intersects(mask,
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+ per_cpu(cpu_sibling_map, cpu)) )
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+ cpu_set(cpu, mask);
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+ flush_mask(&mask, FLUSH_CACHE);
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+ }
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+ else
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+ {
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+ MEM_LOG("Non-physdev domain tried to FLUSH_CACHE_GLOBAL");
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+ okay = 0;
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+ }
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+ break;
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+
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case MMUEXT_SET_LDT:
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{
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unsigned long ptr = op.arg1.linear_addr;
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--- a/xen/include/public/xen.h
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+++ b/xen/include/public/xen.h
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@@ -239,6 +239,10 @@ DEFINE_XEN_GUEST_HANDLE(xen_pfn_t);
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*
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* cmd: MMUEXT_FLUSH_CACHE
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* No additional arguments. Writes back and flushes cache contents.
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+ *
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+ * cmd: MMUEXT_FLUSH_CACHE_GLOBAL
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+ * No additional arguments. Writes back and flushes cache contents
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+ * on all CPUs in the system.
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*
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* cmd: MMUEXT_SET_LDT
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* linear_addr: Linear address of LDT base (NB. must be page-aligned).
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@@ -268,6 +272,7 @@ DEFINE_XEN_GUEST_HANDLE(xen_pfn_t);
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#define MMUEXT_NEW_USER_BASEPTR 15
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#define MMUEXT_CLEAR_PAGE 16
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#define MMUEXT_COPY_PAGE 17
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+#define MMUEXT_FLUSH_CACHE_GLOBAL 18
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#ifndef __ASSEMBLY__
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struct mmuext_op {
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