898ade9d0e
disk in Xen kernel 26133-IOMMU-defer-BM-disable.patch 26324-IOMMU-assign-params.patch 26325-IOMMU-add-remove-params.patch 26326-VT-d-context-map-params.patch 26327-AMD-IOMMU-flush-params.patch 26328-IOMMU-pdev-type.patch 26329-IOMMU-phantom-dev.patch 26330-VT-d-phantom-MSI.patch 26331-IOMMU-phantom-dev-quirk.patch - Upstream patches from Jan 26294-x86-AMD-Fam15-way-access-filter.patch 26320-IOMMU-domctl-assign-seg.patch 26332-x86-compat-show-guest-stack-mfn.patch 26333-x86-get_page_type-assert.patch - bnc#794316 - VUL-0: CVE-2012-5634: xen: VT-d interrupt remapping source validation flaw (XSA-33) CVE-2012-5634-xsa33.patch - Update to Xen 4.2.1 c/s 25952 - Upstream patches from Jan 26195-x86-compat-atp-gmfn-range-cont.patch 26196-ACPI-set-PDC-bits-rc.patch 26200-IOMMU-debug-verbose.patch 26203-x86-HAP-dirty-vram-leak.patch 26229-gnttab-version-switch.patch (Replaces CVE-2012-5510-xsa26.patch) 26230-x86-HVM-limit-batches.patch (Replaces CVE-2012-5511-xsa27.patch) OBS-URL: https://build.opensuse.org/package/show/Virtualization/xen?expand=0&rev=220
130 lines
4.4 KiB
Diff
130 lines
4.4 KiB
Diff
References: FATE#313633
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# HG changeset patch
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# User Liu, Jinsong <jinsong.liu@intel.com>
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# Date 1348654362 -7200
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# Node ID c47ef9592fb39325e33f8406b4bd736cc84482e5
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# Parent 5d63c633a60b9a1d695594f9c17cf933240bec81
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x86: Implement TSC adjust feature for HVM guest
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IA32_TSC_ADJUST MSR is maintained separately for each logical
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processor. A logical processor maintains and uses the IA32_TSC_ADJUST
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MSR as follows:
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1). On RESET, the value of the IA32_TSC_ADJUST MSR is 0;
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2). If an execution of WRMSR to the IA32_TIME_STAMP_COUNTER MSR adds
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(or subtracts) value X from the TSC, the logical processor also
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adds (or subtracts) value X from the IA32_TSC_ADJUST MSR;
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3). If an execution of WRMSR to the IA32_TSC_ADJUST MSR adds (or
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subtracts) value X from that MSR, the logical processor also adds
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(or subtracts) value X from the TSC.
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This patch provides tsc adjust support for hvm guest, with it guest OS
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would be happy when sync tsc.
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Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
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Committed-by: Jan Beulich <jbeulich@suse.com>
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Index: xen-4.2.0-testing/xen/arch/x86/hvm/hvm.c
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===================================================================
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--- xen-4.2.0-testing.orig/xen/arch/x86/hvm/hvm.c
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+++ xen-4.2.0-testing/xen/arch/x86/hvm/hvm.c
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@@ -244,6 +244,7 @@ int hvm_set_guest_pat(struct vcpu *v, u6
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void hvm_set_guest_tsc(struct vcpu *v, u64 guest_tsc)
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{
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uint64_t tsc;
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+ uint64_t delta_tsc;
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if ( v->domain->arch.vtsc )
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{
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@@ -255,10 +256,22 @@ void hvm_set_guest_tsc(struct vcpu *v, u
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rdtscll(tsc);
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}
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- v->arch.hvm_vcpu.cache_tsc_offset = guest_tsc - tsc;
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+ delta_tsc = guest_tsc - tsc;
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+ v->arch.hvm_vcpu.msr_tsc_adjust += delta_tsc
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+ - v->arch.hvm_vcpu.cache_tsc_offset;
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+ v->arch.hvm_vcpu.cache_tsc_offset = delta_tsc;
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+
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hvm_funcs.set_tsc_offset(v, v->arch.hvm_vcpu.cache_tsc_offset);
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}
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+void hvm_set_guest_tsc_adjust(struct vcpu *v, u64 tsc_adjust)
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+{
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+ v->arch.hvm_vcpu.cache_tsc_offset += tsc_adjust
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+ - v->arch.hvm_vcpu.msr_tsc_adjust;
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+ hvm_funcs.set_tsc_offset(v, v->arch.hvm_vcpu.cache_tsc_offset);
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+ v->arch.hvm_vcpu.msr_tsc_adjust = tsc_adjust;
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+}
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+
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u64 hvm_get_guest_tsc(struct vcpu *v)
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{
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uint64_t tsc;
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@@ -277,6 +290,11 @@ u64 hvm_get_guest_tsc(struct vcpu *v)
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return tsc + v->arch.hvm_vcpu.cache_tsc_offset;
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}
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+u64 hvm_get_guest_tsc_adjust(struct vcpu *v)
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+{
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+ return v->arch.hvm_vcpu.msr_tsc_adjust;
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+}
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+
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void hvm_migrate_timers(struct vcpu *v)
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{
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rtc_migrate_timers(v);
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@@ -2798,6 +2816,10 @@ int hvm_msr_read_intercept(unsigned int
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*msr_content = hvm_get_guest_tsc(v);
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break;
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+ case MSR_IA32_TSC_ADJUST:
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+ *msr_content = hvm_get_guest_tsc_adjust(v);
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+ break;
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+
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case MSR_TSC_AUX:
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*msr_content = hvm_msr_tsc_aux(v);
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break;
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@@ -2911,6 +2933,10 @@ int hvm_msr_write_intercept(unsigned int
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hvm_set_guest_tsc(v, msr_content);
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break;
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+ case MSR_IA32_TSC_ADJUST:
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+ hvm_set_guest_tsc_adjust(v, msr_content);
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+ break;
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+
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case MSR_TSC_AUX:
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v->arch.hvm_vcpu.msr_tsc_aux = (uint32_t)msr_content;
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if ( cpu_has_rdtscp
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@@ -3482,6 +3508,8 @@ void hvm_vcpu_reset_state(struct vcpu *v
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v->domain->vcpu[0]->arch.hvm_vcpu.cache_tsc_offset;
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hvm_funcs.set_tsc_offset(v, v->arch.hvm_vcpu.cache_tsc_offset);
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+ v->arch.hvm_vcpu.msr_tsc_adjust = 0;
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+
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paging_update_paging_modes(v);
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v->arch.flags |= TF_kernel_mode;
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Index: xen-4.2.0-testing/xen/include/asm-x86/hvm/vcpu.h
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===================================================================
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--- xen-4.2.0-testing.orig/xen/include/asm-x86/hvm/vcpu.h
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+++ xen-4.2.0-testing/xen/include/asm-x86/hvm/vcpu.h
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@@ -137,6 +137,7 @@ struct hvm_vcpu {
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struct hvm_vcpu_asid n1asid;
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u32 msr_tsc_aux;
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+ u64 msr_tsc_adjust;
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/* VPMU */
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struct vpmu_struct vpmu;
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Index: xen-4.2.0-testing/xen/include/asm-x86/msr-index.h
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===================================================================
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--- xen-4.2.0-testing.orig/xen/include/asm-x86/msr-index.h
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+++ xen-4.2.0-testing/xen/include/asm-x86/msr-index.h
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@@ -284,6 +284,7 @@
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#define MSR_IA32_PLATFORM_ID 0x00000017
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#define MSR_IA32_EBL_CR_POWERON 0x0000002a
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#define MSR_IA32_EBC_FREQUENCY_ID 0x0000002c
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+#define MSR_IA32_TSC_ADJUST 0x0000003b
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#define MSR_IA32_APICBASE 0x0000001b
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#define MSR_IA32_APICBASE_BSP (1<<8)
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