c608e23838
Turn off building the KMPs now that we are using the pvops kernel xen.spec - Upstream patches from Jan 561bbc8b-VT-d-don-t-suppress-invalidation-address-write-when-it-is-zero.patch 561d20a0-x86-hide-MWAITX-from-PV-domains.patch 561e3283-x86-NUMA-fix-SRAT-table-processor-entry-parsing-and-consumption.patch 5632118e-arm-Support-hypercall_create_continuation-for-multicall.patch 56321222-arm-rate-limit-logging-from-unimplemented-PHYSDEVOP-and-HVMOP.patch 56321249-arm-handle-races-between-relinquish_memory-and-free_domheap_pages.patch 5632127b-x86-guard-against-undue-super-page-PTE-creation.patch 5632129c-free-domain-s-vcpu-array.patch (Replaces CVE-2015-7969-xsa149.patch) 563212c9-x86-PoD-Eager-sweep-for-zeroed-pages.patch 563212e4-xenoprof-free-domain-s-vcpu-array.patch 563212ff-x86-rate-limit-logging-in-do_xen-oprof-pmu-_op.patch 56323737-libxl-adjust-PoD-target-by-memory-fudge-too.patch 56377442-x86-PoD-Make-p2m_pod_empty_cache-restartable.patch 5641ceec-x86-HVM-always-intercept-AC-and-DB.patch (Replaces CVE-2015-5307-xsa156.patch) 5644b756-x86-HVM-don-t-inject-DB-with-error-code.patch - Dropped 55b0a2db-x86-MSI-track-guest-masking.patch - Use upstream variants of block-iscsi and block-nbd - Remove xenalyze.hg, its part of xen-4.6 OBS-URL: https://build.opensuse.org/package/show/Virtualization/xen?expand=0&rev=389
33 lines
1.4 KiB
Diff
33 lines
1.4 KiB
Diff
# Commit 941cd44324db7eddc46cba4596fa13d505066ccf
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# Date 2015-10-13 17:17:52 +0200
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# Author Jan Beulich <jbeulich@suse.com>
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# Committer Jan Beulich <jbeulich@suse.com>
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x86: hide MWAITX from PV domains
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Since MWAIT is hidden too. (Linux starting with 4.3 is making use of
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that feature, and is checking for it without looking at the MWAIT one.)
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Signed-off-by: Jan Beulich <jbeulich@suse.com>
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Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
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--- a/xen/arch/x86/traps.c
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+++ b/xen/arch/x86/traps.c
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@@ -967,6 +967,7 @@ void pv_cpuid(struct cpu_user_regs *regs
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__clear_bit(X86_FEATURE_LWP % 32, &c);
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__clear_bit(X86_FEATURE_NODEID_MSR % 32, &c);
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__clear_bit(X86_FEATURE_TOPOEXT % 32, &c);
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+ __clear_bit(X86_FEATURE_MWAITX % 32, &c);
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break;
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case 0x0000000a: /* Architectural Performance Monitor Features (Intel) */
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--- a/xen/include/asm-x86/cpufeature.h
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+++ b/xen/include/asm-x86/cpufeature.h
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@@ -135,6 +135,7 @@
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#define X86_FEATURE_TBM (6*32+21) /* trailing bit manipulations */
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#define X86_FEATURE_TOPOEXT (6*32+22) /* topology extensions CPUID leafs */
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#define X86_FEATURE_DBEXT (6*32+26) /* data breakpoint extension */
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+#define X86_FEATURE_MWAITX (6*32+29) /* MWAIT extension (MONITORX/MWAITX) */
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/* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 7 */
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#define X86_FEATURE_FSGSBASE (7*32+ 0) /* {RD,WR}{FS,GS}BASE instructions */
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