5859155d6b
57580bbd-kexec-allow-relaxed-placement-via-cmdline.patch - Upstream patches from Jan 575e9ca0-nested-vmx-Validate-host-VMX-MSRs-before-accessing-them.patch 57640448-xen-sched-use-default-scheduler-upon-an-invalid-sched.patch OBS-URL: https://build.opensuse.org/package/show/Virtualization/xen?expand=0&rev=442
63 lines
2.2 KiB
Diff
63 lines
2.2 KiB
Diff
# Commit 5e02972646132ad98c365ebfcfcb43b40a0dde36
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# Date 2016-06-13 12:44:32 +0100
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# Author Euan Harris <euan.harris@citrix.com>
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# Committer Andrew Cooper <andrew.cooper3@citrix.com>
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nested vmx: Validate host VMX MSRs before accessing them
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Some VMX MSRs may not exist on certain processor models, or may
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be disabled because of configuration settings. It is only safe to
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access these MSRs if configuration flags in other MSRs are set. These
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prerequisites are listed in the Intel 64 and IA-32 Architectures
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Software Developer’s Manual, Vol 3, Appendix A.
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nvmx_msr_read_intercept() does not check the prerequisites before
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accessing MSR_IA32_VMX_PROCBASED_CTLS2, MSR_IA32_VMX_EPT_VPID_CAP,
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MSR_IA32_VMX_VMFUNC on the host. Accessing these MSRs from a nested
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VMX guest running on a host which does not support them will cause
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Xen to crash with a GPF.
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Signed-off-by: Euan Harris <euan.harris@citrix.com>
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Acked-by: Kevin Tian <kevin.tian@intel.com>
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Reviewed-by: Jan Beulich <jbeulich@suse.com>
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Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
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--- a/xen/arch/x86/hvm/vmx/vvmx.c
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+++ b/xen/arch/x86/hvm/vmx/vvmx.c
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@@ -1820,11 +1820,22 @@ int nvmx_msr_read_intercept(unsigned int
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return 0;
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/*
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- * Those MSRs are available only when bit 55 of
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- * MSR_IA32_VMX_BASIC is set.
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+ * These MSRs are only available when flags in other MSRs are set.
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+ * These prerequisites are listed in the Intel 64 and IA-32
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+ * Architectures Software Developer’s Manual, Vol 3, Appendix A.
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*/
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switch ( msr )
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{
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+ case MSR_IA32_VMX_PROCBASED_CTLS2:
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+ if ( !cpu_has_vmx_secondary_exec_control )
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+ return 0;
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+ break;
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+
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+ case MSR_IA32_VMX_EPT_VPID_CAP:
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+ if ( !(cpu_has_vmx_ept || cpu_has_vmx_vpid) )
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+ return 0;
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+ break;
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+
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case MSR_IA32_VMX_TRUE_PINBASED_CTLS:
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case MSR_IA32_VMX_TRUE_PROCBASED_CTLS:
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case MSR_IA32_VMX_TRUE_EXIT_CTLS:
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@@ -1832,6 +1843,11 @@ int nvmx_msr_read_intercept(unsigned int
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if ( !(vmx_basic_msr & VMX_BASIC_DEFAULT1_ZERO) )
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return 0;
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break;
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+
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+ case MSR_IA32_VMX_VMFUNC:
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+ if ( !cpu_has_vmx_vmfunc )
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+ return 0;
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+ break;
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}
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rdmsrl(msr, host_data);
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