b244ce9e91
sles10. Patch pygrub to get the kernel and initrd from the image. pygrub-boot-legacy-sles.patch - bnc#842515 - VUL-0: CVE-2013-4375: XSA-71: xen: qemu disk backend (qdisk) resource leak CVE-2013-4375-xsa71.patch - Upstream patches from Jan 52496bea-x86-properly-handle-hvm_copy_from_guest_-phys-virt-errors.patch (Replaces CVE-2013-4355-xsa63.patch) 52496c11-x86-mm-shadow-Fix-initialization-of-PV-shadow-L4-tables.patch (Replaces CVE-2013-4356-xsa64.patch) 52496c32-x86-properly-set-up-fbld-emulation-operand-address.patch (Replaces CVE-2013-4361-xsa66.patch) 52497c6c-x86-don-t-blindly-create-L3-tables-for-the-direct-map.patch 524e971b-x86-idle-Fix-get_cpu_idle_time-s-interaction-with-offline-pcpus.patch 524e9762-x86-percpu-Force-INVALID_PERCPU_AREA-to-non-canonical.patch 524e983e-Nested-VMX-check-VMX-capability-before-read-VMX-related-MSRs.patch 524e98b1-Nested-VMX-fix-IA32_VMX_CR4_FIXED1-msr-emulation.patch 524e9dc0-xsm-forbid-PV-guest-console-reads.patch 5256a979-x86-check-segment-descriptor-read-result-in-64-bit-OUTS-emulation.patch 5256be57-libxl-fix-vif-rate-parsing.patch 5256be84-tools-ocaml-fix-erroneous-free-of-cpumap-in-stub_xc_vcpu_getaffinity.patch 5256be92-libxl-fix-out-of-memory-error-handling-in-libxl_list_cpupool.patch 5257a89a-x86-correct-LDT-checks.patch 5257a8e7-x86-add-address-validity-check-to-guest_map_l1e.patch 5257a944-x86-check-for-canonical-address-before-doing-page-walks.patch 525b95f4-scheduler-adjust-internal-locking-interface.patch 525b9617-sched-fix-race-between-sched_move_domain-and-vcpu_wake.patch 525e69e8-credit-unpause-parked-vcpu-before-destroying-it.patch 525faf5e-x86-print-relevant-tail-part-of-filename-for-warnings-and-crashes.patch - bnc#840196 - L3: MTU size on Dom0 gets reset when booting DomU OBS-URL: https://build.opensuse.org/package/show/Virtualization/xen?expand=0&rev=276
83 lines
2.6 KiB
Diff
83 lines
2.6 KiB
Diff
# Commit 190b667ac20e8175758f4a3a0f13c4d990e6af7e
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# Date 2013-10-04 12:28:14 +0200
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# Author Yang Zhang <yang.z.zhang@Intel.com>
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# Committer Jan Beulich <jbeulich@suse.com>
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Nested VMX: check VMX capability before read VMX related MSRs
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VMX MSRs only available when the CPU support the VMX feature. In addition,
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VMX_TRUE* MSRs only available when bit 55 of VMX_BASIC MSR is set.
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Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
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Cleanup.
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Signed-off-by: Jan Beulich <jbeulich@suse.com>
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Acked-by: Jun Nakajima <jun.nakajima@intel.com>
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--- a/xen/arch/x86/hvm/vmx/vmcs.c
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+++ b/xen/arch/x86/hvm/vmx/vmcs.c
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@@ -78,6 +78,7 @@ static DEFINE_PER_CPU(struct list_head,
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static DEFINE_PER_CPU(bool_t, vmxon);
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static u32 vmcs_revision_id __read_mostly;
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+u64 __read_mostly vmx_basic_msr;
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static void __init vmx_display_features(void)
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{
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@@ -301,6 +302,8 @@ static int vmx_init_vmcs_config(void)
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vmx_vmexit_control = _vmx_vmexit_control;
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vmx_vmentry_control = _vmx_vmentry_control;
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cpu_has_vmx_ins_outs_instr_info = !!(vmx_basic_msr_high & (1U<<22));
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+ vmx_basic_msr = ((u64)vmx_basic_msr_high << 32) |
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+ vmx_basic_msr_low;
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vmx_display_features();
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}
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else
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--- a/xen/arch/x86/hvm/vmx/vvmx.c
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+++ b/xen/arch/x86/hvm/vmx/vvmx.c
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@@ -1814,12 +1814,33 @@ int nvmx_handle_invvpid(struct cpu_user_
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int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content)
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{
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struct vcpu *v = current;
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+ unsigned int ecx, dummy;
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u64 data = 0, host_data = 0;
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int r = 1;
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if ( !nestedhvm_enabled(v->domain) )
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return 0;
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+ /* VMX capablity MSRs are available only when guest supports VMX. */
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+ hvm_cpuid(0x1, &dummy, &dummy, &ecx, &dummy);
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+ if ( !(ecx & cpufeat_mask(X86_FEATURE_VMXE)) )
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+ return 0;
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+
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+ /*
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+ * Those MSRs are available only when bit 55 of
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+ * MSR_IA32_VMX_BASIC is set.
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+ */
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+ switch ( msr )
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+ {
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+ case MSR_IA32_VMX_TRUE_PINBASED_CTLS:
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+ case MSR_IA32_VMX_TRUE_PROCBASED_CTLS:
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+ case MSR_IA32_VMX_TRUE_EXIT_CTLS:
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+ case MSR_IA32_VMX_TRUE_ENTRY_CTLS:
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+ if ( !(vmx_basic_msr & VMX_BASIC_DEFAULT1_ZERO) )
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+ return 0;
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+ break;
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+ }
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+
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rdmsrl(msr, host_data);
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/*
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--- a/xen/include/asm-x86/hvm/vmx/vmcs.h
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+++ b/xen/include/asm-x86/hvm/vmx/vmcs.h
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@@ -284,6 +284,8 @@ extern bool_t cpu_has_vmx_ins_outs_instr
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*/
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#define VMX_BASIC_DEFAULT1_ZERO (1ULL << 55)
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+extern u64 vmx_basic_msr;
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+
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/* Guest interrupt status */
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#define VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK 0x0FF
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#define VMX_GUEST_INTR_STATUS_SVI_OFFSET 8
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