xen/5383175e-VT-d-fix-mask-applied-to-DMIBAR-in-desktop-chipset-XSA-59-workaround.patch
Charles Arnold a428832eb0 - Modify how we check for libvirt managed domains
xl-check-for-libvirt-managed-domain.patch

- bnc#878841 - VUL-0: XSA-96: Xen: Vulnerabilities in HVM MSI
  injection
  538dcada-x86-HVM-eliminate-vulnerabilities-from-hvm_inject_msi.patch
- Upstream patches from Jan
  537cd0b0-hvmloader-also-cover-PCI-MMIO-ranges-above-4G-with-UC-MTRR-ranges.patch
  537cd0cc-hvmloader-PA-range-0xfc000000-0xffffffff-should-be-UC.patch
  5383167d-ACPI-ERST-fix-table-mapping.patch
  5383175e-VT-d-fix-mask-applied-to-DMIBAR-in-desktop-chipset-XSA-59-workaround.patch
  53859549-AMD-IOMMU-don-t-free-page-table-prematurely.patch
  5385956b-x86-don-t-use-VA-for-cache-flush-when-also-flushing-TLB.patch
  53859956-timers-set-the-deadline-more-accurately.patch

OBS-URL: https://build.opensuse.org/package/show/Virtualization/xen?expand=0&rev=318
2014-06-12 05:11:30 +00:00

31 lines
1.3 KiB
Diff

# Commit f8ecf31c31906552522c2a1b0d1cada07d78876e
# Date 2014-05-26 12:28:46 +0200
# Author Jan Beulich <jbeulich@suse.com>
# Committer Jan Beulich <jbeulich@suse.com>
VT-d: fix mask applied to DMIBAR in desktop chipset XSA-59 workaround
In commit ("VT-d: suppress UR signaling for desktop chipsets")
the mask applied to the value read from DMIBAR is to narrow, only the
comment accompanying it was correct. Fix that and tag the literal
number as "long" at once to avoid eventual compiler warnings.
The widest possible value so far is 39 bits; all chipsets covered here
but having less than this number of bits have the remaining bits marked
reserved (zero), and hence there's no need for making the mask chipset
specific.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Yang Zhang <yang.z.zhang@intel.com>
--- a/xen/drivers/passthrough/vtd/quirks.c
+++ b/xen/drivers/passthrough/vtd/quirks.c
@@ -467,7 +467,7 @@ void pci_vtd_quirk(const struct pci_dev
case 0xc00: case 0xc04: case 0xc08: /* Haswell */
bar = pci_conf_read32(seg, bus, dev, func, 0x6c);
bar = (bar << 32) | pci_conf_read32(seg, bus, dev, func, 0x68);
- pa = bar & 0x7fffff000; /* bits 12...38 */
+ pa = bar & 0x7ffffff000UL; /* bits 12...38 */
if ( (bar & 1) && pa &&
page_is_ram_type(paddr_to_pfn(pa), RAM_TYPE_RESERVED) )
{