506 lines
20 KiB
Diff
506 lines
20 KiB
Diff
Index: 2006-12-11/xen/arch/x86/x86_32/entry.S
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===================================================================
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--- 2006-12-11.orig/xen/arch/x86/x86_32/entry.S 2006-12-15 15:21:44.000000000 +0100
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+++ 2006-12-11/xen/arch/x86/x86_32/entry.S 2006-12-15 15:39:13.000000000 +0100
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@@ -84,10 +84,10 @@ restore_all_guest:
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jmp restore_all_vm86
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1:
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#endif
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-FLT1: mov UREGS_ds(%esp),%ds
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-FLT2: mov UREGS_es(%esp),%es
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-FLT3: mov UREGS_fs(%esp),%fs
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-FLT4: mov UREGS_gs(%esp),%gs
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+.LFT1: mov UREGS_ds(%esp),%ds
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+.LFT2: mov UREGS_es(%esp),%es
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+.LFT3: mov UREGS_fs(%esp),%fs
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+.LFT4: mov UREGS_gs(%esp),%gs
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restore_all_vm86:
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popl %ebx
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popl %ecx
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@@ -97,9 +97,9 @@ restore_all_vm86:
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popl %ebp
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popl %eax
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addl $4,%esp
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-FLT5: iret
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+.LFT5: iret
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.section .fixup,"ax"
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-FIX5: subl $28,%esp
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+.LFX5: subl $28,%esp
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pushl 28(%esp) # error_code/entry_vector
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movl %eax,UREGS_eax+4(%esp)
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movl %ebp,UREGS_ebp+4(%esp)
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@@ -108,7 +108,7 @@ FIX5: subl $28,%esp
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movl %edx,UREGS_edx+4(%esp)
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movl %ecx,UREGS_ecx+4(%esp)
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movl %ebx,UREGS_ebx+4(%esp)
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-FIX1: SET_XEN_SEGMENTS(a)
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+.LFX1: SET_XEN_SEGMENTS(a)
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movl %eax,%fs
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movl %eax,%gs
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sti
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@@ -116,11 +116,11 @@ FIX1: SET_XEN_SEGMENTS(a)
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pushfl # EFLAGS
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movl $__HYPERVISOR_CS,%eax
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pushl %eax # CS
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- movl $DBLFLT1,%eax
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+ movl $.LDF1,%eax
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pushl %eax # EIP
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pushl %esi # error_code/entry_vector
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jmp handle_exception
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-DBLFLT1:GET_CURRENT(%ebx)
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+.LDF1: GET_CURRENT(%ebx)
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jmp test_all_events
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failsafe_callback:
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GET_CURRENT(%ebx)
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@@ -142,14 +142,14 @@ failsafe_callback:
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jmp test_all_events
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.previous
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.section __pre_ex_table,"a"
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- .long FLT1,FIX1
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- .long FLT2,FIX1
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- .long FLT3,FIX1
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- .long FLT4,FIX1
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- .long FLT5,FIX5
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+ .long .LFT1,.LFX1
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+ .long .LFT2,.LFX1
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+ .long .LFT3,.LFX1
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+ .long .LFT4,.LFX1
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+ .long .LFT5,.LFX5
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.previous
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.section __ex_table,"a"
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- .long DBLFLT1,failsafe_callback
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+ .long .LDF1,failsafe_callback
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.previous
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ALIGN
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@@ -288,32 +288,33 @@ create_bounce_frame:
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testl $(2|X86_EFLAGS_VM),%ecx
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jz ring1 /* jump if returning to an existing ring-1 activation */
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movl VCPU_kernel_sp(%ebx),%esi
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-FLT6: mov VCPU_kernel_ss(%ebx),%gs
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+.LFT6: mov VCPU_kernel_ss(%ebx),%gs
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testl $X86_EFLAGS_VM,UREGS_eflags+4(%esp)
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- jz nvm86_1
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+ jz .Lnvm86_1
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subl $16,%esi /* push ES/DS/FS/GS (VM86 stack frame) */
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movl UREGS_es+4(%esp),%eax
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-FLT7: movl %eax,%gs:(%esi)
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+.LFT7: movl %eax,%gs:(%esi)
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movl UREGS_ds+4(%esp),%eax
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-FLT8: movl %eax,%gs:4(%esi)
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+.LFT8: movl %eax,%gs:4(%esi)
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movl UREGS_fs+4(%esp),%eax
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-FLT9: movl %eax,%gs:8(%esi)
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+.LFT9: movl %eax,%gs:8(%esi)
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movl UREGS_gs+4(%esp),%eax
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-FLT10: movl %eax,%gs:12(%esi)
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-nvm86_1:subl $8,%esi /* push SS/ESP (inter-priv iret) */
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+.LFT10: movl %eax,%gs:12(%esi)
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+.Lnvm86_1:
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+ subl $8,%esi /* push SS/ESP (inter-priv iret) */
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movl UREGS_esp+4(%esp),%eax
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-FLT11: movl %eax,%gs:(%esi)
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+.LFT11: movl %eax,%gs:(%esi)
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movl UREGS_ss+4(%esp),%eax
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-FLT12: movl %eax,%gs:4(%esi)
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+.LFT12: movl %eax,%gs:4(%esi)
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jmp 1f
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ring1: /* obtain ss/esp from oldss/oldesp -- a ring-1 activation exists */
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movl UREGS_esp+4(%esp),%esi
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-FLT13: mov UREGS_ss+4(%esp),%gs
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+.LFT13: mov UREGS_ss+4(%esp),%gs
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1: /* Construct a stack frame: EFLAGS, CS/EIP */
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movb TRAPBOUNCE_flags(%edx),%cl
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subl $12,%esi
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movl UREGS_eip+4(%esp),%eax
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-FLT14: movl %eax,%gs:(%esi)
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+.LFT14: movl %eax,%gs:(%esi)
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movl VCPU_vcpu_info(%ebx),%eax
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pushl VCPUINFO_upcall_mask(%eax)
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testb $TBF_INTERRUPT,%cl
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@@ -324,49 +325,51 @@ FLT14: movl %eax,%gs:(%esi)
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movw UREGS_cs+4(%esp),%ax # Bits 0-15: CS
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#ifdef CONFIG_X86_SUPERVISOR_MODE_KERNEL
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testw $2,%ax
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- jnz FLT15
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+ jnz .LFT15
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and $~3,%ax # RPL 1 -> RPL 0
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#endif
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-FLT15: movl %eax,%gs:4(%esi)
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+.LFT15: movl %eax,%gs:4(%esi)
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test $0x00FF0000,%eax # Bits 16-23: saved_upcall_mask
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setz %ch # %ch == !saved_upcall_mask
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movl UREGS_eflags+4(%esp),%eax
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andl $~X86_EFLAGS_IF,%eax
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shlb $1,%ch # Bit 9 (EFLAGS.IF)
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orb %ch,%ah # Fold EFLAGS.IF into %eax
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-FLT16: movl %eax,%gs:8(%esi)
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+.LFT16: movl %eax,%gs:8(%esi)
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test $TBF_EXCEPTION_ERRCODE,%cl
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jz 1f
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subl $4,%esi # push error_code onto guest frame
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movl TRAPBOUNCE_error_code(%edx),%eax
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-FLT17: movl %eax,%gs:(%esi)
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+.LFT17: movl %eax,%gs:(%esi)
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1: testb $TBF_FAILSAFE,%cl
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jz 2f
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subl $16,%esi # add DS/ES/FS/GS to failsafe stack frame
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testl $X86_EFLAGS_VM,UREGS_eflags+4(%esp)
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- jz nvm86_2
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+ jz .Lnvm86_2
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xorl %eax,%eax # VM86: we write zero selector values
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-FLT18: movl %eax,%gs:(%esi)
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-FLT19: movl %eax,%gs:4(%esi)
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-FLT20: movl %eax,%gs:8(%esi)
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-FLT21: movl %eax,%gs:12(%esi)
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+.LFT18: movl %eax,%gs:(%esi)
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+.LFT19: movl %eax,%gs:4(%esi)
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+.LFT20: movl %eax,%gs:8(%esi)
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+.LFT21: movl %eax,%gs:12(%esi)
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jmp 2f
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-nvm86_2:movl UREGS_ds+4(%esp),%eax # non-VM86: write real selector values
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-FLT22: movl %eax,%gs:(%esi)
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+.Lnvm86_2:
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+ movl UREGS_ds+4(%esp),%eax # non-VM86: write real selector values
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+.LFT22: movl %eax,%gs:(%esi)
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movl UREGS_es+4(%esp),%eax
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-FLT23: movl %eax,%gs:4(%esi)
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+.LFT23: movl %eax,%gs:4(%esi)
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movl UREGS_fs+4(%esp),%eax
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-FLT24: movl %eax,%gs:8(%esi)
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+.LFT24: movl %eax,%gs:8(%esi)
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movl UREGS_gs+4(%esp),%eax
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-FLT25: movl %eax,%gs:12(%esi)
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+.LFT25: movl %eax,%gs:12(%esi)
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2: testl $X86_EFLAGS_VM,UREGS_eflags+4(%esp)
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- jz nvm86_3
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+ jz .Lnvm86_3
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xorl %eax,%eax /* zero DS-GS, just as a real CPU would */
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movl %eax,UREGS_ds+4(%esp)
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movl %eax,UREGS_es+4(%esp)
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movl %eax,UREGS_fs+4(%esp)
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movl %eax,UREGS_gs+4(%esp)
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-nvm86_3:/* Rewrite our stack frame and return to ring 1. */
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+.Lnvm86_3:
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+ /* Rewrite our stack frame and return to ring 1. */
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/* IA32 Ref. Vol. 3: TF, VM, RF and NT flags are cleared on trap. */
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andl $~(X86_EFLAGS_VM|X86_EFLAGS_RF|\
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X86_EFLAGS_NT|X86_EFLAGS_TF),UREGS_eflags+4(%esp)
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@@ -382,16 +385,16 @@ nvm86_3:/* Rewrite our stack frame and r
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movb $0,TRAPBOUNCE_flags(%edx)
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ret
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.section __ex_table,"a"
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- .long FLT6,domain_crash_synchronous , FLT7,domain_crash_page_fault
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- .long FLT8,domain_crash_page_fault_4 , FLT9,domain_crash_page_fault_8
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- .long FLT10,domain_crash_page_fault_12, FLT11,domain_crash_page_fault
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- .long FLT12,domain_crash_page_fault_4 , FLT13,domain_crash_synchronous
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- .long FLT14,domain_crash_page_fault , FLT15,domain_crash_page_fault_4
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- .long FLT16,domain_crash_page_fault_8 , FLT17,domain_crash_page_fault
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- .long FLT18,domain_crash_page_fault , FLT19,domain_crash_page_fault_4
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- .long FLT20,domain_crash_page_fault_8 , FLT21,domain_crash_page_fault_12
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- .long FLT22,domain_crash_page_fault , FLT23,domain_crash_page_fault_4
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- .long FLT24,domain_crash_page_fault_8 , FLT25,domain_crash_page_fault_12
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+ .long .LFT6,domain_crash_synchronous , .LFT7,domain_crash_page_fault
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+ .long .LFT8,domain_crash_page_fault_4 , .LFT9,domain_crash_page_fault_8
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+ .long .LFT10,domain_crash_page_fault_12, .LFT11,domain_crash_page_fault
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+ .long .LFT12,domain_crash_page_fault_4 , .LFT13,domain_crash_synchronous
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+ .long .LFT14,domain_crash_page_fault , .LFT15,domain_crash_page_fault_4
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+ .long .LFT16,domain_crash_page_fault_8 , .LFT17,domain_crash_page_fault
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+ .long .LFT18,domain_crash_page_fault , .LFT19,domain_crash_page_fault_4
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+ .long .LFT20,domain_crash_page_fault_8 , .LFT21,domain_crash_page_fault_12
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+ .long .LFT22,domain_crash_page_fault , .LFT23,domain_crash_page_fault_4
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+ .long .LFT24,domain_crash_page_fault_8 , .LFT25,domain_crash_page_fault_12
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.previous
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.section .rodata,"a"
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Index: 2006-12-11/xen/arch/x86/x86_64/compat/entry.S
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===================================================================
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--- 2006-12-11.orig/xen/arch/x86/x86_64/compat/entry.S 2006-12-15 15:39:03.000000000 +0100
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+++ 2006-12-11/xen/arch/x86/x86_64/compat/entry.S 2006-12-15 15:39:13.000000000 +0100
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@@ -118,10 +118,10 @@ compat_bad_hypercall:
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compat_restore_all_guest:
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RESTORE_ALL
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addq $8,%rsp
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-CFLT0: iretq
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+.Lft0: iretq
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.section .fixup,"ax"
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-CFIX0: popq -15*8-8(%rsp) # error_code/entry_vector
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+.Lfx0: popq -15*8-8(%rsp) # error_code/entry_vector
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SAVE_ALL # 15*8 bytes pushed
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movq -8(%rsp),%rsi # error_code/entry_vector
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sti # after stack abuse (-1024(%rsp))
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@@ -130,11 +130,11 @@ CFIX0: popq -15*8-8(%rsp) #
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pushq %rax # RSP
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pushfq # RFLAGS
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pushq $__HYPERVISOR_CS # CS
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- leaq CDBLFLT0(%rip),%rax
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+ leaq .Ldf0(%rip),%rax
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pushq %rax # RIP
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pushq %rsi # error_code/entry_vector
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jmp handle_exception
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-CDBLFLT0:GET_CURRENT(%rbx)
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+.Ldf0: GET_CURRENT(%rbx)
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jmp compat_test_all_events
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compat_failsafe_callback:
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GET_CURRENT(%rbx)
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@@ -152,10 +152,10 @@ compat_failsafe_callback:
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jmp compat_test_all_events
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.previous
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.section __pre_ex_table,"a"
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- .quad CFLT0,CFIX0
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+ .quad .Lft0,.Lfx0
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.previous
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.section __ex_table,"a"
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- .quad CDBLFLT0,compat_failsafe_callback
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+ .quad .Ldf0,compat_failsafe_callback
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.previous
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/* %rdx: trap_bounce, %rbx: struct vcpu */
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@@ -175,16 +175,16 @@ compat_create_bounce_frame:
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jz 1f
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/* Push new frame at registered guest-OS stack base. */
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movl VCPU_kernel_sp(%rbx),%esi
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-CFLT1: mov VCPU_kernel_ss(%rbx),%fs
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+.Lft1: mov VCPU_kernel_ss(%rbx),%fs
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subl $2*4,%esi
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movl UREGS_rsp+8(%rsp),%eax
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-CFLT2: movl %eax,%fs:(%rsi)
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+.Lft2: movl %eax,%fs:(%rsi)
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movl UREGS_ss+8(%rsp),%eax
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-CFLT3: movl %eax,%fs:4(%rsi)
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+.Lft3: movl %eax,%fs:4(%rsi)
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jmp 2f
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1: /* In kernel context already: push new frame at existing %rsp. */
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movl UREGS_rsp+8(%rsp),%esi
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-CFLT4: mov UREGS_ss+8(%rsp),%fs
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+.Lft4: mov UREGS_ss+8(%rsp),%fs
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2:
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movb TRAPBOUNCE_flags(%rdx),%cl
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subl $3*4,%esi
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@@ -196,7 +196,7 @@ CFLT4: mov UREGS_ss+8(%rsp),%fs
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popq %rax
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shll $16,%eax # Bits 16-23: saved_upcall_mask
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movw UREGS_cs+8(%rsp),%ax # Bits 0-15: CS
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-CFLT5: movl %eax,%fs:4(%rsi) # CS / saved_upcall_mask
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+.Lft5: movl %eax,%fs:4(%rsi) # CS / saved_upcall_mask
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shrl $16,%eax
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testb %al,%al # Bits 0-7: saved_upcall_mask
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setz %ch # %ch == !saved_upcall_mask
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@@ -204,25 +204,25 @@ CFLT5: movl %eax,%fs:4(%rsi)
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andl $~X86_EFLAGS_IF,%eax
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shlb $1,%ch # Bit 9 (EFLAGS.IF)
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orb %ch,%ah # Fold EFLAGS.IF into %eax
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-CFLT6: movl %eax,%fs:2*4(%rsi) # EFLAGS
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+.Lft6: movl %eax,%fs:2*4(%rsi) # EFLAGS
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movl UREGS_rip+8(%rsp),%eax
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-CFLT7: movl %eax,%fs:(%rsi) # EIP
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+.Lft7: movl %eax,%fs:(%rsi) # EIP
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testb $TBF_EXCEPTION_ERRCODE,%cl
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jz 1f
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subl $4,%esi
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movl TRAPBOUNCE_error_code(%rdx),%eax
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-CFLT8: movl %eax,%fs:(%rsi) # ERROR CODE
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+.Lft8: movl %eax,%fs:(%rsi) # ERROR CODE
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1:
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testb $TBF_FAILSAFE,%cl
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jz 2f
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subl $4*4,%esi
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movl %gs,%eax
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-CFLT9: movl %eax,%fs:3*4(%rsi) # GS
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-CFLT10: movl %edi,%fs:2*4(%rsi) # FS
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+.Lft9: movl %eax,%fs:3*4(%rsi) # GS
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+.Lft10: movl %edi,%fs:2*4(%rsi) # FS
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movl %es,%eax
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-CFLT11: movl %eax,%fs:1*4(%rsi) # ES
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+.Lft11: movl %eax,%fs:1*4(%rsi) # ES
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movl %ds,%eax
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-CFLT12: movl %eax,%fs:0*4(%rsi) # DS
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+.Lft12: movl %eax,%fs:0*4(%rsi) # DS
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2:
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/* Rewrite our stack frame and return to guest-OS mode. */
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/* IA32 Ref. Vol. 3: TF, VM, RF and NT flags are cleared on trap. */
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@@ -231,7 +231,7 @@ CFLT12: movl %eax,%fs:0*4(%rsi)
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X86_EFLAGS_NT|X86_EFLAGS_TF),UREGS_eflags+8(%rsp)
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mov %fs,UREGS_ss+8(%rsp)
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movl %esi,UREGS_rsp+8(%rsp)
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-CFLT13: mov %edi,%fs
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+.Lft13: mov %edi,%fs
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movzwl TRAPBOUNCE_cs(%rdx),%eax
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/* Null selectors (0-3) are not allowed. */
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testl $~3,%eax
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@@ -242,18 +242,18 @@ CFLT13: mov %edi,%fs
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movb $0,TRAPBOUNCE_flags(%rdx)
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ret
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.section .fixup,"ax"
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-CFIX13:
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+.Lfx13:
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xorl %edi,%edi
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- jmp CFLT13
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+ jmp .Lft13
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.previous
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.section __ex_table,"a"
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- .quad CFLT1,domain_crash_synchronous , CFLT2,compat_crash_page_fault
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- .quad CFLT3,compat_crash_page_fault_4 , CFLT4,domain_crash_synchronous
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- .quad CFLT5,compat_crash_page_fault_4 , CFLT6,compat_crash_page_fault_8
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- .quad CFLT7,compat_crash_page_fault , CFLT8,compat_crash_page_fault
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- .quad CFLT9,compat_crash_page_fault_12, CFLT10,compat_crash_page_fault_8
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- .quad CFLT11,compat_crash_page_fault_4 , CFLT12,compat_crash_page_fault
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- .quad CFLT13,CFIX13
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+ .quad .Lft1,domain_crash_synchronous , .Lft2,compat_crash_page_fault
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+ .quad .Lft3,compat_crash_page_fault_4 , .Lft4,domain_crash_synchronous
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+ .quad .Lft5,compat_crash_page_fault_4 , .Lft6,compat_crash_page_fault_8
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+ .quad .Lft7,compat_crash_page_fault , .Lft8,compat_crash_page_fault
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+ .quad .Lft9,compat_crash_page_fault_12, .Lft10,compat_crash_page_fault_8
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+ .quad .Lft11,compat_crash_page_fault_4 , .Lft12,compat_crash_page_fault
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+ .quad .Lft13,.Lfx13
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.previous
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compat_crash_page_fault_12:
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@@ -263,17 +263,17 @@ compat_crash_page_fault_8:
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compat_crash_page_fault_4:
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addl $4,%esi
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compat_crash_page_fault:
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-CFLT14: mov %edi,%fs
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+.Lft14: mov %edi,%fs
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movl %esi,%edi
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call show_page_walk
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jmp domain_crash_synchronous
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.section .fixup,"ax"
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-CFIX14:
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+.Lfx14:
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xorl %edi,%edi
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- jmp CFLT14
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+ jmp .Lft14
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.previous
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.section __ex_table,"a"
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- .quad CFLT14,CFIX14
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+ .quad .Lft14,.Lfx14
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.previous
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.section .rodata, "a", @progbits
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Index: 2006-12-11/xen/arch/x86/x86_64/entry.S
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===================================================================
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--- 2006-12-11.orig/xen/arch/x86/x86_64/entry.S 2006-12-15 15:23:16.000000000 +0100
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+++ 2006-12-11/xen/arch/x86/x86_64/entry.S 2006-12-15 15:39:13.000000000 +0100
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@@ -56,10 +56,10 @@ restore_all_guest:
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/* No special register assumptions. */
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iret_exit_to_guest:
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addq $8,%rsp
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-FLT1: iretq
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+.LFT1: iretq
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.section .fixup,"ax"
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-FIX1: popq -15*8-8(%rsp) # error_code/entry_vector
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+.LFX1: popq -15*8-8(%rsp) # error_code/entry_vector
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SAVE_ALL # 15*8 bytes pushed
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movq -8(%rsp),%rsi # error_code/entry_vector
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|
sti # after stack abuse (-1024(%rsp))
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@@ -68,11 +68,11 @@ FIX1: popq -15*8-8(%rsp) #
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pushq %rax # RSP
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|
pushf # RFLAGS
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|
pushq $__HYPERVISOR_CS # CS
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|
- leaq DBLFLT1(%rip),%rax
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+ leaq .LDF1(%rip),%rax
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pushq %rax # RIP
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pushq %rsi # error_code/entry_vector
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|
jmp handle_exception
|
|
-DBLFLT1:GET_CURRENT(%rbx)
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+.LDF1: GET_CURRENT(%rbx)
|
|
jmp test_all_events
|
|
failsafe_callback:
|
|
GET_CURRENT(%rbx)
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|
@@ -87,10 +87,10 @@ failsafe_callback:
|
|
jmp test_all_events
|
|
.previous
|
|
.section __pre_ex_table,"a"
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|
- .quad FLT1,FIX1
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|
+ .quad .LFT1,.LFX1
|
|
.previous
|
|
.section __ex_table,"a"
|
|
- .quad DBLFLT1,failsafe_callback
|
|
+ .quad .LDF1,failsafe_callback
|
|
.previous
|
|
|
|
ALIGN
|
|
@@ -249,9 +249,9 @@ create_bounce_frame:
|
|
1: movb TRAPBOUNCE_flags(%rdx),%cl
|
|
subq $40,%rsi
|
|
movq UREGS_ss+8(%rsp),%rax
|
|
-FLT2: movq %rax,32(%rsi) # SS
|
|
+.LFT2: movq %rax,32(%rsi) # SS
|
|
movq UREGS_rsp+8(%rsp),%rax
|
|
-FLT3: movq %rax,24(%rsi) # RSP
|
|
+.LFT3: movq %rax,24(%rsi) # RSP
|
|
movq VCPU_vcpu_info(%rbx),%rax
|
|
pushq VCPUINFO_upcall_mask(%rax)
|
|
testb $TBF_INTERRUPT,%cl
|
|
@@ -260,7 +260,7 @@ FLT3: movq %rax,24(%rsi)
|
|
popq %rax
|
|
shlq $32,%rax # Bits 32-39: saved_upcall_mask
|
|
movw UREGS_cs+8(%rsp),%ax # Bits 0-15: CS
|
|
-FLT4: movq %rax,8(%rsi) # CS / saved_upcall_mask
|
|
+.LFT4: movq %rax,8(%rsi) # CS / saved_upcall_mask
|
|
shrq $32,%rax
|
|
testb $0xFF,%al # Bits 0-7: saved_upcall_mask
|
|
setz %ch # %ch == !saved_upcall_mask
|
|
@@ -268,30 +268,30 @@ FLT4: movq %rax,8(%rsi)
|
|
andq $~X86_EFLAGS_IF,%rax
|
|
shlb $1,%ch # Bit 9 (EFLAGS.IF)
|
|
orb %ch,%ah # Fold EFLAGS.IF into %eax
|
|
-FLT5: movq %rax,16(%rsi) # RFLAGS
|
|
+.LFT5: movq %rax,16(%rsi) # RFLAGS
|
|
movq UREGS_rip+8(%rsp),%rax
|
|
-FLT6: movq %rax,(%rsi) # RIP
|
|
+.LFT6: movq %rax,(%rsi) # RIP
|
|
testb $TBF_EXCEPTION_ERRCODE,%cl
|
|
jz 1f
|
|
subq $8,%rsi
|
|
movl TRAPBOUNCE_error_code(%rdx),%eax
|
|
-FLT7: movq %rax,(%rsi) # ERROR CODE
|
|
+.LFT7: movq %rax,(%rsi) # ERROR CODE
|
|
1: testb $TBF_FAILSAFE,%cl
|
|
jz 2f
|
|
subq $32,%rsi
|
|
movl %gs,%eax
|
|
-FLT8: movq %rax,24(%rsi) # GS
|
|
+.LFT8: movq %rax,24(%rsi) # GS
|
|
movl %fs,%eax
|
|
-FLT9: movq %rax,16(%rsi) # FS
|
|
+.LFT9: movq %rax,16(%rsi) # FS
|
|
movl %es,%eax
|
|
-FLT10: movq %rax,8(%rsi) # ES
|
|
+.LFT10: movq %rax,8(%rsi) # ES
|
|
movl %ds,%eax
|
|
-FLT11: movq %rax,(%rsi) # DS
|
|
+.LFT11: movq %rax,(%rsi) # DS
|
|
2: subq $16,%rsi
|
|
movq UREGS_r11+8(%rsp),%rax
|
|
-FLT12: movq %rax,8(%rsi) # R11
|
|
+.LFT12: movq %rax,8(%rsi) # R11
|
|
movq UREGS_rcx+8(%rsp),%rax
|
|
-FLT13: movq %rax,(%rsi) # RCX
|
|
+.LFT13: movq %rax,(%rsi) # RCX
|
|
/* Rewrite our stack frame and return to guest-OS mode. */
|
|
/* IA32 Ref. Vol. 3: TF, VM, RF and NT flags are cleared on trap. */
|
|
/* Also clear AC: alignment checks shouldn't trigger in kernel mode. */
|
|
@@ -308,12 +308,12 @@ FLT13: movq %rax,(%rsi)
|
|
movb $0,TRAPBOUNCE_flags(%rdx)
|
|
ret
|
|
.section __ex_table,"a"
|
|
- .quad FLT2,domain_crash_page_fault_32, FLT3,domain_crash_page_fault_24
|
|
- .quad FLT4,domain_crash_page_fault_8 , FLT5,domain_crash_page_fault_16
|
|
- .quad FLT6,domain_crash_page_fault , FLT7,domain_crash_page_fault
|
|
- .quad FLT8,domain_crash_page_fault_24, FLT9,domain_crash_page_fault_16
|
|
- .quad FLT10,domain_crash_page_fault_8 , FLT11,domain_crash_page_fault
|
|
- .quad FLT12,domain_crash_page_fault_8 , FLT13,domain_crash_page_fault
|
|
+ .quad .LFT2,domain_crash_page_fault_32, .LFT3,domain_crash_page_fault_24
|
|
+ .quad .LFT4,domain_crash_page_fault_8 , .LFT5,domain_crash_page_fault_16
|
|
+ .quad .LFT6,domain_crash_page_fault , .LFT7,domain_crash_page_fault
|
|
+ .quad .LFT8,domain_crash_page_fault_24, .LFT9,domain_crash_page_fault_16
|
|
+ .quad .LFT10,domain_crash_page_fault_8 , .LFT11,domain_crash_page_fault
|
|
+ .quad .LFT12,domain_crash_page_fault_8 , .LFT13,domain_crash_page_fault
|
|
.previous
|
|
|
|
.section .rodata,"a"
|