edf6bf0381
23955-x86-pv-cpuid-xsave.patch 23957-cpufreq-error-paths.patch - Upstream patches from Jan 23933-pt-bus2bridge-update.patch 23726-x86-intel-flexmigration-v2.patch 23925-x86-AMD-ARAT-Fam12.patch 23246-x86-xsave-enable.patch 23897-x86-mce-offline-again.patch - Update to Xen 4.1.2_rc3 c/s 23171 - bnc#720054 - Changed /etc/udev/rules.d/40-xen.rules to not run Xen's vif-bridge script when not running Xen. This is not a solution to the bug but an improvement in the rules regardless. Updated udev-rules.patch - Upstream patches from Jan 23868-vtd-RMRR-validation.patch 23871-x86-microcode-amd-silent.patch 23898-cc-option-grep.patch - Add pciback init script and sysconf file, giving users a simple mechanism to configure pciback. init.pciback sysconfig.pciback - update scripts to use xl -f, or xm if xend is running: xen-updown.sh, init.xendomains, xmclone.sh OBS-URL: https://build.opensuse.org/package/show/Virtualization/xen?expand=0&rev=146
64 lines
2.4 KiB
Diff
64 lines
2.4 KiB
Diff
References: bnc#701686
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# HG changeset patch
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# User Jan Beulich <jbeulich@novell.com>
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# Date 1313503555 -3600
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# Node ID fc2be6cb89ad49efd90fe1b650f7efaab72f61b2
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# Parent 5c1ebc117f9901bc155d2b92ae902a4144767dfb
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x86: simplify (and fix) clear_IO_APIC{,_pin}()
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These are used during bootup and (emergency) shutdown only, and their
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only purpose is to get the actual IO-APIC's RTE(s) cleared.
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Consequently, only the "raw" accessors should be used (and the ones
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going through interrupt remapping code can be skipped), with the
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exception of determining the delivery mode: This one must always go
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through the interrupt remapping path, as in the VT-d case the actual
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IO-APIC's RTE will have the delivery mode always set to zero (which
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before possibly could have resulted in such an entry getting cleared
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in the "raw" pass, though I haven't observed this case in practice).
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Signed-off-by: Jan Beulich <jbeulich@novell.com>
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Index: xen-4.1.2-testing/xen/arch/x86/io_apic.c
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===================================================================
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--- xen-4.1.2-testing.orig/xen/arch/x86/io_apic.c
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+++ xen-4.1.2-testing/xen/arch/x86/io_apic.c
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@@ -471,14 +471,12 @@ static void eoi_IO_APIC_irq(unsigned int
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spin_unlock_irqrestore(&ioapic_lock, flags);
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}
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-#define clear_IO_APIC_pin(a,p) __clear_IO_APIC_pin(a,p,0)
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-#define clear_IO_APIC_pin_raw(a,p) __clear_IO_APIC_pin(a,p,1)
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-static void __clear_IO_APIC_pin(unsigned int apic, unsigned int pin, int raw)
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+static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)
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{
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struct IO_APIC_route_entry entry;
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/* Check delivery_mode to be sure we're not clearing an SMI pin */
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- entry = ioapic_read_entry(apic, pin, raw);
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+ entry = __ioapic_read_entry(apic, pin, FALSE);
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if (entry.delivery_mode == dest_SMI)
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return;
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@@ -487,7 +485,7 @@ static void __clear_IO_APIC_pin(unsigned
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*/
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memset(&entry, 0, sizeof(entry));
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entry.mask = 1;
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- ioapic_write_entry(apic, pin, raw, entry);
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+ __ioapic_write_entry(apic, pin, TRUE, entry);
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}
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static void clear_IO_APIC (void)
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@@ -495,10 +493,8 @@ static void clear_IO_APIC (void)
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int apic, pin;
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for (apic = 0; apic < nr_ioapics; apic++) {
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- for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) {
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+ for (pin = 0; pin < nr_ioapic_registers[apic]; pin++)
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clear_IO_APIC_pin(apic, pin);
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- clear_IO_APIC_pin_raw(apic, pin);
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- }
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}
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}
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