forked from pool/python-pyOCD
- update to 0.36.0:
* Allow FlashBuilder to work when program page size is larger
than sector erase size (@BrianPugh)
* Very basic implementation to get a "connect" LED status
display (@rgrr)
* Add Trace Funnel Coresight component (@rapgenic)
* Cortex-M CPU type detection improvements
* Debug sequences: support pname on DebugPort* sequences
* Add MAX32666FTHR board (@ozersa)
* Add STMicro STM32 H743 and H723 targets (@unsanded)
* nRF91 family improvements (@maxd-nordic)
* Add HDSC HC32F448 hc32a460xe and hc32a4a0xi. (@lennvn)
* Add airm2m air001 target (@kaidegit)
* Add airm2m air32f103 target (@HalfSweet)
* Add STMicro STM32H7B0 Target (@BrianPugh)
* Add NXP S32K344 target (@PetervdPerk-NXP)
* Add Realtek RTL8762C (@suphammer)
* Add some missing ST and NXP board IDs
* Fix HC32l130 32k+ flash error (@kaidegit)
* Fix HC32L13x size and enable double buffering (@kaidegit)
* Infineon PSoC6: remove unnecessary sleep during reset (@te-
johan)
* Remove part number match for NXP MIMXRTxxxx series family
* RTT: fix CB not found (@tdasika)
* CMSIS-DAP: Windows performance regression fix
* Debug sequences: fix assignment expressions.
* flash: fix some type errors, sort imports
* Removed extraneous space character in the default `cortex_m`
target warning message (@BenjaminSoelberg)
* Flash loader: fix missing import of RamRegion
OBS-URL: https://build.opensuse.org/package/show/devel:languages:python/python-pyOCD?expand=0&rev=14
This commit is contained in:
Git OBS Bridge
@@ -1,3 +1,117 @@
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-------------------------------------------------------------------
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Mon Nov 11 21:01:24 UTC 2024 - Dirk Müller <dmueller@suse.com>
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- update to 0.36.0:
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* Allow FlashBuilder to work when program page size is larger
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than sector erase size (@BrianPugh)
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* Very basic implementation to get a "connect" LED status
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display (@rgrr)
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* Add Trace Funnel Coresight component (@rapgenic)
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* Cortex-M CPU type detection improvements
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* Debug sequences: support pname on DebugPort* sequences
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* Add MAX32666FTHR board (@ozersa)
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* Add STMicro STM32 H743 and H723 targets (@unsanded)
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* nRF91 family improvements (@maxd-nordic)
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* Add HDSC HC32F448 hc32a460xe and hc32a4a0xi. (@lennvn)
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* Add airm2m air001 target (@kaidegit)
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* Add airm2m air32f103 target (@HalfSweet)
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* Add STMicro STM32H7B0 Target (@BrianPugh)
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* Add NXP S32K344 target (@PetervdPerk-NXP)
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* Add Realtek RTL8762C (@suphammer)
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* Add some missing ST and NXP board IDs
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* Fix HC32l130 32k+ flash error (@kaidegit)
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* Fix HC32L13x size and enable double buffering (@kaidegit)
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* Infineon PSoC6: remove unnecessary sleep during reset (@te-
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johan)
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* Remove part number match for NXP MIMXRTxxxx series family
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* RTT: fix CB not found (@tdasika)
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* CMSIS-DAP: Windows performance regression fix
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* Debug sequences: fix assignment expressions.
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* flash: fix some type errors, sort imports
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* Removed extraneous space character in the default `cortex_m`
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target warning message (@BenjaminSoelberg)
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* Flash loader: fix missing import of RamRegion
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* coresight: adiv5 discovery: increment invalid AP count on
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exception
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* cortex-m: reset_halt: just warn about invalid T-bit, don't
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automatically fix
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* commands: reset: fall back to reset via probe if context has
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no selected core
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* Only create one session to access options when there's no
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current session, to reduce debug log message output.
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- update to 0.35.1:
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* debug sequences: support [uU] suffix on integer literals
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* commands: `show accessible-pins`: fix function call, print
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GPIO pins
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* commands: `show locked`: fix misspelled "target"
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* coresight: dap: revert API change to add DebugPort param to
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DPConnector constructor (in particular, this broke the NXP
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SPSDK tool's pyOCD support)
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* manifest: add sequences.lark
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* code quality: do not use bare exception handler
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- update to 0.35.0:
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* With this release, Python 3.6 is no longer supported. The
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minimum Python version is now 3.7.0.
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* cmsis-packs: debug sequence support; see the documentation
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for details
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* rtt: add RTT support to gdbserver via the addition of an
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`rtt` command (thanks @samueldewan)
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* rtt: add logging function to rtt sub-command (thanks
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@zjli-2019)
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* coresight: cortex-m: 'primary_core' option
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* subcommands: Python tracebacks are no longer printed unless
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debug logging is enabled (the `debug.traceback` option is
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disabled by default)
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* object graph nodes have names now, accessible with the
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`.node_name` attribute
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* board and SoC nodes have default names of "board" and "soc"
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* CPUs will have a default (uniquified) name of the CPU type,
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or a custom name specified in a DFP
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* these names are visible in some of the commands such as `show
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cores` or `show graph`, and can be used in commands such as
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`core` (to select the core that commands apply to)
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* memory map: memory regions can have subregions; this is used
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for flash memory regions to explicitly support multiple
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sector sizes and/or flash algorithms
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* target: added generic `sw_system` and `sw_core` reset types
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(aliased as `system` and `core`, with
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`Target.ResetType.SW_SYSTEM` and `Target.ResetType.SW_CORE`
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enums in the API), corresponding to the existing
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`sysresetreq` and `vectreset` reset types
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* target: `.supported_reset_types` property returns a list of
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allowed reset type enums
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* flash: add `--no-reset` option to prevent resetting of device
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after programming (thanks @nordicjm)
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* flash: memory regions are now created when a DFP specifies an
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algorithm without also defining a corresponding memory
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region, as long as that algorithm is marked as default
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* core: `cache.enable_memory` and `cache.enable_register`
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session options to control the memory and register cache used
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by the gdb server
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* commands: add `show sequences` command
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* commands: add `reset-type` value to show and set current
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reset type and view available reset types
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* commands: new `sleep` command
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* commands: add `pins` and `accessible-pins` values
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* api: debug probe pins API
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* dependency: bump minimum cmsis-pack-manager version to 0.5.2
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* dependencies: bump pylink-square to minimum v1.0 (thanks
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* probe: accept WCH-Link as DAPv1 (thanks @eugene-bright)
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* probe: cmsis-dap: add "CMSIS_DAP" to known device strings
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* probe: stlink: cache board IDs to improve connect time
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* semihosting: ensure directories exist before opening a file
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(thanks @Hoohaha)
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* RTOS: Catch TransferErrors during kernel state checks (thanks
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@imi415)
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* flash: catch exceptions while fetching state (thanks @maxd-
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nordic)
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* coresight: discovery: continue after an AP probe failure
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occurs
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* core: soc_target: options to control memory and register
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cache enablement
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* trace: minor trace logging improvements
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* commands: reinit: set exec context attrs to defaults
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-------------------------------------------------------------------
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Thu Jul 27 07:25:56 UTC 2023 - Steve Kowalik <steven.kowalik@suse.com>
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