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OBS-URL: https://build.opensuse.org/package/show/openSUSE:Factory/Mesa?expand=0&rev=58

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OBS User unknown 2009-02-26 11:17:16 +00:00 committed by Git OBS Bridge
parent 5a3945291e
commit 07e91fc0a1
11 changed files with 24 additions and 1019 deletions
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8
Mesa.changes
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@ -1,3 +1,11 @@
-------------------------------------------------------------------
Wed Feb 25 15:51:31 CET 2009 - sndirsch@suse.de
- update to Mesa 7.3
- obsoletes MesaLib-7.2_intel-2008-q3_793c3b9-46921a5.diff,
commit-7d99ddc.diff, commit-b4bf9ac.diff,
i965_aperture_call_for_Q3.patch, mesa-7.1-fix-i8xx-vbos.patch
-------------------------------------------------------------------
Tue Feb 10 01:12:37 CET 2009 - sndirsch@suse.de

31
Mesa.spec
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@ -1,5 +1,5 @@
#
# spec file for package Mesa (Version 7.2)
# spec file for package Mesa (Version 7.3)
#
# Copyright (c) 2009 SUSE LINUX Products GmbH, Nuernberg, Germany.
#
@ -32,23 +32,18 @@ Obsoletes: XFree86-Mesa-64bit
Obsoletes: Mesa-64bit
%endif
#
Version: 7.2
Release: 18
Version: 7.3
Release: 1
Summary: Mesa is a 3-D graphics library with an API which is very similar to that of OpenGL
Source: MesaLib-%{version}_intel-2008-q3_793c3b9.tar.bz2
Source: MesaLib-%{version}.tar.bz2
Source1: MesaDemos-%{version}.tar.bz2
Source3: README.updates
Source4: manual-pages.tar.bz2
Source5: drirc
Patch: MesaLib-7.2_intel-2008-q3_793c3b9-46921a5.diff
Patch1: dri_driver_dir.diff
Patch6: link-shared.diff
Patch7: disable_gem_warning.diff
Patch9: i965-GL_MAX_TEXTURE_SIZE-4096.diff
Patch10: commit-b4bf9ac.diff
Patch11: mesa-7.1-fix-i8xx-vbos.patch
Patch12: i965_aperture_call_for_Q3.patch
Patch13: commit-7d99ddc.diff
Patch14: intel_release_static_region.patch
BuildRoot: %{_tmppath}/%{name}-%{version}-build
@ -135,17 +130,12 @@ test -f progs/ggi/asc-view.c && exit 1
rm -rf src/glut progs/{demos,redbook,samples,xdemos,glsl}
# we use freeglut
rm -f include/GL/{glut.h,uglglutshapes.h,glutf90.h}
%patch -p1
%patch1
sed -i 's/REPLACE/%_lib/g' src/glx/x11/Makefile
### FIXME
#%patch6
%patch7 -p1
#%patch9 -p1
%patch10 -p1
%patch11 -p1
%patch12 -p1
%patch13 -p1
%patch14 -p1
%build
@ -220,9 +210,7 @@ rm -rf $RPM_BUILD_ROOT
%files devel
%defattr(-,root,root)
%doc docs/*.html docs/*.spec
/usr/include/GL/amesa.h
/usr/include/GL/dmesa.h
/usr/include/GL/fxmesa.h
/usr/include/GL/ggimesa.h
/usr/include/GL/gl_mangle.h
/usr/include/GL/glfbdev.h
@ -233,19 +221,15 @@ rm -rf $RPM_BUILD_ROOT
/usr/include/GL/mglmesa.h
/usr/include/GL/osmesa.h
/usr/include/GL/svgamesa.h
/usr/include/GL/uglmesa.h
/usr/include/GL/vms_x_fix.h
/usr/include/GL/wmesa.h
/usr/include/GL/xmesa.h
/usr/include/GL/xmesa_x.h
/usr/include/GL/xmesa_xf86.h
/usr/include/GL/internal/dri_interface.h
/usr/include/GL/internal/dri_sarea.h
/usr/%{_lib}/libGLU.so
/usr/%{_lib}/libOSMesa.so
/usr/%{_lib}/pkgconfig/dri.pc
/usr/%{_lib}/pkgconfig/gl.pc
/usr/%{_lib}/pkgconfig/glu.pc
/usr/%{_lib}/pkgconfig/osmesa.pc
%{_mandir}/man3/*
%files devel-static
@ -255,6 +239,11 @@ rm -rf $RPM_BUILD_ROOT
/usr/%{_lib}/libOSMesa.a
%changelog
* Wed Feb 25 2009 sndirsch@suse.de
- update to Mesa 7.3
- obsoletes MesaLib-7.2_intel-2008-q3_793c3b9-46921a5.diff,
commit-7d99ddc.diff, commit-b4bf9ac.diff,
i965_aperture_call_for_Q3.patch, mesa-7.1-fix-i8xx-vbos.patch
* Tue Feb 10 2009 sndirsch@suse.de
- commit-7d99ddc.diff
* intel: Fix a number of memory leaks on context destroy.

3
MesaDemos-7.2.tar.bz2
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@ -1,3 +0,0 @@
version https://git-lfs.github.com/spec/v1
oid sha256:79fb0bb14c0767206af3ccdfe07c15c733b4af4d3428d6c7bb1be151c22b443b
size 1400896

3
MesaDemos-7.3.tar.bz2 Normal file
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@ -0,0 +1,3 @@
version https://git-lfs.github.com/spec/v1
oid sha256:53116e3cda018628194dcef1c1ac8473b9a2833da49aedf1110f141e064fb063
size 1410700

47
MesaLib-7.2_intel-2008-q3_793c3b9-46921a5.diff
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@ -1,47 +0,0 @@
commit c281d3d5caedf75eaa3c877f94656f982aad868d
Author: Xiang, Haihao <haihao.xiang@intel.com>
Date: Tue Oct 7 17:27:33 2008 +0800
i965: Fix a potential assertion failure.
(cherry picked from commit d01f9fa778cb0d230c697badaea078f6f37da743)
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index f148b10..89b7c2a 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -365,8 +365,10 @@ static void brw_prepare_vertices(struct brw_context *brw)
if (i == 0) {
/* Position array not properly enabled:
*/
- if (input->glarray->StrideB == 0)
- return;
+ if (input->glarray->StrideB == 0) {
+ intel->Fallback = 1;
+ return;
+ }
interleave = input->glarray->StrideB;
ptr = input->glarray->Ptr;
commit 46921a5ee832a3443894dcc98e065d2f535e899d
Author: Ian Romanick <ian.d.romanick@intel.com>
Date: Fri Oct 10 11:47:43 2008 -0700
intel: GLSL 1.20 is broken in Mesa, so disable it in the i965 driver
(cherry picked from commit e7002694418cd0decb1cd0d9121f634480e5f0d6)
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index f394b98..4c04d08 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -258,7 +258,11 @@ static const struct dri_extension brw_extensions[] = {
{ "GL_ARB_point_sprite", NULL },
{ "GL_ARB_shader_objects", GL_ARB_shader_objects_functions },
{ "GL_ARB_shading_language_100", GL_VERSION_2_0_functions },
+#if 0
+ /* Support for GLSL 1.20 is currently broken in core Mesa.
+ */
{ "GL_ARB_shading_language_120", GL_VERSION_2_1_functions },
+#endif
{ "GL_ARB_shadow", NULL },
{ "GL_ARB_texture_non_power_of_two", NULL },
{ "GL_ARB_vertex_shader", GL_ARB_vertex_shader_functions },

3
MesaLib-7.2_intel-2008-q3_793c3b9.tar.bz2
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@ -1,3 +0,0 @@
version https://git-lfs.github.com/spec/v1
oid sha256:ba99186a9027a3f7561ce75362ade35796d7d9cfa0e40efa0727dec2ba5baf68
size 3383428

3
MesaLib-7.3.tar.bz2 Normal file
View File

@ -0,0 +1,3 @@
version https://git-lfs.github.com/spec/v1
oid sha256:ba4216a0eb4794202eef0370ff6d92b25f490dcc92d799e0d895a509bff161f5
size 3435539

212
commit-7d99ddc.diff
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@ -1,212 +0,0 @@
commit 7d99ddcb2bb09f1f54d91e6e20e42d217a5bccdf
Author: Eric Anholt <eric@anholt.net>
Date: Fri Sep 26 12:48:23 2008 -0700
intel: Fix a number of memory leaks on context destroy.
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index 0ab2770..773a8b4 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -566,6 +566,13 @@ i830_destroy_context(struct intel_context *intel)
GLuint i;
struct i830_context *i830 = i830_context(&intel->ctx);
+ intel_region_release(&i830->state.draw_region);
+ intel_region_release(&i830->state.depth_region);
+ intel_region_release(&i830->meta.draw_region);
+ intel_region_release(&i830->meta.depth_region);
+ intel_region_release(&i830->initial.draw_region);
+ intel_region_release(&i830->initial.depth_region);
+
for (i = 0; i < I830_TEX_UNITS; i++) {
if (i830->state.tex_buffer[i] != NULL) {
dri_bo_unreference(i830->state.tex_buffer[i]);
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index edbbe23..7431a9c 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -490,6 +490,13 @@ i915_destroy_context(struct intel_context *intel)
GLuint i;
struct i915_context *i915 = i915_context(&intel->ctx);
+ intel_region_release(&i915->state.draw_region);
+ intel_region_release(&i915->state.depth_region);
+ intel_region_release(&i915->meta.draw_region);
+ intel_region_release(&i915->meta.depth_region);
+ intel_region_release(&i915->initial.draw_region);
+ intel_region_release(&i915->initial.depth_region);
+
for (i = 0; i < I915_TEX_UNITS; i++) {
if (i915->state.tex_buffer[i] != NULL) {
dri_bo_unreference(i915->state.tex_buffer[i]);
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index 9a353fc..39ce8eb 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -409,8 +409,18 @@ void brw_draw_init( struct brw_context *brw )
void brw_draw_destroy( struct brw_context *brw )
{
+ int i;
+
if (brw->vb.upload.bo != NULL) {
dri_bo_unreference(brw->vb.upload.bo);
brw->vb.upload.bo = NULL;
}
+
+ for (i = 0; i < VERT_ATTRIB_MAX; i++) {
+ dri_bo_unreference(brw->vb.inputs[i].bo);
+ brw->vb.inputs[i].bo = NULL;
+ }
+
+ dri_bo_unreference(brw->ib.bo);
+ brw->ib.bo = NULL;
}
diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c b/src/mesa/drivers/dri/i965/brw_state_cache.c
index 1318dea..d5b5166 100644
--- a/src/mesa/drivers/dri/i965/brw_state_cache.c
+++ b/src/mesa/drivers/dri/i965/brw_state_cache.c
@@ -497,9 +497,10 @@ void brw_destroy_cache( struct brw_context *brw )
GLuint i;
brw_clear_cache(brw);
- for (i = 0; i < BRW_MAX_CACHE; i++)
+ for (i = 0; i < BRW_MAX_CACHE; i++) {
+ dri_bo_unreference(brw->cache.last_bo[i]);
free(brw->cache.name[i]);
-
+ }
free(brw->cache.items);
brw->cache.items = NULL;
brw->cache.size = 0;
diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c
index 2a03fc5..3780d3d 100644
--- a/src/mesa/drivers/dri/i965/brw_vtbl.c
+++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
@@ -51,6 +51,12 @@
#include "brw_vs.h"
#include <stdarg.h>
+static void
+dri_bo_release(dri_bo **bo)
+{
+ dri_bo_unreference(*bo);
+ *bo = NULL;
+}
/* called from intelDestroyContext()
*/
@@ -58,6 +64,7 @@ static void brw_destroy_context( struct intel_context *intel )
{
GLcontext *ctx = &intel->ctx;
struct brw_context *brw = brw_context(&intel->ctx);
+ int i;
brw_destroy_metaops(brw);
brw_destroy_state(brw);
@@ -65,6 +72,33 @@ static void brw_destroy_context( struct intel_context *intel )
brw_ProgramCacheDestroy( ctx );
brw_FrameBufferTexDestroy( brw );
+
+ for (i = 0; i < brw->state.nr_draw_regions; i++)
+ intel_region_release(&brw->state.draw_regions[i]);
+ brw->state.nr_draw_regions = 0;
+ intel_region_release(&brw->state.depth_region);
+
+ dri_bo_release(&brw->curbe.curbe_bo);
+ dri_bo_release(&brw->vs.prog_bo);
+ dri_bo_release(&brw->vs.state_bo);
+ dri_bo_release(&brw->gs.prog_bo);
+ dri_bo_release(&brw->gs.state_bo);
+ dri_bo_release(&brw->clip.prog_bo);
+ dri_bo_release(&brw->clip.state_bo);
+ dri_bo_release(&brw->clip.vp_bo);
+ dri_bo_release(&brw->sf.prog_bo);
+ dri_bo_release(&brw->sf.state_bo);
+ dri_bo_release(&brw->sf.vp_bo);
+ for (i = 0; i < BRW_MAX_TEX_UNIT; i++)
+ dri_bo_release(&brw->wm.sdc_bo[i]);
+ dri_bo_release(&brw->wm.bind_bo);
+ for (i = 0; i < BRW_WM_MAX_SURF; i++)
+ dri_bo_release(&brw->wm.surf_bo[i]);
+ dri_bo_release(&brw->wm.prog_bo);
+ dri_bo_release(&brw->wm.state_bo);
+ dri_bo_release(&brw->cc.prog_bo);
+ dri_bo_release(&brw->cc.state_bo);
+ dri_bo_release(&brw->cc.vp_bo);
}
/* called from intelDrawBuffer()
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 57e5744..ccd74ba 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -810,7 +810,12 @@ intelDestroyContext(__DRIcontextPrivate * driContextPriv)
intel->Fallback = 0; /* don't call _swrast_Flush later */
intel_batchbuffer_free(intel->batch);
+ intel->batch = NULL;
+
free(intel->prim.vb);
+ intel->prim.vb = NULL;
+ dri_bo_unreference(intel->prim.vb_bo);
+ intel->prim.vb_bo = NULL;
if (release_texture_heaps) {
/* This share group is about to go away, free our private
@@ -820,6 +825,13 @@ intelDestroyContext(__DRIcontextPrivate * driContextPriv)
fprintf(stderr, "do something to free texture heaps\n");
}
+ intel_region_release(&intel->front_region);
+ intel_region_release(&intel->back_region);
+ intel_region_release(&intel->third_region);
+ intel_region_release(&intel->depth_region);
+
+ driDestroyOptionCache(&intel->optionCache);
+
/* free the Mesa context */
_mesa_free_context_data(&intel->ctx);
}
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index 4af4cb9..554159a 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -226,7 +226,6 @@ struct intel_context
GLenum reduced_primitive;
GLuint vertex_size;
GLubyte *verts; /* points to tnl->clipspace.vertex_buf */
- struct intel_region *draw_region;
/* Fallback rasterization functions
*/
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
index cb0f4ba..45faf64 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -478,6 +478,11 @@ intel_recreate_static(struct intel_context *intel,
region->pitch = intelScreen->pitch;
region->height = intelScreen->height; /* needed? */
+ if (region->buffer != NULL) {
+ dri_bo_unreference(region->buffer);
+ region->buffer = NULL;
+ }
+
if (intel->ttm) {
assert(region_desc->bo_handle != -1);
region->buffer = intel_bo_gem_create_from_name(intel->bufmgr,
@@ -486,6 +491,11 @@ intel_recreate_static(struct intel_context *intel,
intel_set_region_tiling_gem(intel, region, region_desc->bo_handle);
} else {
+ if (region->classic_map != NULL) {
+ drmUnmap(region->classic_map,
+ region->pitch * region->cpp * region->height);
+ region->classic_map = NULL;
+ }
ret = drmMap(intel->driFd, region_desc->handle,
region->pitch * region->cpp * region->height,
&region->classic_map);

20
commit-b4bf9ac.diff
View File

@ -1,20 +0,0 @@
commit b4bf9acc32ac8693b1fdf80f351523a468ba6bd1
Author: Xiang, Haihao <haihao.xiang@intel.com>
Date: Tue Oct 21 10:30:39 2008 +0800
i915: fix carsh in i830_emit_state. (bug #17766)
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index 773a8b4..3c9851e 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -449,7 +449,8 @@ i830_emit_state(struct intel_context *intel)
aper_array[aper_count++] = intel->batch->buf;
if (dirty & I830_UPLOAD_BUFFERS) {
aper_array[aper_count++] = state->draw_region->buffer;
- aper_array[aper_count++] = state->depth_region->buffer;
+ if (state->depth_region)
+ aper_array[aper_count++] = state->depth_region->buffer;
}
for (i = 0; i < I830_TEX_UNITS; i++)

465
i965_aperture_call_for_Q3.patch
View File

@ -1,465 +0,0 @@
diff -urNap mesa_orig//src/mesa/drivers/dri/i965/brw_context.c mesa_haihao//src/mesa/drivers/dri/i965/brw_context.c
--- mesa_orig//src/mesa/drivers/dri/i965/brw_context.c 2009-01-12 13:29:40.000000000 +0800
+++ mesa_haihao//src/mesa/drivers/dri/i965/brw_context.c 2009-01-13 16:43:37.000000000 +0800
@@ -33,6 +33,7 @@
#include "brw_context.h"
#include "brw_defines.h"
#include "brw_draw.h"
+#include "brw_state.h"
#include "brw_vs.h"
#include "imports.h"
#include "intel_tex.h"
diff -urNap mesa_orig//src/mesa/drivers/dri/i965/brw_context.h mesa_haihao//src/mesa/drivers/dri/i965/brw_context.h
--- mesa_orig//src/mesa/drivers/dri/i965/brw_context.h 2009-01-12 13:29:36.000000000 +0800
+++ mesa_haihao//src/mesa/drivers/dri/i965/brw_context.h 2009-01-13 16:43:37.000000000 +0800
@@ -431,6 +431,19 @@ struct brw_context
GLuint nr_draw_regions;
struct intel_region *draw_regions[MAX_DRAW_BUFFERS];
struct intel_region *depth_region;
+
+ /**
+ * List of buffers accumulated in brw_validate_state to receive
+ * dri_bo_check_aperture treatment before exec, so we can know if we
+ * should flush the batch and try again before emitting primitives.
+ *
+ * This can be a fixed number as we only have a limited number of
+ * objects referenced from the batchbuffer in a primitive emit,
+ * consisting of the vertex buffers, pipelined state pointers,
+ * the CURBE, the depth buffer, and a query BO.
+ */
+ dri_bo *validated_bos[VERT_ATTRIB_MAX + 16];
+ int validated_bo_count;
} state;
struct brw_state_pointers attribs;
@@ -659,14 +672,6 @@ GLboolean brwCreateContext( const __GLco
/*======================================================================
- * brw_state.c
- */
-void brw_validate_state( struct brw_context *brw );
-void brw_init_state( struct brw_context *brw );
-void brw_destroy_state( struct brw_context *brw );
-
-
-/*======================================================================
* brw_state_dump.c
*/
void brw_debug_batch(struct intel_context *intel);
diff -urNap mesa_orig//src/mesa/drivers/dri/i965/brw_curbe.c mesa_haihao//src/mesa/drivers/dri/i965/brw_curbe.c
--- mesa_orig//src/mesa/drivers/dri/i965/brw_curbe.c 2009-01-12 13:29:40.000000000 +0800
+++ mesa_haihao//src/mesa/drivers/dri/i965/brw_curbe.c 2009-01-13 16:47:46.000000000 +0800
@@ -307,6 +307,7 @@ static void prepare_constant_buffer(stru
dri_bo_subdata(brw->curbe.curbe_bo, brw->curbe.curbe_offset, bufsz, buf);
}
+ brw_add_validated_bo(brw, brw->curbe.curbe_bo);
/* Because this provokes an action (ie copy the constants into the
* URB), it shouldn't be shortcircuited if identical to the
@@ -328,13 +329,6 @@ static void emit_constant_buffer(struct
{
struct intel_context *intel = &brw->intel;
GLuint sz = brw->curbe.total_size;
- dri_bo *aper_array[] = {
- brw->intel.batch->buf,
- brw->curbe.curbe_bo,
- };
-
- if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array)))
- intel_batchbuffer_flush(intel->batch);
BEGIN_BATCH(2, IGNORE_CLIPRECTS);
if (sz == 0) {
diff -urNap mesa_orig//src/mesa/drivers/dri/i965/brw_draw.c mesa_haihao//src/mesa/drivers/dri/i965/brw_draw.c
--- mesa_orig//src/mesa/drivers/dri/i965/brw_draw.c 2009-01-12 13:29:37.000000000 +0800
+++ mesa_haihao//src/mesa/drivers/dri/i965/brw_draw.c 2009-01-13 16:43:37.000000000 +0800
@@ -105,6 +105,7 @@ static GLuint brw_set_prim(struct brw_co
}
brw_validate_state(brw);
+ brw_upload_state(brw);
}
return hw_prim[prim];
@@ -256,6 +257,7 @@ static GLboolean brw_try_draw_prims( GLc
struct intel_context *intel = intel_context(ctx);
struct brw_context *brw = brw_context(ctx);
GLboolean retval = GL_FALSE;
+ GLboolean warn = GL_FALSE;
GLuint i;
if (ctx->NewState)
@@ -304,8 +306,6 @@ static GLboolean brw_try_draw_prims( GLc
*/
brw_set_prim(brw, prim[0].mode);
- /* XXX: Need to separate validate and upload of state.
- */
brw_validate_state( brw );
/* Various fallback checks:
@@ -316,6 +316,31 @@ static GLboolean brw_try_draw_prims( GLc
if (check_fallbacks( brw, prim, nr_prims ))
goto out;
+ /* Check that we can fit our state in with our existing batchbuffer, or
+ * flush otherwise.
+ */
+ if (dri_bufmgr_check_aperture_space(brw->state.validated_bos,
+ brw->state.validated_bo_count)) {
+ static GLboolean warned;
+ intel_batchbuffer_flush(intel->batch);
+
+ /* Validate the state after we flushed the batch (which would have
+ * changed the set of dirty state). If we still fail to
+ * check_aperture, warn of what's happening, but attempt to continue
+ * on since it may succeed anyway, and the user would probably rather
+ * see a failure and a warning than a fallback.
+ */
+ brw_validate_state(brw);
+ if (!warned &&
+ dri_bufmgr_check_aperture_space(brw->state.validated_bos,
+ brw->state.validated_bo_count)) {
+ warn = GL_TRUE;
+ warned = GL_TRUE;
+ }
+ }
+
+ brw_upload_state(brw);
+
for (i = 0; i < nr_prims; i++) {
brw_emit_prim(brw, &prim[i]);
}
@@ -326,6 +351,10 @@ static GLboolean brw_try_draw_prims( GLc
out:
UNLOCK_HARDWARE(intel);
+ if (warn)
+ fprintf(stderr, "i965: Single primitive emit potentially exceeded "
+ "available aperture space\n");
+
if (!retval)
DBG("%s failed\n", __FUNCTION__);
diff -urNap mesa_orig//src/mesa/drivers/dri/i965/brw_draw_upload.c mesa_haihao//src/mesa/drivers/dri/i965/brw_draw_upload.c
--- mesa_orig//src/mesa/drivers/dri/i965/brw_draw_upload.c 2009-01-12 13:29:36.000000000 +0800
+++ mesa_haihao//src/mesa/drivers/dri/i965/brw_draw_upload.c 2009-01-13 16:43:37.000000000 +0800
@@ -250,10 +250,10 @@ static void get_space( struct brw_contex
wrap_buffers(brw, size);
}
+ assert(*bo_return == NULL);
dri_bo_reference(brw->vb.upload.bo);
*bo_return = brw->vb.upload.bo;
*offset_return = brw->vb.upload.offset;
-
brw->vb.upload.offset += size;
}
@@ -353,12 +353,21 @@ static void brw_prepare_vertices(struct
intel_buffer_object(input->glarray->BufferObj);
/* Named buffer object: Just reference its contents directly. */
+ dri_bo_unreference(input->bo);
input->bo = intel_bufferobj_buffer(intel, intel_buffer,
INTEL_READ);
dri_bo_reference(input->bo);
input->offset = (unsigned long)input->glarray->Ptr;
input->stride = input->glarray->StrideB;
} else {
+ if (input->bo != NULL) {
+ /* Already-uploaded vertex data is present from a previous
+ * prepare_vertices, but we had to re-validate state due to
+ * check_aperture failing and a new batch being produced.
+ */
+ continue;
+ }
+
/* Queue the buffer object up to be uploaded in the next pass,
* when we've decided if we're doing interleaved or not.
*/
@@ -415,6 +424,11 @@ static void brw_prepare_vertices(struct
copy_array_to_vbo_array(brw, upload[i], upload[i]->element_size);
}
}
+
+ for (i = 0; i < nr_enabled; i++) {
+ struct brw_vertex_element *input = enabled[i];
+ brw_add_validated_bo(brw, input->bo);
+ }
}
static void brw_emit_vertices(struct brw_context *brw)
@@ -509,7 +523,7 @@ static void brw_prepare_indices(struct b
struct intel_context *intel = &brw->intel;
const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
GLuint ib_size;
- dri_bo *bo;
+ dri_bo *bo = NULL;
struct gl_buffer_object *bufferobj;
GLuint offset;
@@ -558,6 +572,8 @@ static void brw_prepare_indices(struct b
dri_bo_unreference(brw->ib.bo);
brw->ib.bo = bo;
brw->ib.offset = offset;
+
+ brw_add_validated_bo(brw, brw->ib.bo);
}
static void brw_emit_indices(struct brw_context *brw)
diff -urNap mesa_orig//src/mesa/drivers/dri/i965/brw_misc_state.c mesa_haihao//src/mesa/drivers/dri/i965/brw_misc_state.c
--- mesa_orig//src/mesa/drivers/dri/i965/brw_misc_state.c 2009-01-12 13:29:39.000000000 +0800
+++ mesa_haihao//src/mesa/drivers/dri/i965/brw_misc_state.c 2009-01-13 16:50:17.000000000 +0800
@@ -71,6 +71,11 @@ const struct brw_tracked_state brw_blend
.emit = upload_blend_constant_color
};
+static void prepare_binding_table_pointers(struct brw_context *brw)
+{
+ brw_add_validated_bo(brw, brw->wm.bind_bo);
+}
+
/**
* Upload the binding table pointers, which point each stage's array of surface
* state pointers.
@@ -81,13 +86,6 @@ const struct brw_tracked_state brw_blend
static void upload_binding_table_pointers(struct brw_context *brw)
{
struct intel_context *intel = &brw->intel;
- dri_bo *aper_array[] = {
- intel->batch->buf,
- brw->wm.bind_bo,
- };
-
- if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array)))
- intel_batchbuffer_flush(intel->batch);
BEGIN_BATCH(6, IGNORE_CLIPRECTS);
OUT_BATCH(CMD_BINDING_TABLE_PTRS << 16 | (6 - 2));
@@ -107,6 +105,7 @@ const struct brw_tracked_state brw_bindi
.brw = BRW_NEW_BATCH,
.cache = CACHE_NEW_SURF_BIND,
},
+ .prepare = prepare_binding_table_pointers,
.emit = upload_binding_table_pointers,
};
@@ -140,21 +139,18 @@ static void upload_pipelined_state_point
brw->state.dirty.brw |= BRW_NEW_PSP;
}
+
+static void prepare_psp_urb_cbs(struct brw_context *brw)
+{
+ brw_add_validated_bo(brw, brw->vs.state_bo);
+ brw_add_validated_bo(brw, brw->gs.state_bo);
+ brw_add_validated_bo(brw, brw->clip.state_bo);
+ brw_add_validated_bo(brw, brw->wm.state_bo);
+ brw_add_validated_bo(brw, brw->cc.state_bo);
+}
+
static void upload_psp_urb_cbs(struct brw_context *brw )
{
- struct intel_context *intel = &brw->intel;
- dri_bo *aper_array[] = {
- intel->batch->buf,
- brw->vs.state_bo,
- brw->gs.state_bo,
- brw->clip.state_bo,
- brw->wm.state_bo,
- brw->cc.state_bo,
- };
-
- if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array)))
- intel_batchbuffer_flush(intel->batch);
-
upload_pipelined_state_pointers(brw);
brw_upload_urb_fence(brw);
brw_upload_constant_buffer_state(brw);
@@ -172,9 +168,18 @@ const struct brw_tracked_state brw_psp_u
CACHE_NEW_WM_UNIT |
CACHE_NEW_CC_UNIT)
},
+ .prepare = prepare_psp_urb_cbs,
.emit = upload_psp_urb_cbs,
};
+static void prepare_depthbuffer(struct brw_context *brw)
+{
+ struct intel_region *region = brw->state.depth_region;
+
+ if (region != NULL)
+ brw_add_validated_bo(brw, region->buffer);
+}
+
static void emit_depthbuffer(struct brw_context *brw)
{
struct intel_context *intel = &brw->intel;
@@ -196,10 +201,6 @@ static void emit_depthbuffer(struct brw_
ADVANCE_BATCH();
} else {
unsigned int format;
- dri_bo *aper_array[] = {
- intel->batch->buf,
- region->buffer
- };
switch (region->cpp) {
case 2:
@@ -216,9 +217,6 @@ static void emit_depthbuffer(struct brw_
return;
}
- if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array)))
- intel_batchbuffer_flush(intel->batch);
-
BEGIN_BATCH(len, IGNORE_CLIPRECTS);
OUT_BATCH(CMD_DEPTH_BUFFER << 16 | (len - 2));
OUT_BATCH(((region->pitch * region->cpp) - 1) |
@@ -247,6 +245,7 @@ const struct brw_tracked_state brw_depth
.brw = BRW_NEW_DEPTH_BUFFER | BRW_NEW_BATCH,
.cache = 0,
},
+ .prepare = prepare_depthbuffer,
.emit = emit_depthbuffer,
};
diff -urNap mesa_orig//src/mesa/drivers/dri/i965/brw_state.h mesa_haihao//src/mesa/drivers/dri/i965/brw_state.h
--- mesa_orig//src/mesa/drivers/dri/i965/brw_state.h 2009-01-12 13:29:39.000000000 +0800
+++ mesa_haihao//src/mesa/drivers/dri/i965/brw_state.h 2009-01-13 16:43:37.000000000 +0800
@@ -35,6 +35,16 @@
#include "brw_context.h"
+static inline void
+brw_add_validated_bo(struct brw_context *brw, dri_bo *bo)
+{
+ assert(brw->state.validated_bo_count < ARRAY_SIZE(brw->state.validated_bos));
+
+ if (bo != NULL) {
+ dri_bo_reference(bo);
+ brw->state.validated_bos[brw->state.validated_bo_count++] = bo;
+ }
+};
const struct brw_tracked_state brw_blend_constant_color;
const struct brw_tracked_state brw_cc_unit;
@@ -84,6 +94,14 @@ const struct brw_tracked_state brw_indic
const struct brw_tracked_state brw_vertices;
/***********************************************************************
+ * brw_state.c
+ */
+void brw_validate_state(struct brw_context *brw);
+void brw_upload_state(struct brw_context *brw);
+void brw_init_state(struct brw_context *brw);
+void brw_destroy_state(struct brw_context *brw);
+
+/***********************************************************************
* brw_state_cache.c
*/
dri_bo *brw_cache_data(struct brw_cache *cache,
diff -urNap mesa_orig//src/mesa/drivers/dri/i965/brw_state_upload.c mesa_haihao//src/mesa/drivers/dri/i965/brw_state_upload.c
--- mesa_orig//src/mesa/drivers/dri/i965/brw_state_upload.c 2009-01-12 13:29:39.000000000 +0800
+++ mesa_haihao//src/mesa/drivers/dri/i965/brw_state_upload.c 2009-01-13 16:43:37.000000000 +0800
@@ -169,6 +169,18 @@ static void xor_states( struct brw_state
result->cache = a->cache ^ b->cache;
}
+static void
+brw_clear_validated_bos(struct brw_context *brw)
+{
+ int i;
+
+ /* Clear the last round of validated bos */
+ for (i = 0; i < brw->state.validated_bo_count; i++) {
+ dri_bo_unreference(brw->state.validated_bos[i]);
+ brw->state.validated_bos[i] = NULL;
+ }
+ brw->state.validated_bo_count = 0;
+}
/***********************************************************************
* Emit all state:
@@ -177,12 +189,15 @@ void brw_validate_state( struct brw_cont
{
struct intel_context *intel = &brw->intel;
struct brw_state_flags *state = &brw->state.dirty;
- GLuint i, count, pass = 0;
- dri_bo *last_batch_bo = NULL;
+ GLuint i;
+
+ brw_clear_validated_bos(brw);
state->mesa |= brw->intel.NewGLState;
brw->intel.NewGLState = 0;
+ brw_add_validated_bo(brw, intel->batch->buf);
+
if (brw->wrap)
state->brw |= BRW_NEW_CONTEXT;
@@ -211,8 +226,6 @@ void brw_validate_state( struct brw_cont
brw->intel.Fallback = 0;
- count = 0;
-
/* do prepare stage for all atoms */
for (i = 0; i < Elements(atoms); i++) {
const struct brw_tracked_state *atom = brw->state.atoms[i];
@@ -226,19 +239,15 @@ void brw_validate_state( struct brw_cont
}
}
}
+}
- if (brw->intel.Fallback)
- return;
- /* We're about to try to set up a coherent state in the batchbuffer for
- * the emission of primitives. If we exceed the aperture size in any of the
- * emit() calls, we need to go back to square 1 and try setting up again.
- */
-got_flushed:
- dri_bo_unreference(last_batch_bo);
- last_batch_bo = intel->batch->buf;
- dri_bo_reference(last_batch_bo);
- assert(pass++ <= 2);
+void brw_upload_state(struct brw_context *brw)
+{
+ struct brw_state_flags *state = &brw->state.dirty;
+ int i;
+
+ brw_clear_validated_bos(brw);
if (INTEL_DEBUG) {
/* Debug version which enforces various sanity checks on the
@@ -263,8 +272,6 @@ got_flushed:
if (check_state(state, &atom->dirty)) {
if (atom->emit) {
atom->emit( brw );
- if (intel->batch->buf != last_batch_bo)
- goto got_flushed;
}
}
@@ -289,15 +296,11 @@ got_flushed:
if (check_state(state, &atom->dirty)) {
if (atom->emit) {
atom->emit( brw );
- if (intel->batch->buf != last_batch_bo)
- goto got_flushed;
}
}
}
}
- dri_bo_unreference(last_batch_bo);
-
if (!brw->intel.Fallback)
memset(state, 0, sizeof(*state));
}

248
mesa-7.1-fix-i8xx-vbos.patch
View File

@ -1,248 +0,0 @@
From 57ebdba06567bd59ce7246471c129fb36b5b1de3 Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied@redhat.com>
Date: Fri, 28 Nov 2008 19:38:47 +1000
Subject: [PATCH] intel: restore old vertex submit paths for i8xx hardware.
For some reason the Intel 865 seem to claim VBO support in the docs, but
doesn't seem to practice it in the hardware, or there is some missing
errata.
This restores the old pre-vbo code and uses it on all 8xx hw.
---
src/mesa/drivers/dri/i915/intel_render.c | 25 ++++++-
src/mesa/drivers/dri/i915/intel_tris.c | 98 +++++++++++++++++++++++++++-
src/mesa/drivers/dri/intel/intel_context.h | 1 +
src/mesa/drivers/dri/intel/intel_reg.h | 4 +-
src/mesa/drivers/dri/intel/intel_screen.c | 1 +
src/mesa/drivers/dri/intel/intel_screen.h | 1 +
6 files changed, 124 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i915/intel_render.c b/src/mesa/drivers/dri/i915/intel_render.c
index 467abe4..410052b 100644
--- a/src/mesa/drivers/dri/i915/intel_render.c
+++ b/src/mesa/drivers/dri/i915/intel_render.c
@@ -117,6 +117,26 @@ intelDmaPrimitive(struct intel_context *intel, GLenum prim)
intel_set_prim(intel, hw_prim[prim]);
}
+static inline GLuint intel_get_vb_max(struct intel_context *intel)
+{
+ GLuint ret;
+
+ if (intel->intelScreen->no_vbo)
+ ret = intel->batch->size - 1500;
+ else
+ ret = INTEL_VB_SIZE;
+ ret /= (intel->vertex_size * 4);
+ return ret;
+}
+
+static inline GLuint intel_get_current_max(struct intel_context *intel)
+{
+
+ if (intel->intelScreen->no_vbo)
+ return intel_get_vb_max(intel);
+ else
+ return (INTEL_VB_SIZE - intel->prim.current_offset) / (intel->vertex_size * 4);
+}
#define LOCAL_VARS struct intel_context *intel = intel_context(ctx)
#define INIT( prim ) \
@@ -126,9 +146,8 @@ do { \
#define FLUSH() INTEL_FIREVERTICES(intel)
-#define GET_SUBSEQUENT_VB_MAX_VERTS() (INTEL_VB_SIZE / (intel->vertex_size * 4))
-#define GET_CURRENT_VB_MAX_VERTS() \
- ((INTEL_VB_SIZE - intel->prim.current_offset) / (intel->vertex_size * 4))
+#define GET_SUBSEQUENT_VB_MAX_VERTS() intel_get_vb_max(intel)
+#define GET_CURRENT_VB_MAX_VERTS() intel_get_current_max(intel)
#define ALLOC_VERTS(nr) intel_get_prim_space(intel, nr)
diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c
index 797d6c5..52f38e0 100644
--- a/src/mesa/drivers/dri/i915/intel_tris.c
+++ b/src/mesa/drivers/dri/i915/intel_tris.c
@@ -61,9 +61,101 @@ static void intelRenderPrimitive(GLcontext * ctx, GLenum prim);
static void intelRasterPrimitive(GLcontext * ctx, GLenum rprim,
GLuint hwprim);
+static void
+intel_flush_inline_primitive(struct intel_context *intel)
+{
+ GLuint used = intel->batch->ptr - intel->prim.start_ptr;
+
+ assert(intel->prim.primitive != ~0);
+
+/* _mesa_printf("/\n"); */
+
+ if (used < 8)
+ goto do_discard;
+
+ *(int *) intel->prim.start_ptr = (_3DPRIMITIVE |
+ intel->prim.primitive | (used / 4 - 2));
+
+ goto finished;
+
+ do_discard:
+ intel->batch->ptr -= used;
+
+ finished:
+ intel->prim.primitive = ~0;
+ intel->prim.start_ptr = 0;
+ intel->prim.flush = 0;
+}
+
+static void intel_start_inline(struct intel_context *intel, uint32_t prim)
+{
+ BATCH_LOCALS;
+ uint32_t batch_flags = LOOP_CLIPRECTS;
+
+ intel_wait_flips(intel);
+ intel->vtbl.emit_state(intel);
+
+ intel->no_batch_wrap = GL_TRUE;
+
+ /*_mesa_printf("%s *", __progname);*/
+
+ /* Emit a slot which will be filled with the inline primitive
+ * command later.
+ */
+ BEGIN_BATCH(2, batch_flags);
+ OUT_BATCH(0);
+
+ assert((intel->batch->dirty_state & (1<<1)) == 0);
+
+ intel->prim.start_ptr = intel->batch->ptr;
+ intel->prim.primitive = prim;
+ intel->prim.flush = intel_flush_inline_primitive;
+
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
+
+ intel->no_batch_wrap = GL_FALSE;
+/* _mesa_printf(">"); */
+}
+
+static void intel_wrap_inline(struct intel_context *intel)
+{
+ GLuint prim = intel->prim.primitive;
+
+ intel_flush_inline_primitive(intel);
+ intel_batchbuffer_flush(intel->batch);
+ intel_start_inline(intel, prim); /* ??? */
+}
+
+static GLuint *intel_extend_inline(struct intel_context *intel, GLuint dwords)
+{
+ GLuint sz = dwords * sizeof(GLuint);
+ GLuint *ptr;
+
+ assert(intel->prim.flush == intel_flush_inline_primitive);
+
+ if (intel_batchbuffer_space(intel->batch) < sz)
+ intel_wrap_inline(intel);
+
+/* _mesa_printf("."); */
+
+ intel->vtbl.assert_not_dirty(intel);
+
+ ptr = (GLuint *) intel->batch->ptr;
+ intel->batch->ptr += sz;
+
+ return ptr;
+}
+
/** Sets the primitive type for a primitive sequence, flushing as needed. */
void intel_set_prim(struct intel_context *intel, uint32_t prim)
{
+ /* if we have no VBOs */
+
+ if (intel->intelScreen->no_vbo) {
+ intel_start_inline(intel, prim);
+ return;
+ }
if (prim != intel->prim.primitive) {
INTEL_FIREVERTICES(intel);
intel->prim.primitive = prim;
@@ -75,6 +167,10 @@ uint32_t *intel_get_prim_space(struct intel_context *intel, unsigned int count)
{
uint32_t *addr;
+ if (intel->intelScreen->no_vbo) {
+ return intel_extend_inline(intel, count * intel->vertex_size);
+ }
+
/* Check for space in the existing VB */
if (intel->prim.vb_bo == NULL ||
(intel->prim.current_offset +
@@ -155,7 +251,7 @@ void intel_flush_prim(struct intel_context *intel)
#if 0
printf("emitting %d..%d=%d vertices size %d\n", offset,
- intel->prim.current_offset, intel->prim.count,
+ intel->prim.current_offset, count,
intel->vertex_size * 4);
#endif
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index 3938af4..4d1f0d7 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -184,6 +184,7 @@ struct intel_context
GLuint id;
uint32_t primitive; /**< Current hardware primitive type */
void (*flush) (struct intel_context *);
+ GLubyte *start_ptr; /**< for i8xx */
dri_bo *vb_bo;
uint8_t *vb;
unsigned int start_offset; /**< Byte offset of primitive sequence */
diff --git a/src/mesa/drivers/dri/intel/intel_reg.h b/src/mesa/drivers/dri/intel/intel_reg.h
index 68d8a05..57ac8f0 100644
--- a/src/mesa/drivers/dri/intel/intel_reg.h
+++ b/src/mesa/drivers/dri/intel/intel_reg.h
@@ -71,14 +71,14 @@
/** @{
* 915 definitions
*/
-#define S0_VB_OFFSET_MASK 0xffffffc
+#define S0_VB_OFFSET_MASK 0xffffffc0
#define S0_AUTO_CACHE_INV_DISABLE (1<<0)
/** @} */
/** @{
* 830 definitions
*/
-#define S0_VB_OFFSET_MASK_830 0xffffff8
+#define S0_VB_OFFSET_MASK_830 0xffffff80
#define S0_VB_PITCH_SHIFT_830 1
#define S0_VB_ENABLE_830 (1<<0)
/** @} */
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index cf09fad..61b55b9 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -461,6 +461,7 @@ intelCreateContext(const __GLcontextModes * mesaVis,
sharedContextPrivate);
}
} else {
+ intelScreen->no_vbo = GL_TRUE;
return i830CreateContext(mesaVis, driContextPriv, sharedContextPrivate);
}
#else
diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h
index fc913da..91f0d6d 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -77,6 +77,7 @@ typedef struct
GLboolean no_hw;
+ GLboolean no_vbo;
int ttm;
dri_bufmgr *bufmgr;
--
1.6.0.3