Accepting request 437257 from X11:XOrg

- let Mesa-dri-nouveau supplement xf86-video-nouveau, so it  gets
  preselected as well once hardware supplements for Mesa-dri-nouveau
  match (bnc#1005323)

- Mesa.spec: %ifdef'd out patches by mistake

- Split off nouveau*_dri.so into Mesa-dri-nouveau.
  Nouveau's 3D support is too unstable to enable by default.

- Mesa.spec: Disable Nouveau locking patches by default

- U_r300g-Set-R300_VAP_CNTL-on-RSxxx-to-avoid-triangle-flickering.patch:
  Initialize RSxxx chipsets correctly (bsc#985650)

- N_01-WIP-nouveau-add-locking.patch
  N_02-nouveau-more-locking-make-sure-that-fence-work-is-always-done-with-the-push-mutex-acquired.patch
  N_03-nv30-locking-fixes.patch
  N_04-nv50-Fix-double-lock-in-nv50_hw_sm_get_query_result.patch
  N_05-Use-nv50_render_condition-in-nv50_blitctx_post_blit.patch
  Backport nouveau locking workaround to enable multithreading.
  Source: https://github.com/imirkin/mesa/commits/locking
  According to the author, crashes may still happen, but much more rarely.
  Tested on GK107.
  N_04-* and N_05-* include untested fixes for nv50.
  Fixes (boo#997171) as suggested in (fdo#91632).

OBS-URL: https://build.opensuse.org/request/show/437257
OBS-URL: https://build.opensuse.org/package/show/openSUSE:Factory/Mesa?expand=0&rev=272

Mesa.changes

@@ -1,3 +1,53 @@
+-------------------------------------------------------------------
+Tue Oct 25 10:05:26 UTC 2016 - sndirsch@suse.com
+
+- let Mesa-dri-nouveau supplement xf86-video-nouveau, so it  gets
+  preselected as well once hardware supplements for Mesa-dri-nouveau
+  match (bnc#1005323)
+
+-------------------------------------------------------------------
+Mon Oct 17 14:35:07 UTC 2016 - mstaudt@suse.com
+
+- Mesa.spec: %ifdef'd out patches by mistake
+
+-------------------------------------------------------------------
+Mon Oct 17 13:45:06 UTC 2016 - mstaudt@suse.com
+
+- Split off nouveau*_dri.so into Mesa-dri-nouveau.
+  Nouveau's 3D support is too unstable to enable by default.
+
+-------------------------------------------------------------------
+Mon Oct 17 12:34:12 UTC 2016 - mstaudt@suse.com
+
+- Mesa.spec: Disable Nouveau locking patches by default
+
+-------------------------------------------------------------------
+Fri Oct 14 10:17:17 UTC 2016 - mstaudt@suse.com
+
+- U_r300g-Set-R300_VAP_CNTL-on-RSxxx-to-avoid-triangle-flickering.patch:
+  Initialize RSxxx chipsets correctly (bsc#985650)
+
+-------------------------------------------------------------------
+Fri Oct 14 09:10:46 UTC 2016 - mstaudt@suse.com
+
+- N_01-WIP-nouveau-add-locking.patch
+  N_02-nouveau-more-locking-make-sure-that-fence-work-is-always-done-with-the-push-mutex-acquired.patch
+  N_03-nv30-locking-fixes.patch
+  N_04-nv50-Fix-double-lock-in-nv50_hw_sm_get_query_result.patch
+  N_05-Use-nv50_render_condition-in-nv50_blitctx_post_blit.patch
+
+  Backport nouveau locking workaround to enable multithreading.
+
+  Source: https://github.com/imirkin/mesa/commits/locking
+
+  According to the author, crashes may still happen, but much more rarely.
+
+  Tested on GK107.
+
+  N_04-* and N_05-* include untested fixes for nv50.
+
+  Fixes (boo#997171) as suggested in (fdo#91632).
+
 -------------------------------------------------------------------
 Mon Sep 19 10:00:05 UTC 2016 - zaitor@opensuse.org
 

Mesa.spec

@@ -16,6 +16,10 @@
 #
 
 
+# Only enable the Nouveau locking patches if you know what you're doing.
+# They may fix KDE on Nouveau. They may also deadlock your userland.
+%define use_broken_nouveau_locking_patches 0
+
 %define glamor 1
 %define _name_archive mesa
 %define _version 12.0.3
@@ -71,6 +75,15 @@ Patch15:        u_mesa-8.0-llvmpipe-shmget.patch
 Patch18:        n_VDPAU-XVMC-libs-Replace-hardlinks-with-copies.patch
 # never to be upstreamed
 Patch21:        n_Define-GLAPIVAR-separate-from-GLAPI.patch
+# Already upstream
+Patch22:        U_r300g-Set-R300_VAP_CNTL-on-RSxxx-to-avoid-triangle-flickering.patch
+
+# Nouveau multithreading workarounds from https://github.com/imirkin/mesa/commits/locking
+Patch61:        N_01-WIP-nouveau-add-locking.patch
+Patch62:        N_02-nouveau-more-locking-make-sure-that-fence-work-is-always-done-with-the-push-mutex-acquired.patch
+Patch63:        N_03-nv30-locking-fixes.patch
+Patch64:        N_04-nv50-Fix-double-lock-in-nv50_hw_sm_get_query_result.patch
+Patch65:        N_05-Use-nv50_render_condition-in-nv50_blitctx_post_blit.patch
 
 BuildRequires:  autoconf >= 2.60
 BuildRequires:  automake
@@ -380,6 +393,17 @@ Requires:       Mesa = %{version}
 This package contains the development environment required for
 compiling programs and libraries using the DRI API.
 
+%package -n Mesa-dri-nouveau
+Summary:        Mesa DRI plug-in for 3D acceleration via Nouveau
+Group:          System/Libraries
+Requires:       Mesa = %{version}
+Supplements:    xf86-video-nouveau
+
+%description -n Mesa-dri-nouveau
+This package contains nouveau_dri.so, which is necessary for
+Nouveau's 3D acceleration to work. It is packaged separately
+since it is still experimental.
+
 %package -n libgbm1
 Summary:        Generic buffer management API
 Group:          System/Libraries
@@ -583,6 +607,15 @@ rm -rf docs/README.{VMS,WIN32,OS2}
 %patch12 -p1
 %patch18 -p1
 %patch21 -p1
+%patch22 -p1
+
+%if %{use_broken_nouveau_locking_patches}
+%patch61 -p1
+%patch62 -p1
+%patch63 -p1
+%patch64 -p1
+%patch65 -p1
+%endif
 
 %build
 %if 0%{?suse_version} >= 1310
@@ -782,6 +815,8 @@ install -m 644 $RPM_SOURCE_DIR/README.updates \
 %{_libdir}/dri/updates
 %endif
 %{_libdir}/dri/*_dri.so
+%exclude %{_libdir}/dri/nouveau_dri.so
+%exclude %{_libdir}/dri/nouveau_vieux_dri.so
 %if 0%{with_opencl}
 # only built with opencl
 %dir %{_libdir}/gallium-pipe/
@@ -945,6 +980,10 @@ install -m 644 $RPM_SOURCE_DIR/README.updates \
 %{_includedir}/GL/internal
 %{_libdir}/pkgconfig/dri.pc
 
+%files -n Mesa-dri-nouveau
+%{_libdir}/dri/nouveau_dri.so
+%{_libdir}/dri/nouveau_vieux_dri.so
+
 %files devel
 %defattr(-,root,root)
 %doc docs/*.html

N_02-nouveau-more-locking-make-sure-that-fence-work-is-always-done-with-the-push-mutex-acquired.patch

@@ -0,0 +1,96 @@
+From: Ilia Mirkin <imirkin@alum.mit.edu>
+Date: Mon Jun 6 20:30:48 2016 -0400
+Subject: [PATCH 2/5]nouveau: more locking - make sure that fence work is always done with the push mutex acquired
+Patch-mainline: N/A
+References: boo#997171
+Signed-off-by: Max Staudt <mstaudt@suse.de>
+
+Cherry-picked from 2733e5483e1c2b80e4b0ae21187ec5e3e1579397
+                at https://github.com/imirkin/mesa.git
+
+Signed-off-by: Max Staudt <mstaudt@suse.de>
+---
+ src/gallium/drivers/nouveau/nouveau_buffer.c     | 4 ++++
+ src/gallium/drivers/nouveau/nv50/nv50_miptree.c  | 7 +++++--
+ src/gallium/drivers/nouveau/nv50/nv50_query_hw.c | 5 ++++-
+ src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c | 5 ++++-
+ 4 files changed, 17 insertions(+), 4 deletions(-)
+
+diff --git a/src/gallium/drivers/nouveau/nouveau_buffer.c b/src/gallium/drivers/nouveau/nouveau_buffer.c
+index b54c19b..a5a06cf 100644
+--- a/src/gallium/drivers/nouveau/nouveau_buffer.c
++++ b/src/gallium/drivers/nouveau/nouveau_buffer.c
+@@ -80,6 +80,8 @@ release_allocation(struct nouveau_mm_allocation **mm,
+ inline void
+ nouveau_buffer_release_gpu_storage(struct nv04_resource *buf)
+ {
++   if (buf->fence)
++      pipe_mutex_lock(buf->fence->screen->push_mutex);
+    if (buf->fence && buf->fence->state < NOUVEAU_FENCE_STATE_FLUSHED) {
+       nouveau_fence_work(buf->fence, nouveau_fence_unref_bo, buf->bo);
+       buf->bo = NULL;
+@@ -89,6 +91,8 @@ nouveau_buffer_release_gpu_storage(struct nv04_resource *buf)
+
+    if (buf->mm)
+       release_allocation(&buf->mm, buf->fence);
++   if (buf->fence)
++      pipe_mutex_unlock(buf->fence->screen->push_mutex);
+
+    if (buf->domain == NOUVEAU_BO_VRAM)
+       NOUVEAU_DRV_STAT_RES(buf, buf_obj_current_bytes_vid, -(uint64_t)buf->base.width0);
+diff --git a/src/gallium/drivers/nouveau/nv50/nv50_miptree.c b/src/gallium/drivers/nouveau/nv50/nv50_miptree.c
+index 7450119..38e4faf 100644
+--- a/src/gallium/drivers/nouveau/nv50/nv50_miptree.c
++++ b/src/gallium/drivers/nouveau/nv50/nv50_miptree.c
+@@ -163,10 +163,13 @@ nv50_miptree_destroy(struct pipe_screen *pscreen, struct pipe_resource *pt)
+ {
+    struct nv50_miptree *mt = nv50_miptree(pt);
+
+-   if (mt->base.fence && mt->base.fence->state < NOUVEAU_FENCE_STATE_FLUSHED)
++   if (mt->base.fence && mt->base.fence->state < NOUVEAU_FENCE_STATE_FLUSHED) {
++      pipe_mutex_lock(nouveau_screen(pscreen)->push_mutex);
+       nouveau_fence_work(mt->base.fence, nouveau_fence_unref_bo, mt->base.bo);
+-   else
++      pipe_mutex_unlock(nouveau_screen(pscreen)->push_mutex);
++   } else {
+       nouveau_bo_ref(NULL, &mt->base.bo);
++   }
+
+    nouveau_fence_ref(NULL, &mt->base.fence);
+    nouveau_fence_ref(NULL, &mt->base.fence_wr);
+diff --git a/src/gallium/drivers/nouveau/nv50/nv50_query_hw.c b/src/gallium/drivers/nouveau/nv50/nv50_query_hw.c
+index 9067bcc..d2ad72e 100644
+--- a/src/gallium/drivers/nouveau/nv50/nv50_query_hw.c
++++ b/src/gallium/drivers/nouveau/nv50/nv50_query_hw.c
+@@ -56,9 +56,12 @@ nv50_hw_query_allocate(struct nv50_context *nv50, struct nv50_query *q,
+       if (hq->mm) {
+          if (hq->state == NV50_HW_QUERY_STATE_READY)
+             nouveau_mm_free(hq->mm);
+-         else
++         else {
++            pipe_mutex_lock(screen->base.push_mutex);
+             nouveau_fence_work(screen->base.fence.current,
+                                nouveau_mm_free_work, hq->mm);
++            pipe_mutex_unlock(screen->base.push_mutex);
++         }
+       }
+    }
+    if (size) {
+diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c
+index f2584cb..4b51a67 100644
+--- a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c
++++ b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c
+@@ -48,9 +48,12 @@ nvc0_hw_query_allocate(struct nvc0_context *nvc0, struct nvc0_query *q,
+       if (hq->mm) {
+          if (hq->state == NVC0_HW_QUERY_STATE_READY)
+             nouveau_mm_free(hq->mm);
+-         else
++         else {
++            pipe_mutex_lock(screen->base.push_mutex);
+             nouveau_fence_work(screen->base.fence.current,
+                                nouveau_mm_free_work, hq->mm);
++            pipe_mutex_unlock(screen->base.push_mutex);
++         }
+       }
+    }
+    if (size) {

N_03-nv30-locking-fixes.patch

@@ -0,0 +1,120 @@
+From: Ilia Mirkin <imirkin@alum.mit.edu>
+Date: Tue Jun 21 22:59:50 2016 -0400
+Subject: [PATCH 3/5]nv30 locking fixes
+Patch-mainline: N/A
+References: boo#997171
+Signed-off-by: Max Staudt <mstaudt@suse.de>
+
+Cherry-picked from 940b3a773f264f3f52574160f0d06c48f8e8aeb2
+                at https://github.com/imirkin/mesa.git
+
+Signed-off-by: Max Staudt <mstaudt@suse.de>
+---
+ src/gallium/drivers/nouveau/nv30/nv30_draw.c     | 20 ++++++++++++++++++--
+ src/gallium/drivers/nouveau/nv30/nv30_fragprog.c |  4 ++++
+ 2 files changed, 22 insertions(+), 2 deletions(-)
+
+diff --git a/src/gallium/drivers/nouveau/nv30/nv30_draw.c b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
+index 7b0d074..1c71534 100644
+--- a/src/gallium/drivers/nouveau/nv30/nv30_draw.c
++++ b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
+@@ -127,6 +127,8 @@ nv30_render_draw_elements(struct vbuf_render *render,
+    struct nouveau_pushbuf *push = nv30->screen->base.pushbuf;
+    unsigned i;
+
++   pipe_mutex_lock(nv30->screen->base.push_mutex);
++
+    BEGIN_NV04(push, NV30_3D(VTXBUF(0)), r->vertex_info.num_attribs);
+    for (i = 0; i < r->vertex_info.num_attribs; i++) {
+       PUSH_RESRC(push, NV30_3D(VTXBUF(i)), BUFCTX_VTXTMP,
+@@ -134,8 +136,10 @@ nv30_render_draw_elements(struct vbuf_render *render,
+                        NOUVEAU_BO_LOW | NOUVEAU_BO_RD, 0, NV30_3D_VTXBUF_DMA1);
+    }
+
+-   if (!nv30_state_validate(nv30, ~0, false))
++   if (!nv30_state_validate(nv30, ~0, false)) {
++      pipe_mutex_unlock(nv30->screen->base.push_mutex);
+       return;
++   }
+
+    BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
+    PUSH_DATA (push, r->prim);
+@@ -160,6 +164,8 @@ nv30_render_draw_elements(struct vbuf_render *render,
+    BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
+    PUSH_DATA (push, NV30_3D_VERTEX_BEGIN_END_STOP);
+    PUSH_RESET(push, BUFCTX_VTXTMP);
++
++   pipe_mutex_unlock(nv30->screen->base.push_mutex);
+ }
+
+ static void
+@@ -172,6 +178,8 @@ nv30_render_draw_arrays(struct vbuf_render *render, unsigned start, uint nr)
+    unsigned ps = fn + (pn ? 1 : 0);
+    unsigned i;
+
++   pipe_mutex_lock(nv30->screen->base.push_mutex);
++
+    BEGIN_NV04(push, NV30_3D(VTXBUF(0)), r->vertex_info.num_attribs);
+    for (i = 0; i < r->vertex_info.num_attribs; i++) {
+       PUSH_RESRC(push, NV30_3D(VTXBUF(i)), BUFCTX_VTXTMP,
+@@ -179,8 +187,10 @@ nv30_render_draw_arrays(struct vbuf_render *render, unsigned start, uint nr)
+                        NOUVEAU_BO_LOW | NOUVEAU_BO_RD, 0, NV30_3D_VTXBUF_DMA1);
+    }
+
+-   if (!nv30_state_validate(nv30, ~0, false))
++   if (!nv30_state_validate(nv30, ~0, false)) {
++      pipe_mutex_unlock(nv30->screen->base.push_mutex);
+       return;
++   }
+
+    BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
+    PUSH_DATA (push, r->prim);
+@@ -197,6 +207,8 @@ nv30_render_draw_arrays(struct vbuf_render *render, unsigned start, uint nr)
+    BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
+    PUSH_DATA (push, NV30_3D_VERTEX_BEGIN_END_STOP);
+    PUSH_RESET(push, BUFCTX_VTXTMP);
++
++   pipe_mutex_unlock(nv30->screen->base.push_mutex);
+ }
+
+ static void
+@@ -383,6 +395,8 @@ nv30_render_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
+
+    nv30_render_validate(nv30);
+
++   pipe_mutex_unlock(nv30->screen->base.push_mutex);
++
+    if (nv30->draw_dirty & NV30_NEW_VIEWPORT)
+       draw_set_viewport_states(draw, 0, 1, &nv30->viewport);
+    if (nv30->draw_dirty & NV30_NEW_RASTERIZER)
+@@ -448,6 +462,8 @@ nv30_render_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
+       if (transfer[i])
+          pipe_buffer_unmap(pipe, transfer[i]);
+
++   pipe_mutex_lock(nv30->screen->base.push_mutex);
++
+    nv30->draw_dirty = 0;
+    nv30_state_release(nv30);
+ }
+diff --git a/src/gallium/drivers/nouveau/nv30/nv30_fragprog.c b/src/gallium/drivers/nouveau/nv30/nv30_fragprog.c
+index 6de61bc..fd21f99 100644
+--- a/src/gallium/drivers/nouveau/nv30/nv30_fragprog.c
++++ b/src/gallium/drivers/nouveau/nv30/nv30_fragprog.c
+@@ -38,6 +38,8 @@ nv30_fragprog_upload(struct nv30_context *nv30)
+    struct nv30_fragprog *fp = nv30->fragprog.program;
+    struct pipe_context *pipe = &nv30->base.pipe;
+
++   pipe_mutex_unlock(nv->screen->push_mutex);
++
+    if (unlikely(!fp->buffer))
+       fp->buffer = pipe_buffer_create(pipe->screen, 0, 0, fp->insn_len * 4);
+
+@@ -60,6 +62,8 @@ nv30_fragprog_upload(struct nv30_context *nv30)
+
+    if (nv04_resource(fp->buffer)->domain != NOUVEAU_BO_VRAM)
+       nouveau_buffer_migrate(nv, nv04_resource(fp->buffer), NOUVEAU_BO_VRAM);
++
++   pipe_mutex_lock(nv->screen->push_mutex);
+ }
+
+ void

N_04-nv50-Fix-double-lock-in-nv50_hw_sm_get_query_result.patch

@@ -0,0 +1,25 @@
+From: Max Staudt <mstaudt@suse.de>
+Date: Wed Oct 5 18:49:41 2016 +0200
+Subject: [PATCH 4/5]nv50: Fix double lock in nv50_hw_sm_get_query_result()
+Patch-mainline: N/A
+References: boo#997171
+Signed-off-by: Max Staudt <mstaudt@suse.de>
+
+Signed-off-by: Max Staudt <mstaudt@suse.de>
+---
+ src/gallium/drivers/nouveau/nv50/nv50_query_hw_sm.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/gallium/drivers/nouveau/nv50/nv50_query_hw_sm.c b/src/gallium/drivers/nouveau/nv50/nv50_query_hw_sm.c
+index 31445eb..acc64ac 100644
+--- a/src/gallium/drivers/nouveau/nv50/nv50_query_hw_sm.c
++++ b/src/gallium/drivers/nouveau/nv50/nv50_query_hw_sm.c
+@@ -351,7 +351,7 @@ nv50_hw_sm_get_query_result(struct nv50_context *nv50, struct nv50_hw_query *hq,
+
+    pipe_mutex_lock(nv50->screen->base.push_mutex);
+    ret = nv50_hw_sm_query_read_data(count, nv50, wait, hq, cfg, mp_count);
+-   pipe_mutex_lock(nv50->screen->base.push_mutex);
++   pipe_mutex_unlock(nv50->screen->base.push_mutex);
+    if (!ret)
+       return false;
+

N_05-Use-nv50_render_condition-in-nv50_blitctx_post_blit.patch

@@ -0,0 +1,29 @@
+From: Max Staudt <mstaudt@suse.de>
+Date: Wed Oct 5 18:51:38 2016 +0200
+Subject: [PATCH 5/5]Use nv50_render_condition() in nv50_blitctx_post_blit()
+Patch-mainline: N/A
+References: boo#997171
+Signed-off-by: Max Staudt <mstaudt@suse.de>
+
+Analogous to what happens in nvc0_blitctx_post_blit()
+
+Signed-off-by: Max Staudt <mstaudt@suse.de>
+---
+ src/gallium/drivers/nouveau/nv50/nv50_surface.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/src/gallium/drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
+index d6b9de0..36cd72b 100644
+--- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
++++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
+@@ -1328,8 +1328,8 @@ nv50_blitctx_post_blit(struct nv50_blitctx *blit)
+    nv50->samplers[2][1] = blit->saved.sampler[1];
+
+    if (nv50->cond_query && !blit->render_condition_enable)
+-      nv50->base.pipe.render_condition(&nv50->base.pipe, nv50->cond_query,
+-                                       nv50->cond_cond, nv50->cond_mode);
++      nv50_render_condition(&nv50->base.pipe, nv50->cond_query,
++                            nv50->cond_cond, nv50->cond_mode);
+
+    nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_FB);
+    nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_TEXTURES);

U_r300g-Set-R300_VAP_CNTL-on-RSxxx-to-avoid-triangle-flickering.patch

@@ -0,0 +1,67 @@
+From: Max Staudt <mstaudt@suse.de>
+Date: Thu Sep 8 01:53:45 2016 +0200
+Subject: [PATCH]r300g: Set R300_VAP_CNTL on RSxxx to avoid triangle flickering
+Patch-mainline: 02675622b02742960678c438f1b239321c075f50
+Git-repo: git://anongit.freedesktop.org/mesa/mesa
+References: bsc#985650
+Signed-off-by: Max Staudt <mstaudt@suse.de>
+
+On the RSxxx chip series, HW TCL is missing and r300_emit_vs_state()
+is never called.
+
+However, if R300_VAP_CNTL is never set, the hardware (at least the
+RS690 I tested this on) comes up with rendering artifacts, and
+parts that are uploaded before this "fix" remain broken in VRAM.
+This causes artifacts as in fdo#69076 ("triangle flickering").
+
+It seems like this setup needs to happen at least once after power on
+for 3D rendering to work properly. In the DDX with EXA, this happens in
+RADEON_SWITCH_TO_3D() when processing an XRENDER Composite or an
+Xv request. So playing back a video or starting a GTK+2 application
+fixes 3D rendering for the rest of the session. However, this auto-fix
+doesn't happen when EXA is not used, such as with GLAMOR or Wayland.
+
+This patch ensures the register is configured even in absence of
+the DDX's EXA module.
+
+The register setting is taken from:
+  xf86-video-ati  --  RADEONInit3DEngineInternal()
+  mesa/src/mesa/drivers/dri/r300  --  r300EmitClearState()
+
+Tested on RS690.
+
+CC: <mesa-stable@lists.freedesktop.org>
+Signed-off-by: Max Staudt <mstaudt@suse.de>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+---
+ src/gallium/drivers/r300/r300_context.c | 10 +++++++++-
+ 1 file changed, 9 insertions(+), 1 deletion(-)
+
+diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c
+index 82ba043..0998fac 100644
+--- a/src/gallium/drivers/r300/r300_context.c
++++ b/src/gallium/drivers/r300/r300_context.c
+@@ -190,7 +190,7 @@ static boolean r300_setup_atoms(struct r300_context* r300)
+     /* VAP. */
+     R300_INIT_ATOM(viewport_state, 9);
+     R300_INIT_ATOM(pvs_flush, 2);
+-    R300_INIT_ATOM(vap_invariant_state, is_r500 ? 11 : 9);
++    R300_INIT_ATOM(vap_invariant_state, is_r500 || !has_tcl ? 11 : 9);
+     R300_INIT_ATOM(vertex_stream_state, 0);
+     R300_INIT_ATOM(vs_state, 0);
+     R300_INIT_ATOM(vs_constants, 0);
+@@ -314,6 +314,14 @@ static void r300_init_states(struct pipe_context *pipe)
+
+         if (r300->screen->caps.is_r500) {
+             OUT_CB_REG(R500_VAP_TEX_TO_COLOR_CNTL, 0);
++        } else if (!r300->screen->caps.has_tcl) {
++            /* RSxxx:
++             * Static VAP setup since r300_emit_vs_state() is never called.
++             */
++            OUT_CB_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(10) |
++                                      R300_PVS_NUM_CNTLRS(5) |
++                                      R300_PVS_NUM_FPUS(2) |
++                                      R300_PVS_VF_MAX_VTX_NUM(5));
+         }
+         END_CB;
+     }