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binutils/binutils-2.27-branch.diff

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- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 4f859c5..2eb6f2a 100644
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,80 @@
+2016-10-31 Alan Modra <amodra@gmail.com>
+
+ PR 20748
+ * elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Revert
+ 2016-05-13 change.
+
+2016-10-10 Christophe Lyon <christophe.lyon@linaro.org>
+ Backport from mainline
+ 2016-09-28 Christophe Lyon <christophe.lyon@linaro.org>
+
+ PR ld/20608
+ * elf32-arm.c (arm_type_of_stub): Handle the case when the pre-PLT
+ Thumb-ARM stub is too far.
+
+2016-09-06 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
+
+ Backport from mainline
+ 2016-09-02 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
+
+ PR ld/20545
+ * elf32-avr.c (elf32_avr_relax_delete_bytes): Add parameter
+ delete_shrinks_insn. Modify computation of shrinked_insn_address.
+ Compute shrink_boundary and adjust addend only if
+ addend_within_shrink_boundary.
+ (elf32_avr_relax_section): Modify calls to
+ elf32_avr_relax_delete_bytes to pass extra parameter.
+
+2016-09-01 Alan Modra <amodra@gmail.com>
+
+ * elf64-ppc.c (synthetic_opd): New static var.
+ (compare_symbols): Don't treat symbols in .opd specially for ELFv2.
+ (ppc64_elf_get_synthetic_symtab): Likewise. Comment.
+
+2016-08-30 Alan Modra <amodra@gmail.com>
+
+ PR 20531
+ * elf32-ppc.c (_bfd_elf_ppc_set_arch): Add missing "break".
+
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
+2016-08-19 Alan Modra <amodra@gmail.com>
+
+ PR 20472
+ * elf64-ppc.c (ppc64_elf_before_check_relocs): Tweak abiversion test.
+ (readonly_dynrelocs): Comment fix.
+ (global_entry_stub): New function.
+ (ppc64_elf_adjust_dynamic_symbol): Tweak abiversion test. Match
+ ELFv2 code deciding on dynamic relocs vs. global entry stubs to
+ that in size_global_entry_stubs, handling ifunc too. Delete dead
+ weak sym code.
+ (allocate_dynrelocs): Ensure dyn_relocs field is cleared when no
+ dyn_relocs are needed. Correct handling of ifunc dyn_relocs.
+ Tidy ELIMINATE_COPY_RELOCS code, only setting dynindx for
+ undefweak syms. Expand and correct comments.
+ (size_global_entry_stubs): Ensure symbol is defined.
+ (ppc64_elf_relocate_section): Match condition under which
+ dyn_relocs are emitted to that in allocate_dynrelocs.
+
+2016-08-11 Alan Modra <amodra@gmail.com>
+
+ * elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Don't exit with
+ non_got_ref true in any case where we could have generated dynbss
+ copies but decide not to do so.
+
+2016-08-02 Nick Clifton <nickc@redhat.com>
+
+ PR ld/17739
+ * elf32-sh.c (sh_elf_gc_sweep_hook): Delete.
+ (elf_backend_sweep_hook): Delete.
+
+2016-08-03 Tristan Gingold <gingold@adacore.com>
+
+ * version.m4: Bump version to 2.27.0
+ * configure: Regenerate.
+
+2016-08-03 Tristan Gingold <gingold@adacore.com>
+
+ * development.sh: Set development to true.
+
2016-08-03 Tristan Gingold <gingold@adacore.com>
* version.m4: Bump version to 2.27
diff --git a/bfd/configure b/bfd/configure
index 6e6283d..a437569 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated by GNU Autoconf 2.64 for bfd 2.27.
+# Generated by GNU Autoconf 2.64 for bfd 2.27.0.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@ MAKEFLAGS=
# Identity of this package.
PACKAGE_NAME='bfd'
PACKAGE_TARNAME='bfd'
-PACKAGE_VERSION='2.27'
-PACKAGE_STRING='bfd 2.27'
+PACKAGE_VERSION='2.27.0'
+PACKAGE_STRING='bfd 2.27.0'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -1353,7 +1353,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
-\`configure' configures bfd 2.27 to adapt to many kinds of systems.
+\`configure' configures bfd 2.27.0 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1424,7 +1424,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
- short | recursive ) echo "Configuration of bfd 2.27:";;
+ short | recursive ) echo "Configuration of bfd 2.27.0:";;
esac
cat <<\_ACEOF
@@ -1545,7 +1545,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
-bfd configure 2.27
+bfd configure 2.27.0
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -2187,7 +2187,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
-It was created by bfd $as_me 2.27, which was
+It was created by bfd $as_me 2.27.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -3996,7 +3996,7 @@ fi
# Define the identity of the package.
PACKAGE='bfd'
- VERSION='2.27'
+ VERSION='2.27.0'
cat >>confdefs.h <<_ACEOF
@@ -16576,7 +16576,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
-This file was extended by bfd $as_me 2.27, which was
+This file was extended by bfd $as_me 2.27.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -16640,7 +16640,7 @@ Report bugs to the package provider."
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
-bfd config.status 2.27
+bfd config.status 2.27.0
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
diff --git a/bfd/development.sh b/bfd/development.sh
index 5d00fa0..85dae6b 100644
--- a/bfd/development.sh
+++ b/bfd/development.sh
@@ -16,4 +16,4 @@
# along with this program. If not, see <http://www.gnu.org/licenses/>.
# Controls whether to enable development-mode features by default.
-development=false
+development=true
diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
index 3d4a458..700bec3 100644
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -3877,17 +3877,43 @@ arm_type_of_stub (struct bfd_link_info *info,
/* Note when dealing with PLT entries: the main PLT stub is in
ARM mode, so if the branch is in Thumb mode, another
Thumb->ARM stub will be inserted later just before the ARM
- PLT stub. We don't take this extra distance into account
- here, because if a long branch stub is needed, we'll add a
- Thumb->Arm one and branch directly to the ARM PLT entry
- because it avoids spreading offset corrections in several
- places. */
+ PLT stub. If a long branch stub is needed, we'll add a
+ Thumb->Arm one and branch directly to the ARM PLT entry.
+ Here, we have to check if a pre-PLT Thumb->ARM stub
+ is needed and if it will be close enough. */
destination = (splt->output_section->vma
+ splt->output_offset
+ root_plt->offset);
st_type = STT_FUNC;
- branch_type = ST_BRANCH_TO_ARM;
+
+ /* Thumb branch/call to PLT: it can become a branch to ARM
+ or to Thumb. We must perform the same checks and
+ corrections as in elf32_arm_final_link_relocate. */
+ if ((r_type == R_ARM_THM_CALL)
+ || (r_type == R_ARM_THM_JUMP24))
+ {
+ if (globals->use_blx
+ && r_type == R_ARM_THM_CALL
+ && !thumb_only)
+ {
+ /* If the Thumb BLX instruction is available, convert
+ the BL to a BLX instruction to call the ARM-mode
+ PLT entry. */
+ branch_type = ST_BRANCH_TO_ARM;
+ }
+ else
+ {
+ if (!thumb_only)
+ /* Target the Thumb stub before the ARM PLT entry. */
+ destination -= PLT_THUMB_STUB_SIZE;
+ branch_type = ST_BRANCH_TO_THUMB;
+ }
+ }
+ else
+ {
+ branch_type = ST_BRANCH_TO_ARM;
+ }
}
}
/* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
@@ -3923,6 +3949,15 @@ arm_type_of_stub (struct bfd_link_info *info,
|| (r_type == R_ARM_THM_JUMP19))
&& !use_plt))
{
+ /* If we need to insert a Thumb-Thumb long branch stub to a
+ PLT, use one that branches directly to the ARM PLT
+ stub. If we pretended we'd use the pre-PLT Thumb->ARM
+ stub, undo this now. */
+ if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only) {
+ branch_type = ST_BRANCH_TO_ARM;
+ branch_offset += PLT_THUMB_STUB_SIZE;
+ }
+
if (branch_type == ST_BRANCH_TO_THUMB)
{
/* Thumb to thumb. */
diff --git a/bfd/elf32-avr.c b/bfd/elf32-avr.c
index a0a5c69..eea76a4 100644
--- a/bfd/elf32-avr.c
+++ b/bfd/elf32-avr.c
@@ -1808,13 +1808,17 @@ elf32_avr_adjust_diff_reloc_value (bfd *abfd,
/* Delete some bytes from a section while changing the size of an instruction.
The parameter "addr" denotes the section-relative offset pointing just
behind the shrinked instruction. "addr+count" point at the first
- byte just behind the original unshrinked instruction. */
+ byte just behind the original unshrinked instruction. If delete_shrinks_insn
+ is FALSE, we are deleting redundant padding bytes from relax_info prop
+ record handling. In that case, addr is section-relative offset of start
+ of padding, and count is the number of padding bytes to delete. */
static bfd_boolean
elf32_avr_relax_delete_bytes (bfd *abfd,
asection *sec,
bfd_vma addr,
- int count)
+ int count,
+ bfd_boolean delete_shrinks_insn)
{
Elf_Internal_Shdr *symtab_hdr;
unsigned int sec_shndx;
@@ -1829,6 +1833,7 @@ elf32_avr_relax_delete_bytes (bfd *abfd,
struct avr_relax_info *relax_info;
struct avr_property_record *prop_record = NULL;
bfd_boolean did_shrink = FALSE;
+ bfd_boolean did_pad = FALSE;
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
@@ -1909,6 +1914,7 @@ elf32_avr_relax_delete_bytes (bfd *abfd,
to remember we didn't delete anything i.e. don't set did_shrink,
so that we don't corrupt reloc offsets or symbol values.*/
memset (contents + toaddr - count, fill, count);
+ did_pad = TRUE;
/* Adjust the TOADDR to avoid moving symbols located at the address
of the property record, which has not moved. */
@@ -1965,7 +1971,9 @@ elf32_avr_relax_delete_bytes (bfd *abfd,
continue;
shrinked_insn_address = (sec->output_section->vma
- + sec->output_offset + addr - count);
+ + sec->output_offset + addr);
+ if (delete_shrinks_insn)
+ shrinked_insn_address -= count;
irel = elf_section_data (isec)->relocs;
/* PR 12161: Read in the relocs for this section if necessary. */
@@ -2002,6 +2010,13 @@ elf32_avr_relax_delete_bytes (bfd *abfd,
a symbol or section associated with it. */
if (sym_sec == sec)
{
+ /* If there is an alignment boundary, we only need to
+ adjust addends that end up below the boundary. */
+ bfd_vma shrink_boundary = (reloc_toaddr
+ + sec->output_section->vma
+ + sec->output_offset);
+ bfd_boolean addend_within_shrink_boundary = FALSE;
+
symval += sym_sec->output_section->vma
+ sym_sec->output_offset;
@@ -2015,8 +2030,17 @@ elf32_avr_relax_delete_bytes (bfd *abfd,
(unsigned int) (symval + irel->r_addend),
(unsigned int) shrinked_insn_address);
+ /* If we padded bytes, then the boundary didn't change,
+ so there's no need to adjust addends pointing at the boundary.
+ If we didn't pad, then we actually shrank the boundary, so
+ addends pointing at the boundary need to be adjusted too. */
+ addend_within_shrink_boundary = did_pad
+ ? ((symval + irel->r_addend) < shrink_boundary)
+ : ((symval + irel->r_addend) <= shrink_boundary);
+
if (symval <= shrinked_insn_address
- && (symval + irel->r_addend) > shrinked_insn_address)
+ && (symval + irel->r_addend) > shrinked_insn_address
+ && addend_within_shrink_boundary)
{
if (elf32_avr_is_diff_reloc (irel))
{
@@ -2648,7 +2672,8 @@ elf32_avr_relax_section (bfd *abfd,
{
/* Delete two bytes of data. */
if (!elf32_avr_relax_delete_bytes (abfd, sec,
- irel->r_offset + 2, 2))
+ irel->r_offset + 2, 2,
+ TRUE))
goto error_return;
/* That will change things, so, we should relax again.
@@ -2972,7 +2997,8 @@ elf32_avr_relax_section (bfd *abfd,
/* Delete two bytes of data. */
if (!elf32_avr_relax_delete_bytes (abfd, sec,
- irel->r_offset + insn_size, 2))
+ irel->r_offset + insn_size, 2,
+ TRUE))
goto error_return;
/* That will change things, so, we should relax
@@ -3040,7 +3066,7 @@ elf32_avr_relax_section (bfd *abfd,
record->offset -= count;
elf32_avr_relax_delete_bytes (abfd, sec,
addr - count,
- count);
+ count, FALSE);
*again = TRUE;
}
}
diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
index 5496d16..d964e17 100644
--- a/bfd/elf32-microblaze.c
+++ b/bfd/elf32-microblaze.c
@@ -3400,13 +3400,13 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd,
{
asection *s;
- s = bfd_get_linker_section (dynobj, name);
+ s = bfd_get_section_by_name (output_bfd, name);
if (s == NULL)
dyn.d_un.d_val = 0;
else
{
if (! size)
- dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
+ dyn.d_un.d_ptr = s->vma;
else
dyn.d_un.d_val = s->size;
}
diff --git a/bfd/elf32-ppc.c b/bfd/elf32-ppc.c
index 95ce1dc..e42ef1c 100644
--- a/bfd/elf32-ppc.c
+++ b/bfd/elf32-ppc.c
@@ -2246,6 +2246,7 @@ _bfd_elf_ppc_set_arch (bfd *abfd)
case PPC_APUINFO_BRLOCK:
if (mach != bfd_mach_ppc_vle)
mach = bfd_mach_ppc_e500;
+ break;
case PPC_APUINFO_VLE:
mach = bfd_mach_ppc_vle;
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
diff --git a/bfd/elf32-sh.c b/bfd/elf32-sh.c
index 52a5fd1..5609b55 100644
--- a/bfd/elf32-sh.c
+++ b/bfd/elf32-sh.c
@@ -5682,6 +5682,7 @@ sh_elf_gc_mark_hook (asection *sec,
return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
}
+#if 0
/* Update the got entry reference counts for the section being removed. */
static bfd_boolean
@@ -5895,6 +5896,7 @@ sh_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info,
return TRUE;
}
+#endif
/* Copy the extra info we tack onto an elf_link_hash_entry. */
@@ -7455,7 +7457,7 @@ sh_elf_encode_eh_address (bfd *abfd,
sh_elf_merge_private_data
#define elf_backend_gc_mark_hook sh_elf_gc_mark_hook
-#define elf_backend_gc_sweep_hook sh_elf_gc_sweep_hook
+//#define elf_backend_gc_sweep_hook sh_elf_gc_sweep_hook
#define elf_backend_check_relocs sh_elf_check_relocs
#define elf_backend_copy_indirect_symbol \
sh_elf_copy_indirect_symbol
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index d7af888..d236732 100644
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -3085,6 +3085,7 @@ get_opd_info (asection * sec)
/* Parameters for the qsort hook. */
static bfd_boolean synthetic_relocatable;
+static asection *synthetic_opd;
/* qsort comparison function for ppc64_elf_get_synthetic_symtab. */
@@ -3101,12 +3102,15 @@ compare_symbols (const void *ap, const void *bp)
return 1;
/* then .opd symbols. */
- if (strcmp (a->section->name, ".opd") == 0
- && strcmp (b->section->name, ".opd") != 0)
- return -1;
- if (strcmp (a->section->name, ".opd") != 0
- && strcmp (b->section->name, ".opd") == 0)
- return 1;
+ if (synthetic_opd != NULL)
+ {
+ if (strcmp (a->section->name, ".opd") == 0
+ && strcmp (b->section->name, ".opd") != 0)
+ return -1;
+ if (strcmp (a->section->name, ".opd") != 0
+ && strcmp (b->section->name, ".opd") == 0)
+ return 1;
+ }
/* then other code symbols. */
if ((a->section->flags & (SEC_CODE | SEC_ALLOC | SEC_THREAD_LOCAL))
@@ -3265,6 +3269,7 @@ ppc64_elf_get_synthetic_symtab (bfd *abfd,
memcpy (syms, static_syms, (symcount + 1) * sizeof (*syms));
synthetic_relocatable = relocatable;
+ synthetic_opd = opd;
qsort (syms, symcount, sizeof (*syms), compare_symbols);
if (!relocatable && symcount > 1)
@@ -3281,7 +3286,11 @@ ppc64_elf_get_synthetic_symtab (bfd *abfd,
}
i = 0;
- if (strcmp (syms[i]->section->name, ".opd") == 0)
+ /* Note that here and in compare_symbols we can't compare opd and
+ sym->section directly. With separate debug info files, the
+ symbols will be extracted from the debug file while abfd passed
+ to this function is the real binary. */
+ if (opd != NULL && strcmp (syms[i]->section->name, ".opd") == 0)
++i;
codesecsym = i;
@@ -3297,9 +3306,10 @@ ppc64_elf_get_synthetic_symtab (bfd *abfd,
break;
secsymend = i;
- for (; i < symcount; ++i)
- if (strcmp (syms[i]->section->name, ".opd") != 0)
- break;
+ if (opd != NULL)
+ for (; i < symcount; ++i)
+ if (strcmp (syms[i]->section->name, ".opd") != 0)
+ break;
opdsymend = i;
for (; i < symcount; ++i)
@@ -5081,7 +5091,7 @@ ppc64_elf_before_check_relocs (bfd *ibfd, struct bfd_link_info *info)
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
{
if (abiversion (ibfd) == 0)
set_abiversion (ibfd, 1);
- else if (abiversion (ibfd) == 2)
+ else if (abiversion (ibfd) >= 2)
{
info->callbacks->einfo (_("%P: %B .opd not allowed in ABI"
" version %d\n"),
@@ -7102,7 +7112,8 @@ ppc64_elf_func_desc_adjust (bfd *obfd ATTRIBUTE_UNUSED,
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
return TRUE;
}
-/* Return true if we have dynamic relocs that apply to read-only sections. */
+/* Return true if we have dynamic relocs against H that apply to
+ read-only sections. */
static bfd_boolean
readonly_dynrelocs (struct elf_link_hash_entry *h)
@@ -7121,6 +7132,27 @@ readonly_dynrelocs (struct elf_link_hash_entry *h)
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
return FALSE;
}
+
+/* Return true if a global entry stub will be created for H. Valid
+ for ELFv2 before plt entries have been allocated. */
+
+static bfd_boolean
+global_entry_stub (struct elf_link_hash_entry *h)
+{
+ struct plt_entry *pent;
+
+ if (!h->pointer_equality_needed
+ || h->def_regular)
+ return FALSE;
+
+ for (pent = h->plt.plist; pent != NULL; pent = pent->next)
+ if (pent->plt.refcount > 0
+ && pent->addend == 0)
+ return TRUE;
+
+ return FALSE;
+}
+
/* Adjust a symbol defined by a dynamic object and referenced by a
regular object. The current definition is in some section of the
dynamic object, but we're not including those sections. We have to
@@ -7160,35 +7192,25 @@ ppc64_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
h->needs_plt = 0;
h->pointer_equality_needed = 0;
}
- else if (abiversion (info->output_bfd) == 2)
+ else if (abiversion (info->output_bfd) >= 2)
{
/* Taking a function's address in a read/write section
doesn't require us to define the function symbol in the
executable on a global entry stub. A dynamic reloc can
- be used instead. */
- if (h->pointer_equality_needed
- && h->type != STT_GNU_IFUNC
+ be used instead. The reason we prefer a few more dynamic
+ relocs is that calling via a global entry stub costs a
+ few more instructions, and pointer_equality_needed causes
+ extra work in ld.so when resolving these symbols. */
+ if (global_entry_stub (h)
&& !readonly_dynrelocs (h))
{
h->pointer_equality_needed = 0;
+ /* After adjust_dynamic_symbol, non_got_ref set in
+ the non-pic case means that dyn_relocs for this
+ symbol should be discarded. */
h->non_got_ref = 0;
}
- /* After adjust_dynamic_symbol, non_got_ref set in the
- non-shared case means that we have allocated space in
- .dynbss for the symbol and thus dyn_relocs for this
- symbol should be discarded.
- If we get here we know we are making a PLT entry for this
- symbol, and in an executable we'd normally resolve
- relocations against this symbol to the PLT entry. Allow
- dynamic relocs if the reference is weak, and the dynamic
- relocs will not cause text relocation. */
- else if (!h->ref_regular_nonweak
- && h->non_got_ref
- && h->type != STT_GNU_IFUNC
- && !readonly_dynrelocs (h))
- h->non_got_ref = 0;
-
/* If making a plt entry, then we don't need copy relocs. */
return TRUE;
}
@@ -7223,29 +7245,20 @@ ppc64_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
return TRUE;
/* Don't generate a copy reloc for symbols defined in the executable. */
- if (!h->def_dynamic || !h->ref_regular || h->def_regular)
- return TRUE;
+ if (!h->def_dynamic || !h->ref_regular || h->def_regular
- /* If -z nocopyreloc was given, don't generate them either. */
- if (info->nocopyreloc)
- {
- h->non_got_ref = 0;
- return TRUE;
- }
+ /* If -z nocopyreloc was given, don't generate them either. */
+ || info->nocopyreloc
- /* If we didn't find any dynamic relocs in read-only sections, then
- we'll be keeping the dynamic relocs and avoiding the copy reloc. */
- if (ELIMINATE_COPY_RELOCS && !readonly_dynrelocs (h))
- {
- h->non_got_ref = 0;
- return TRUE;
- }
+ /* If we didn't find any dynamic relocs in read-only sections, then
+ we'll be keeping the dynamic relocs and avoiding the copy reloc. */
+ || (ELIMINATE_COPY_RELOCS && !readonly_dynrelocs (h))
- /* Protected variables do not work with .dynbss. The copy in
- .dynbss won't be used by the shared library with the protected
- definition for the variable. Text relocations are preferable
- to an incorrect program. */
- if (h->protected_def)
+ /* Protected variables do not work with .dynbss. The copy in
+ .dynbss won't be used by the shared library with the protected
+ definition for the variable. Text relocations are preferable
+ to an incorrect program. */
+ || h->protected_def)
{
h->non_got_ref = 0;
return TRUE;
@@ -9547,7 +9560,6 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
struct ppc_link_hash_table *htab;
asection *s;
struct ppc_link_hash_entry *eh;
- struct elf_dyn_relocs *p;
struct got_entry **pgent, *gent;
if (h->root.type == bfd_link_hash_indirect)
@@ -9627,10 +9639,14 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
allocate_got (h, info, gent);
}
- if (eh->dyn_relocs != NULL
- && (htab->elf.dynamic_sections_created
- || h->type == STT_GNU_IFUNC))
+ if (!htab->elf.dynamic_sections_created
+ && h->type != STT_GNU_IFUNC)
+ eh->dyn_relocs = NULL;
+
+ if (eh->dyn_relocs != NULL)
{
+ struct elf_dyn_relocs *p, **pp;
+
/* In the shared -Bsymbolic case, discard space allocated for
dynamic pc-relative relocs against symbols which turn out to
be defined in regular objects. For the normal shared case,
@@ -9648,8 +9664,6 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
avoid writing weird assembly. */
if (SYMBOL_CALLS_LOCAL (info, h))
{
- struct elf_dyn_relocs **pp;
-
for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
{
p->count -= p->pc_count;
@@ -9681,36 +9695,47 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
}
else if (h->type == STT_GNU_IFUNC)
{
- if (!h->non_got_ref)
+ /* A plt entry is always created when making direct calls to
+ an ifunc, even when building a static executable, but
+ that doesn't cover all cases. We may have only an ifunc
+ initialised function pointer for a given ifunc symbol.
+
+ For ELFv2, dynamic relocations are not required when
+ generating a global entry PLT stub. */
+ if (abiversion (info->output_bfd) >= 2)
+ {
+ if (global_entry_stub (h))
+ eh->dyn_relocs = NULL;
+ }
+
+ /* For ELFv1 we have function descriptors. Descriptors need
+ to be treated like PLT entries and thus have dynamic
+ relocations. One exception is when the function
+ descriptor is copied into .dynbss (which should only
+ happen with ancient versions of gcc). */
+ else if (h->needs_copy)
eh->dyn_relocs = NULL;
}
else if (ELIMINATE_COPY_RELOCS)
{
- /* For the non-shared case, discard space for relocs against
+ /* For the non-pic case, discard space for relocs against
symbols which turn out to need copy relocs or are not
dynamic. */
- if (!h->non_got_ref
- && !h->def_regular)
- {
- /* Make sure this symbol is output as a dynamic symbol.
- Undefined weak syms won't yet be marked as dynamic. */
- if (h->dynindx == -1
- && !h->forced_local)
- {
- if (! bfd_elf_link_record_dynamic_symbol (info, h))
- return FALSE;
- }
-
- /* If that succeeded, we know we'll be keeping all the
- relocs. */
- if (h->dynindx != -1)
- goto keep;
- }
-
- eh->dyn_relocs = NULL;
+ /* First make sure this symbol is output as a dynamic symbol.
+ Undefined weak syms won't yet be marked as dynamic. */
+ if (h->root.type == bfd_link_hash_undefweak
+ && !h->non_got_ref
+ && !h->def_regular
+ && h->dynindx == -1
+ && !h->forced_local
+ && !bfd_elf_link_record_dynamic_symbol (info, h))
+ return FALSE;
- keep: ;
+ if (h->non_got_ref
+ || h->def_regular
+ || h->dynindx == -1)
+ eh->dyn_relocs = NULL;
}
/* Finally, allocate space. */
@@ -9827,6 +9852,7 @@ size_global_entry_stubs (struct elf_link_hash_entry *h, void *inf)
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
need to define the symbol in the executable on a call stub.
This is to avoid text relocations. */
s->size = (s->size + 15) & -16;
+ h->root.type = bfd_link_hash_defined;
h->root.u.def.section = s;
h->root.u.def.value = s->size;
s->size += 16;
@@ -14679,22 +14705,25 @@ ppc64_elf_relocate_section (bfd *output_bfd,
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
if (NO_OPD_RELOCS && is_opd)
break;
- if ((bfd_link_pic (info)
- && (h == NULL
- || ELF_ST_VISIBILITY (h->elf.other) == STV_DEFAULT
- || h->elf.root.type != bfd_link_hash_undefweak)
- && (must_be_dyn_reloc (info, r_type)
- || !SYMBOL_CALLS_LOCAL (info, &h->elf)))
- || (ELIMINATE_COPY_RELOCS
- && !bfd_link_pic (info)
- && h != NULL
- && h->elf.dynindx != -1
- && !h->elf.non_got_ref
- && !h->elf.def_regular)
- || (!bfd_link_pic (info)
- && (h != NULL
- ? h->elf.type == STT_GNU_IFUNC
- : ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC)))
+ if (bfd_link_pic (info)
+ ? ((h == NULL
+ || ELF_ST_VISIBILITY (h->elf.other) == STV_DEFAULT
+ || h->elf.root.type != bfd_link_hash_undefweak)
+ && (must_be_dyn_reloc (info, r_type)
+ || !SYMBOL_CALLS_LOCAL (info, &h->elf)))
+ : (h == NULL
+ ? ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
+ : (h->elf.type == STT_GNU_IFUNC
+ ? (abiversion (output_bfd) >= 2
+ ? !(h->elf.pointer_equality_needed
+ && !h->elf.def_regular
+ && h->elf.root.type == bfd_link_hash_defined
+ && h->elf.root.u.def.section == htab->glink)
+ : !h->elf.needs_copy)
+ : (ELIMINATE_COPY_RELOCS
+ && !(h->elf.non_got_ref
+ || h->elf.def_regular
+ || h->elf.dynindx == -1)))))
{
bfd_boolean skip, relocate;
asection *sreloc;
diff --git a/bfd/version.h b/bfd/version.h
index 9ca8ab8..b032cc5 100644
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
--- a/bfd/version.h
+++ b/bfd/version.h
@@ -1,4 +1,4 @@
-#define BFD_VERSION_DATE 20160803
+#define BFD_VERSION_DATE 20161129
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
#define BFD_VERSION @bfd_version@
#define BFD_VERSION_STRING @bfd_version_package@ @bfd_version_string@
#define REPORT_BUGS_TO @report_bugs_to@
diff --git a/bfd/version.m4 b/bfd/version.m4
index e474848..fdf3606 100644
--- a/bfd/version.m4
+++ b/bfd/version.m4
@@ -1 +1 @@
-m4_define([BFD_VERSION], [2.27])
+m4_define([BFD_VERSION], [2.27.0])
diff --git a/binutils/ChangeLog b/binutils/ChangeLog
index b92bf46..a70bdb7 100644
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -2,6 +2,10 @@
* configure: Regenerate.
+2016-08-03 Tristan Gingold <gingold@adacore.com>
+
+ * configure: Regenerate.
+
2016-07-01 Nick Clifton <nickc@redhat.com>
* Import this patch from the mainline:
diff --git a/binutils/configure b/binutils/configure
index ea013d1..6cbf17c 100755
--- a/binutils/configure
+++ b/binutils/configure
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated by GNU Autoconf 2.64 for binutils 2.27.
+# Generated by GNU Autoconf 2.64 for binutils 2.27.0.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@ MAKEFLAGS=
# Identity of this package.
PACKAGE_NAME='binutils'
PACKAGE_TARNAME='binutils'
-PACKAGE_VERSION='2.27'
-PACKAGE_STRING='binutils 2.27'
+PACKAGE_VERSION='2.27.0'
+PACKAGE_STRING='binutils 2.27.0'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -1337,7 +1337,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
-\`configure' configures binutils 2.27 to adapt to many kinds of systems.
+\`configure' configures binutils 2.27.0 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1408,7 +1408,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
- short | recursive ) echo "Configuration of binutils 2.27:";;
+ short | recursive ) echo "Configuration of binutils 2.27.0:";;
esac
cat <<\_ACEOF
@@ -1529,7 +1529,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
-binutils configure 2.27
+binutils configure 2.27.0
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -2171,7 +2171,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
-It was created by binutils $as_me 2.27, which was
+It was created by binutils $as_me 2.27.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -3980,7 +3980,7 @@ fi
# Define the identity of the package.
PACKAGE='binutils'
- VERSION='2.27'
+ VERSION='2.27.0'
cat >>confdefs.h <<_ACEOF
@@ -15179,7 +15179,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
-This file was extended by binutils $as_me 2.27, which was
+This file was extended by binutils $as_me 2.27.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -15243,7 +15243,7 @@ Report bugs to the package provider."
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
-binutils config.status 2.27
+binutils config.status 2.27.0
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 5553b6c..50fcf52 100644
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,31 @@
+2016-09-16 Peter Bergner <bergner@vnet.ibm.com>
+
+ Apply from master.
+ 2016-09-14 Peter Bergner <bergner@vnet.ibm.com>
+
+ * testsuite/gas/ppc/power9.d <slbiag, cpabort> New tests.
+ <addex., brd, brh, brw, lwzmx, nandxor, rldixor, setbool,
+ xor3, cp_abort, copy_first, paste, paste_last, sync>: Remove tests.
+ <copy, paste.>: Update tests.
+ * testsuite/gas/ppc/power9.s: Likewise.
+
+2016-08-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ Backport from mainline
+ 2016-08-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * config/tc-arm.c (v7m_psrs): Remove msp_s, MSP_S, psp_s and PSP_S
+ special registers.
+ * testsuite/gas/arm/archv8m-cmse-msr.s: Remove test for above special
+ registers.
+ * testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
+ * testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
+ * testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
+
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
+2016-08-03 Tristan Gingold <gingold@adacore.com>
+
+ * configure: Regenerate.
+
2016-08-03 Tristan Gingold <gingold@adacore.com>
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
* configure: Regenerate.
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 73d0531..4fa0bfc 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -18788,8 +18788,8 @@ static const struct asm_psr v7m_psrs[] =
{"ipsr", 5 }, {"IPSR", 5 },
{"epsr", 6 }, {"EPSR", 6 },
{"iepsr", 7 }, {"IEPSR", 7 },
- {"msp", 8 }, {"MSP", 8 }, {"msp_s", 8 }, {"MSP_S", 8 },
- {"psp", 9 }, {"PSP", 9 }, {"psp_s", 9 }, {"PSP_S", 9 },
+ {"msp", 8 }, {"MSP", 8 },
+ {"psp", 9 }, {"PSP", 9 },
{"primask", 16}, {"PRIMASK", 16},
{"basepri", 17}, {"BASEPRI", 17},
{"basepri_max", 18}, {"BASEPRI_MAX", 18},
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
diff --git a/gas/configure b/gas/configure
index 7b48a58..f7753b8 100755
--- a/gas/configure
+++ b/gas/configure
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated by GNU Autoconf 2.64 for gas 2.27.
+# Generated by GNU Autoconf 2.64 for gas 2.27.0.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@ MAKEFLAGS=
# Identity of this package.
PACKAGE_NAME='gas'
PACKAGE_TARNAME='gas'
-PACKAGE_VERSION='2.27'
-PACKAGE_STRING='gas 2.27'
+PACKAGE_VERSION='2.27.0'
+PACKAGE_STRING='gas 2.27.0'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -1328,7 +1328,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
-\`configure' configures gas 2.27 to adapt to many kinds of systems.
+\`configure' configures gas 2.27.0 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1399,7 +1399,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
- short | recursive ) echo "Configuration of gas 2.27:";;
+ short | recursive ) echo "Configuration of gas 2.27.0:";;
esac
cat <<\_ACEOF
@@ -1521,7 +1521,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
-gas configure 2.27
+gas configure 2.27.0
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -1931,7 +1931,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
-It was created by gas $as_me 2.27, which was
+It was created by gas $as_me 2.27.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -3740,7 +3740,7 @@ fi
# Define the identity of the package.
PACKAGE='gas'
- VERSION='2.27'
+ VERSION='2.27.0'
cat >>confdefs.h <<_ACEOF
@@ -15137,7 +15137,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
-This file was extended by gas $as_me 2.27, which was
+This file was extended by gas $as_me 2.27.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -15201,7 +15201,7 @@ Report bugs to the package provider."
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
-gas config.status 2.27
+gas config.status 2.27.0
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
diff --git a/gas/testsuite/gas/arm/archv8m-cmse-msr-base.d b/gas/testsuite/gas/arm/archv8m-cmse-msr-base.d
index 4bbb82d..0c46a44 100644
--- a/gas/testsuite/gas/arm/archv8m-cmse-msr-base.d
+++ b/gas/testsuite/gas/arm/archv8m-cmse-msr-base.d
@@ -7,26 +7,18 @@
Disassembly of section .text:
0+.* <[^>]*> f380 8808 msr MSP, r0
-0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8888 msr MSP_NS, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
-0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8889 msr PSP_NS, r0
0+.* <[^>]*> f380 8808 msr MSP, r0
-0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8888 msr MSP_NS, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
-0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8889 msr PSP_NS, r0
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
-0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
-0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
-0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
-0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
diff --git a/gas/testsuite/gas/arm/archv8m-cmse-msr-main.d b/gas/testsuite/gas/arm/archv8m-cmse-msr-main.d
index 30a3361..42d3ba9 100644
--- a/gas/testsuite/gas/arm/archv8m-cmse-msr-main.d
+++ b/gas/testsuite/gas/arm/archv8m-cmse-msr-main.d
@@ -7,26 +7,18 @@
Disassembly of section .text:
0+.* <[^>]*> f380 8808 msr MSP, r0
-0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8888 msr MSP_NS, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
-0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8889 msr PSP_NS, r0
0+.* <[^>]*> f380 8808 msr MSP, r0
-0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8888 msr MSP_NS, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
-0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8889 msr PSP_NS, r0
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
-0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
-0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
-0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
-0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
diff --git a/gas/testsuite/gas/arm/archv8m-cmse-msr.s b/gas/testsuite/gas/arm/archv8m-cmse-msr.s
index 897be1a..66a3b64 100644
--- a/gas/testsuite/gas/arm/archv8m-cmse-msr.s
+++ b/gas/testsuite/gas/arm/archv8m-cmse-msr.s
@@ -1,25 +1,17 @@
T:
msr MSP, r0
-msr MSP_S, r0
msr MSP_NS, r0
msr PSP, r0
-msr PSP_S, r0
msr PSP_NS, r0
msr msp, r0
-msr msp_s, r0
msr msp_ns, r0
msr psp, r0
-msr psp_s, r0
msr psp_ns, r0
mrs r0, MSP
-mrs r0, MSP_S
mrs r0, MSP_NS
mrs r0, PSP
-mrs r0, PSP_S
mrs r0, PSP_NS
mrs r0, msp
-mrs r0, msp_s
mrs r0, msp_ns
mrs r0, psp
-mrs r0, psp_s
mrs r0, psp_ns
diff --git a/gas/testsuite/gas/arm/archv8m-main-dsp-4.d b/gas/testsuite/gas/arm/archv8m-main-dsp-4.d
index 248f75e..7ebc9c1 100644
--- a/gas/testsuite/gas/arm/archv8m-main-dsp-4.d
+++ b/gas/testsuite/gas/arm/archv8m-main-dsp-4.d
@@ -7,26 +7,18 @@
Disassembly of section .text:
0+.* <[^>]*> f380 8808 msr MSP, r0
-0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8888 msr MSP_NS, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
-0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8889 msr PSP_NS, r0
0+.* <[^>]*> f380 8808 msr MSP, r0
-0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8888 msr MSP_NS, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
-0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8889 msr PSP_NS, r0
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
-0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
-0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
-0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
-0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
diff --git a/gas/testsuite/gas/ppc/power9.d b/gas/testsuite/gas/ppc/power9.d
index 1135d26..31e4530 100644
--- a/gas/testsuite/gas/ppc/power9.d
+++ b/gas/testsuite/gas/ppc/power9.d
@@ -280,14 +280,6 @@ Disassembly of section \.text:
.*: (7f a8 49 80|80 49 a8 7f) cmprb cr7,1,r8,r9
.*: (7d e0 01 00|00 01 e0 7d) setb r15,cr0
.*: (7d fc 01 00|00 01 fc 7d) setb r15,cr7
-.*: (7e 00 01 01|01 01 00 7e) setbool r16,lt
-.*: (7e 01 01 01|01 01 01 7e) setbool r16,gt
-.*: (7e 02 01 01|01 01 02 7e) setbool r16,eq
-.*: (7e 03 01 01|01 01 03 7e) setbool r16,so
-.*: (7e 1c 01 01|01 01 1c 7e) setbool r16,4\*cr7\+lt
-.*: (7e 1d 01 01|01 01 1d 7e) setbool r16,4\*cr7\+gt
-.*: (7e 1e 01 01|01 01 1e 7e) setbool r16,4\*cr7\+eq
-.*: (7e 1f 01 01|01 01 1f 7e) setbool r16,4\*cr7\+so
.*: (7f 40 52 1a|1a 52 40 7f) lxvl vs26,0,r10
.*: (7f 14 52 1b|1b 52 14 7f) lxvl vs56,r20,r10
.*: (7f 60 5b 1a|1a 5b 60 7f) stxvl vs27,0,r11
@@ -331,6 +323,7 @@ Disassembly of section \.text:
.*: (4c e0 80 04|04 80 e0 4c) addpcis r7,-32768
.*: (4c e0 80 04|04 80 e0 4c) addpcis r7,-32768
.*: (7c 00 02 a4|a4 02 00 7c) slbsync
+.*: (7d 40 06 a4|a4 06 40 7d) slbiag r10
.*: (7d 40 5b a4|a4 5b 40 7d) slbieg r10,r11
.*: (7c 60 27 26|26 27 60 7c) slbmfee r3,r4
.*: (7c 60 27 26|26 27 60 7c) slbmfee r3,r4
@@ -344,14 +337,9 @@ Disassembly of section \.text:
.*: (7c 00 1a 24|24 1a 00 7c) tlbiel r3
.*: (7c 00 1a 24|24 1a 00 7c) tlbiel r3
.*: (7c 8f 1a 24|24 1a 8f 7c) tlbiel r3,r4,3,1,1
-.*: (7c 0c 6e 0c|0c 6e 0c 7c) copy r12,r13
-.*: (7c 2c 6e 0c|0c 6e 2c 7c) copy_first r12,r13
-.*: (7c 2c 6e 0c|0c 6e 2c 7c) copy_first r12,r13
-.*: (7c 0a 5f 0c|0c 5f 0a 7c) paste r10,r11
-.*: (7c 0a 5f 0c|0c 5f 0a 7c) paste r10,r11
-.*: (7c 2a 5f 0d|0d 5f 2a 7c) paste_last r10,r11
-.*: (7c 2a 5f 0d|0d 5f 2a 7c) paste_last r10,r11
-.*: (7c 00 06 8c|8c 06 00 7c) cp_abort
+.*: (7c 2c 6e 0c|0c 6e 2c 7c) copy r12,r13
+.*: (7c 2a 5f 0d|0d 5f 2a 7c) paste\. r10,r11
+.*: (7c 00 06 8c|8c 06 00 7c) cpabort
.*: (7c 00 04 ac|ac 04 00 7c) hwsync
.*: (7c 00 04 ac|ac 04 00 7c) hwsync
.*: (7c 00 04 ac|ac 04 00 7c) hwsync
@@ -359,8 +347,6 @@ Disassembly of section \.text:
.*: (7c 20 04 ac|ac 04 20 7c) lwsync
.*: (7c 40 04 ac|ac 04 40 7c) ptesync
.*: (7c 40 04 ac|ac 04 40 7c) ptesync
-.*: (7c 07 04 ac|ac 04 07 7c) sync 0,7
-.*: (7c 28 04 ac|ac 04 28 7c) sync 1,8
.*: (7e 80 04 cc|cc 04 80 7e) ldat r20,0,0
.*: (7e 8a e4 cc|cc e4 8a 7e) ldat r20,r10,28
.*: (7e a0 04 8c|8c 04 a0 7e) lwat r21,0,0
@@ -373,8 +359,6 @@ Disassembly of section \.text:
.*: (7c 00 f6 e4|e4 f6 00 7c) rmieg r30
.*: (7d 40 7a 6a|6a 7a 40 7d) ldmx r10,0,r15
.*: (7d 43 7a 6a|6a 7a 43 7d) ldmx r10,r3,r15
-.*: (7d 60 83 6a|6a 83 60 7d) lwzmx r11,0,r16
-.*: (7d 63 83 6a|6a 83 63 7d) lwzmx r11,r3,r16
.*: (4c 00 02 e4|e4 02 00 4c) stop
.*: (7c 00 00 3c|3c 00 00 7c) wait
.*: (7c 00 00 3c|3c 00 00 7c) wait
@@ -397,9 +381,6 @@ Disassembly of section \.text:
.*: (7d 6c 69 54|54 69 6c 7d) addex r11,r12,r13,0
.*: (7d 6c 6b 54|54 6b 6c 7d) addex r11,r12,r13,1
.*: (7d 6c 6d 54|54 6d 6c 7d) addex r11,r12,r13,2
-.*: (7e b6 b9 55|55 b9 b6 7e) addex\. r21,r22,r23,0
-.*: (7e b6 bb 55|55 bb b6 7e) addex\. r21,r22,r23,1
-.*: (7e b6 bd 55|55 bd b6 7e) addex\. r21,r22,r23,2
.*: (ff 20 04 8e|8e 04 20 ff) mffs f25
.*: (ff 20 04 8f|8f 04 20 ff) mffs\. f25
.*: (ff 41 04 8e|8e 04 41 ff) mffsce f26
@@ -410,12 +391,4 @@ Disassembly of section \.text:
.*: (ff d7 04 8e|8e 04 d7 ff) mffscrni f30,0
.*: (ff d7 1c 8e|8e 1c d7 ff) mffscrni f30,3
.*: (ff f8 04 8e|8e 04 f8 ff) mffsl f31
-.*: (7e 8a 01 76|76 01 8a 7e) brd r10,r20
-.*: (7e ab 01 b6|b6 01 ab 7e) brh r11,r21
-.*: (7e cc 01 36|36 01 cc 7e) brw r12,r22
-.*: (11 6a 63 77|77 63 6a 11) nandxor r10,r11,r12,r13
-.*: (12 b4 b5 f6|f6 b5 b4 12) xor3 r20,r21,r22,r23
-.*: (11 6a 60 34|34 60 6a 11) rldixor r10,r11,0,r12
-.*: (11 6a 66 f4|f4 66 6a 11) rldixor r10,r11,27,r12
-.*: (11 6a 67 f5|f5 67 6a 11) rldixor r10,r11,63,r12
#pass
diff --git a/gas/testsuite/gas/ppc/power9.s b/gas/testsuite/gas/ppc/power9.s
index 21edb9c..469435d 100644
--- a/gas/testsuite/gas/ppc/power9.s
+++ b/gas/testsuite/gas/ppc/power9.s
@@ -271,14 +271,6 @@ power9:
cmprb 7,1,8,9
setb 15,0
setb 15,7
- setbool 16,0
- setbool 16,1
- setbool 16,2
- setbool 16,3
- setbool 16,28
- setbool 16,29
- setbool 16,30
- setbool 16,31
lxvl 26,0,10
lxvl 56,20,10
stxvl 27,0,11
@@ -322,6 +314,7 @@ power9:
addpcis 7,-0x8000
subpcis 7,0x8000
slbsync
+ slbiag 10
slbieg 10,11
slbmfee 3,4
slbmfee 3,4,0
@@ -335,23 +328,16 @@ power9:
tlbiel 3
tlbiel 3,0,0,0,0
tlbiel 3,4,3,1,1
- copy 12,13,0
- copy_first 12,13
- copy 12,13,1
- paste 10,11,0
- paste 10,11
- paste. 10,11,1
- paste_last 10,11
- cp_abort
+ copy 12,13
+ paste. 10,11
+ cpabort
hwsync
sync
- sync 0,0x0
+ sync 0
lwsync
- sync 1,0x0
+ sync 1
ptesync
- sync 2,0x0
- sync 0,0x7
- sync 1,0x8
+ sync 2
ldat 20,0,0x0
ldat 20,10,0x1c
lwat 21,0,0x0
@@ -364,8 +350,6 @@ power9:
rmieg 30
ldmx 10,0,15
ldmx 10,3,15
- lwzmx 11,0,16
- lwzmx 11,3,16
stop
wait
wait 0
@@ -388,9 +372,6 @@ power9:
addex 11,12,13,0
addex 11,12,13,1
addex 11,12,13,2
- addex. 21,22,23,0
- addex. 21,22,23,1
- addex. 21,22,23,2
mffs 25
mffs. 25
mffsce 26
@@ -401,11 +382,3 @@ power9:
mffscrni 30,0
mffscrni 30,3
mffsl 31
- brd 10,20
- brh 11,21
- brw 12,22
- nandxor 10,11,12,13
- xor3 20,21,22,23
- rldixor 10,11,0,12
- rldixor 10,11,27,12
- rldixor 10,11,63,12
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
diff --git a/gold/ChangeLog b/gold/ChangeLog
index 239df36..f5005ef 100644
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
--- a/gold/ChangeLog
+++ b/gold/ChangeLog
@@ -1,6 +1,72 @@
+2016-09-26 Cary Coutant <ccoutant@gmail.com>
+
+ PR gold/20238
+ * symtab.cc (Symbol_table::define_default_version): Check that
+ unversioned symbol is defined.
+
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
+2016-08-23 Roland McGrath <roland@hack.frob.com>
+
+ * options.h (General_options): Grok -z stack-size.
+ * output.h (Output_segment::set_size): New method.
+ * layout.cc (Layout::create_executable_stack_info): Renamed to ...
+ (Layout::create_stack_segment): ... this. Always create the
+ segment if -z stack-size was used.
+ (Layout::set_segment_offsets): Don't call ->set_offset on the
+ PT_GNU_STACK segment.
+
+2016-08-17 Cary Coutant <ccoutant@gmail.com>
+
+ * i386.cc (Target_i386): Reset skip_call_tls_get_addr_ after printing
+ error message.
+ * testsuite/Makefile.am (pr20216a): Add missing dependencies.
+ (pr20308a): Add -Bgcctestdir/ to compile rules.
+ * testsuite/Makefile.in: Regenerate.
+
+2016-08-12 Roland McGrath <roland@hack.frob.com>
+
+ PR gold/20462
+ * script-sections.cc (Script_sections::release_segments):
+ Reset this->segments_created_.
+
+2016-08-12 Roland McGrath <roland@hack.frob.com>
+
+ * yyscript.y (HIDDEN): New %token.
+ (assignment): Handle HIDDEN(string = expr) syntax.
+ * script.cc (script_keyword_parsecodes): Add HIDDEN.
+
+2016-08-10 Cary Coutant <ccoutant@gmail.com>
+
+ PR gold/20216
+ * x86_64.cc (Target_x86_64::Relocate::relocate): Add check for
+ R_X86_64_GOTPCREL. Reset skip_call_tls_get_addr_ after printing
+ error message.
+ * testsuite/Makefile.am (pr20216_gd.o): Add -Bgcctestdir/.
+ (pr20216_ld.o): Likewise.
+ * testsuite/Makefile.in: Regenerate.
+
+2016-08-10 James Clarke <jrtc27@jrtc27.com>
+
+ PR gold/20443
+ * symtab.cc (Symbol_table::add_from_relobj): Handle NULL symbols,
+ which will be present for STT_SPARC_REGISTER.
+ (Symbol_table::add_from_pluginobj): Likewise.
+ (Symbol_table::add_from_dynobj): Likewise.
+ (Symbol_table::add_from_incrobj): Removed dead code.
+
+2016-08-10 James Clarke <jrtc27@jrtc27.com>
+
+ PR gold/20442
+ * sparc.cc (Target_sparc::Relocate::relocate): R_SPARC_GOTDATA_OP_LOX10
+ should fall back on R_SPARC_GOT10, not R_SPARC_GOT13.
+
+2016-08-10 James Clarke <jrtc27@jrtc27.com>
+
+ PR gold/20441
+ * sparc.cc (Target_sparc::Scan::check_non_pic): Allow R_SPARC_32 on
+ sparc64.
+
2016-06-29 Cary Coutant <ccoutant@gmail.com>
-gold/
PR gold/20310
* testsuite/dynamic_list.sh: Remove check for _ZdlPv.
diff --git a/gold/i386.cc b/gold/i386.cc
index 28864cd..ec515c4 100644
--- a/gold/i386.cc
+++ b/gold/i386.cc
@@ -2794,8 +2794,11 @@ Target_i386::Relocate::relocate(const Relocate_info<32, false>* relinfo,
&& r_type != elfcpp::R_386_PC32)
|| gsym == NULL
|| strcmp(gsym->name(), "___tls_get_addr") != 0)
- gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
- _("missing expected TLS relocation"));
+ {
+ gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
+ _("missing expected TLS relocation"));
+ this->skip_call_tls_get_addr_ = false;
+ }
else
{
this->skip_call_tls_get_addr_ = false;
diff --git a/gold/layout.cc b/gold/layout.cc
index 376051d..d14f27b 100644
--- a/gold/layout.cc
+++ b/gold/layout.cc
@@ -2135,7 +2135,7 @@ void
Layout::create_notes()
{
this->create_gold_note();
- this->create_executable_stack_info();
+ this->create_stack_segment();
this->create_build_id();
}
@@ -2785,7 +2785,7 @@ Layout::finalize(const Input_objects* input_objects, Symbol_table* symtab,
if (load_seg != NULL)
ehdr_start->set_output_segment(load_seg, Symbol::SEGMENT_START);
else
- ehdr_start->set_undefined();
+ ehdr_start->set_undefined();
}
// Set the file offsets of all the non-data sections we've seen so
@@ -2985,25 +2985,29 @@ Layout::create_gold_note()
// executable. Otherwise, if at least one input file a
// .note.GNU-stack section, and some input file has no .note.GNU-stack
// section, we use the target default for whether the stack should be
-// executable. Otherwise, we don't generate a stack note. When
-// generating a object file, we create a .note.GNU-stack section with
-// the appropriate marking. When generating an executable or shared
-// library, we create a PT_GNU_STACK segment.
+// executable. If -z stack-size was used to set a p_memsz value for
+// PT_GNU_STACK, we generate the segment regardless. Otherwise, we
+// don't generate a stack note. When generating a object file, we
+// create a .note.GNU-stack section with the appropriate marking.
+// When generating an executable or shared library, we create a
+// PT_GNU_STACK segment.
void
-Layout::create_executable_stack_info()
+Layout::create_stack_segment()
{
bool is_stack_executable;
if (parameters->options().is_execstack_set())
{
is_stack_executable = parameters->options().is_stack_executable();
if (!is_stack_executable
- && this->input_requires_executable_stack_
- && parameters->options().warn_execstack())
+ && this->input_requires_executable_stack_
+ && parameters->options().warn_execstack())
gold_warning(_("one or more inputs require executable stack, "
- "but -z noexecstack was given"));
+ "but -z noexecstack was given"));
}
- else if (!this->input_with_gnu_stack_note_)
+ else if (!this->input_with_gnu_stack_note_
+ && (!parameters->options().user_set_stack_size()
+ || parameters->options().relocatable()))
return;
else
{
@@ -3032,7 +3036,12 @@ Layout::create_executable_stack_info()
int flags = elfcpp::PF_R | elfcpp::PF_W;
if (is_stack_executable)
flags |= elfcpp::PF_X;
- this->make_output_segment(elfcpp::PT_GNU_STACK, flags);
+ Output_segment* seg =
+ this->make_output_segment(elfcpp::PT_GNU_STACK, flags);
+ seg->set_size(parameters->options().stack_size());
+ // BFD lets targets override this default alignment, but the only
+ // targets that do so are ones that Gold does not support so far.
+ seg->set_minimum_p_align(16);
}
}
@@ -3718,7 +3727,9 @@ Layout::set_segment_offsets(const Target* target, Output_segment* load_seg,
p != this->segment_list_.end();
++p)
{
- if ((*p)->type() != elfcpp::PT_LOAD)
+ // PT_GNU_STACK was set up correctly when it was created.
+ if ((*p)->type() != elfcpp::PT_LOAD
+ && (*p)->type() != elfcpp::PT_GNU_STACK)
(*p)->set_offset((*p)->type() == elfcpp::PT_GNU_RELRO
? increase_relro
: 0);
diff --git a/gold/layout.h b/gold/layout.h
index c369fef..b2d699f 100644
--- a/gold/layout.h
+++ b/gold/layout.h
@@ -1037,9 +1037,9 @@ class Layout
void
create_gold_note();
- // Record whether the stack must be executable.
+ // Record whether the stack must be executable, and a user-supplied size.
void
- create_executable_stack_info();
+ create_stack_segment();
// Create a build ID note if needed.
void
diff --git a/gold/options.h b/gold/options.h
index 23c9658..4c5b2ae 100644
--- a/gold/options.h
+++ b/gold/options.h
@@ -647,7 +647,7 @@ class General_options
DEFINE_bool(apply_dynamic_relocs, options::TWO_DASHES, '\0', true,
N_("Apply link-time values for dynamic relocations (default)"),
N_("(aarch64 only) Do not apply link-time values "
- "for dynamic relocations"));
+ "for dynamic relocations"));
DEFINE_bool(as_needed, options::TWO_DASHES, '\0', false,
N_("Only set DT_NEEDED for shared libraries if used"),
@@ -1293,7 +1293,7 @@ class General_options
N_("Mark output as requiring executable stack"), NULL);
DEFINE_bool(global, options::DASH_Z, '\0', false,
N_("Make symbols in DSO available for subsequently loaded "
- "objects"), NULL);
+ "objects"), NULL);
DEFINE_bool(initfirst, options::DASH_Z, '\0', false,
N_("Mark DSO to be initialized first at runtime"),
NULL);
@@ -1339,6 +1339,8 @@ class General_options
DEFINE_bool(relro, options::DASH_Z, '\0', DEFAULT_LD_Z_RELRO,
N_("Where possible mark variables read-only after relocation"),
N_("Don't mark variables read-only after relocation"));
+ DEFINE_uint64(stack_size, options::DASH_Z, '\0', 0,
+ N_("Set PT_GNU_STACK segment p_memsz to SIZE"), N_("SIZE"));
DEFINE_bool(text, options::DASH_Z, '\0', false,
N_("Do not permit relocations in read-only segments"),
N_("Permit relocations in read-only segments (default)"));
diff --git a/gold/output.h b/gold/output.h
index d8a8aaa..6b9186b 100644
--- a/gold/output.h
+++ b/gold/output.h
@@ -2499,7 +2499,7 @@ class Output_data_got : public Output_data_got_base
// entry.
bool
add_local(Relobj* object, unsigned int sym_index, unsigned int got_type,
- uint64_t addend);
+ uint64_t addend);
// Like add_local, but use the PLT offset of the local symbol if it
// has one.
@@ -2643,7 +2643,7 @@ class Output_data_got : public Output_data_got_base
// Create a local symbol entry plus addend.
Got_entry(Relobj* object, unsigned int local_sym_index,
- bool use_plt_or_tls_offset, uint64_t addend)
+ bool use_plt_or_tls_offset, uint64_t addend)
: local_sym_index_(local_sym_index),
use_plt_or_tls_offset_(use_plt_or_tls_offset), addend_(addend)
{
@@ -4796,6 +4796,13 @@ class Output_segment
this->min_p_align_ = align;
}
+ // Set the memory size of this segment.
+ void
+ set_size(uint64_t size)
+ {
+ this->memsz_ = size;
+ }
+
// Set the offset of this segment based on the section. This should
// only be called for a non-PT_LOAD segment.
void
diff --git a/gold/script-sections.cc b/gold/script-sections.cc
index 96c68de..bf25391 100644
--- a/gold/script-sections.cc
+++ b/gold/script-sections.cc
@@ -244,10 +244,10 @@ Memory_region::attributes_compatible(elfcpp::Elf_Xword flags,
attrs &= ~ (attrs & - attrs);
}
while (attrs != 0);
-
+
return match;
}
-
+
// Print a memory region.
void
@@ -1503,7 +1503,7 @@ class Input_section_info
private:
// Input section, can be a relaxed section.
Output_section::Input_section input_section_;
- // Name of the section.
+ // Name of the section.
std::string section_name_;
// Section size.
uint64_t size_;
@@ -1545,7 +1545,7 @@ Input_section_sorter::get_init_priority(const char* name)
// GCC uses the following section names for the init_priority
// attribute with numerical values 101 and 65535 inclusive. A
// lower value means a higher priority.
- //
+ //
// 1: .init_array.NNNN/.fini_array.NNNN: Where NNNN is the
// decimal numerical value of the init_priority attribute.
// The order of execution in .init_array is forward and
@@ -1666,7 +1666,7 @@ Output_section_element_input::set_section_addresses(
while (p != input_sections->end())
{
Relobj* relobj = p->relobj();
- unsigned int shndx = p->shndx();
+ unsigned int shndx = p->shndx();
Input_section_info isi(*p);
// Calling section_name and section_addralign is not very
@@ -1758,7 +1758,7 @@ Output_section_element_input::set_section_addresses(
uint64_t this_subalign = sis.addralign();
if (!sis.is_input_section())
- sis.output_section_data()->finalize_data_size();
+ sis.output_section_data()->finalize_data_size();
uint64_t data_size = sis.data_size();
if (this_subalign < subalign)
{
@@ -2029,7 +2029,7 @@ class Output_section_definition : public Sections_element
void
set_section_vma(Expression* address)
{ this->address_ = address; }
-
+
void
set_section_lma(Expression* address)
{ this->load_address_ = address; }
@@ -2037,7 +2037,7 @@ class Output_section_definition : public Sections_element
const std::string&
get_section_name() const
{ return this->name_; }
-
+
private:
static const char*
script_section_type_name(Script_section_type);
@@ -2402,9 +2402,9 @@ Output_section_definition::set_section_addresses(Symbol_table* symtab,
uint64_t old_load_address = *load_address;
// If input section sorting is requested via --section-ordering-file or
- // linker plugins, then do it here. This is important because we want
+ // linker plugins, then do it here. This is important because we want
// any sorting specified in the linker scripts, which will be done after
- // this, to take precedence. The final order of input sections is then
+ // this, to take precedence. The final order of input sections is then
// guaranteed to be according to the linker script specification.
if (this->output_section_ != NULL
&& this->output_section_->input_section_order_specified())
@@ -2495,7 +2495,7 @@ Output_section_definition::set_section_addresses(Symbol_table* symtab,
// The LMA address was explicitly set to the given region.
laddr = lma_region->get_current_address()->eval(symtab, layout,
false);
- else
+ else
{
// We are not going to use the discovered lma_region, so
// make sure that we do not update it in the code below.
@@ -2987,9 +2987,9 @@ Orphan_output_section::set_section_addresses(Symbol_table*, Layout*,
address = align_address(address, this->os_->addralign());
// If input section sorting is requested via --section-ordering-file or
- // linker plugins, then do it here. This is important because we want
+ // linker plugins, then do it here. This is important because we want
// any sorting specified in the linker scripts, which will be done after
- // this, to take precedence. The final order of input sections is then
+ // this, to take precedence. The final order of input sections is then
// guaranteed to be according to the linker script specification.
if (this->os_ != NULL
&& this->os_->input_section_order_specified())
@@ -3023,7 +3023,7 @@ Orphan_output_section::set_section_addresses(Symbol_table*, Layout*,
{
uint64_t addralign = p->addralign();
if (!p->is_input_section())
- p->output_section_data()->finalize_data_size();
+ p->output_section_data()->finalize_data_size();
uint64_t size = p->data_size();
address = align_address(address, addralign);
this->os_->add_script_input_section(*p);
@@ -3605,7 +3605,7 @@ Output_segment*
Script_sections::set_section_addresses(Symbol_table* symtab, Layout* layout)
{
gold_assert(this->saw_sections_clause_);
-
+
// Implement ONLY_IF_RO/ONLY_IF_RW constraints. These are a pain
// for our representation.
for (Sections_elements::iterator p = this->sections_elements_->begin();
@@ -3674,7 +3674,7 @@ Script_sections::set_section_addresses(Symbol_table* symtab, Layout* layout)
Output_section* os = (*p)->get_output_section();
// Handle -Ttext, -Tdata and -Tbss options. We do this by looking for
- // the special sections by names and doing dot assignments.
+ // the special sections by names and doing dot assignments.
if (use_tsection_options
&& os != NULL
&& (os->flags() & elfcpp::SHF_ALLOC) != 0)
@@ -3703,7 +3703,7 @@ Script_sections::set_section_addresses(Symbol_table* symtab, Layout* layout)
(*p)->set_section_addresses(symtab, layout, &dot_value, &dot_alignment,
&load_address);
- }
+ }
if (this->phdrs_elements_ != NULL)
{
@@ -3890,7 +3890,7 @@ Script_sections::create_segments(Layout* layout, uint64_t dot_alignment)
layout->get_allocated_sections(&sections);
// Sort the sections by address.
- std::stable_sort(sections.begin(), sections.end(),
+ std::stable_sort(sections.begin(), sections.end(),
Sort_output_sections(this->sections_elements_));
this->create_note_and_tls_segments(layout, &sections);
@@ -4217,7 +4217,7 @@ Script_sections::attach_sections_using_phdrs_clause(Layout* layout)
// Output sections in the script which do not list segments are
// attached to the same set of segments as the immediately preceding
// output section.
-
+
String_list* phdr_names = NULL;
bool load_segments_only = false;
for (Sections_elements::const_iterator p = this->sections_elements_->begin();
@@ -4262,7 +4262,7 @@ Script_sections::attach_sections_using_phdrs_clause(Layout* layout)
// filtering.
if (old_phdr_names != phdr_names)
load_segments_only = false;
-
+
// If this is an orphan section--one that was not explicitly
// mentioned in the linker script--then it should not inherit
// any segment type other than PT_LOAD. Otherwise, e.g., the
@@ -4459,6 +4459,7 @@ Script_sections::release_segments()
++p)
(*p)->release_segment();
}
+ this->segments_created_ = false;
}
// Print the SECTIONS clause to F for debugging.
diff --git a/gold/script.cc b/gold/script.cc
index d6aa7b2..bb8b437 100644
--- a/gold/script.cc
+++ b/gold/script.cc
@@ -1755,6 +1755,7 @@ script_keyword_parsecodes[] =
{ "FLOAT", FLOAT },
{ "FORCE_COMMON_ALLOCATION", FORCE_COMMON_ALLOCATION },
{ "GROUP", GROUP },
+ { "HIDDEN", HIDDEN },
{ "HLL", HLL },
{ "INCLUDE", INCLUDE },
{ "INFO", INFO },
@@ -2696,7 +2697,7 @@ script_add_library(void* closurev, const char* name, size_t length)
if (name_string[0] != 'l')
gold_error(_("library name must be prefixed with -l"));
-
+
Input_file_argument file(name_string.c_str() + 1,
Input_file_argument::INPUT_FILE_TYPE_LIBRARY,
"", false,
diff --git a/gold/sparc.cc b/gold/sparc.cc
index dc4612d..8e66b77 100644
--- a/gold/sparc.cc
+++ b/gold/sparc.cc
@@ -2150,6 +2150,7 @@ Target_sparc<size, big_endian>::Scan::check_non_pic(Relobj* object, unsigned int
case elfcpp::R_SPARC_RELATIVE:
case elfcpp::R_SPARC_IRELATIVE:
case elfcpp::R_SPARC_COPY:
+ case elfcpp::R_SPARC_32:
case elfcpp::R_SPARC_64:
case elfcpp::R_SPARC_GLOB_DAT:
case elfcpp::R_SPARC_JMP_SLOT:
@@ -3468,6 +3469,13 @@ Target_sparc<size, big_endian>::Relocate::relocate(
Reloc::lo10(view, object, psymval, addend);
break;
+ case elfcpp::R_SPARC_GOTDATA_OP_LOX10:
+ if (gdop_valid)
+ {
+ Reloc::gdop_lox10(view, got_offset);
+ break;
+ }
+ /* Fall through. */
case elfcpp::R_SPARC_GOT10:
Reloc::lo10(view, got_offset, addend);
break;
@@ -3486,13 +3494,6 @@ Target_sparc<size, big_endian>::Relocate::relocate(
}
break;
- case elfcpp::R_SPARC_GOTDATA_OP_LOX10:
- if (gdop_valid)
- {
- Reloc::gdop_lox10(view, got_offset);
- break;
- }
- /* Fall through. */
case elfcpp::R_SPARC_GOT13:
Reloc::rela32_13(view, got_offset, addend);
break;
diff --git a/gold/symtab.cc b/gold/symtab.cc
index 5ce5c31..c872f47 100644
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
--- a/gold/symtab.cc
+++ b/gold/symtab.cc
@@ -882,6 +882,7 @@ Symbol_table::define_default_version(Sized_symbol<size>* sym,
;
else if (pdef->second->is_from_dynobj()
&& sym->is_from_dynobj()
+ && pdef->second->is_defined()
&& pdef->second->object() != sym->object())
;
else
@@ -1325,6 +1326,9 @@ Symbol_table::add_from_relobj(
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
res = this->add_from_object(relobj, name, name_key, ver, ver_key,
is_default_version, *psym, st_shndx,
is_ordinary, orig_st_shndx);
+
+ if (res == NULL)
+ continue;
if (is_forced_local)
this->force_local(res);
@@ -1406,6 +1410,9 @@ Symbol_table::add_from_pluginobj(
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
is_default_version, *sym, st_shndx,
is_ordinary, st_shndx);
+ if (res == NULL)
+ return NULL;
+
if (is_forced_local)
this->force_local(res);
@@ -1602,6 +1609,9 @@ Symbol_table::add_from_dynobj(
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
}
}
+ if (res == NULL)
+ continue;
+
// Note that it is possible that RES was overridden by an
// earlier object, in which case it can't be aliased here.
if (st_shndx != elfcpp::SHN_UNDEF
@@ -1640,7 +1650,6 @@ Symbol_table::add_from_incrobj(
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
Stringpool::Key ver_key = 0;
bool is_default_version = false;
- bool is_forced_local = false;
Stringpool::Key name_key;
name = this->namepool_.add(name, true, &name_key);
@@ -1650,9 +1659,6 @@ Symbol_table::add_from_incrobj(
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
is_default_version, *sym, st_shndx,
is_ordinary, st_shndx);
- if (is_forced_local)
- this->force_local(res);
-
return res;
}
diff --git a/gold/testsuite/Makefile.am b/gold/testsuite/Makefile.am
index c8d3093..3b97673 100644
--- a/gold/testsuite/Makefile.am
+++ b/gold/testsuite/Makefile.am
@@ -1192,11 +1192,11 @@ pr20216a.so: pr20216_gd.o pr20216_ld.o gcctestdir/ld
pr20216b.so: pr20216_def.o gcctestdir/ld
$(LINK) -Bgcctestdir/ -shared pr20216_def.o
-pr20216_gd.o: pr20216_gd.S
- $(COMPILE) -c -o $@ $<
+pr20216_gd.o: pr20216_gd.S gcctestdir/as
+ $(COMPILE) -Bgcctestdir/ -c -o $@ $<
-pr20216_ld.o: pr20216_ld.S
- $(COMPILE) -c -o $@ $<
+pr20216_ld.o: pr20216_ld.S gcctestdir/as
+ $(COMPILE) -Bgcctestdir/ -c -o $@ $<
endif DEFAULT_TARGET_X86_64_OR_X32
@@ -1297,11 +1297,11 @@ pr20308a.so: pr20308_gd.o pr20308_ld.o gcctestdir/ld
pr20308b.so: pr20308_def.o gcctestdir/ld
$(LINK) -Bgcctestdir/ -shared pr20308_def.o
-pr20308_gd.o: pr20308_gd.S
- $(COMPILE) -c -o $@ $<
+pr20308_gd.o: pr20308_gd.S gcctestdir/as
+ $(COMPILE) -Bgcctestdir/ -c -o $@ $<
-pr20308_ld.o: pr20308_ld.S
- $(COMPILE) -c -o $@ $<
+pr20308_ld.o: pr20308_ld.S gcctestdir/as
+ $(COMPILE) -Bgcctestdir/ -c -o $@ $<
endif DEFAULT_TARGET_I386
diff --git a/gold/testsuite/Makefile.in b/gold/testsuite/Makefile.in
index 4185287..bb6f44d 100644
--- a/gold/testsuite/Makefile.in
+++ b/gold/testsuite/Makefile.in
@@ -6145,11 +6145,11 @@ uninstall-am:
@DEFAULT_TARGET_X86_64_OR_X32_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@pr20216b.so: pr20216_def.o gcctestdir/ld
@DEFAULT_TARGET_X86_64_OR_X32_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ -shared pr20216_def.o
-@DEFAULT_TARGET_X86_64_OR_X32_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@pr20216_gd.o: pr20216_gd.S
-@DEFAULT_TARGET_X86_64_OR_X32_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -c -o $@ $<
+@DEFAULT_TARGET_X86_64_OR_X32_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@pr20216_gd.o: pr20216_gd.S gcctestdir/as
+@DEFAULT_TARGET_X86_64_OR_X32_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -Bgcctestdir/ -c -o $@ $<
-@DEFAULT_TARGET_X86_64_OR_X32_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@pr20216_ld.o: pr20216_ld.S
-@DEFAULT_TARGET_X86_64_OR_X32_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -c -o $@ $<
+@DEFAULT_TARGET_X86_64_OR_X32_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@pr20216_ld.o: pr20216_ld.S gcctestdir/as
+@DEFAULT_TARGET_X86_64_OR_X32_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -Bgcctestdir/ -c -o $@ $<
@DEFAULT_TARGET_I386_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@i386_mov_to_lea1.o: i386_mov_to_lea1.s
@DEFAULT_TARGET_I386_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(TEST_AS) --32 -o $@ $<
@@ -6200,11 +6200,11 @@ uninstall-am:
@DEFAULT_TARGET_I386_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@pr20308b.so: pr20308_def.o gcctestdir/ld
@DEFAULT_TARGET_I386_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(LINK) -Bgcctestdir/ -shared pr20308_def.o
-@DEFAULT_TARGET_I386_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@pr20308_gd.o: pr20308_gd.S
-@DEFAULT_TARGET_I386_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -c -o $@ $<
+@DEFAULT_TARGET_I386_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@pr20308_gd.o: pr20308_gd.S gcctestdir/as
+@DEFAULT_TARGET_I386_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -Bgcctestdir/ -c -o $@ $<
-@DEFAULT_TARGET_I386_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@pr20308_ld.o: pr20308_ld.S
-@DEFAULT_TARGET_I386_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -c -o $@ $<
+@DEFAULT_TARGET_I386_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@pr20308_ld.o: pr20308_ld.S gcctestdir/as
+@DEFAULT_TARGET_I386_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@ $(COMPILE) -Bgcctestdir/ -c -o $@ $<
@GCC_TRUE@@NATIVE_LINKER_TRUE@many_sections_define.h:
@GCC_TRUE@@NATIVE_LINKER_TRUE@ (for i in `seq 1 70000`; do \
@GCC_TRUE@@NATIVE_LINKER_TRUE@ echo "int var_$$i __attribute__((section(\"section_$$i\"))) = $$i;"; \
diff --git a/gold/x86_64.cc b/gold/x86_64.cc
index 6aa489a..8d494ea 100644
--- a/gold/x86_64.cc
+++ b/gold/x86_64.cc
@@ -3505,6 +3505,7 @@ Target_x86_64<size>::Relocate::relocate(
if (this->skip_call_tls_get_addr_)
{
if ((r_type != elfcpp::R_X86_64_PLT32
+ && r_type != elfcpp::R_X86_64_GOTPCREL
&& r_type != elfcpp::R_X86_64_GOTPCRELX
&& r_type != elfcpp::R_X86_64_PLT32_BND
&& r_type != elfcpp::R_X86_64_PC32_BND
@@ -3514,6 +3515,7 @@ Target_x86_64<size>::Relocate::relocate(
{
gold_error_at_location(relinfo, relnum, rela.get_r_offset(),
_("missing expected TLS relocation"));
+ this->skip_call_tls_get_addr_ = false;
}
else
{
diff --git a/gold/yyscript.y b/gold/yyscript.y
index 7e6bd27..38831d5 100644
--- a/gold/yyscript.y
+++ b/gold/yyscript.y
@@ -137,6 +137,7 @@
%token FORCE_COMMON_ALLOCATION
%token GLOBAL /* global */
%token GROUP
+%token HIDDEN
%token HLL
%token INCLUDE
%token INHIBIT_COMMON_ALLOCATION
@@ -864,6 +865,8 @@ assignment:
Expression_ptr e = script_exp_binary_bitwise_or(s, $3);
script_set_symbol(closure, $1.value, $1.length, e, 0, 0);
}
+ | HIDDEN '(' string '=' parse_exp ')'
+ { script_set_symbol(closure, $3.value, $3.length, $5, 0, 1); }
| PROVIDE '(' string '=' parse_exp ')'
{ script_set_symbol(closure, $3.value, $3.length, $5, 1, 0); }
| PROVIDE_HIDDEN '(' string '=' parse_exp ')'
diff --git a/gprof/ChangeLog b/gprof/ChangeLog
index a02b3ce..19c596a 100644
--- a/gprof/ChangeLog
+++ b/gprof/ChangeLog
@@ -2,6 +2,10 @@
* configure: Regenerate.
+2016-08-03 Tristan Gingold <gingold@adacore.com>
+
+ * configure: Regenerate.
+
2016-07-01 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
diff --git a/gprof/configure b/gprof/configure
index 4c17248..bf3ecaa 100755
--- a/gprof/configure
+++ b/gprof/configure
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated by GNU Autoconf 2.64 for gprof 2.27.
+# Generated by GNU Autoconf 2.64 for gprof 2.27.0.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@ MAKEFLAGS=
# Identity of this package.
PACKAGE_NAME='gprof'
PACKAGE_TARNAME='gprof'
-PACKAGE_VERSION='2.27'
-PACKAGE_STRING='gprof 2.27'
+PACKAGE_VERSION='2.27.0'
+PACKAGE_STRING='gprof 2.27.0'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -1301,7 +1301,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
-\`configure' configures gprof 2.27 to adapt to many kinds of systems.
+\`configure' configures gprof 2.27.0 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1372,7 +1372,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
- short | recursive ) echo "Configuration of gprof 2.27:";;
+ short | recursive ) echo "Configuration of gprof 2.27.0:";;
esac
cat <<\_ACEOF
@@ -1478,7 +1478,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
-gprof configure 2.27
+gprof configure 2.27.0
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -1843,7 +1843,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
-It was created by gprof $as_me 2.27, which was
+It was created by gprof $as_me 2.27.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -3652,7 +3652,7 @@ fi
# Define the identity of the package.
PACKAGE='gprof'
- VERSION='2.27'
+ VERSION='2.27.0'
cat >>confdefs.h <<_ACEOF
@@ -12743,7 +12743,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
-This file was extended by gprof $as_me 2.27, which was
+This file was extended by gprof $as_me 2.27.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -12807,7 +12807,7 @@ Report bugs to the package provider."
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
-gprof config.status 2.27
+gprof config.status 2.27.0
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
diff --git a/ld/ChangeLog b/ld/ChangeLog
index a57cd66..6cc35c7 100644
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,56 @@
+2016-10-14 Alan Modra <amodra@gmail.com>
+
+ * scripttempl/DWARF.sc: Add .debug_addr.
+
+2016-10-10 Christophe Lyon <christophe.lyon@linaro.org>
+
+ Backport from mainline
+ 2016-09-28 Christophe Lyon <christophe.lyon@linaro.org>
+
+ PR ld/20608
+ * testsuite/ld-arm/arm-elf.exp: Handle new testcase.
+ * testsuite/ld-arm/farcall-mixed-app2.d: New file.
+ * testsuite/ld-arm/farcall-mixed-app2.r: Likewise.
+ * testsuite/ld-arm/farcall-mixed-app2.s: Likewise.
+ * testsuite/ld-arm/farcall-mixed-app2.sym: Likewise.
+
+2016-09-06 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
+
+ Backport from mainline
+ 2016-09-02 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
+
+ PR ld/20545
+ * testsuite/ld-avr/avr-prop-7.d: New test.
+ * testsuite/ld-avr/avr-prop-7.s: New test.
+ * testsuite/ld-avr/avr-prop-8.d: New test.
+ * testsuite/ld-avr/avr-prop-8.s: New test.
+
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
+2016-08-09 Roland McGrath <roland@hack.frob.com>
+
+ * emulparams/armelf.sh (GENERATE_PIE_SCRIPT): Set to yes.
+
+2016-08-02 Nick Clifton <nickc@redhat.com>
+
+ PR ld/17739
+ * emulparams/shelf.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Define with
+ valye 'yes'.
+ * emulparams/shelf32.sh: Likewise.
+ * emulparams/shelf32.sh: Likewise.
+ * emulparams/shelf_nto.sh: Likewise.
+ * emulparams/shelf_nto.sh: Likewise.
+ * emulparams/shelf_vxworks.sh: Likewise.
+ * emulparams/shelf_vxworks.sh: Likewise.
+ * emulparams/shlelf32_linux.sh: Likewise.
+ * emulparams/shlelf32_linux.sh: Likewise.
+ * emulparams/shlelf_linux.sh: Likewise.
+ * emulparams/shlelf_linux.sh: Likewise.
+ * emulparams/shlelf_nto.sh: Likewise.
+ * emulparams/shlelf_nto.sh: Likewise.
+
+2016-08-03 Tristan Gingold <gingold@adacore.com>
+
+ * configure: Regenerate.
+
2016-08-03 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
diff --git a/ld/configure b/ld/configure
index c6f871d..f9be51a 100755
--- a/ld/configure
+++ b/ld/configure
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated by GNU Autoconf 2.64 for ld 2.27.
+# Generated by GNU Autoconf 2.64 for ld 2.27.0.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@ MAKEFLAGS=
# Identity of this package.
PACKAGE_NAME='ld'
PACKAGE_TARNAME='ld'
-PACKAGE_VERSION='2.27'
-PACKAGE_STRING='ld 2.27'
+PACKAGE_VERSION='2.27.0'
+PACKAGE_STRING='ld 2.27.0'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -1353,7 +1353,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
-\`configure' configures ld 2.27 to adapt to many kinds of systems.
+\`configure' configures ld 2.27.0 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1424,7 +1424,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
- short | recursive ) echo "Configuration of ld 2.27:";;
+ short | recursive ) echo "Configuration of ld 2.27.0:";;
esac
cat <<\_ACEOF
@@ -1549,7 +1549,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
-ld configure 2.27
+ld configure 2.27.0
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -2258,7 +2258,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
-It was created by ld $as_me 2.27, which was
+It was created by ld $as_me 2.27.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -4068,7 +4068,7 @@ fi
# Define the identity of the package.
PACKAGE='ld'
- VERSION='2.27'
+ VERSION='2.27.0'
cat >>confdefs.h <<_ACEOF
@@ -17769,7 +17769,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
-This file was extended by ld $as_me 2.27, which was
+This file was extended by ld $as_me 2.27.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -17833,7 +17833,7 @@ Report bugs to the package provider."
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
-ld config.status 2.27
+ld config.status 2.27.0
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
diff --git a/ld/emulparams/armelf.sh b/ld/emulparams/armelf.sh
index 672b208..f581c68 100644
--- a/ld/emulparams/armelf.sh
+++ b/ld/emulparams/armelf.sh
@@ -21,6 +21,7 @@ OTHER_READONLY_SECTIONS="
DATA_START_SYMBOLS='__data_start = . ;';
GENERATE_SHLIB_SCRIPT=yes
+GENERATE_PIE_SCRIPT=yes
ARCH=arm
MACHINE=
diff --git a/ld/emulparams/shelf.sh b/ld/emulparams/shelf.sh
index 83680a6..d3f4752 100644
--- a/ld/emulparams/shelf.sh
+++ b/ld/emulparams/shelf.sh
@@ -11,6 +11,9 @@ MACHINE=
TEMPLATE_NAME=elf32
GENERATE_SHLIB_SCRIPT=yes
EMBEDDED=yes
+# PR 17739. Delay checking relocs until after all files have
+# been opened and linker garbage collection has taken place.
+CHECK_RELOCS_AFTER_OPEN_INPUT=yes
# These are for compatibility with the COFF toolchain.
ENTRY=start
diff --git a/ld/emulparams/shelf32.sh b/ld/emulparams/shelf32.sh
index 966bd30..bf362c5 100644
--- a/ld/emulparams/shelf32.sh
+++ b/ld/emulparams/shelf32.sh
@@ -11,6 +11,9 @@ ALIGNMENT=8
TEMPLATE_NAME=elf32
GENERATE_SHLIB_SCRIPT=yes
EMBEDDED=yes
+# PR 17739. Delay checking relocs until after all files have
+# been opened and linker garbage collection has taken place.
+CHECK_RELOCS_AFTER_OPEN_INPUT=yes
DATA_START_SYMBOLS='PROVIDE (___data = .);'
diff --git a/ld/emulparams/shelf_nto.sh b/ld/emulparams/shelf_nto.sh
index c4d71aa..46efd87 100644
--- a/ld/emulparams/shelf_nto.sh
+++ b/ld/emulparams/shelf_nto.sh
@@ -9,3 +9,6 @@ TEMPLATE_NAME=elf32
GENERATE_SHLIB_SCRIPT=yes
TEXT_START_SYMBOLS='_btext = .;'
ENTRY=_start
+# PR 17739. Delay checking relocs until after all files have
+# been opened and linker garbage collection has taken place.
+CHECK_RELOCS_AFTER_OPEN_INPUT=yes
diff --git a/ld/emulparams/shelf_vxworks.sh b/ld/emulparams/shelf_vxworks.sh
index 77619cb..759ffac 100644
--- a/ld/emulparams/shelf_vxworks.sh
+++ b/ld/emulparams/shelf_vxworks.sh
@@ -14,6 +14,10 @@ TEMPLATE_NAME=elf32
GENERATE_SHLIB_SCRIPT=yes
ENTRY=__start
SYMPREFIX=_
+# PR 17739. Delay checking relocs until after all files have
+# been opened and linker garbage collection has taken place.
+CHECK_RELOCS_AFTER_OPEN_INPUT=yes
+
GOT=".got ${RELOCATING-0} : {
PROVIDE(__GLOBAL_OFFSET_TABLE_ = .);
*(.got.plt) *(.got) }"
diff --git a/ld/emulparams/shlelf32_linux.sh b/ld/emulparams/shlelf32_linux.sh
index 81aea39..0327e57 100644
--- a/ld/emulparams/shlelf32_linux.sh
+++ b/ld/emulparams/shlelf32_linux.sh
@@ -13,7 +13,9 @@ ALIGNMENT=8
TEMPLATE_NAME=elf32
GENERATE_SHLIB_SCRIPT=yes
GENERATE_PIE_SCRIPT=yes
-
+# PR 17739. Delay checking relocs until after all files have
+# been opened and linker garbage collection has taken place.
+CHECK_RELOCS_AFTER_OPEN_INPUT=yes
DATA_START_SYMBOLS='PROVIDE (___data = .);'
diff --git a/ld/emulparams/shlelf_linux.sh b/ld/emulparams/shlelf_linux.sh
index c14aae2..4e2a581 100644
--- a/ld/emulparams/shlelf_linux.sh
+++ b/ld/emulparams/shlelf_linux.sh
@@ -12,6 +12,9 @@ MACHINE=
TEMPLATE_NAME=elf32
GENERATE_SHLIB_SCRIPT=yes
GENERATE_PIE_SCRIPT=yes
+# PR 17739. Delay checking relocs until after all files have
+# been opened and linker garbage collection has taken place.
+CHECK_RELOCS_AFTER_OPEN_INPUT=yes
DATA_START_SYMBOLS='PROVIDE (__data_start = .);';
diff --git a/ld/emulparams/shlelf_nto.sh b/ld/emulparams/shlelf_nto.sh
index 16f6508..f8ffc13 100644
--- a/ld/emulparams/shlelf_nto.sh
+++ b/ld/emulparams/shlelf_nto.sh
@@ -9,3 +9,6 @@ TEMPLATE_NAME=elf32
GENERATE_SHLIB_SCRIPT=yes
TEXT_START_SYMBOLS='_btext = .;'
ENTRY=_start
+# PR 17739. Delay checking relocs until after all files have
+# been opened and linker garbage collection has taken place.
+CHECK_RELOCS_AFTER_OPEN_INPUT=yes
diff --git a/ld/scripttempl/DWARF.sc b/ld/scripttempl/DWARF.sc
index a8bcb97..cbb2999 100644
--- a/ld/scripttempl/DWARF.sc
+++ b/ld/scripttempl/DWARF.sc
@@ -42,4 +42,5 @@ cat <<EOF
/* DWARF Extension. */
.debug_macro 0 : { *(.debug_macro) }
+ .debug_addr 0 : { *(.debug_addr) }
EOF
diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp
index a5d4c87..50a2f26 100644
--- a/ld/testsuite/ld-arm/arm-elf.exp
+++ b/ld/testsuite/ld-arm/arm-elf.exp
@@ -556,6 +556,12 @@ set armeabitests_nonacl {
{readelf -Ds farcall-mixed-app.sym}}
"farcall-mixed-app-v5"}
+ {"Mixed ARM/Thumb2 dynamic application with farcalls" "tmpdir/mixed-lib.so -T arm-dyn.ld --section-start .mid_thumb=0x10081c0 --section-start .far_arm=0x2100000 --section-start .far_thumb=0x2200000" "" ""
+ {farcall-mixed-app2.s}
+ {{objdump -fdw farcall-mixed-app2.d} {objdump -Rw farcall-mixed-app2.r}
+ {readelf -Ds farcall-mixed-app2.sym}}
+ "farcall-mixed-app2"}
+
{"Mixed ARM/Thumb shared library with long branches (v4t)" "-shared -T arm-lib.ld" "" "-march=armv4t"
{farcall-mixed-lib1.s farcall-mixed-lib2.s}
{{objdump -fdw farcall-mixed-lib-v4t.d}}
diff --git a/ld/testsuite/ld-arm/farcall-mixed-app2.d b/ld/testsuite/ld-arm/farcall-mixed-app2.d
new file mode 100644
index 0000000..54338d0
--- /dev/null
+++ b/ld/testsuite/ld-arm/farcall-mixed-app2.d
@@ -0,0 +1,99 @@
+
+tmpdir/farcall-mixed-app2: file format elf32-(little|big)arm
+architecture: arm.*, flags 0x00000112:
+EXEC_P, HAS_SYMS, D_PAGED
+start address 0x.*
+
+Disassembly of section .plt:
+
+.* <lib_func2@plt-0x14>:
+ .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
+ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func2@plt-0x4>
+ .*: e08fe00e add lr, pc, lr
+ .*: e5bef008 ldr pc, \[lr, #8\]!
+ .*: .*
+.* <lib_func2@plt>:
+ .*: 4778 bx pc
+ .*: 46c0 nop ; \(mov r8, r8\)
+ .*: e28fc6.* add ip, pc, #.*
+ .*: e28cca.* add ip, ip, #.* ; 0x.*
+ .*: e5bcf.* ldr pc, \[ip, #.*\]!.*
+.* <lib_func1@plt>:
+ .*: e28fc6.* add ip, pc, #.*
+ .*: e28cca.* add ip, ip, #.* ; 0x.*
+ .*: e5bcf.* ldr pc, \[ip, #.*\]!.*
+
+Disassembly of section .text:
+
+.* <_start>:
+ .*: e1a0c00d mov ip, sp
+ .*: e92dd800 push {fp, ip, lr, pc}
+ .*: eb000008 bl .* <__app_func_veneer>
+ .*: ebfffff6 bl .* <lib_func1@plt>
+ .*: ebfffff2 bl .* <lib_func2@plt\+0x4>
+ .*: e89d6800 ldm sp, {fp, sp, lr}
+ .*: e12fff1e bx lr
+ .*: e1a00000 nop ; \(mov r0, r0\)
+
+.* <app_tfunc_close>:
+ .*: b500 push {lr}
+ .*: f7ff efde blx 81e0 <lib_func2@plt\+0x4>
+ .*: bd00 pop {pc}
+ .*: 4770 bx lr
+ .*: 46c0 nop ; \(mov r8, r8\)
+#...
+
+.* <__app_func_veneer>:
+ .*: e51ff004 ldr pc, \[pc, #-4\] ; 8234 <__app_func_veneer\+0x4>
+ .*: 02100000 .word 0x02100000
+
+Disassembly of section .mid_thumb:
+
+.* <mid_tfunc>:
+#...
+ .*: f400 9000 b.w .* <lib_func2@plt>
+ .*: f000 b800 b.w .* <__lib_func2_from_thumb>
+
+.* <__lib_func2_from_thumb>:
+ .*: 4778 bx pc
+ .*: 46c0 nop ; \(mov r8, r8\)
+ .*: e51ff004 ldr pc, \[pc, #-4\] ; 10081e8 <__lib_func2_from_thumb\+0x8>
+ .*: 000081e0 .word 0x000081e0
+ .*: 00000000 .word 0x00000000
+
+Disassembly of section .far_arm:
+
+.* <app_func>:
+ .*: e1a0c00d mov ip, sp
+ .*: e92dd800 push {fp, ip, lr, pc}
+ .*: eb000006 bl .* <__lib_func1_veneer>
+ .*: eb000007 bl .* <__lib_func2_veneer>
+ .*: e89d6800 ldm sp, {fp, sp, lr}
+ .*: e12fff1e bx lr
+ .*: e1a00000 nop ; \(mov r0, r0\)
+ .*: e1a00000 nop ; \(mov r0, r0\)
+
+.* <app_func2>:
+ .*: e12fff1e bx lr
+#...
+
+.* <__lib_func1_veneer>:
+ .*: e51ff004 ldr pc, \[pc, #-4\] ; .* <__lib_func1_veneer\+0x4>
+ .*: 000081ec .word 0x000081ec
+.* <__lib_func2_veneer>:
+ .*: e51ff004 ldr pc, \[pc, #-4\] ; .* <__lib_func2_veneer\+0x4>
+ .*: 000081e0 .word 0x000081e0
+
+Disassembly of section .far_thumb:
+
+.* <app_tfunc>:
+ .*: b500 push {lr}
+ .*: f000 e806 blx .* <__lib_func2_from_thumb>
+ .*: bd00 pop {pc}
+ .*: 4770 bx lr
+ .*: 46c0 nop ; \(mov r8, r8\)
+#...
+
+.* <__lib_func2_from_thumb>:
+ .*: e51ff004 ldr pc, \[pc, #-4\] ; 2200014 <__lib_func2_from_thumb\+0x4>
+ .*: 000081e0 .word 0x000081e0
diff --git a/ld/testsuite/ld-arm/farcall-mixed-app2.r b/ld/testsuite/ld-arm/farcall-mixed-app2.r
new file mode 100644
index 0000000..910a361
--- /dev/null
+++ b/ld/testsuite/ld-arm/farcall-mixed-app2.r
@@ -0,0 +1,10 @@
+
+tmpdir/farcall-mixed-app.*: file format elf32-(little|big)arm
+
+DYNAMIC RELOCATION RECORDS
+OFFSET TYPE VALUE
+.* R_ARM_COPY data_obj
+.* R_ARM_JUMP_SLOT lib_func2
+.* R_ARM_JUMP_SLOT lib_func1
+
+
diff --git a/ld/testsuite/ld-arm/farcall-mixed-app2.s b/ld/testsuite/ld-arm/farcall-mixed-app2.s
new file mode 100644
index 0000000..ee315e9
--- /dev/null
+++ b/ld/testsuite/ld-arm/farcall-mixed-app2.s
@@ -0,0 +1,76 @@
+ .text
+ .p2align 4
+ .globl _start
+_start:
+ mov ip, sp
+ stmdb sp!, {r11, ip, lr, pc}
+ bl app_func
+ bl lib_func1
+ bl lib_func2
+ ldmia sp, {r11, sp, lr}
+ bx lr
+
+ .p2align 4
+ .globl app_tfunc_close
+ .type app_tfunc_close,%function
+ .thumb_func
+ .code 16
+app_tfunc_close:
+ push {lr}
+ bl lib_func2
+ pop {pc}
+ bx lr
+
+@ We will place the section .mid_thumb at 0xFFFEF8.
+@ Just far enough for XXXX
+ .section .mid_thumb, "xa"
+
+ .p2align 4
+ .globl mid_tfunc
+ .type mid_tfunc,%function
+ .thumb_func
+ .code 16
+mid_tfunc:
+ .syntax unified
+ .space 24
+ b.w lib_func2
+ b.w lib_func2
+
+@ We will place the section .far_arm at 0x2100000.
+ .section .far_arm, "xa"
+
+ .arm
+ .p2align 4
+ .globl app_func
+ .type app_func,%function
+app_func:
+ mov ip, sp
+ stmdb sp!, {r11, ip, lr, pc}
+ bl lib_func1
+ bl lib_func2
+ ldmia sp, {r11, sp, lr}
+ bx lr
+
+ .arm
+ .p2align 4
+ .globl app_func2
+ .type app_func2,%function
+app_func2:
+ bx lr
+
+@ We will place the section .far_thumb at 0x2200000.
+ .section .far_thumb, "xa"
+
+ .p2align 4
+ .globl app_tfunc
+ .type app_tfunc,%function
+ .thumb_func
+ .code 16
+app_tfunc:
+ push {lr}
+ bl lib_func2
+ pop {pc}
+ bx lr
+
+ .data
+ .long data_obj
diff --git a/ld/testsuite/ld-arm/farcall-mixed-app2.sym b/ld/testsuite/ld-arm/farcall-mixed-app2.sym
new file mode 100644
index 0000000..1d3bd1d
--- /dev/null
+++ b/ld/testsuite/ld-arm/farcall-mixed-app2.sym
@@ -0,0 +1,15 @@
+
+Symbol table for image:
+ +Num +Buc: +Value +Size +Type +Bind +Vis +Ndx +Name
+ +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +11 _edata
+ +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 __bss_start__
+ +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 _end
+ +.. +..: ........ +4 +OBJECT +GLOBAL +DEFAULT +12 data_obj
+ +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 __bss_end__
+ +.. +..: 0*[^0]*.* +0 +FUNC +GLOBAL +DEFAULT +UND lib_func1
+ +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +11 __data_start
+ +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 __end__
+ +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 __bss_start
+ +.. +..: .......0 +0 +FUNC +GLOBAL +DEFAULT +15 app_func2
+ +.. +..: 0*[^0]*.* +0 +FUNC +GLOBAL +DEFAULT +UND lib_func2
+ +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 _bss_end__
diff --git a/ld/testsuite/ld-avr/avr-prop-7.d b/ld/testsuite/ld-avr/avr-prop-7.d
new file mode 100644
index 0000000..9f2cea9
--- /dev/null
+++ b/ld/testsuite/ld-avr/avr-prop-7.d
@@ -0,0 +1,15 @@
+#name: AVR .avr.prop, AVR_7_PCREL after align
+#as: -mavrxmega2 -mlink-relax
+#ld: -mavrxmega2 --relax
+#source: avr-prop-7.s
+#objdump: -S
+#target: avr-*-*
+
+#...
+00000000 <__ctors_end>:
+ 0: 04 d0 rcall .+8 ; 0xa <foo>
+ 2: 00 00 nop
+ 4: 00 00 nop
+ 6: 86 e0 ldi r24, 0x06 ; 6
+ 8: f0 f7 brcc .-4 ; 0x6 <__ctors_end\+0x6>
+#...
diff --git a/ld/testsuite/ld-avr/avr-prop-7.s b/ld/testsuite/ld-avr/avr-prop-7.s
new file mode 100644
index 0000000..38276ba
--- /dev/null
+++ b/ld/testsuite/ld-avr/avr-prop-7.s
@@ -0,0 +1,8 @@
+ call foo
+ nop
+ .p2align 1
+ nop
+.L618:
+ ldi r24,lo8(6)
+ brsh .L618
+foo: nop
diff --git a/ld/testsuite/ld-avr/avr-prop-8.d b/ld/testsuite/ld-avr/avr-prop-8.d
new file mode 100644
index 0000000..2905f98
--- /dev/null
+++ b/ld/testsuite/ld-avr/avr-prop-8.d
@@ -0,0 +1,13 @@
+#name: AVR .avr.prop, AVR_7_PCREL just before align
+#as: -mavrxmega2 -mlink-relax
+#ld: -mavrxmega2 --relax
+#source: avr-prop-8.s
+#objdump: -S
+#target: avr-*-*
+
+#...
+00000000 <__ctors_end>:
+ 0: ff cf rjmp .-2 ; 0x0 <__ctors_end>
+ 2: fe df rcall .-4 ; 0x0 <__ctors_end>
+ 4: f8 f7 brcc .-2 ; 0x4 <__ctors_end\+0x4>
+#...
diff --git a/ld/testsuite/ld-avr/avr-prop-8.s b/ld/testsuite/ld-avr/avr-prop-8.s
new file mode 100644
index 0000000..34554f2
--- /dev/null
+++ b/ld/testsuite/ld-avr/avr-prop-8.s
@@ -0,0 +1,7 @@
+foo:
+ jmp foo
+ call foo
+.L1:
+ brsh .L1
+.p2align 1
+ nop
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index c420bdd..43841f5 100644
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,26 @@
+2016-09-16 Peter Bergner <bergner@vnet.ibm.com>
+
+ Apply from master.
+ 2016-09-14 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-opc.c (powerpc_opcodes) <slbiag>: New mnemonic.
+ <addex., brd, brh, brw, lwzmx, nandxor, rldixor, setbool,
+ xor3>: Delete mnemonics.
+ <cp_abort>: Rename mnemonic from ...
+ <cpabort>: ...to this.
+ <setb>: Change to a X form instruction.
+ <sync>: Change to 1 operand form.
+ <copy>: Delete mnemonic.
+ <copy_first>: Rename mnemonic from ...
+ <copy>: ...to this.
+ <paste, paste.>: Delete mnemonics.
+ <paste_last>: Rename mnemonic from ...
+ <paste.>: ...to this.
+
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
+2016-08-03 Tristan Gingold <gingold@adacore.com>
+
+ * configure: Regenerate.
+
2016-08-03 Tristan Gingold <gingold@adacore.com>
- Update to binutils 2.27. * Add a configure option, --enable-64-bit-archive, to force use of a 64-bit format when creating an archive symbol index. * Add --elf-stt-common= option to objcopy for ELF targets to control whether to convert common symbols to the STT_COMMON type. GAS: * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets. * Add --no-pad-sections to stop the assembler from padding the end of output sections up to their alignment boundary. * Support for the ARMv8-M architecture has been added to the ARM port. Support for the ARMv8-M Security and DSP Extensions has also been added to the ARM port. * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and .extCoreRegister pseudo-ops that allow an user to define custom instructions, conditional codes, auxiliary and core registers. * Add a configure option --enable-elf-stt-common to decide whether ELF assembler should generate common symbols with the STT_COMMON type by default. Default to no. * New command line option --elf-stt-common= for ELF targets to control whether to generate common symbols with the STT_COMMON type. * Add ability to set section flags and types via numeric values for ELF based targets. * Add a configure option --enable-x86-relax-relocations to decide whether x86 assembler should generate relax relocations by default. Default to yes, except for x86 Solaris targets older than Solaris 12. * New command line option -mrelax-relocations= for x86 target to control whether to generate relax relocations. * New command line option -mfence-as-lock-add=yes for x86 target to encode lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)". * Add assembly-time relaxation option for ARC cpus. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=215
2016-08-24 13:55:45 +02:00
* configure: Regenerate.
diff --git a/opcodes/configure b/opcodes/configure
index 5a4da06..f615634 100755
--- a/opcodes/configure
+++ b/opcodes/configure
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated by GNU Autoconf 2.64 for opcodes 2.27.
+# Generated by GNU Autoconf 2.64 for opcodes 2.27.0.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@ MAKEFLAGS=
# Identity of this package.
PACKAGE_NAME='opcodes'
PACKAGE_TARNAME='opcodes'
-PACKAGE_VERSION='2.27'
-PACKAGE_STRING='opcodes 2.27'
+PACKAGE_VERSION='2.27.0'
+PACKAGE_STRING='opcodes 2.27.0'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -1321,7 +1321,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
-\`configure' configures opcodes 2.27 to adapt to many kinds of systems.
+\`configure' configures opcodes 2.27.0 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1392,7 +1392,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
- short | recursive ) echo "Configuration of opcodes 2.27:";;
+ short | recursive ) echo "Configuration of opcodes 2.27.0:";;
esac
cat <<\_ACEOF
@@ -1499,7 +1499,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
-opcodes configure 2.27
+opcodes configure 2.27.0
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -1909,7 +1909,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
-It was created by opcodes $as_me 2.27, which was
+It was created by opcodes $as_me 2.27.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -3718,7 +3718,7 @@ fi
# Define the identity of the package.
PACKAGE='opcodes'
- VERSION='2.27'
+ VERSION='2.27.0'
cat >>confdefs.h <<_ACEOF
@@ -13260,7 +13260,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
-This file was extended by opcodes $as_me 2.27, which was
+This file was extended by opcodes $as_me 2.27.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -13324,7 +13324,7 @@ Report bugs to the package provider."
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
-opcodes config.status 2.27
+opcodes config.status 2.27.0
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 8106ab7..7003e0c 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -3161,7 +3161,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"machhwu.", XO (4, 12,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
{"ps_muls1", A (4, 13,0), AFRB_MASK, PPCPS, 0, {FRT, FRA, FRC}},
{"ps_muls1.", A (4, 13,1), AFRB_MASK, PPCPS, 0, {FRT, FRA, FRC}},
-{"rldixor", VXASH(4,26), VXASH_MASK, POWER9, 0, {RA, RS, SH6, RB}},
{"ps_madds0", A (4, 14,0), A_MASK, PPCPS, 0, {FRT, FRA, FRC, FRB}},
{"ps_madds0.", A (4, 14,1), A_MASK, PPCPS, 0, {FRT, FRA, FRC, FRB}},
{"ps_madds1", A (4, 15,0), A_MASK, PPCPS, 0, {FRT, FRA, FRC, FRB}},
@@ -3203,8 +3202,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"ps_msub.", A (4, 28,1), A_MASK, PPCPS, 0, {FRT, FRA, FRC, FRB}},
{"ps_madd", A (4, 29,0), A_MASK, PPCPS, 0, {FRT, FRA, FRC, FRB}},
{"ps_madd.", A (4, 29,1), A_MASK, PPCPS, 0, {FRT, FRA, FRC, FRB}},
-{"xor3", VXA(4, 54), VXA_MASK, POWER9, 0, {RA, RS, RB, RC}},
-{"nandxor", VXA(4, 55), VXA_MASK, POWER9, 0, {RA, RS, RB, RC}},
{"vpermr", VXA(4, 59), VXA_MASK, PPCVEC3, 0, {VD, VA, VB, VC}},
{"ps_nmsub", A (4, 30,0), A_MASK, PPCPS, 0, {FRT, FRA, FRC, FRB}},
{"vaddeuqm", VXA(4, 60), VXA_MASK, PPCVEC2, 0, {VD, VA, VB, VC}},
@@ -4943,8 +4940,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"dcbfep", XRT(31,127,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}},
-{"setb", VX(31,256), VXVB_MASK|(3<<16), POWER9, 0, {RT, BFA}},
-{"setbool", VX(31,257), VXVB_MASK, POWER9, 0, {RT, BA}},
+{"setb", X(31,128), XRB_MASK|(3<<16), POWER9, 0, {RT, BFA}},
{"wrtee", X(31,131), XRARB_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RS}},
@@ -4994,8 +4990,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"prtyw", X(31,154), XRB_MASK, POWER6|PPCA2|PPC476, 0, {RA, RS}},
-{"brw", X(31,155), XRB_MASK, POWER9, 0, {RA, RS}},
-
{"stdepx", X(31,157), X_MASK, E500MC|PPCA2, 0, {RS, RA0, RB}},
{"stwepx", X(31,159), X_MASK, E500MC|PPCA2, 0, {RS, RA0, RB}},
@@ -5008,7 +5002,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"sthfcmx", APU(31,167,0), APU_MASK, PPC405, 0, {FCRT, RA, RB}},
{"addex", ZRC(31,170,0), Z2_MASK, POWER9, 0, {RT, RA, RB, CY}},
-{"addex.", ZRC(31,170,1), Z2_MASK, POWER9, 0, {RT, RA, RB, CY}},
{"msgclrp", XRTRA(31,174,0,0), XRTRA_MASK, POWER8, 0, {RB}},
{"dcbtlse", X(31,174), X_MASK, PPCCHLK, E500MC, {CT, RA0, RB}},
@@ -5033,8 +5026,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"prtyd", X(31,186), XRB_MASK, POWER6|PPCA2, 0, {RA, RS}},
-{"brd", X(31,187), XRB_MASK, POWER9, 0, {RA, RS}},
-
{"cmprb", X(31,192), XCMP_MASK, POWER9, 0, {BF, L, RA, RB}},
{"icblq.", XRC(31,198,1), X_MASK, E6500, 0, {CT, RA0, RB}},
@@ -5073,8 +5064,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"sleq", XRC(31,217,0), X_MASK, M601, 0, {RA, RS, RB}},
{"sleq.", XRC(31,217,1), X_MASK, M601, 0, {RA, RS, RB}},
-{"brh", X(31,219), XRB_MASK, POWER9, 0, {RA, RS}},
-
{"stbepx", X(31,223), X_MASK, E500MC|PPCA2, 0, {RS, RA0, RB}},
{"cmpeqb", X(31,224), XCMPL_MASK, POWER9, 0, {BF, RA, RB}},
@@ -5541,8 +5530,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mtvsrdd", X(31,435), XX1_MASK, PPCVSX3, 0, {XT6, RA0, RB}},
-{"lwzmx", X(31,437), X_MASK, POWER9, 0, {RT, RA0, RB}},
-
{"ecowx", X(31,438), X_MASK, PPC, E500|TITAN, {RT, RA0, RB}},
{"sthux", X(31,439), X_MASK, COM, 0, {RS, RAS, RB}},
@@ -5906,8 +5893,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"hwsync", XSYNC(31,598,0), 0xffffffff, POWER4, BOOKE|PPC476, {0}},
{"lwsync", XSYNC(31,598,1), 0xffffffff, PPC, E500, {0}},
{"ptesync", XSYNC(31,598,2), 0xffffffff, PPC64, 0, {0}},
-{"sync", X(31,598), XSYNCLE_MASK, POWER9|E6500, 0, {LS, ESYNC}},
-{"sync", X(31,598), XSYNC_MASK, PPCCOM, BOOKE|PPC476|POWER9, {LS}},
+{"sync", X(31,598), XSYNCLE_MASK, E6500, 0, {LS, ESYNC}},
+{"sync", X(31,598), XSYNC_MASK, PPCCOM, BOOKE|PPC476, {LS}},
{"msync", X(31,598), 0xffffffff, BOOKE|PPCA2|PPC476, 0, {0}},
{"sync", X(31,598), 0xffffffff, BOOKE|PPC476, E6500, {0}},
{"lwsync", X(31,598), 0xffffffff, E500, 0, {0}},
@@ -6072,8 +6059,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"lvsm", X(31,773), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
-{"copy_first", XOPL(31,774,1), XRT_MASK, POWER9, 0, {RA0, RB}},
-{"copy", X(31,774), XLRT_MASK, POWER9, 0, {RA0, RB, L}},
+{"copy", XOPL(31,774,1), XRT_MASK, POWER9, 0, {RA0, RB}},
{"stvepxl", X(31,775), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
{"lvlxl", X(31,775), X_MASK, CELL, 0, {VD, RA0, RB}},
@@ -6143,7 +6129,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"lvtlxl", X(31,837), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
-{"cp_abort", X(31,838), XRTRARB_MASK,POWER9, 0, {0}},
+{"cpabort", X(31,838), XRTRARB_MASK,POWER9, 0, {0}},
{"divo", XO(31,331,1,0), XO_MASK, M601, 0, {RT, RA, RB}},
{"divo.", XO(31,331,1,1), XO_MASK, M601, 0, {RT, RA, RB}},
@@ -6155,6 +6141,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"tlbsrx.", XRC(31,850,1), XRT_MASK, PPCA2, 0, {RA0, RB}},
+{"slbiag", X(31,850), XRARB_MASK, POWER9, 0, {RS}},
{"slbmfev", X(31,851), XRLA_MASK, POWER9, 0, {RT, RB, A_L}},
{"slbmfev", X(31,851), XRA_MASK, PPC64, POWER9, {RT, RB}},
@@ -6190,9 +6177,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"extswsli", XS(31,445,0), XS_MASK, POWER9, 0, {RA, RS, SH6}},
{"extswsli.", XS(31,445,1), XS_MASK, POWER9, 0, {RA, RS, SH6}},
-{"paste", XRC(31,902,0), XLRT_MASK, POWER9, 0, {RA0, RB, L0}},
-{"paste_last", XRCL(31,902,1,1),XRT_MASK, POWER9, 0, {RA0, RB}},
-{"paste.", XRC(31,902,1), XLRT_MASK, POWER9, 0, {RA0, RB, L1}},
+{"paste.", XRCL(31,902,1,1),XRT_MASK, POWER9, 0, {RA0, RB}},
{"stvlxl", X(31,903), X_MASK, CELL, 0, {VS, RA0, RB}},
{"stdfcmux", APU(31,903,0), APU_MASK, PPC405, 0, {FCRT, RA, RB}},