diff --git a/binutils-2.29-gold-mips.patch b/binutils-2.29-gold-mips.patch new file mode 100644 index 0000000..2d01b9a --- /dev/null +++ b/binutils-2.29-gold-mips.patch @@ -0,0 +1,11 @@ +--- gold/mips.cc.orig 2017-07-26 12:42:53.595075930 +0200 ++++ gold/mips.cc 2017-07-26 12:43:15.859443263 +0200 +@@ -5664,7 +5664,7 @@ + : addend_a); + + Valtype x = psymval->value(object, addend); +- x = ((x + (uint64_t) 0x800080008000) >> 48) & 0xffff; ++ x = ((x + (uint64_t) 0x800080008000ULL) >> 48) & 0xffff; + val = Bits<32>::bit_select32(val, x, 0xffff); + + if (calculate_only) diff --git a/binutils.changes b/binutils.changes index 3265a1a..8063e66 100644 --- a/binutils.changes +++ b/binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/binutils.spec b/binutils.spec index a6cb4e4..df920fc 100644 --- a/binutils.spec +++ b/binutils.spec @@ -96,6 +96,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -170,6 +171,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-aarch64-binutils.changes b/cross-aarch64-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-aarch64-binutils.changes +++ b/cross-aarch64-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-aarch64-binutils.spec b/cross-aarch64-binutils.spec index d6d0695..922abf0 100644 --- a/cross-aarch64-binutils.spec +++ b/cross-aarch64-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-arm-binutils.changes b/cross-arm-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-arm-binutils.changes +++ b/cross-arm-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-arm-binutils.spec b/cross-arm-binutils.spec index 18e5f66..cfe3159 100644 --- a/cross-arm-binutils.spec +++ b/cross-arm-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-avr-binutils.changes b/cross-avr-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-avr-binutils.changes +++ b/cross-avr-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-avr-binutils.spec b/cross-avr-binutils.spec index a6a7b83..9b2ed8b 100644 --- a/cross-avr-binutils.spec +++ b/cross-avr-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-epiphany-binutils.changes b/cross-epiphany-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-epiphany-binutils.changes +++ b/cross-epiphany-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-epiphany-binutils.spec b/cross-epiphany-binutils.spec index 98c7bce..9e526d8 100644 --- a/cross-epiphany-binutils.spec +++ b/cross-epiphany-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-hppa-binutils.changes b/cross-hppa-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-hppa-binutils.changes +++ b/cross-hppa-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-hppa-binutils.spec b/cross-hppa-binutils.spec index d9af068..f7b72bb 100644 --- a/cross-hppa-binutils.spec +++ b/cross-hppa-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-hppa64-binutils.changes b/cross-hppa64-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-hppa64-binutils.changes +++ b/cross-hppa64-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-hppa64-binutils.spec b/cross-hppa64-binutils.spec index 6ece689..a08b82f 100644 --- a/cross-hppa64-binutils.spec +++ b/cross-hppa64-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-i386-binutils.changes b/cross-i386-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-i386-binutils.changes +++ b/cross-i386-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-i386-binutils.spec b/cross-i386-binutils.spec index 0495e90..65393b4 100644 --- a/cross-i386-binutils.spec +++ b/cross-i386-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-ia64-binutils.changes b/cross-ia64-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-ia64-binutils.changes +++ b/cross-ia64-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-ia64-binutils.spec b/cross-ia64-binutils.spec index 44be2ab..984c521 100644 --- a/cross-ia64-binutils.spec +++ b/cross-ia64-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-m68k-binutils.changes b/cross-m68k-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-m68k-binutils.changes +++ b/cross-m68k-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-m68k-binutils.spec b/cross-m68k-binutils.spec index 038fdb2..4d55a2a 100644 --- a/cross-m68k-binutils.spec +++ b/cross-m68k-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-mips-binutils.changes b/cross-mips-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-mips-binutils.changes +++ b/cross-mips-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-mips-binutils.spec b/cross-mips-binutils.spec index 21ca1b4..6e6e0e9 100644 --- a/cross-mips-binutils.spec +++ b/cross-mips-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-ppc-binutils.changes b/cross-ppc-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-ppc-binutils.changes +++ b/cross-ppc-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-ppc-binutils.spec b/cross-ppc-binutils.spec index 1d5d46f..9dbe184 100644 --- a/cross-ppc-binutils.spec +++ b/cross-ppc-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-ppc64-binutils.changes b/cross-ppc64-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-ppc64-binutils.changes +++ b/cross-ppc64-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-ppc64-binutils.spec b/cross-ppc64-binutils.spec index 31c4dde..6d4e5b6 100644 --- a/cross-ppc64-binutils.spec +++ b/cross-ppc64-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-ppc64le-binutils.changes b/cross-ppc64le-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-ppc64le-binutils.changes +++ b/cross-ppc64le-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-ppc64le-binutils.spec b/cross-ppc64le-binutils.spec index d2e02f6..b8b22b7 100644 --- a/cross-ppc64le-binutils.spec +++ b/cross-ppc64le-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-riscv64-binutils.changes b/cross-riscv64-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-riscv64-binutils.changes +++ b/cross-riscv64-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-riscv64-binutils.spec b/cross-riscv64-binutils.spec index 43d2c98..c59226c 100644 --- a/cross-riscv64-binutils.spec +++ b/cross-riscv64-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-rx-binutils.changes b/cross-rx-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-rx-binutils.changes +++ b/cross-rx-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-rx-binutils.spec b/cross-rx-binutils.spec index b43db87..44a57a0 100644 --- a/cross-rx-binutils.spec +++ b/cross-rx-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-s390-binutils.changes b/cross-s390-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-s390-binutils.changes +++ b/cross-s390-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-s390-binutils.spec b/cross-s390-binutils.spec index 485f001..1d10e51 100644 --- a/cross-s390-binutils.spec +++ b/cross-s390-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-s390x-binutils.changes b/cross-s390x-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-s390x-binutils.changes +++ b/cross-s390x-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-s390x-binutils.spec b/cross-s390x-binutils.spec index 63d55cb..665f938 100644 --- a/cross-s390x-binutils.spec +++ b/cross-s390x-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-sparc-binutils.changes b/cross-sparc-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-sparc-binutils.changes +++ b/cross-sparc-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-sparc-binutils.spec b/cross-sparc-binutils.spec index d2f0757..c7109cd 100644 --- a/cross-sparc-binutils.spec +++ b/cross-sparc-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-sparc64-binutils.changes b/cross-sparc64-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-sparc64-binutils.changes +++ b/cross-sparc64-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-sparc64-binutils.spec b/cross-sparc64-binutils.spec index bc36063..a13d46a 100644 --- a/cross-sparc64-binutils.spec +++ b/cross-sparc64-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-spu-binutils.changes b/cross-spu-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-spu-binutils.changes +++ b/cross-spu-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-spu-binutils.spec b/cross-spu-binutils.spec index 1e52d30..5dccd15 100644 --- a/cross-spu-binutils.spec +++ b/cross-spu-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 diff --git a/cross-x86_64-binutils.changes b/cross-x86_64-binutils.changes index 3265a1a..8063e66 100644 --- a/cross-x86_64-binutils.changes +++ b/cross-x86_64-binutils.changes @@ -1,3 +1,8 @@ +------------------------------------------------------------------- +Wed Jul 26 10:53:13 UTC 2017 - rguenther@suse.com + +- Add binutils-2.29-gold-mips.patch to fix build on SLE-11. + ------------------------------------------------------------------- Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com diff --git a/cross-x86_64-binutils.spec b/cross-x86_64-binutils.spec index 205d8b7..9d5827c 100644 --- a/cross-x86_64-binutils.spec +++ b/cross-x86_64-binutils.spec @@ -99,6 +99,7 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch +Patch35: binutils-2.29-gold-mips.patch Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -173,6 +174,7 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 +%patch35 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90