diff --git a/binutils.changes b/binutils.changes
index 4f585c5..4664561 100644
--- a/binutils.changes
+++ b/binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/binutils.spec b/binutils.spec
index 5624ce8..ca94b26 100644
--- a/binutils.spec
+++ b/binutils.spec
@@ -63,7 +63,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-aarch64-binutils.changes b/cross-aarch64-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-aarch64-binutils.changes
+++ b/cross-aarch64-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-aarch64-binutils.spec b/cross-aarch64-binutils.spec
index d65cab5..801af6f 100644
--- a/cross-aarch64-binutils.spec
+++ b/cross-aarch64-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-arm-binutils.changes b/cross-arm-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-arm-binutils.changes
+++ b/cross-arm-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-arm-binutils.spec b/cross-arm-binutils.spec
index 5b14d98..204feb2 100644
--- a/cross-arm-binutils.spec
+++ b/cross-arm-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-avr-binutils.changes b/cross-avr-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-avr-binutils.changes
+++ b/cross-avr-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-avr-binutils.spec b/cross-avr-binutils.spec
index 6262ea3..83411d2 100644
--- a/cross-avr-binutils.spec
+++ b/cross-avr-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-epiphany-binutils.changes b/cross-epiphany-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-epiphany-binutils.changes
+++ b/cross-epiphany-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-epiphany-binutils.spec b/cross-epiphany-binutils.spec
index 7fb20ec..581687f 100644
--- a/cross-epiphany-binutils.spec
+++ b/cross-epiphany-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-hppa-binutils.changes b/cross-hppa-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-hppa-binutils.changes
+++ b/cross-hppa-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-hppa-binutils.spec b/cross-hppa-binutils.spec
index 5f78cdc..e065359 100644
--- a/cross-hppa-binutils.spec
+++ b/cross-hppa-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-hppa64-binutils.changes b/cross-hppa64-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-hppa64-binutils.changes
+++ b/cross-hppa64-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-hppa64-binutils.spec b/cross-hppa64-binutils.spec
index 845f1e9..8e635dd 100644
--- a/cross-hppa64-binutils.spec
+++ b/cross-hppa64-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-i386-binutils.changes b/cross-i386-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-i386-binutils.changes
+++ b/cross-i386-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-i386-binutils.spec b/cross-i386-binutils.spec
index 06fcf75..6be202e 100644
--- a/cross-i386-binutils.spec
+++ b/cross-i386-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-ia64-binutils.changes b/cross-ia64-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-ia64-binutils.changes
+++ b/cross-ia64-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-ia64-binutils.spec b/cross-ia64-binutils.spec
index e15d6d3..4390fab 100644
--- a/cross-ia64-binutils.spec
+++ b/cross-ia64-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-m68k-binutils.changes b/cross-m68k-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-m68k-binutils.changes
+++ b/cross-m68k-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-m68k-binutils.spec b/cross-m68k-binutils.spec
index c9eb2b0..bda0274 100644
--- a/cross-m68k-binutils.spec
+++ b/cross-m68k-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-mips-binutils.changes b/cross-mips-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-mips-binutils.changes
+++ b/cross-mips-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-mips-binutils.spec b/cross-mips-binutils.spec
index 9b55564..64e6002 100644
--- a/cross-mips-binutils.spec
+++ b/cross-mips-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-ppc-binutils.changes b/cross-ppc-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-ppc-binutils.changes
+++ b/cross-ppc-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-ppc-binutils.spec b/cross-ppc-binutils.spec
index 6529409..4b26b3a 100644
--- a/cross-ppc-binutils.spec
+++ b/cross-ppc-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-ppc64-binutils.changes b/cross-ppc64-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-ppc64-binutils.changes
+++ b/cross-ppc64-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-ppc64-binutils.spec b/cross-ppc64-binutils.spec
index 0ad94de..fbb1c93 100644
--- a/cross-ppc64-binutils.spec
+++ b/cross-ppc64-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-ppc64le-binutils.changes b/cross-ppc64le-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-ppc64le-binutils.changes
+++ b/cross-ppc64le-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-ppc64le-binutils.spec b/cross-ppc64le-binutils.spec
index f79ef9b..ffd6b07 100644
--- a/cross-ppc64le-binutils.spec
+++ b/cross-ppc64le-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-riscv64-binutils.changes b/cross-riscv64-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-riscv64-binutils.changes
+++ b/cross-riscv64-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-riscv64-binutils.spec b/cross-riscv64-binutils.spec
index 235b7dc..3595e50 100644
--- a/cross-riscv64-binutils.spec
+++ b/cross-riscv64-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-rx-binutils.changes b/cross-rx-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-rx-binutils.changes
+++ b/cross-rx-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-rx-binutils.spec b/cross-rx-binutils.spec
index 6a7011a..d8a38b7 100644
--- a/cross-rx-binutils.spec
+++ b/cross-rx-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-s390-binutils.changes b/cross-s390-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-s390-binutils.changes
+++ b/cross-s390-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-s390-binutils.spec b/cross-s390-binutils.spec
index 8fed2d9..6019299 100644
--- a/cross-s390-binutils.spec
+++ b/cross-s390-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-s390x-binutils.changes b/cross-s390x-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-s390x-binutils.changes
+++ b/cross-s390x-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-s390x-binutils.spec b/cross-s390x-binutils.spec
index c76ad1a..95a00d8 100644
--- a/cross-s390x-binutils.spec
+++ b/cross-s390x-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-sparc-binutils.changes b/cross-sparc-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-sparc-binutils.changes
+++ b/cross-sparc-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-sparc-binutils.spec b/cross-sparc-binutils.spec
index 5f42297..e5f9f90 100644
--- a/cross-sparc-binutils.spec
+++ b/cross-sparc-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-sparc64-binutils.changes b/cross-sparc64-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-sparc64-binutils.changes
+++ b/cross-sparc64-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-sparc64-binutils.spec b/cross-sparc64-binutils.spec
index 305ba85..171b9f3 100644
--- a/cross-sparc64-binutils.spec
+++ b/cross-sparc64-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-spu-binutils.changes b/cross-spu-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-spu-binutils.changes
+++ b/cross-spu-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-spu-binutils.spec b/cross-spu-binutils.spec
index f27f626..0c77ba7 100644
--- a/cross-spu-binutils.spec
+++ b/cross-spu-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #
diff --git a/cross-x86_64-binutils.changes b/cross-x86_64-binutils.changes
index 4f585c5..4664561 100644
--- a/cross-x86_64-binutils.changes
+++ b/cross-x86_64-binutils.changes
@@ -1,3 +1,8 @@
+-------------------------------------------------------------------
+Mon Jan 22 09:40:25 UTC 2018 - schwab@suse.de
+
+- Add riscv64 to %target_list
+
 -------------------------------------------------------------------
 Wed Jan 17 11:28:03 UTC 2018 - afaerber@suse.de
 
diff --git a/cross-x86_64-binutils.spec b/cross-x86_64-binutils.spec
index ce9e5af..eb93871 100644
--- a/cross-x86_64-binutils.spec
+++ b/cross-x86_64-binutils.spec
@@ -66,7 +66,7 @@ Release:        0
 %else
 %define build_multitarget 0
 %endif
-%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le s390 s390x sh4 sparc sparc64 x86_64
+%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64
 #
 #
 #