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- Add avr, epiphany and rx to target_list so that the common

Browse Source 
binutils can handle all objects we can create with crosses.

OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=315
This commit is contained in:
Michael Matz 2019-10-02 12:22:44 +00:00 committed by Git OBS Bridge
parent 7767fa8a12
commit a0c8cdd130
44 changed files with 154 additions and 22 deletions
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6
cross-aarch64-binutils.changes
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@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-aarch64-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-arm-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-arm-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-avr-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-avr-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-epiphany-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-epiphany-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-hppa-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-hppa-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-hppa64-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-hppa64-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-i386-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-i386-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-ia64-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-ia64-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-m68k-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-m68k-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-mips-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-mips-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-ppc-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-ppc-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-ppc64-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-ppc64-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-ppc64le-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-ppc64le-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-riscv64-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-riscv64-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-rx-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-rx-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-s390-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-s390-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-s390x-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-s390x-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-sparc-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-sparc-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-sparc64-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-sparc64-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-spu-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-spu-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-x86_64-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-x86_64-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

6
cross-xtensa-binutils.changes
View File

@ -1,3 +1,9 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

2
cross-xtensa-binutils.spec
View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#