From db99b0ff620077770a8dc46958ac79e2377afe9094fa0249f4251072e41025ef Mon Sep 17 00:00:00 2001 From: Richard Biener Date: Wed, 26 Jul 2017 08:42:03 +0000 Subject: [PATCH] - Update to binutils 2.29. * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) instructions for assembly and disassembly. * The MIPS port now supports the microMIPS Release 5 ISA for assembly and disassembly. * The MIPS port now supports the Imagination interAptiv MR2 processor, which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple of implementation-specific regular MIPS and MIPS16e2 ASE instructions. * The SPARC port now supports the SPARC M8 processor, which implements the Oracle SPARC Architecture 2017. * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. * Add support for the wasm32 ELF conversion of the WebAssembly file format. * Add --inlines option to objdump, which extends the --line-numbers option so that inlined functions will display their nesting information. * Add --merge-notes options to objcopy to reduce the size of notes in a binary file by merging and deleting redundant notes. * Add support for locating separate debug info files using the build-id method, where the separate file has a name based upon the build-id of the original file. GAS * Add support for ELF SHF_GNU_MBIND. * Add support for the WebAssembly file format and wasm32 ELF conversion. * PowerPC gas now checks that the correct register class is used in instructions. For instance, "addi %f4,%cr3,%r31" warns three times that the registers are invalid. * Add support for the Texas Instruments PRU processor. * Support for the ARMv8-R architecture and Cortex-R52 processor has been added to the ARM port. GNU ld OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=242 --- binutils-2.28-branch.diff | 1998 ------------------------------- binutils-2.28.tar.bz2 | 3 - binutils-2.29.tar.bz2 | 3 + binutils-bso21193.diff | 35 - binutils-bso21333.diff | 18 - binutils-build-as-needed.diff | 10 +- binutils.changes | 62 + binutils.spec | 18 +- cross-aarch64-binutils.changes | 62 + cross-aarch64-binutils.spec | 18 +- cross-arm-binutils.changes | 62 + cross-arm-binutils.spec | 18 +- cross-avr-binutils.changes | 62 + cross-avr-binutils.spec | 18 +- cross-epiphany-binutils.changes | 62 + cross-epiphany-binutils.spec | 18 +- cross-hppa-binutils.changes | 62 + cross-hppa-binutils.spec | 18 +- cross-hppa64-binutils.changes | 62 + cross-hppa64-binutils.spec | 18 +- cross-i386-binutils.changes | 62 + cross-i386-binutils.spec | 18 +- cross-ia64-binutils.changes | 62 + cross-ia64-binutils.spec | 18 +- cross-m68k-binutils.changes | 62 + cross-m68k-binutils.spec | 18 +- cross-mips-binutils.changes | 62 + cross-mips-binutils.spec | 18 +- cross-ppc-binutils.changes | 62 + cross-ppc-binutils.spec | 18 +- cross-ppc64-binutils.changes | 62 + cross-ppc64-binutils.spec | 18 +- cross-ppc64le-binutils.changes | 62 + cross-ppc64le-binutils.spec | 18 +- cross-riscv64-binutils.changes | 62 + cross-riscv64-binutils.spec | 18 +- cross-rx-binutils.changes | 62 + cross-rx-binutils.spec | 18 +- cross-s390-binutils.changes | 62 + cross-s390-binutils.spec | 18 +- cross-s390x-binutils.changes | 62 + cross-s390x-binutils.spec | 18 +- cross-sparc-binutils.changes | 62 + cross-sparc-binutils.spec | 18 +- cross-sparc64-binutils.changes | 62 + cross-sparc64-binutils.spec | 18 +- cross-spu-binutils.changes | 62 + cross-spu-binutils.spec | 18 +- cross-x86_64-binutils.changes | 62 + cross-x86_64-binutils.spec | 18 +- fix-security-bugs.diff | 762 ------------ ld-dtags.diff | 73 -- 52 files changed, 1482 insertions(+), 3180 deletions(-) delete mode 100644 binutils-2.28-branch.diff delete mode 100644 binutils-2.28.tar.bz2 create mode 100644 binutils-2.29.tar.bz2 delete mode 100644 binutils-bso21193.diff delete mode 100644 binutils-bso21333.diff delete mode 100644 fix-security-bugs.diff delete mode 100644 ld-dtags.diff diff --git a/binutils-2.28-branch.diff b/binutils-2.28-branch.diff deleted file mode 100644 index 7be780a..0000000 --- a/binutils-2.28-branch.diff +++ /dev/null @@ -1,1998 +0,0 @@ -diff --git a/bfd/ChangeLog b/bfd/ChangeLog -index 85c6a81..17e7e3b 100644 ---- a/bfd/ChangeLog -+++ b/bfd/ChangeLog -@@ -1,3 +1,25 @@ -+2017-03-07 Alan Modra -+ -+ PR 21224 -+ PR 20519 -+ * elf64-ppc.c (ppc64_elf_relocate_section): Add missing -+ dyn_relocs check. -+ -+2017-03-07 Alan Modra -+ -+ Apply from master -+ 2017-03-02 Alan Modra -+ * elf32-ppc.c (ppc_elf_vle_split16): Correct insn mask typo. -+ -+2017-03-02 Tristan Gingold -+ -+ * version.m4: Bump version to 2.28.0 -+ * configure: Regenerate. -+ -+2017-03-02 Tristan Gingold -+ -+ * development.sh: Set development to true. -+ - 2017-03-02 Tristan Gingold - - * version.m4: Bump version to 2.28 -diff --git a/bfd/configure b/bfd/configure -index 9769387..f30bfab 100755 ---- a/bfd/configure -+++ b/bfd/configure -@@ -1,6 +1,6 @@ - #! /bin/sh - # Guess values for system-dependent variables and create Makefiles. --# Generated by GNU Autoconf 2.64 for bfd 2.28. -+# Generated by GNU Autoconf 2.64 for bfd 2.28.0. - # - # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, - # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software -@@ -556,8 +556,8 @@ MAKEFLAGS= - # Identity of this package. - PACKAGE_NAME='bfd' - PACKAGE_TARNAME='bfd' --PACKAGE_VERSION='2.28' --PACKAGE_STRING='bfd 2.28' -+PACKAGE_VERSION='2.28.0' -+PACKAGE_STRING='bfd 2.28.0' - PACKAGE_BUGREPORT='' - PACKAGE_URL='' - -@@ -1354,7 +1354,7 @@ if test "$ac_init_help" = "long"; then - # Omit some internal or obsolete options to make the list less imposing. - # This message is too long to be a string in the A/UX 3.1 sh. - cat <<_ACEOF --\`configure' configures bfd 2.28 to adapt to many kinds of systems. -+\`configure' configures bfd 2.28.0 to adapt to many kinds of systems. - - Usage: $0 [OPTION]... [VAR=VALUE]... - -@@ -1425,7 +1425,7 @@ fi - - if test -n "$ac_init_help"; then - case $ac_init_help in -- short | recursive ) echo "Configuration of bfd 2.28:";; -+ short | recursive ) echo "Configuration of bfd 2.28.0:";; - esac - cat <<\_ACEOF - -@@ -1546,7 +1546,7 @@ fi - test -n "$ac_init_help" && exit $ac_status - if $ac_init_version; then - cat <<\_ACEOF --bfd configure 2.28 -+bfd configure 2.28.0 - generated by GNU Autoconf 2.64 - - Copyright (C) 2009 Free Software Foundation, Inc. -@@ -2188,7 +2188,7 @@ cat >config.log <<_ACEOF - This file contains any messages produced by compilers while - running configure, to aid debugging if configure makes a mistake. - --It was created by bfd $as_me 2.28, which was -+It was created by bfd $as_me 2.28.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - $ $0 $@ -@@ -3997,7 +3997,7 @@ fi - - # Define the identity of the package. - PACKAGE='bfd' -- VERSION='2.28' -+ VERSION='2.28.0' - - - cat >>confdefs.h <<_ACEOF -@@ -16613,7 +16613,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 - # report actual input values of CONFIG_FILES etc. instead of their - # values after options handling. - ac_log=" --This file was extended by bfd $as_me 2.28, which was -+This file was extended by bfd $as_me 2.28.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - CONFIG_FILES = $CONFIG_FILES -@@ -16677,7 +16677,7 @@ Report bugs to the package provider." - _ACEOF - cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 - ac_cs_version="\\ --bfd config.status 2.28 -+bfd config.status 2.28.0 - configured by $0, generated by GNU Autoconf 2.64, - with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" - -diff --git a/bfd/development.sh b/bfd/development.sh -index b001a88..cd31410 100644 ---- a/bfd/development.sh -+++ b/bfd/development.sh -@@ -16,4 +16,4 @@ - # along with this program. If not, see . - - # Controls whether to enable development-mode features by default. --development=false -+development=true -diff --git a/bfd/elf32-ppc.c b/bfd/elf32-ppc.c -index 0f3eb68..10caa8a 100644 ---- a/bfd/elf32-ppc.c -+++ b/bfd/elf32-ppc.c -@@ -4921,7 +4921,7 @@ ppc_elf_vle_split16 (bfd *input_bfd, - unsigned int insn, opcode, top5; - - insn = bfd_get_32 (input_bfd, loc); -- opcode = insn & 0xf300f800; -+ opcode = insn & 0xfc00f800; - if (opcode == E_OR2I_INSN - || opcode == E_AND2I_DOT_INSN - || opcode == E_OR2IS_INSN -diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c -index e7d4792..3381647 100644 ---- a/bfd/elf64-ppc.c -+++ b/bfd/elf64-ppc.c -@@ -14798,8 +14798,10 @@ ppc64_elf_relocate_section (bfd *output_bfd, - break; - - if (bfd_link_pic (info) -- ? ((h != NULL && pc_dynrelocs (h)) -- || must_be_dyn_reloc (info, r_type)) -+ ? ((h == NULL -+ || h->dyn_relocs != NULL) -+ && ((h != NULL && pc_dynrelocs (h)) -+ || must_be_dyn_reloc (info, r_type))) - : (h != NULL - ? h->dyn_relocs != NULL - : ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC)) -diff --git a/bfd/version.h b/bfd/version.h -index eda06e4..db90564 100644 ---- a/bfd/version.h -+++ b/bfd/version.h -@@ -1,4 +1,4 @@ --#define BFD_VERSION_DATE 20170302 -+#define BFD_VERSION_DATE 20170331 - #define BFD_VERSION @bfd_version@ - #define BFD_VERSION_STRING @bfd_version_package@ @bfd_version_string@ - #define REPORT_BUGS_TO @report_bugs_to@ -diff --git a/bfd/version.m4 b/bfd/version.m4 -index 0cfca2d..8bde21e 100644 ---- a/bfd/version.m4 -+++ b/bfd/version.m4 -@@ -1 +1 @@ --m4_define([BFD_VERSION], [2.28]) -+m4_define([BFD_VERSION], [2.28.0]) -diff --git a/binutils/ChangeLog b/binutils/ChangeLog -index aa17468..f21867f 100644 ---- a/binutils/ChangeLog -+++ b/binutils/ChangeLog -@@ -2,6 +2,10 @@ - - * configure: Regenerate. - -+2017-03-02 Tristan Gingold -+ -+ * configure: Regenerate. -+ - 2017-01-18 Bernhard Rosenkranzer - - PR 21059 -diff --git a/binutils/configure b/binutils/configure -index baddf34..82119ef 100755 ---- a/binutils/configure -+++ b/binutils/configure -@@ -1,6 +1,6 @@ - #! /bin/sh - # Guess values for system-dependent variables and create Makefiles. --# Generated by GNU Autoconf 2.64 for binutils 2.28. -+# Generated by GNU Autoconf 2.64 for binutils 2.28.0. - # - # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, - # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software -@@ -556,8 +556,8 @@ MAKEFLAGS= - # Identity of this package. - PACKAGE_NAME='binutils' - PACKAGE_TARNAME='binutils' --PACKAGE_VERSION='2.28' --PACKAGE_STRING='binutils 2.28' -+PACKAGE_VERSION='2.28.0' -+PACKAGE_STRING='binutils 2.28.0' - PACKAGE_BUGREPORT='' - PACKAGE_URL='' - -@@ -1338,7 +1338,7 @@ if test "$ac_init_help" = "long"; then - # Omit some internal or obsolete options to make the list less imposing. - # This message is too long to be a string in the A/UX 3.1 sh. - cat <<_ACEOF --\`configure' configures binutils 2.28 to adapt to many kinds of systems. -+\`configure' configures binutils 2.28.0 to adapt to many kinds of systems. - - Usage: $0 [OPTION]... [VAR=VALUE]... - -@@ -1409,7 +1409,7 @@ fi - - if test -n "$ac_init_help"; then - case $ac_init_help in -- short | recursive ) echo "Configuration of binutils 2.28:";; -+ short | recursive ) echo "Configuration of binutils 2.28.0:";; - esac - cat <<\_ACEOF - -@@ -1530,7 +1530,7 @@ fi - test -n "$ac_init_help" && exit $ac_status - if $ac_init_version; then - cat <<\_ACEOF --binutils configure 2.28 -+binutils configure 2.28.0 - generated by GNU Autoconf 2.64 - - Copyright (C) 2009 Free Software Foundation, Inc. -@@ -2172,7 +2172,7 @@ cat >config.log <<_ACEOF - This file contains any messages produced by compilers while - running configure, to aid debugging if configure makes a mistake. - --It was created by binutils $as_me 2.28, which was -+It was created by binutils $as_me 2.28.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - $ $0 $@ -@@ -3981,7 +3981,7 @@ fi - - # Define the identity of the package. - PACKAGE='binutils' -- VERSION='2.28' -+ VERSION='2.28.0' - - - cat >>confdefs.h <<_ACEOF -@@ -15223,7 +15223,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 - # report actual input values of CONFIG_FILES etc. instead of their - # values after options handling. - ac_log=" --This file was extended by binutils $as_me 2.28, which was -+This file was extended by binutils $as_me 2.28.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - CONFIG_FILES = $CONFIG_FILES -@@ -15287,7 +15287,7 @@ Report bugs to the package provider." - _ACEOF - cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 - ac_cs_version="\\ --binutils config.status 2.28 -+binutils config.status 2.28.0 - configured by $0, generated by GNU Autoconf 2.64, - with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" - -diff --git a/gas/ChangeLog b/gas/ChangeLog -index 8a586ad..904e0b9 100644 ---- a/gas/ChangeLog -+++ b/gas/ChangeLog -@@ -1,3 +1,61 @@ -+2017-03-21 Palmer Dabbbelt -+ -+ * config/tc-riscv.c (md_show_usage): Remove defuct -m32, -m64, -+ -msoft-float, -mhard-float, -mno-rvc, and -mrvc options; and don't -+ print an invalid default ISA string. -+ * doc/c-riscv.texi (OPTIONS): Add -fpic and -fno-pic options. -+ -+2017-03-14 Kito Cheng -+ -+ * config/tc-riscv.c (validate_riscv_insn): Add 'o' RVC immediate -+ encoding format, which can accept 0-valued immediates. -+ (riscv_ip): Likewise. -+ -+2017-03-02 Kuan-Lin Chen -+ -+ * config/tc-riscv.h (HWARD2_USE_FIXED_ADVANCE_PC): New define. -+ -+2017-03-02 Kuan-Lin Chen -+ -+ * config/tc-riscv.c (md_apply_fix): Set fx_frag and -+ fx_next->fx_frag for CFA_advance_loc relocations. -+ -+2017-03-02 Kuan-Lin Chen -+ -+ * config/tc-riscv.c (md_apply_fix): Compute the correct offsets -+ for CFA relocations. -+ -+2017-03-27 Alan Modra -+ -+ PR 21303 -+ * testsuite/gas/ppc/pr21303.d, -+ * testsuite/gas/ppc/pr21303.s: New test -+ * testsuite/gas/ppc/ppc.exp: Run it. -+ -+2017-03-21 Andreas Krebbel -+ -+ Backport from mainline -+ 2017-03-21 Andreas Krebbel -+ -+ * config/tc-s390.c (s390_parse_cpu): Remove S390_INSTR_FLAG_VX2 -+ from cpu_table. Remove vx2, and novx2 from cpu_flags. -+ -+2017-03-08 Peter Bergner -+ -+ * testsuite/gas/ppc/altivec2.d (as): Use the -mpower8 option. -+ (objdump): Use the -Mpower8 option. -+ -+2017-03-08 Peter Bergner -+ -+ Apply from master. -+ 2017-03-08 Peter Bergner -+ * testsuite/gas/ppc/power9.d New test. -+ * testsuite/gas/ppc/power9.s: Likewise. -+ -+2017-03-02 Tristan Gingold -+ -+ * configure: Regenerate. -+ - 2017-03-02 Tristan Gingold - - * configure: Regenerate. -diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c -index ec5b0bb..649c3e8 100644 ---- a/gas/config/tc-riscv.c -+++ b/gas/config/tc-riscv.c -@@ -500,6 +500,7 @@ validate_riscv_insn (const struct riscv_opcode *opc) - case 'c': break; /* RS1, constrained to equal sp */ - case 'i': used_bits |= ENCODE_RVC_SIMM3(-1U); break; - case 'j': used_bits |= ENCODE_RVC_IMM (-1U); break; -+ case 'o': used_bits |= ENCODE_RVC_IMM (-1U); break; - case 'k': used_bits |= ENCODE_RVC_LW_IMM (-1U); break; - case 'l': used_bits |= ENCODE_RVC_LD_IMM (-1U); break; - case 'm': used_bits |= ENCODE_RVC_LWSP_IMM (-1U); break; -@@ -1321,6 +1322,13 @@ rvc_imm_done: - ip->insn_opcode |= - ENCODE_RVC_LDSP_IMM (imm_expr->X_add_number); - goto rvc_imm_done; -+ case 'o': -+ if (my_getSmallExpression (imm_expr, imm_reloc, s, p) -+ || imm_expr->X_op != O_constant -+ || !VALID_RVC_IMM (imm_expr->X_add_number)) -+ break; -+ ip->insn_opcode |= ENCODE_RVC_IMM (imm_expr->X_add_number); -+ goto rvc_imm_done; - case 'K': - if (my_getSmallExpression (imm_expr, imm_reloc, s, p) - || imm_expr->X_op != O_constant -@@ -1837,6 +1845,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) - unsigned int subtype; - bfd_byte *buf = (bfd_byte *) (fixP->fx_frag->fr_literal + fixP->fx_where); - bfd_boolean relaxable = FALSE; -+ offsetT loc; - - /* Remember value for tc_gen_reloc. */ - fixP->fx_addnumber = *valP; -@@ -1922,30 +1931,31 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) - - case BFD_RELOC_RISCV_CFA: - /* Load the byte to get the subtype. */ -- subtype = bfd_get_8 (NULL, &fixP->fx_frag->fr_literal[fixP->fx_where]); -+ subtype = bfd_get_8 (NULL, &((fragS *) (fixP->fx_frag->fr_opcode))->fr_literal[fixP->fx_where]); -+ loc = fixP->fx_frag->fr_fix - (subtype & 7); - switch (subtype) - { - case DW_CFA_advance_loc1: -- fixP->fx_where++; -- fixP->fx_next->fx_where++; -+ fixP->fx_where = loc + 1; -+ fixP->fx_next->fx_where = loc + 1; - fixP->fx_r_type = BFD_RELOC_RISCV_SET8; - fixP->fx_next->fx_r_type = BFD_RELOC_RISCV_SUB8; - break; - - case DW_CFA_advance_loc2: - fixP->fx_size = 2; -- fixP->fx_where++; - fixP->fx_next->fx_size = 2; -- fixP->fx_next->fx_where++; -+ fixP->fx_where = loc + 1; -+ fixP->fx_next->fx_where = loc + 1; - fixP->fx_r_type = BFD_RELOC_RISCV_SET16; - fixP->fx_next->fx_r_type = BFD_RELOC_RISCV_SUB16; - break; - - case DW_CFA_advance_loc4: - fixP->fx_size = 4; -- fixP->fx_where++; - fixP->fx_next->fx_size = 4; -- fixP->fx_next->fx_where++; -+ fixP->fx_where = loc; -+ fixP->fx_next->fx_where = loc; - fixP->fx_r_type = BFD_RELOC_RISCV_SET32; - fixP->fx_next->fx_r_type = BFD_RELOC_RISCV_SUB32; - break; -@@ -1954,6 +1964,8 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) - if (subtype < 0x80 && (subtype & 0x40)) - { - /* DW_CFA_advance_loc */ -+ fixP->fx_frag = (fragS *) fixP->fx_frag->fr_opcode; -+ fixP->fx_next->fx_frag = fixP->fx_frag; - fixP->fx_r_type = BFD_RELOC_RISCV_SET6; - fixP->fx_next->fx_r_type = BFD_RELOC_RISCV_SUB6; - } -@@ -2069,7 +2081,6 @@ riscv_pre_output_hook (void) - { - if (frag->fr_type == rs_cfa) - { -- fragS *loc4_frag; - expressionS exp; - - symbolS *add_symbol = frag->fr_symbol->sy_value.X_add_symbol; -@@ -2080,8 +2091,7 @@ riscv_pre_output_hook (void) - exp.X_add_number = 0; - exp.X_op_symbol = op_symbol; - -- loc4_frag = (fragS *) frag->fr_opcode; -- fix_new_exp (loc4_frag, (int) frag->fr_offset, 1, &exp, 0, -+ fix_new_exp (frag, (int) frag->fr_offset, 1, &exp, 0, - BFD_RELOC_RISCV_CFA); - } - } -@@ -2455,15 +2465,10 @@ md_show_usage (FILE *stream) - { - fprintf (stream, _("\ - RISC-V options:\n\ -- -m32 assemble RV32 code\n\ -- -m64 assemble RV64 code (default)\n\ - -fpic generate position-independent code\n\ - -fno-pic don't generate position-independent code (default)\n\ -- -msoft-float don't use F registers for floating-point values\n\ -- -mhard-float use F registers for floating-point values (default)\n\ -- -mno-rvc disable the C extension for compressed instructions (default)\n\ -- -mrvc enable the C extension for compressed instructions\n\ -- -march=ISA set the RISC-V architecture, RV64IMAFD by default\n\ -+ -march=ISA set the RISC-V architecture\n\ -+ -mabi=ABI set the RISC-V ABI\n\ - ")); - } - -diff --git a/gas/config/tc-riscv.h b/gas/config/tc-riscv.h -index ae8d60e..e92b387 100644 ---- a/gas/config/tc-riscv.h -+++ b/gas/config/tc-riscv.h -@@ -112,4 +112,7 @@ extern int tc_riscv_regname_to_dw2regnum (char *); - #define elf_tc_final_processing riscv_elf_final_processing - extern void riscv_elf_final_processing (void); - -+/* Adjust debug_line after relaxation. */ -+#define DWARF2_USE_FIXED_ADVANCE_PC 1 -+ - #endif /* TC_RISCV */ -diff --git a/gas/config/tc-s390.c b/gas/config/tc-s390.c -index 7c8087e..dccbe2c 100644 ---- a/gas/config/tc-s390.c -+++ b/gas/config/tc-s390.c -@@ -291,7 +291,7 @@ s390_parse_cpu (const char * arg, - { STRING_COMMA_LEN ("z13"), STRING_COMMA_LEN ("arch11"), - S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX }, - { STRING_COMMA_LEN ("arch12"), STRING_COMMA_LEN (""), -- S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX | S390_INSTR_FLAG_VX2 } -+ S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX } - }; - static struct - { -@@ -303,9 +303,7 @@ s390_parse_cpu (const char * arg, - { "htm", S390_INSTR_FLAG_HTM, TRUE }, - { "nohtm", S390_INSTR_FLAG_HTM, FALSE }, - { "vx", S390_INSTR_FLAG_VX, TRUE }, -- { "novx", S390_INSTR_FLAG_VX, FALSE }, -- { "vx2", S390_INSTR_FLAG_VX2, TRUE }, -- { "novx2", S390_INSTR_FLAG_VX2, FALSE } -+ { "novx", S390_INSTR_FLAG_VX, FALSE } - }; - unsigned int icpu; - char *ilp_bak; -diff --git a/gas/configure b/gas/configure -index ce7091e..e574cb8 100755 ---- a/gas/configure -+++ b/gas/configure -@@ -1,6 +1,6 @@ - #! /bin/sh - # Guess values for system-dependent variables and create Makefiles. --# Generated by GNU Autoconf 2.64 for gas 2.28. -+# Generated by GNU Autoconf 2.64 for gas 2.28.0. - # - # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, - # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software -@@ -556,8 +556,8 @@ MAKEFLAGS= - # Identity of this package. - PACKAGE_NAME='gas' - PACKAGE_TARNAME='gas' --PACKAGE_VERSION='2.28' --PACKAGE_STRING='gas 2.28' -+PACKAGE_VERSION='2.28.0' -+PACKAGE_STRING='gas 2.28.0' - PACKAGE_BUGREPORT='' - PACKAGE_URL='' - -@@ -1330,7 +1330,7 @@ if test "$ac_init_help" = "long"; then - # Omit some internal or obsolete options to make the list less imposing. - # This message is too long to be a string in the A/UX 3.1 sh. - cat <<_ACEOF --\`configure' configures gas 2.28 to adapt to many kinds of systems. -+\`configure' configures gas 2.28.0 to adapt to many kinds of systems. - - Usage: $0 [OPTION]... [VAR=VALUE]... - -@@ -1401,7 +1401,7 @@ fi - - if test -n "$ac_init_help"; then - case $ac_init_help in -- short | recursive ) echo "Configuration of gas 2.28:";; -+ short | recursive ) echo "Configuration of gas 2.28.0:";; - esac - cat <<\_ACEOF - -@@ -1523,7 +1523,7 @@ fi - test -n "$ac_init_help" && exit $ac_status - if $ac_init_version; then - cat <<\_ACEOF --gas configure 2.28 -+gas configure 2.28.0 - generated by GNU Autoconf 2.64 - - Copyright (C) 2009 Free Software Foundation, Inc. -@@ -1933,7 +1933,7 @@ cat >config.log <<_ACEOF - This file contains any messages produced by compilers while - running configure, to aid debugging if configure makes a mistake. - --It was created by gas $as_me 2.28, which was -+It was created by gas $as_me 2.28.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - $ $0 $@ -@@ -3742,7 +3742,7 @@ fi - - # Define the identity of the package. - PACKAGE='gas' -- VERSION='2.28' -+ VERSION='2.28.0' - - - cat >>confdefs.h <<_ACEOF -@@ -15212,7 +15212,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 - # report actual input values of CONFIG_FILES etc. instead of their - # values after options handling. - ac_log=" --This file was extended by gas $as_me 2.28, which was -+This file was extended by gas $as_me 2.28.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - CONFIG_FILES = $CONFIG_FILES -@@ -15276,7 +15276,7 @@ Report bugs to the package provider." - _ACEOF - cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 - ac_cs_version="\\ --gas config.status 2.28 -+gas config.status 2.28.0 - configured by $0, generated by GNU Autoconf 2.64, - with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" - -diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi -index 0fa1b58..2efba4b 100644 ---- a/gas/doc/c-riscv.texi -+++ b/gas/doc/c-riscv.texi -@@ -26,6 +26,14 @@ The following table lists all availiable RISC-V specific options - @c man begin OPTIONS - @table @gcctabopt - -+@cindex @samp{-fpic} option, RISC-V -+@item -fpic -+Generate position-independent code -+ -+@cindex @samp{-fno-pic} option, RISC-V -+@item -fno-pic -+Don't generate position-independent code (default) -+ - @cindex @samp{-march=ISA} option, RISC-V - @item -march=ISA - Select the base isa, as specified by ISA. For example -march=rv32ima. -diff --git a/gas/testsuite/gas/ppc/altivec2.d b/gas/testsuite/gas/ppc/altivec2.d -index fc10fb5..26f9afa 100644 ---- a/gas/testsuite/gas/ppc/altivec2.d -+++ b/gas/testsuite/gas/ppc/altivec2.d -@@ -1,5 +1,5 @@ --#as: -maltivec --#objdump: -dr -Maltivec -+#as: -mpower8 -+#objdump: -dr -Mpower8 - #name: Altivec ISA 2.07 instructions - - .* -diff --git a/gas/testsuite/gas/ppc/power9.d b/gas/testsuite/gas/ppc/power9.d -index 9ba53d0..a67898f 100644 ---- a/gas/testsuite/gas/ppc/power9.d -+++ b/gas/testsuite/gas/ppc/power9.d -@@ -312,8 +312,9 @@ Disassembly of section \.text: - .*: (f1 31 9d 6f|6f 9d 31 f1) xscvdphp vs41,vs51 - .*: (f1 58 a7 6f|6f a7 58 f1) xvcvhpsp vs42,vs52 - .*: (f1 79 af 6f|6f af 79 f1) xvcvsphp vs43,vs53 --.*: (4c 60 00 04|04 00 60 4c) addpcis r3,0 --.*: (4c 60 00 04|04 00 60 4c) addpcis r3,0 -+.*: (4c 60 00 04|04 00 60 4c) lnia r3 -+.*: (4c 60 00 04|04 00 60 4c) lnia r3 -+.*: (4c 60 00 04|04 00 60 4c) lnia r3 - .*: (4c 80 00 05|05 00 80 4c) addpcis r4,1 - .*: (4c 80 00 05|05 00 80 4c) addpcis r4,1 - .*: (4c bf ff c4|c4 ff bf 4c) addpcis r5,-2 -diff --git a/gas/testsuite/gas/ppc/power9.s b/gas/testsuite/gas/ppc/power9.s -index 27f1122..4e3530f 100644 ---- a/gas/testsuite/gas/ppc/power9.s -+++ b/gas/testsuite/gas/ppc/power9.s -@@ -303,6 +303,7 @@ power9: - xscvdphp 41,51 - xvcvhpsp 42,52 - xvcvsphp 43,53 -+ lnia 3 - addpcis 3,0 - subpcis 3,0 - addpcis 4,1 -diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp -index 86db455..55367ad 100644 ---- a/gas/testsuite/gas/ppc/ppc.exp -+++ b/gas/testsuite/gas/ppc/ppc.exp -@@ -50,6 +50,7 @@ if { [istarget powerpc*-*-*] } then { - run_dump_test "common" - run_dump_test "476" - run_dump_test "a2" -+ run_dump_test "pr21303" - if { ![istarget powerpc*le-*-*] } then { - run_dump_test "vle" - run_dump_test "vle-reloc" -diff --git a/gas/testsuite/gas/ppc/pr21303.d b/gas/testsuite/gas/ppc/pr21303.d -new file mode 100644 -index 0000000..64761a4 ---- /dev/null -+++ b/gas/testsuite/gas/ppc/pr21303.d -@@ -0,0 +1,12 @@ -+#objdump: -d -Me200z4 -+#as: -a32 -mbig -me200z4 -+ -+.* -+ -+Disassembly of section \.text: -+ -+0+ <\.text>: -+ 0: 70 00 00 00 e_li r0,0 -+ 4: 7c 01 14 04 lbdcbx r0,r1,r2 -+ 8: 7c 01 14 44 lhdcbx r0,r1,r2 -+ c: 7c 01 14 84 lwdcbx r0,r1,r2 -diff --git a/gas/testsuite/gas/ppc/pr21303.s b/gas/testsuite/gas/ppc/pr21303.s -new file mode 100644 -index 0000000..890ba94 ---- /dev/null -+++ b/gas/testsuite/gas/ppc/pr21303.s -@@ -0,0 +1,5 @@ -+ .text -+ e_li 0, 0 -+ lbdcbx 0, 1, 2 -+ lhdcbx 0, 1, 2 -+ lwdcbx 0, 1, 2 -diff --git a/gprof/ChangeLog b/gprof/ChangeLog -index cc57e0d8..0c25d51 100644 ---- a/gprof/ChangeLog -+++ b/gprof/ChangeLog -@@ -2,6 +2,10 @@ - - * configure: Regenerate. - -+2017-03-02 Tristan Gingold -+ -+ * configure: Regenerate. -+ - 2017-01-02 Alan Modra - - Update year range in copyright notice of all files. -diff --git a/gprof/configure b/gprof/configure -index 43e0dac..9e6b8f3 100755 ---- a/gprof/configure -+++ b/gprof/configure -@@ -1,6 +1,6 @@ - #! /bin/sh - # Guess values for system-dependent variables and create Makefiles. --# Generated by GNU Autoconf 2.64 for gprof 2.28. -+# Generated by GNU Autoconf 2.64 for gprof 2.28.0. - # - # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, - # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software -@@ -556,8 +556,8 @@ MAKEFLAGS= - # Identity of this package. - PACKAGE_NAME='gprof' - PACKAGE_TARNAME='gprof' --PACKAGE_VERSION='2.28' --PACKAGE_STRING='gprof 2.28' -+PACKAGE_VERSION='2.28.0' -+PACKAGE_STRING='gprof 2.28.0' - PACKAGE_BUGREPORT='' - PACKAGE_URL='' - -@@ -1302,7 +1302,7 @@ if test "$ac_init_help" = "long"; then - # Omit some internal or obsolete options to make the list less imposing. - # This message is too long to be a string in the A/UX 3.1 sh. - cat <<_ACEOF --\`configure' configures gprof 2.28 to adapt to many kinds of systems. -+\`configure' configures gprof 2.28.0 to adapt to many kinds of systems. - - Usage: $0 [OPTION]... [VAR=VALUE]... - -@@ -1373,7 +1373,7 @@ fi - - if test -n "$ac_init_help"; then - case $ac_init_help in -- short | recursive ) echo "Configuration of gprof 2.28:";; -+ short | recursive ) echo "Configuration of gprof 2.28.0:";; - esac - cat <<\_ACEOF - -@@ -1479,7 +1479,7 @@ fi - test -n "$ac_init_help" && exit $ac_status - if $ac_init_version; then - cat <<\_ACEOF --gprof configure 2.28 -+gprof configure 2.28.0 - generated by GNU Autoconf 2.64 - - Copyright (C) 2009 Free Software Foundation, Inc. -@@ -1844,7 +1844,7 @@ cat >config.log <<_ACEOF - This file contains any messages produced by compilers while - running configure, to aid debugging if configure makes a mistake. - --It was created by gprof $as_me 2.28, which was -+It was created by gprof $as_me 2.28.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - $ $0 $@ -@@ -3653,7 +3653,7 @@ fi - - # Define the identity of the package. - PACKAGE='gprof' -- VERSION='2.28' -+ VERSION='2.28.0' - - - cat >>confdefs.h <<_ACEOF -@@ -12787,7 +12787,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 - # report actual input values of CONFIG_FILES etc. instead of their - # values after options handling. - ac_log=" --This file was extended by gprof $as_me 2.28, which was -+This file was extended by gprof $as_me 2.28.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - CONFIG_FILES = $CONFIG_FILES -@@ -12851,7 +12851,7 @@ Report bugs to the package provider." - _ACEOF - cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 - ac_cs_version="\\ --gprof config.status 2.28 -+gprof config.status 2.28.0 - configured by $0, generated by GNU Autoconf 2.64, - with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" - -diff --git a/include/ChangeLog b/include/ChangeLog -index af39f33..9dd5f75 100644 ---- a/include/ChangeLog -+++ b/include/ChangeLog -@@ -1,3 +1,11 @@ -+2017-03-21 Andreas Krebbel -+ -+ Backport from mainline -+ 2017-03-21 Andreas Krebbel -+ -+ * opcode/s390.h (S390_INSTR_FLAG_VX2): Remove. -+ (S390_INSTR_FLAG_FACILITY_MASK): Adjust value. -+ - 2017-02-28 Alan Modra - - * elf/ppc64.h (R_PPC64_16DX_HA): New. Expand fake reloc comment. -diff --git a/include/opcode/s390.h b/include/opcode/s390.h -index 7ce5616..2e07664 100644 ---- a/include/opcode/s390.h -+++ b/include/opcode/s390.h -@@ -51,8 +51,7 @@ enum s390_opcode_cpu_val - - #define S390_INSTR_FLAG_HTM 0x2 - #define S390_INSTR_FLAG_VX 0x4 --#define S390_INSTR_FLAG_VX2 0x8 --#define S390_INSTR_FLAG_FACILITY_MASK 0xe -+#define S390_INSTR_FLAG_FACILITY_MASK 0x6 - - /* The opcode table is an array of struct s390_opcode. */ - -diff --git a/ld/ChangeLog b/ld/ChangeLog -index ba7d1d4..f4fda0c 100644 ---- a/ld/ChangeLog -+++ b/ld/ChangeLog -@@ -1,3 +1,12 @@ -+2017-03-07 Alan Modra -+ -+ * ldlang.c (open_input_bfds): Check that lang_assignment_statement -+ is not an assert before referencing defsym. -+ -+2017-03-02 Tristan Gingold -+ -+ * configure: Regenerate. -+ - 2017-03-02 Tristan Gingold - - * configure: Regenerate. -diff --git a/ld/configure b/ld/configure -index 36af969..a16c6db 100755 ---- a/ld/configure -+++ b/ld/configure -@@ -1,6 +1,6 @@ - #! /bin/sh - # Guess values for system-dependent variables and create Makefiles. --# Generated by GNU Autoconf 2.64 for ld 2.28. -+# Generated by GNU Autoconf 2.64 for ld 2.28.0. - # - # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, - # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software -@@ -556,8 +556,8 @@ MAKEFLAGS= - # Identity of this package. - PACKAGE_NAME='ld' - PACKAGE_TARNAME='ld' --PACKAGE_VERSION='2.28' --PACKAGE_STRING='ld 2.28' -+PACKAGE_VERSION='2.28.0' -+PACKAGE_STRING='ld 2.28.0' - PACKAGE_BUGREPORT='' - PACKAGE_URL='' - -@@ -1354,7 +1354,7 @@ if test "$ac_init_help" = "long"; then - # Omit some internal or obsolete options to make the list less imposing. - # This message is too long to be a string in the A/UX 3.1 sh. - cat <<_ACEOF --\`configure' configures ld 2.28 to adapt to many kinds of systems. -+\`configure' configures ld 2.28.0 to adapt to many kinds of systems. - - Usage: $0 [OPTION]... [VAR=VALUE]... - -@@ -1425,7 +1425,7 @@ fi - - if test -n "$ac_init_help"; then - case $ac_init_help in -- short | recursive ) echo "Configuration of ld 2.28:";; -+ short | recursive ) echo "Configuration of ld 2.28.0:";; - esac - cat <<\_ACEOF - -@@ -1550,7 +1550,7 @@ fi - test -n "$ac_init_help" && exit $ac_status - if $ac_init_version; then - cat <<\_ACEOF --ld configure 2.28 -+ld configure 2.28.0 - generated by GNU Autoconf 2.64 - - Copyright (C) 2009 Free Software Foundation, Inc. -@@ -2259,7 +2259,7 @@ cat >config.log <<_ACEOF - This file contains any messages produced by compilers while - running configure, to aid debugging if configure makes a mistake. - --It was created by ld $as_me 2.28, which was -+It was created by ld $as_me 2.28.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - $ $0 $@ -@@ -4069,7 +4069,7 @@ fi - - # Define the identity of the package. - PACKAGE='ld' -- VERSION='2.28' -+ VERSION='2.28.0' - - - cat >>confdefs.h <<_ACEOF -@@ -17813,7 +17813,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 - # report actual input values of CONFIG_FILES etc. instead of their - # values after options handling. - ac_log=" --This file was extended by ld $as_me 2.28, which was -+This file was extended by ld $as_me 2.28.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - CONFIG_FILES = $CONFIG_FILES -@@ -17877,7 +17877,7 @@ Report bugs to the package provider." - _ACEOF - cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 - ac_cs_version="\\ --ld config.status 2.28 -+ld config.status 2.28.0 - configured by $0, generated by GNU Autoconf 2.64, - with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" - -diff --git a/ld/ldlang.c b/ld/ldlang.c -index dafc348..54f160c 100644 ---- a/ld/ldlang.c -+++ b/ld/ldlang.c -@@ -3377,7 +3377,8 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode) - #endif - break; - case lang_assignment_statement_enum: -- if (s->assignment_statement.exp->assign.defsym) -+ if (s->assignment_statement.exp->type.node_class != etree_assert -+ && s->assignment_statement.exp->assign.defsym) - /* This is from a --defsym on the command line. */ - exp_fold_tree_no_dot (s->assignment_statement.exp); - break; -diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog -index 7f01e54..0517fd9 100644 ---- a/opcodes/ChangeLog -+++ b/opcodes/ChangeLog -@@ -1,3 +1,61 @@ -+2017-03-14 Kito Cheng -+ -+ * riscv-opc.c (riscv_opcodes> : Use the 'o' immediate encoding. -+ : Likewise. -+ Likewise. -+ -+2017-03-14 Kito Cheng -+ -+ * riscv-opc.c (riscv_opcodes) : Use match_opcode. -+ -+2017-03-13 Andrew Waterman -+ -+ * riscv-opc.c (riscv_opcodes) : Use match_opcode. -+ Likewise. -+ Likewise. -+ Likewise. -+ -+2017-03-27 Alan Modra -+ -+ PR 21303 -+ * ppc-dis.c (struct ppc_mopt): Comment. -+ (ppc_opts ): Move PPC_OPCODE_VLE from .sticky to .cpu. -+ -+2017-03-21 Andreas Krebbel -+ -+ Backport from mainline -+ 2017-03-21 Andreas Krebbel -+ -+ * s390-mkopc.c (main): Remove vx2 check. -+ * s390-opc.txt: Remove vx2 instruction flags. -+ -+2017-03-08 Peter Bergner -+ -+ * ppc-dis.c (ppc_opts) : Do not use PPC_OPCODE_ALTIVEC2; -+ : Do not use PPC_OPCODE_VSX3; -+ -+2017-03-08 Peter Bergner -+ -+ Apply from master. -+ 2017-03-08 Peter Bergner -+ * ppc-opc.c (powerpc_opcodes) : New extended mnemonic. -+ -+2017-03-07 Alan Modra -+ -+ Apply from master -+ 2017-03-06 Alan Modra -+ PR 21124 -+ * ppc-opc.c (extract_esync, extract_ls, extract_ral, extract_ram) -+ (extract_raq, extract_ras, extract_rbx): New functions. -+ (powerpc_operands): Use opposite corresponding insert function. -+ (Q_MASK): Define. -+ (powerpc_opcodes): Apply Q_MASK to all quad insns with even -+ register restriction. -+ -+2017-03-02 Tristan Gingold -+ -+ * configure: Regenerate. -+ - 2017-03-02 Tristan Gingold - - * configure: Regenerate. -diff --git a/opcodes/configure b/opcodes/configure -index be87eb2..0b352a4 100755 ---- a/opcodes/configure -+++ b/opcodes/configure -@@ -1,6 +1,6 @@ - #! /bin/sh - # Guess values for system-dependent variables and create Makefiles. --# Generated by GNU Autoconf 2.64 for opcodes 2.28. -+# Generated by GNU Autoconf 2.64 for opcodes 2.28.0. - # - # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, - # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software -@@ -556,8 +556,8 @@ MAKEFLAGS= - # Identity of this package. - PACKAGE_NAME='opcodes' - PACKAGE_TARNAME='opcodes' --PACKAGE_VERSION='2.28' --PACKAGE_STRING='opcodes 2.28' -+PACKAGE_VERSION='2.28.0' -+PACKAGE_STRING='opcodes 2.28.0' - PACKAGE_BUGREPORT='' - PACKAGE_URL='' - -@@ -1322,7 +1322,7 @@ if test "$ac_init_help" = "long"; then - # Omit some internal or obsolete options to make the list less imposing. - # This message is too long to be a string in the A/UX 3.1 sh. - cat <<_ACEOF --\`configure' configures opcodes 2.28 to adapt to many kinds of systems. -+\`configure' configures opcodes 2.28.0 to adapt to many kinds of systems. - - Usage: $0 [OPTION]... [VAR=VALUE]... - -@@ -1393,7 +1393,7 @@ fi - - if test -n "$ac_init_help"; then - case $ac_init_help in -- short | recursive ) echo "Configuration of opcodes 2.28:";; -+ short | recursive ) echo "Configuration of opcodes 2.28.0:";; - esac - cat <<\_ACEOF - -@@ -1500,7 +1500,7 @@ fi - test -n "$ac_init_help" && exit $ac_status - if $ac_init_version; then - cat <<\_ACEOF --opcodes configure 2.28 -+opcodes configure 2.28.0 - generated by GNU Autoconf 2.64 - - Copyright (C) 2009 Free Software Foundation, Inc. -@@ -1910,7 +1910,7 @@ cat >config.log <<_ACEOF - This file contains any messages produced by compilers while - running configure, to aid debugging if configure makes a mistake. - --It was created by opcodes $as_me 2.28, which was -+It was created by opcodes $as_me 2.28.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - $ $0 $@ -@@ -3719,7 +3719,7 @@ fi - - # Define the identity of the package. - PACKAGE='opcodes' -- VERSION='2.28' -+ VERSION='2.28.0' - - - cat >>confdefs.h <<_ACEOF -@@ -13305,7 +13305,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 - # report actual input values of CONFIG_FILES etc. instead of their - # values after options handling. - ac_log=" --This file was extended by opcodes $as_me 2.28, which was -+This file was extended by opcodes $as_me 2.28.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - CONFIG_FILES = $CONFIG_FILES -@@ -13369,7 +13369,7 @@ Report bugs to the package provider." - _ACEOF - cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 - ac_cs_version="\\ --opcodes config.status 2.28 -+opcodes config.status 2.28.0 - configured by $0, generated by GNU Autoconf 2.64, - with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" - -diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c -index e0eff7a..baa7388 100644 ---- a/opcodes/ppc-dis.c -+++ b/opcodes/ppc-dis.c -@@ -45,8 +45,19 @@ struct dis_private - (((struct dis_private *) ((INFO)->private_data))->dialect) - - struct ppc_mopt { -+ /* Option string, without -m or -M prefix. */ - const char *opt; -+ /* CPU option flags. */ - ppc_cpu_t cpu; -+ /* Flags that should stay on, even when combined with another cpu -+ option. This should only be used for generic options like -+ "-many" or "-maltivec" where it is reasonable to add some -+ capability to another cpu selection. The added flags are sticky -+ so that, for example, "-many -me500" and "-me500 -many" result in -+ the same assembler or disassembler behaviour. Do not use -+ "sticky" for specific cpus, as this will prevent that cpu's flags -+ from overriding the defaults set in powerpc_init_dialect or a -+ prior -m option. */ - ppc_cpu_t sticky; - }; - -@@ -93,7 +104,7 @@ struct ppc_mopt ppc_opts[] = { - | PPC_OPCODE_A2), - 0 }, - { "altivec", PPC_OPCODE_PPC, -- PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 }, -+ PPC_OPCODE_ALTIVEC }, - { "any", 0, - PPC_OPCODE_ANY }, - { "booke", PPC_OPCODE_PPC | PPC_OPCODE_BOOKE, -@@ -108,8 +119,8 @@ struct ppc_mopt ppc_opts[] = { - { "e200z4", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE| PPC_OPCODE_SPE - | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK - | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI -- | PPC_OPCODE_E500 | PPC_OPCODE_E200Z4), -- PPC_OPCODE_VLE }, -+ | PPC_OPCODE_E500 | PPC_OPCODE_VLE | PPC_OPCODE_E200Z4), -+ 0 }, - { "e300", PPC_OPCODE_PPC | PPC_OPCODE_E300, - 0 }, - { "e500", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE -@@ -221,7 +232,7 @@ struct ppc_mopt ppc_opts[] = { - | PPC_OPCODE_E500), - PPC_OPCODE_VLE }, - { "vsx", PPC_OPCODE_PPC, -- PPC_OPCODE_VSX | PPC_OPCODE_VSX3 }, -+ PPC_OPCODE_VSX }, - { "htm", PPC_OPCODE_PPC, - PPC_OPCODE_HTM }, - }; -diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c -index 9ac779c..f7d1dcd 100644 ---- a/opcodes/ppc-opc.c -+++ b/opcodes/ppc-opc.c -@@ -54,6 +54,7 @@ static long extract_bo (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_boe (unsigned long, long, ppc_cpu_t, const char **); - static long extract_boe (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_esync (unsigned long, long, ppc_cpu_t, const char **); -+static long extract_esync (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_dcmxs (unsigned long, long, ppc_cpu_t, const char **); - static long extract_dcmxs (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_dxd (unsigned long, long, ppc_cpu_t, const char **); -@@ -65,6 +66,7 @@ static long extract_fxm (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_li20 (unsigned long, long, ppc_cpu_t, const char **); - static long extract_li20 (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_ls (unsigned long, long, ppc_cpu_t, const char **); -+static long extract_ls (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_mbe (unsigned long, long, ppc_cpu_t, const char **); - static long extract_mbe (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_mb6 (unsigned long, long, ppc_cpu_t, const char **); -@@ -76,12 +78,17 @@ static long extract_nsi (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_oimm (unsigned long, long, ppc_cpu_t, const char **); - static long extract_oimm (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_ral (unsigned long, long, ppc_cpu_t, const char **); -+static long extract_ral (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_ram (unsigned long, long, ppc_cpu_t, const char **); -+static long extract_ram (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_raq (unsigned long, long, ppc_cpu_t, const char **); -+static long extract_raq (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_ras (unsigned long, long, ppc_cpu_t, const char **); -+static long extract_ras (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_rbs (unsigned long, long, ppc_cpu_t, const char **); - static long extract_rbs (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_rbx (unsigned long, long, ppc_cpu_t, const char **); -+static long extract_rbx (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_rx (unsigned long, long, ppc_cpu_t, const char **); - static long extract_rx (unsigned long, ppc_cpu_t, int *); - static unsigned long insert_ry (unsigned long, long, ppc_cpu_t, const char **); -@@ -462,7 +469,7 @@ const struct powerpc_operand powerpc_operands[] = - /* The LS or WC field in an X (sync or wait) form instruction. */ - #define LS LIA + 1 - #define WC LS -- { 0x3, 21, insert_ls, NULL, PPC_OPERAND_OPTIONAL }, -+ { 0x3, 21, insert_ls, extract_ls, PPC_OPERAND_OPTIONAL }, - - /* The ME field in an M form instruction. */ - #define ME LS + 1 -@@ -519,24 +526,24 @@ const struct powerpc_operand powerpc_operands[] = - value restrictions. */ - #define RAQ RA0 + 1 - #define RAX RAQ -- { 0x1f, 16, insert_raq, NULL, PPC_OPERAND_GPR_0 }, -+ { 0x1f, 16, insert_raq, extract_raq, PPC_OPERAND_GPR_0 }, - - /* The RA field in a D or X form instruction which is an updating - load, which means that the RA field may not be zero and may not - equal the RT field. */ - #define RAL RAQ + 1 -- { 0x1f, 16, insert_ral, NULL, PPC_OPERAND_GPR_0 }, -+ { 0x1f, 16, insert_ral, extract_ral, PPC_OPERAND_GPR_0 }, - - /* The RA field in an lmw instruction, which has special value - restrictions. */ - #define RAM RAL + 1 -- { 0x1f, 16, insert_ram, NULL, PPC_OPERAND_GPR_0 }, -+ { 0x1f, 16, insert_ram, extract_ram, PPC_OPERAND_GPR_0 }, - - /* The RA field in a D or X form instruction which is an updating - store or an updating floating point load, which means that the RA - field may not be zero. */ - #define RAS RAM + 1 -- { 0x1f, 16, insert_ras, NULL, PPC_OPERAND_GPR_0 }, -+ { 0x1f, 16, insert_ras, extract_ras, PPC_OPERAND_GPR_0 }, - - /* The RA field of the tlbwe, dccci and iccci instructions, - which are optional. */ -@@ -557,7 +564,7 @@ const struct powerpc_operand powerpc_operands[] = - /* The RB field in an lswx instruction, which has special value - restrictions. */ - #define RBX RBS + 1 -- { 0x1f, 11, insert_rbx, NULL, PPC_OPERAND_GPR }, -+ { 0x1f, 11, insert_rbx, extract_rbx, PPC_OPERAND_GPR }, - - /* The RB field of the dccci and iccci instructions, which are optional. */ - #define RBOPT RBX + 1 -@@ -580,6 +587,7 @@ const struct powerpc_operand powerpc_operands[] = - which have special value restrictions. */ - #define RSQ RS + 1 - #define RTQ RSQ -+#define Q_MASK (1 << 21) - { 0x1e, 21, NULL, NULL, PPC_OPERAND_GPR }, - - /* The RS field of the tlbwe instruction, which is optional. */ -@@ -694,7 +702,7 @@ const struct powerpc_operand powerpc_operands[] = - - /* The ESYNC field in an X (sync) form instruction. */ - #define ESYNC STRM + 1 -- { 0xf, 16, insert_esync, NULL, PPC_OPERAND_OPTIONAL }, -+ { 0xf, 16, insert_esync, extract_esync, PPC_OPERAND_OPTIONAL }, - - /* The SV field in a POWER SC form instruction. */ - #define SV ESYNC + 1 -@@ -1533,6 +1541,22 @@ insert_ls (unsigned long insn, - return insn | ((value & 0x3) << 21); - } - -+static long -+extract_ls (unsigned long insn, -+ ppc_cpu_t dialect, -+ int *invalid) -+{ -+ unsigned long lvalue = (insn >> 21) & 3; -+ -+ if (((insn >> 1) & 0x3ff) == 598) -+ { -+ unsigned long max_lvalue = (dialect & PPC_OPCODE_POWER4) ? 2 : 1; -+ if (lvalue > max_lvalue) -+ *invalid = 1; -+ } -+ return lvalue; -+} -+ - /* The 4-bit E field in a sync instruction that accepts 2 operands. - If ESYNC is non-zero, then the L field must be either 0 or 1 and - the complement of ESYNC-bit2. */ -@@ -1560,6 +1584,27 @@ insert_esync (unsigned long insn, - return insn | ((value & 0xf) << 16); - } - -+static long -+extract_esync (unsigned long insn, -+ ppc_cpu_t dialect, -+ int *invalid) -+{ -+ unsigned long ls = (insn >> 21) & 0x3; -+ unsigned long lvalue = (insn >> 16) & 0xf; -+ -+ if (lvalue == 0) -+ { -+ if (((dialect & PPC_OPCODE_E6500) != 0 && ls > 1) -+ || ((dialect & PPC_OPCODE_POWER9) != 0 && ls > 2)) -+ *invalid = 1; -+ } -+ else if ((ls & ~0x1) -+ || (((lvalue >> 1) & 0x1) ^ ls) == 0) -+ *invalid = 1; -+ -+ return lvalue; -+} -+ - /* The MB and ME fields in an M form instruction expressed as a single - operand which is itself a bitmask. The extraction function always - marks it as invalid, since we never want to recognize an -@@ -1743,6 +1788,19 @@ insert_ral (unsigned long insn, - return insn | ((value & 0x1f) << 16); - } - -+static long -+extract_ral (unsigned long insn, -+ ppc_cpu_t dialect ATTRIBUTE_UNUSED, -+ int *invalid) -+{ -+ long rtvalue = (insn >> 21) & 0x1f; -+ long ravalue = (insn >> 16) & 0x1f; -+ -+ if (rtvalue == ravalue || ravalue == 0) -+ *invalid = 1; -+ return ravalue; -+} -+ - /* The RA field in an lmw instruction, which has special value - restrictions. */ - -@@ -1757,6 +1815,19 @@ insert_ram (unsigned long insn, - return insn | ((value & 0x1f) << 16); - } - -+static long -+extract_ram (unsigned long insn, -+ ppc_cpu_t dialect ATTRIBUTE_UNUSED, -+ int *invalid) -+{ -+ unsigned long rtvalue = (insn >> 21) & 0x1f; -+ unsigned long ravalue = (insn >> 16) & 0x1f; -+ -+ if (ravalue >= rtvalue) -+ *invalid = 1; -+ return ravalue; -+} -+ - /* The RA field in the DQ form lq or an lswx instruction, which have special - value restrictions. */ - -@@ -1773,6 +1844,19 @@ insert_raq (unsigned long insn, - return insn | ((value & 0x1f) << 16); - } - -+static long -+extract_raq (unsigned long insn, -+ ppc_cpu_t dialect ATTRIBUTE_UNUSED, -+ int *invalid) -+{ -+ unsigned long rtvalue = (insn >> 21) & 0x1f; -+ unsigned long ravalue = (insn >> 16) & 0x1f; -+ -+ if (ravalue == rtvalue) -+ *invalid = 1; -+ return ravalue; -+} -+ - /* The RA field in a D or X form instruction which is an updating - store or an updating floating point load, which means that the RA - field may not be zero. */ -@@ -1788,6 +1872,18 @@ insert_ras (unsigned long insn, - return insn | ((value & 0x1f) << 16); - } - -+static long -+extract_ras (unsigned long insn, -+ ppc_cpu_t dialect ATTRIBUTE_UNUSED, -+ int *invalid) -+{ -+ unsigned long ravalue = (insn >> 16) & 0x1f; -+ -+ if (ravalue == 0) -+ *invalid = 1; -+ return ravalue; -+} -+ - /* The RB field in an X form instruction when it must be the same as - the RS field in the instruction. This is used for extended - mnemonics like mr. This operand is marked FAKE. The insertion -@@ -1829,6 +1925,19 @@ insert_rbx (unsigned long insn, - return insn | ((value & 0x1f) << 11); - } - -+static long -+extract_rbx (unsigned long insn, -+ ppc_cpu_t dialect ATTRIBUTE_UNUSED, -+ int *invalid) -+{ -+ unsigned long rtvalue = (insn >> 21) & 0x1f; -+ unsigned long rbvalue = (insn >> 11) & 0x1f; -+ -+ if (rbvalue == rtvalue) -+ *invalid = 1; -+ return rbvalue; -+} -+ - /* The SCI8 field is made up of SCL and {U,N}I8 fields. */ - static unsigned long - insert_sci8 (unsigned long insn, -@@ -2443,6 +2552,8 @@ extract_vleil (unsigned long insn, - /* An DX form instruction. */ - #define DX(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) - #define DX_MASK DX (0x3f, 0x1f) -+/* An DX form instruction with the D bits specified. */ -+#define NODX_MASK (DX_MASK | 0x1fffc1) - - /* An EVSEL form instruction. */ - #define EVSEL(op, xop) (OP (op) | (((unsigned long)(xop)) & 0xff) << 3) -@@ -4155,6 +4266,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { - - {"mcrf", XL(19,0), XLBB_MASK|(3<<21)|(3<<16), COM, PPCVLE, {BF, BFA}}, - -+{"lnia", DX(19,2), NODX_MASK, POWER9, PPCVLE, {RT}}, - {"addpcis", DX(19,2), DX_MASK, POWER9, PPCVLE, {RT, DXD}}, - {"subpcis", DX(19,2), DX_MASK, POWER9, PPCVLE, {RT, NDXD}}, - -@@ -4974,7 +5086,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { - - {"stdux", X(31,181), X_MASK, PPC64, 0, {RS, RAS, RB}}, - --{"stqcx.", XRC(31,182,1), X_MASK, POWER8, 0, {RSQ, RA0, RB}}, -+{"stqcx.", XRC(31,182,1), X_MASK|Q_MASK, POWER8, 0, {RSQ, RA0, RB}}, - {"wchkall", X(31,182), X_MASK, PPCA2, 0, {OBF}}, - - {"stwux", X(31,183), X_MASK, PPCCOM, 0, {RS, RAS, RB}}, -@@ -5105,7 +5217,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { - - {"mfapidi", X(31,275), X_MASK, BOOKE, E500|TITAN, {RT, RA}}, - --{"lqarx", X(31,276), XEH_MASK, POWER8, 0, {RTQ, RAX, RBX, EH}}, -+{"lqarx", X(31,276), XEH_MASK|Q_MASK, POWER8, 0, {RTQ, RAX, RBX, EH}}, - - {"lscbx", XRC(31,277,0), X_MASK, M601, 0, {RT, RA, RB}}, - {"lscbx.", XRC(31,277,1), X_MASK, M601, 0, {RT, RA, RB}}, -@@ -6052,7 +6164,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { - - {"lhbrx", X(31,790), X_MASK, COM, 0, {RT, RA0, RB}}, - --{"lfdpx", X(31,791), X_MASK, POWER6, POWER7, {FRTp, RA0, RB}}, -+{"lfdpx", X(31,791), X_MASK|Q_MASK, POWER6, POWER7, {FRTp, RA0, RB}}, - {"lfqx", X(31,791), X_MASK, POWER2, 0, {FRT, RA, RB}}, - - {"sraw", XRC(31,792,0), X_MASK, PPCCOM, 0, {RA, RS, RB}}, -@@ -6167,7 +6279,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { - - {"sthbrx", X(31,918), X_MASK, COM, 0, {RS, RA0, RB}}, - --{"stfdpx", X(31,919), X_MASK, POWER6, POWER7, {FRSp, RA0, RB}}, -+{"stfdpx", X(31,919), X_MASK|Q_MASK, POWER6, POWER7, {FRSp, RA0, RB}}, - {"stfqx", X(31,919), X_MASK, POWER2, 0, {FRS, RA0, RB}}, - - {"sraq", XRC(31,920,0), X_MASK, M601, 0, {RA, RS, RB}}, -@@ -6345,13 +6457,13 @@ const struct powerpc_opcode powerpc_opcodes[] = { - - {"stfdu", OP(55), OP_MASK, COM, PPCEFS|PPCVLE, {FRS, D, RAS}}, - --{"lq", OP(56), OP_MASK, POWER4, PPC476|PPCVLE, {RTQ, DQ, RAQ}}, -+{"lq", OP(56), OP_MASK|Q_MASK, POWER4, PPC476|PPCVLE, {RTQ, DQ, RAQ}}, - {"psq_l", OP(56), OP_MASK, PPCPS, PPCVLE, {FRT,PSD,RA,PSW,PSQ}}, - {"lfq", OP(56), OP_MASK, POWER2, PPCVLE, {FRT, D, RA0}}, - - {"lxsd", DSO(57,2), DS_MASK, PPCVSX3, PPCVLE, {VD, DS, RA0}}, - {"lxssp", DSO(57,3), DS_MASK, PPCVSX3, PPCVLE, {VD, DS, RA0}}, --{"lfdp", OP(57), OP_MASK, POWER6, POWER7|PPCVLE, {FRTp, DS, RA0}}, -+{"lfdp", OP(57), OP_MASK|Q_MASK, POWER6, POWER7|PPCVLE, {FRTp, DS, RA0}}, - {"psq_lu", OP(57), OP_MASK, PPCPS, PPCVLE, {FRT,PSD,RA,PSW,PSQ}}, - {"lfqu", OP(57), OP_MASK, POWER2, PPCVLE, {FRT, D, RA0}}, - -@@ -6676,21 +6788,21 @@ const struct powerpc_opcode powerpc_opcodes[] = { - {"stxv", DQX(61,5), DQX_MASK, PPCVSX3, PPCVLE, {XSQ6, DQ, RA0}}, - {"stxsd", DSO(61,2), DS_MASK, PPCVSX3, PPCVLE, {VS, DS, RA0}}, - {"stxssp", DSO(61,3), DS_MASK, PPCVSX3, PPCVLE, {VS, DS, RA0}}, --{"stfdp", OP(61), OP_MASK, POWER6, POWER7|PPCVLE, {FRSp, DS, RA0}}, -+{"stfdp", OP(61), OP_MASK|Q_MASK, POWER6, POWER7|PPCVLE, {FRSp, DS, RA0}}, - {"psq_stu", OP(61), OP_MASK, PPCPS, PPCVLE, {FRS,PSD,RA,PSW,PSQ}}, - {"stfqu", OP(61), OP_MASK, POWER2, PPCVLE, {FRS, D, RA}}, - - {"std", DSO(62,0), DS_MASK, PPC64, PPCVLE, {RS, DS, RA0}}, - {"stdu", DSO(62,1), DS_MASK, PPC64, PPCVLE, {RS, DS, RAS}}, --{"stq", DSO(62,2), DS_MASK, POWER4, PPC476|PPCVLE, {RSQ, DS, RA0}}, -+{"stq", DSO(62,2), DS_MASK|Q_MASK, POWER4, PPC476|PPCVLE, {RSQ, DS, RA0}}, - - {"fcmpu", X(63,0), XBF_MASK, COM, PPCEFS|PPCVLE, {BF, FRA, FRB}}, - --{"daddq", XRC(63,2,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, --{"daddq.", XRC(63,2,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, -+{"daddq", XRC(63,2,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, -+{"daddq.", XRC(63,2,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, - --{"dquaq", ZRC(63,3,0), Z2_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp, RMC}}, --{"dquaq.", ZRC(63,3,1), Z2_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp, RMC}}, -+{"dquaq", ZRC(63,3,0), Z2_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp, RMC}}, -+{"dquaq.", ZRC(63,3,1), Z2_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp, RMC}}, - - {"xsaddqp", XRC(63,4,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, - {"xsaddqpo", XRC(63,4,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, -@@ -6772,11 +6884,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { - - {"fcmpo", X(63,32), XBF_MASK, COM, PPCEFS|PPCVLE, {BF, FRA, FRB}}, - --{"dmulq", XRC(63,34,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, --{"dmulq.", XRC(63,34,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, -+{"dmulq", XRC(63,34,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, -+{"dmulq.", XRC(63,34,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, - --{"drrndq", ZRC(63,35,0), Z2_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp, RMC}}, --{"drrndq.", ZRC(63,35,1), Z2_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp, RMC}}, -+{"drrndq", ZRC(63,35,0), Z2_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp, RMC}}, -+{"drrndq.", ZRC(63,35,1), Z2_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp, RMC}}, - - {"xsmulqp", XRC(63,36,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, - {"xsmulqpo", XRC(63,36,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, -@@ -6791,11 +6903,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { - - {"mcrfs", X(63,64), XRB_MASK|(3<<21)|(3<<16), COM, PPCVLE, {BF, BFA}}, - --{"dscliq", ZRC(63,66,0), Z_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, --{"dscliq.", ZRC(63,66,1), Z_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, -+{"dscliq", ZRC(63,66,0), Z_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, -+{"dscliq.", ZRC(63,66,1), Z_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, - --{"dquaiq", ZRC(63,67,0), Z2_MASK, POWER6, PPCVLE, {TE, FRTp, FRBp, RMC}}, --{"dquaiq.", ZRC(63,67,1), Z2_MASK, POWER6, PPCVLE, {TE, FRTp, FRBp, RMC}}, -+{"dquaiq", ZRC(63,67,0), Z2_MASK|Q_MASK, POWER6, PPCVLE, {TE, FRTp, FRBp, RMC}}, -+{"dquaiq.", ZRC(63,67,1), Z2_MASK|Q_MASK, POWER6, PPCVLE, {TE, FRTp, FRBp, RMC}}, - - {"mtfsb0", XRC(63,70,0), XRARB_MASK, COM, PPCVLE, {BT}}, - {"mtfsb0.", XRC(63,70,1), XRARB_MASK, COM, PPCVLE, {BT}}, -@@ -6803,11 +6915,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { - {"fmr", XRC(63,72,0), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}}, - {"fmr.", XRC(63,72,1), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}}, - --{"dscriq", ZRC(63,98,0), Z_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, --{"dscriq.", ZRC(63,98,1), Z_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, -+{"dscriq", ZRC(63,98,0), Z_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, -+{"dscriq.", ZRC(63,98,1), Z_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, - --{"drintxq", ZRC(63,99,0), Z2_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, --{"drintxq.", ZRC(63,99,1), Z2_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, -+{"drintxq", ZRC(63,99,0), Z2_MASK|Q_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, -+{"drintxq.", ZRC(63,99,1), Z2_MASK|Q_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, - - {"xscpsgnqp", X(63,100), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, - -@@ -6839,11 +6951,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { - {"dtstdcq", Z(63,194), Z_MASK, POWER6, PPCVLE, {BF, FRAp, DCM}}, - {"dtstdgq", Z(63,226), Z_MASK, POWER6, PPCVLE, {BF, FRAp, DGM}}, - --{"drintnq", ZRC(63,227,0), Z2_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, --{"drintnq.", ZRC(63,227,1), Z2_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, -+{"drintnq", ZRC(63,227,0), Z2_MASK|Q_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, -+{"drintnq.", ZRC(63,227,1), Z2_MASK|Q_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, - --{"dctqpq", XRC(63,258,0), X_MASK, POWER6, PPCVLE, {FRTp, FRB}}, --{"dctqpq.", XRC(63,258,1), X_MASK, POWER6, PPCVLE, {FRTp, FRB}}, -+{"dctqpq", XRC(63,258,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRB}}, -+{"dctqpq.", XRC(63,258,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRB}}, - - {"fabs", XRC(63,264,0), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}}, - {"fabs.", XRC(63,264,1), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}}, -@@ -6851,8 +6963,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { - {"dctfixq", XRC(63,290,0), X_MASK, POWER6, PPCVLE, {FRT, FRBp}}, - {"dctfixq.", XRC(63,290,1), X_MASK, POWER6, PPCVLE, {FRT, FRBp}}, - --{"ddedpdq", XRC(63,322,0), X_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}}, --{"ddedpdq.", XRC(63,322,1), X_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}}, -+{"ddedpdq", XRC(63,322,0), X_MASK|Q_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}}, -+{"ddedpdq.", XRC(63,322,1), X_MASK|Q_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}}, - - {"dxexq", XRC(63,354,0), X_MASK, POWER6, PPCVLE, {FRT, FRBp}}, - {"dxexq.", XRC(63,354,1), X_MASK, POWER6, PPCVLE, {FRT, FRBp}}, -@@ -6881,14 +6993,14 @@ const struct powerpc_opcode powerpc_opcodes[] = { - {"frim", XRC(63,488,0), XRA_MASK, POWER5, PPCVLE, {FRT, FRB}}, - {"frim.", XRC(63,488,1), XRA_MASK, POWER5, PPCVLE, {FRT, FRB}}, - --{"dsubq", XRC(63,514,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, --{"dsubq.", XRC(63,514,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, -+{"dsubq", XRC(63,514,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, -+{"dsubq.", XRC(63,514,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, - - {"xssubqp", XRC(63,516,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, - {"xssubqpo", XRC(63,516,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, - --{"ddivq", XRC(63,546,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, --{"ddivq.", XRC(63,546,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, -+{"ddivq", XRC(63,546,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, -+{"ddivq.", XRC(63,546,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, - - {"xsdivqp", XRC(63,548,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, - {"xsdivqpo", XRC(63,548,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, -@@ -6917,11 +7029,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { - {"mtfsf.", XFL(63,711,1), XFL_MASK, POWER6|PPCA2|PPC476, PPCVLE, {FLM, FRB, XFL_L, W}}, - {"mtfsf.", XFL(63,711,1), XFL_MASK, COM, POWER6|PPCA2|PPC476|PPCEFS|PPCVLE, {FLM, FRB}}, - --{"drdpq", XRC(63,770,0), X_MASK, POWER6, PPCVLE, {FRTp, FRBp}}, --{"drdpq.", XRC(63,770,1), X_MASK, POWER6, PPCVLE, {FRTp, FRBp}}, -+{"drdpq", XRC(63,770,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRBp}}, -+{"drdpq.", XRC(63,770,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRBp}}, - --{"dcffixq", XRC(63,802,0), X_MASK, POWER6, PPCVLE, {FRTp, FRB}}, --{"dcffixq.", XRC(63,802,1), X_MASK, POWER6, PPCVLE, {FRTp, FRB}}, -+{"dcffixq", XRC(63,802,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRB}}, -+{"dcffixq.", XRC(63,802,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRB}}, - - {"xsabsqp", XVA(63,804,0), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}}, - {"xsxexpqp", XVA(63,804,2), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}}, -@@ -6941,8 +7053,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { - {"fctidz.", XRC(63,815,1), XRA_MASK, PPC64, PPCVLE, {FRT, FRB}}, - {"fctidz.", XRC(63,815,1), XRA_MASK, PPC476, PPCVLE, {FRT, FRB}}, - --{"denbcdq", XRC(63,834,0), X_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}}, --{"denbcdq.", XRC(63,834,1), X_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}}, -+{"denbcdq", XRC(63,834,0), X_MASK|Q_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}}, -+{"denbcdq.", XRC(63,834,1), X_MASK|Q_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}}, - - {"xscvqpuwz", XVA(63,836,1), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}}, - {"xscvudqp", XVA(63,836,2), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}}, -@@ -6961,8 +7073,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { - {"fcfid.", XRC(63,846,1), XRA_MASK, PPC64, PPCVLE, {FRT, FRB}}, - {"fcfid.", XRC(63,846,1), XRA_MASK, PPC476, PPCVLE, {FRT, FRB}}, - --{"diexq", XRC(63,866,0), X_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}}, --{"diexq.", XRC(63,866,1), X_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}}, -+{"diexq", XRC(63,866,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}}, -+{"diexq.", XRC(63,866,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}}, - - {"xsiexpqp", X(63,868), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, - -diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c -index 867a026..2b18a1e 100644 ---- a/opcodes/riscv-opc.c -+++ b/opcodes/riscv-opc.c -@@ -210,14 +210,14 @@ const struct riscv_opcode riscv_opcodes[] = - {"sll", "C", "d,CU,C>", MATCH_C_SLLI, MASK_C_SLLI, match_rd_nonzero, INSN_ALIAS }, - {"sll", "I", "d,s,t", MATCH_SLL, MASK_SLL, match_opcode, 0 }, - {"sll", "I", "d,s,>", MATCH_SLLI, MASK_SLLI, match_opcode, INSN_ALIAS }, --{"srli", "C", "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_rd_nonzero, INSN_ALIAS }, -+{"srli", "C", "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_opcode, INSN_ALIAS }, - {"srli", "I", "d,s,>", MATCH_SRLI, MASK_SRLI, match_opcode, 0 }, --{"srl", "C", "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_rd_nonzero, INSN_ALIAS }, -+{"srl", "C", "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_opcode, INSN_ALIAS }, - {"srl", "I", "d,s,t", MATCH_SRL, MASK_SRL, match_opcode, 0 }, - {"srl", "I", "d,s,>", MATCH_SRLI, MASK_SRLI, match_opcode, INSN_ALIAS }, --{"srai", "C", "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_rd_nonzero, INSN_ALIAS }, -+{"srai", "C", "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_opcode, INSN_ALIAS }, - {"srai", "I", "d,s,>", MATCH_SRAI, MASK_SRAI, match_opcode, 0 }, --{"sra", "C", "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_rd_nonzero, INSN_ALIAS }, -+{"sra", "C", "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_opcode, INSN_ALIAS }, - {"sra", "I", "d,s,t", MATCH_SRA, MASK_SRA, match_opcode, 0 }, - {"sra", "I", "d,s,>", MATCH_SRAI, MASK_SRAI, match_opcode, INSN_ALIAS }, - {"sub", "C", "Cs,Cw,Ct", MATCH_C_SUB, MASK_C_SUB, match_opcode, INSN_ALIAS }, -@@ -562,10 +562,10 @@ const struct riscv_opcode riscv_opcodes[] = - {"c.nop", "C", "", MATCH_C_ADDI, 0xffff, match_opcode, 0 }, - {"c.mv", "C", "d,CV", MATCH_C_MV, MASK_C_MV, match_c_add, 0 }, - {"c.lui", "C", "d,Cu", MATCH_C_LUI, MASK_C_LUI, match_c_lui, 0 }, --{"c.li", "C", "d,Cj", MATCH_C_LI, MASK_C_LI, match_rd_nonzero, 0 }, -+{"c.li", "C", "d,Co", MATCH_C_LI, MASK_C_LI, match_rd_nonzero, 0 }, - {"c.addi4spn","C", "Ct,Cc,CK", MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN, match_opcode, 0 }, - {"c.addi16sp","C", "Cc,CL", MATCH_C_ADDI16SP, MASK_C_ADDI16SP, match_opcode, 0 }, --{"c.addi", "C", "d,Cj", MATCH_C_ADDI, MASK_C_ADDI, match_rd_nonzero, 0 }, -+{"c.addi", "C", "d,Cj", MATCH_C_ADDI, MASK_C_ADDI, match_opcode, 0 }, - {"c.add", "C", "d,CV", MATCH_C_ADD, MASK_C_ADD, match_c_add, 0 }, - {"c.sub", "C", "Cs,Ct", MATCH_C_SUB, MASK_C_SUB, match_opcode, 0 }, - {"c.and", "C", "Cs,Ct", MATCH_C_AND, MASK_C_AND, match_opcode, 0 }, -@@ -574,8 +574,8 @@ const struct riscv_opcode riscv_opcodes[] = - {"c.slli", "C", "d,C>", MATCH_C_SLLI, MASK_C_SLLI, match_rd_nonzero, 0 }, - {"c.srli", "C", "Cs,C>", MATCH_C_SRLI, MASK_C_SRLI, match_opcode, 0 }, - {"c.srai", "C", "Cs,C>", MATCH_C_SRAI, MASK_C_SRAI, match_opcode, 0 }, --{"c.andi", "C", "Cs,Cj", MATCH_C_ANDI, MASK_C_ANDI, match_opcode, 0 }, --{"c.addiw", "64C", "d,Cj", MATCH_C_ADDIW, MASK_C_ADDIW, match_rd_nonzero, 0 }, -+{"c.andi", "C", "Cs,Co", MATCH_C_ANDI, MASK_C_ANDI, match_opcode, 0 }, -+{"c.addiw", "64C", "d,Co", MATCH_C_ADDIW, MASK_C_ADDIW, match_rd_nonzero, 0 }, - {"c.addw", "64C", "Cs,Ct", MATCH_C_ADDW, MASK_C_ADDW, match_opcode, 0 }, - {"c.subw", "64C", "Cs,Ct", MATCH_C_SUBW, MASK_C_SUBW, match_opcode, 0 }, - {"c.ldsp", "64C", "d,Cn(Cc)", MATCH_C_LDSP, MASK_C_LDSP, match_rd_nonzero, 0 }, -diff --git a/opcodes/s390-mkopc.c b/opcodes/s390-mkopc.c -index 8e0b332..68c55a9 100644 ---- a/opcodes/s390-mkopc.c -+++ b/opcodes/s390-mkopc.c -@@ -419,10 +419,6 @@ main (void) - && (str[2] == 0 || str[2] == ',')) { - flag_bits |= S390_INSTR_FLAG_VX; - str += 2; -- } else if (strncmp (str, "vx2", 3) == 0 -- && (str[3] == 0 || str[3] == ',')) { -- flag_bits |= S390_INSTR_FLAG_VX2; -- str += 3; - } else { - fprintf (stderr, "Couldn't parse flags string %s\n", - flags_string); -diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt -index b381587..51a17f3 100644 ---- a/opcodes/s390-opc.txt -+++ b/opcodes/s390-opc.txt -@@ -1685,146 +1685,146 @@ b93c ppno RRE_RR "perform pseudorandom number operation" z13 zarch - # Vector Enhancements Facility 1 - - e70000000085 vbperm VRR_VVV "vector bit permute" arch12 zarch --e70000006004 vllezlf VRX_VRRD "vector load logical word element and zero - left aligned" arch12 zarch vx2 --e700000000b8 vmsl VRR_VVVUU0V "vector multiply sum logical" arch12 zarch vx2 --e700030000b8 vmslg VRR_VVVU0VB "vector multiply sum logical double word" arch12 zarch vx2 --e7000000006c vnx VRR_VVV "vector not exclusive or" arch12 zarch vx2 -+e70000006004 vllezlf VRX_VRRD "vector load logical word element and zero - left aligned" arch12 zarch -+e700000000b8 vmsl VRR_VVVUU0V "vector multiply sum logical" arch12 zarch -+e700030000b8 vmslg VRR_VVVU0VB "vector multiply sum logical double word" arch12 zarch -+e7000000006c vnx VRR_VVV "vector not exclusive or" arch12 zarch - e7000000006e vnn VRR_VVV "vector nand" arch12 zarch --e7000000006f voc VRR_VVV "vector or with complement" arch12 zarch vx2 --e70000000050 vpopctb VRR_VV "vector population count byte" arch12 zarch vx2 --e70000001050 vpopcth VRR_VV "vector population count halfword" arch12 zarch vx2 --e70000002050 vpopctf VRR_VV "vector population count word" arch12 zarch vx2 --e70000003050 vpopctg VRR_VV "vector population count double word" arch12 zarch vx2 --e700000020e3 vfasb VRR_VVV "vector fp add short" arch12 zarch vx2 --e700000820e3 wfasb VRR_VVV "scalar vector fp add scalar short" arch12 zarch vx2 --e700000840e3 wfaxb VRR_VVV "scalar vector fp add scalar extended" arch12 zarch vx2 --e700000020cb wfcsb VRR_VV "scalar vector fp compare scalar short" arch12 zarch vx2 --e700000040cb wfcxb VRR_VV "scalar vector fp compare scalar extended" arch12 zarch vx2 --e700000020ca wfksb VRR_VV "scalar vector fp compare and signal scalar short" arch12 zarch vx2 --e700000040ca wfkxb VRR_VV "scalar vector fp compare and signal scalar extended" arch12 zarch vx2 -+e7000000006f voc VRR_VVV "vector or with complement" arch12 zarch -+e70000000050 vpopctb VRR_VV "vector population count byte" arch12 zarch -+e70000001050 vpopcth VRR_VV "vector population count halfword" arch12 zarch -+e70000002050 vpopctf VRR_VV "vector population count word" arch12 zarch -+e70000003050 vpopctg VRR_VV "vector population count double word" arch12 zarch -+e700000020e3 vfasb VRR_VVV "vector fp add short" arch12 zarch -+e700000820e3 wfasb VRR_VVV "scalar vector fp add scalar short" arch12 zarch -+e700000840e3 wfaxb VRR_VVV "scalar vector fp add scalar extended" arch12 zarch -+e700000020cb wfcsb VRR_VV "scalar vector fp compare scalar short" arch12 zarch -+e700000040cb wfcxb VRR_VV "scalar vector fp compare scalar extended" arch12 zarch -+e700000020ca wfksb VRR_VV "scalar vector fp compare and signal scalar short" arch12 zarch -+e700000040ca wfkxb VRR_VV "scalar vector fp compare and signal scalar extended" arch12 zarch - --e700000020e8 vfcesb VRR_VVV "vector fp compare equal short" arch12 zarch vx2 --e700001020e8 vfcesbs VRR_VVV "vector fp compare equal short" arch12 zarch vx2 --e700000820e8 wfcesb VRR_VVV "scalar vector fp compare equal scalar short" arch12 zarch vx2 --e700001820e8 wfcesbs VRR_VVV "scalar fp compare equal scalar short" arch12 zarch vx2 --e700000840e8 wfcexb VRR_VVV "scalar vector fp compare equal scalar extended" arch12 zarch vx2 --e700001840e8 wfcexbs VRR_VVV "scalar vector fp compare equal scalar extended" arch12 zarch vx2 -+e700000020e8 vfcesb VRR_VVV "vector fp compare equal short" arch12 zarch -+e700001020e8 vfcesbs VRR_VVV "vector fp compare equal short" arch12 zarch -+e700000820e8 wfcesb VRR_VVV "scalar vector fp compare equal scalar short" arch12 zarch -+e700001820e8 wfcesbs VRR_VVV "scalar fp compare equal scalar short" arch12 zarch -+e700000840e8 wfcexb VRR_VVV "scalar vector fp compare equal scalar extended" arch12 zarch -+e700001840e8 wfcexbs VRR_VVV "scalar vector fp compare equal scalar extended" arch12 zarch - --e700000420e8 vfkesb VRR_VVV "vector fp compare and signal equal short" arch12 zarch vx2 --e700001420e8 vfkesbs VRR_VVV "vector fp compare and signal equal short" arch12 zarch vx2 --e700000c20e8 wfkesb VRR_VVV "scalar vector fp compare and signal equal scalar short" arch12 zarch vx2 --e700001c20e8 wfkesbs VRR_VVV "scalar fp compare and signal equal scalar short" arch12 zarch vx2 -+e700000420e8 vfkesb VRR_VVV "vector fp compare and signal equal short" arch12 zarch -+e700001420e8 vfkesbs VRR_VVV "vector fp compare and signal equal short" arch12 zarch -+e700000c20e8 wfkesb VRR_VVV "scalar vector fp compare and signal equal scalar short" arch12 zarch -+e700001c20e8 wfkesbs VRR_VVV "scalar fp compare and signal equal scalar short" arch12 zarch - e700000430e8 vfkedb VRR_VVV "vector fp compare and signal equal long" arch12 zarch vx - e700001430e8 vfkedbs VRR_VVV "vector fp compare and signal equal long" arch12 zarch vx - e700000c30e8 wfkedb VRR_VVV "vector fp compare and signal equal long" arch12 zarch vx - e700001c30e8 wfkedbs VRR_VVV "vector fp compare and signal equal long" arch12 zarch vx --e700000c40e8 wfkexb VRR_VVV "scalar vector fp compare and signal equal scalar extended" arch12 zarch vx2 --e700001c40e8 wfkexbs VRR_VVV "scalar vector fp compare and signal equal scalar extended" arch12 zarch vx2 -+e700000c40e8 wfkexb VRR_VVV "scalar vector fp compare and signal equal scalar extended" arch12 zarch -+e700001c40e8 wfkexbs VRR_VVV "scalar vector fp compare and signal equal scalar extended" arch12 zarch - --e700000020eb vfchsb VRR_VVV "vector fp compare high short" arch12 zarch vx2 --e700001020eb vfchsbs VRR_VVV "vector fp compare high short" arch12 zarch vx2 --e700000820eb wfchsb VRR_VVV "scalar vector fp compare high scalar short" arch12 zarch vx2 --e700001820eb wfchsbs VRR_VVV "scalar vector fp compare high scalar short" arch12 zarch vx2 --e700000840eb wfchxb VRR_VVV "scalar vector fp compare high scalar extended" arch12 zarch vx2 --e700001840eb wfchxbs VRR_VVV "scalar vector fp compare high scalar extended" arch12 zarch vx2 -+e700000020eb vfchsb VRR_VVV "vector fp compare high short" arch12 zarch -+e700001020eb vfchsbs VRR_VVV "vector fp compare high short" arch12 zarch -+e700000820eb wfchsb VRR_VVV "scalar vector fp compare high scalar short" arch12 zarch -+e700001820eb wfchsbs VRR_VVV "scalar vector fp compare high scalar short" arch12 zarch -+e700000840eb wfchxb VRR_VVV "scalar vector fp compare high scalar extended" arch12 zarch -+e700001840eb wfchxbs VRR_VVV "scalar vector fp compare high scalar extended" arch12 zarch - --e700000420eb vfkhsb VRR_VVV "vector fp compare and signal high short" arch12 zarch vx2 --e700001420eb vfkhsbs VRR_VVV "vector fp compare and signal high short" arch12 zarch vx2 --e700000c20eb wfkhsb VRR_VVV "scalar vector fp compare and signal high scalar short" arch12 zarch vx2 --e700001c20eb wfkhsbs VRR_VVV "scalar vector fp compare and signal high scalar short" arch12 zarch vx2 -+e700000420eb vfkhsb VRR_VVV "vector fp compare and signal high short" arch12 zarch -+e700001420eb vfkhsbs VRR_VVV "vector fp compare and signal high short" arch12 zarch -+e700000c20eb wfkhsb VRR_VVV "scalar vector fp compare and signal high scalar short" arch12 zarch -+e700001c20eb wfkhsbs VRR_VVV "scalar vector fp compare and signal high scalar short" arch12 zarch - e700000430eb vfkhdb VRR_VVV "vector fp compare and signal high long" arch12 zarch vx - e700001430eb vfkhdbs VRR_VVV "vector fp compare and signal high long" arch12 zarch vx - e700000c30eb wfkhdb VRR_VVV "vector fp compare and signal high long" arch12 zarch vx - e700001c30eb wfkhdbs VRR_VVV "vector fp compare and signal high long" arch12 zarch vx --e700000c40eb wfkhxb VRR_VVV "scalar vector fp compare and signal high scalar extended" arch12 zarch vx2 --e700001c40eb wfkhxbs VRR_VVV "scalar vector fp compare and signal high scalar extended" arch12 zarch vx2 -+e700000c40eb wfkhxb VRR_VVV "scalar vector fp compare and signal high scalar extended" arch12 zarch -+e700001c40eb wfkhxbs VRR_VVV "scalar vector fp compare and signal high scalar extended" arch12 zarch - --e700000020ea vfchesb VRR_VVV "vector fp compare high or equal short" arch12 zarch vx2 --e700001020ea vfchesbs VRR_VVV "vector fp compare high or equal short" arch12 zarch vx2 --e700000820ea wfchesb VRR_VVV "scalar vector fp compare high or equal scalar short" arch12 zarch vx2 --e700001820ea wfchesbs VRR_VVV "scalar vector fp compare high or equal scalar short" arch12 zarch vx2 --e700000840ea wfchexb VRR_VVV "scalar vector fp compare high or equal scalar extended" arch12 zarch vx2 --e700001840ea wfchexbs VRR_VVV "scalar vector fp compare high or equal scalar extended" arch12 zarch vx2 -+e700000020ea vfchesb VRR_VVV "vector fp compare high or equal short" arch12 zarch -+e700001020ea vfchesbs VRR_VVV "vector fp compare high or equal short" arch12 zarch -+e700000820ea wfchesb VRR_VVV "scalar vector fp compare high or equal scalar short" arch12 zarch -+e700001820ea wfchesbs VRR_VVV "scalar vector fp compare high or equal scalar short" arch12 zarch -+e700000840ea wfchexb VRR_VVV "scalar vector fp compare high or equal scalar extended" arch12 zarch -+e700001840ea wfchexbs VRR_VVV "scalar vector fp compare high or equal scalar extended" arch12 zarch - --e700000420ea vfkhesb VRR_VVV "vector fp compare and signal high or equal short" arch12 zarch vx2 --e700001420ea vfkhesbs VRR_VVV "vector fp compare and signal high or equal short" arch12 zarch vx2 --e700000c20ea wfkhesb VRR_VVV "scalar vector fp compare and signal high or equal scalar short" arch12 zarch vx2 --e700001c20ea wfkhesbs VRR_VVV "scalar vector fp compare and signal high or equal scalar short" arch12 zarch vx2 -+e700000420ea vfkhesb VRR_VVV "vector fp compare and signal high or equal short" arch12 zarch -+e700001420ea vfkhesbs VRR_VVV "vector fp compare and signal high or equal short" arch12 zarch -+e700000c20ea wfkhesb VRR_VVV "scalar vector fp compare and signal high or equal scalar short" arch12 zarch -+e700001c20ea wfkhesbs VRR_VVV "scalar vector fp compare and signal high or equal scalar short" arch12 zarch - e700000430ea vfkhedb VRR_VVV "vector fp compare and signal high or equal long" arch12 zarch vx - e700001430ea vfkhedbs VRR_VVV "vector fp compare and signal high or equal long" arch12 zarch vx - e700000c30ea wfkhedb VRR_VVV "vector fp compare and signal high or equal long" arch12 zarch vx - e700001c30ea wfkhedbs VRR_VVV "vector fp compare and signal high or equal long" arch12 zarch vx --e700000c40ea wfkhexb VRR_VVV "scalar vector fp compare and signal high or equal scalar extended" arch12 zarch vx2 --e700001c40ea wfkhexbs VRR_VVV "scalar vector fp compare and signal high or equal scalar extended" arch12 zarch vx2 -+e700000c40ea wfkhexb VRR_VVV "scalar vector fp compare and signal high or equal scalar extended" arch12 zarch -+e700001c40ea wfkhexbs VRR_VVV "scalar vector fp compare and signal high or equal scalar extended" arch12 zarch - --e700000020e5 vfdsb VRR_VVV "vector fp divide short" arch12 zarch vx2 --e700000820e5 wfdsb VRR_VVV "scalar vector fp divide scalar short" arch12 zarch vx2 --e700000840e5 wfdxb VRR_VVV "scalar vector fp divide scalar extended" arch12 zarch vx2 --e700000020c7 vfisb VRR_VV0UU "vector load fp integer short" arch12 zarch vx2 --e700000820c7 wfisb VRR_VV0UU8 "scalar vector load fp integer scalar short" arch12 zarch vx2 --e700000840c7 wfixb VRR_VV0UU8 "scalar vector load fp integer scalar extended" arch12 zarch vx2 --e700000000c4 vfll VRR_VV0UU2 "vector fp load lengthened" arch12 zarch vx2 --e700000020c4 vflls VRR_VV "vector fp load lengthened" arch12 zarch vx2 --e700000820c4 wflls VRR_VV "scalar vector fp load lengthened short" arch12 zarch vx2 --e700000830c4 wflld VRR_VV "scalar vector fp load lengthened long" arch12 zarch vx2 --e700000000c5 vflr VRR_VV0UUU "vector fp load rounded" arch12 zarch vx2 --e700000030c5 vflrd VRR_VV0UU "vector fp load rounded long" arch12 zarch vx2 --e700000830c5 wflrd VRR_VV0UU8 "scalar vector fp load rounded long" arch12 zarch vx2 --e700000840c5 wflrx VRR_VV0UU8 "scalar vector fp load rounded extended" arch12 zarch vx2 --e700000000ef vfmax VRR_VVV0UUU "vector fp maximum" arch12 zarch vx2 --e700000020ef vfmaxsb VRR_VVV0U0 "vector fp maximum short" arch12 zarch vx2 --e700000030ef vfmaxdb VRR_VVV0U0 "vector fp maximum long" arch12 zarch vx2 --e700000820ef wfmaxsb VRR_VVV0U0 "scalar fp maximum scalar short" arch12 zarch vx2 --e700000830ef wfmaxdb VRR_VVV0U0 "scalar fp maximum scalar long" arch12 zarch vx2 --e700000840ef wfmaxxb VRR_VVV0U0 "scalar fp maximum scalar extended" arch12 zarch vx2 --e700000000ee vfmin VRR_VVV0UUU "vector fp minimum" arch12 zarch vx2 --e700000020ee vfminsb VRR_VVV0U0 "vector fp minimum short" arch12 zarch vx2 --e700000030ee vfmindb VRR_VVV0U0 "vector fp minimum long" arch12 zarch vx2 --e700000820ee wfminsb VRR_VVV0U0 "scalar fp minimum scalar short" arch12 zarch vx2 --e700000830ee wfmindb VRR_VVV0U0 "scalar fp minimum scalar long" arch12 zarch vx2 --e700000840ee wfminxb VRR_VVV0U0 "scalar fp minimum scalar extended" arch12 zarch vx2 --e700000020e7 vfmsb VRR_VVV "vector fp multiply short" arch12 zarch vx2 --e700000820e7 wfmsb VRR_VVV "scalar vector fp multiply scalar short" arch12 zarch vx2 --e700000840e7 wfmxb VRR_VVV "scalar vector fp multiply scalar extended" arch12 zarch vx2 --e7000200008f vfmasb VRR_VVVV "vector fp multiply and add short" arch12 zarch vx2 --e7000208008f wfmasb VRR_VVVV "scalar vector fp multiply and add scalar short" arch12 zarch vx2 --e7000408008f wfmaxb VRR_VVVV "scalar vector fp multiply and add scalar extended" arch12 zarch vx2 --e7000200008e vfmssb VRR_VVVV "vector fp multiply and subtract short" arch12 zarch vx2 --e7000208008e wfmssb VRR_VVVV "scalar vector fp multiply and subtract scalar short" arch12 zarch vx2 --e7000408008e wfmsxb VRR_VVVV "scalar vector fp multiply and subtract scalar extended" arch12 zarch vx2 --e7000000009f vfnma VRR_VVVU0UV "vector fp negative multiply and add" arch12 zarch vx2 --e7000200009f vfnmasb VRR_VVVV "vector fp negative multiply and add short" arch12 zarch vx2 --e7000208009f wfnmasb VRR_VVVV "scalar vector fp negative multiply and add scalar short" arch12 zarch vx2 --e7000300009f vfnmadb VRR_VVVV "vector fp negative multiply and add long" arch12 zarch vx2 --e7000308009f wfnmadb VRR_VVVV "scalar vector fp negative multiply and add scalar long" arch12 zarch vx2 --e7000408009f wfnmaxb VRR_VVVV "scalar vector fp negative multiply and add scalar extended" arch12 zarch vx2 --e7000000009e vfnms VRR_VVVU0UV "vector fp negative multiply and subtract" arch12 zarch vx2 --e7000200009e vfnmssb VRR_VVVV "vector fp negative multiply and subtract short" arch12 zarch vx2 --e7000208009e wfnmssb VRR_VVVV "scalar vector fp negative multiply and subtract scalar short" arch12 zarch vx2 --e7000300009e vfnmsdb VRR_VVVV "vector fp negative multiply and subtract long" arch12 zarch vx2 --e7000308009e wfnmsdb VRR_VVVV "scalar vector fp negative multiply and subtract scalar long" arch12 zarch vx2 --e7000408009e wfnmsxb VRR_VVVV "scalar vector fp negative multiply and subtract scalar extended" arch12 zarch vx2 --e700000020cc vfpsosb VRR_VV0U2 "vector fp perform sign operation short" arch12 zarch vx2 --e700000820cc wfpsosb VRR_VV0U2 "scalar vector fp perform sign operation scalar short" arch12 zarch vx2 --e700000020cc vflcsb VRR_VV "vector fp perform sign operation short" arch12 zarch vx2 --e700000820cc wflcsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch vx2 --e700001020cc vflnsb VRR_VV "vector fp perform sign operation short" arch12 zarch vx2 --e700001820cc wflnsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch vx2 --e700002020cc vflpsb VRR_VV "vector fp perform sign operation short" arch12 zarch vx2 --e700002820cc wflpsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch vx2 --e700000840cc wfpsoxb VRR_VV0U2 "scalar vector fp perform sign operation scalar extended" arch12 zarch vx2 --e700000840cc wflcxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch vx2 --e700001840cc wflnxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch vx2 --e700002840cc wflpxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch vx2 --e700000020ce vfsqsb VRR_VV "vector fp square root short" arch12 zarch vx2 --e700000820ce wfsqsb VRR_VV "scalar vector fp square root scalar short" arch12 zarch vx2 --e700000840ce wfsqxb VRR_VV "scalar vector fp square root scalar extended" arch12 zarch vx2 --e700000020e2 vfssb VRR_VVV "vector fp subtract short" arch12 zarch vx2 --e700000820e2 wfssb VRR_VVV "scalar vector fp subtract scalar short" arch12 zarch vx2 --e700000840e2 wfsxb VRR_VVV "scalar vector fp subtract scalar extended" arch12 zarch vx2 --e7000000204a vftcisb VRI_VVU2 "vector fp test data class immediate short" arch12 zarch vx2 --e7000008204a wftcisb VRI_VVU2 "scalar vector fp test data class immediate scalar short" arch12 zarch vx2 --e7000008404a wftcixb VRI_VVU2 "scalar vector fp test data class immediate scalar extended" arch12 zarch vx2 -+e700000020e5 vfdsb VRR_VVV "vector fp divide short" arch12 zarch -+e700000820e5 wfdsb VRR_VVV "scalar vector fp divide scalar short" arch12 zarch -+e700000840e5 wfdxb VRR_VVV "scalar vector fp divide scalar extended" arch12 zarch -+e700000020c7 vfisb VRR_VV0UU "vector load fp integer short" arch12 zarch -+e700000820c7 wfisb VRR_VV0UU8 "scalar vector load fp integer scalar short" arch12 zarch -+e700000840c7 wfixb VRR_VV0UU8 "scalar vector load fp integer scalar extended" arch12 zarch -+e700000000c4 vfll VRR_VV0UU2 "vector fp load lengthened" arch12 zarch -+e700000020c4 vflls VRR_VV "vector fp load lengthened" arch12 zarch -+e700000820c4 wflls VRR_VV "scalar vector fp load lengthened short" arch12 zarch -+e700000830c4 wflld VRR_VV "scalar vector fp load lengthened long" arch12 zarch -+e700000000c5 vflr VRR_VV0UUU "vector fp load rounded" arch12 zarch -+e700000030c5 vflrd VRR_VV0UU "vector fp load rounded long" arch12 zarch -+e700000830c5 wflrd VRR_VV0UU8 "scalar vector fp load rounded long" arch12 zarch -+e700000840c5 wflrx VRR_VV0UU8 "scalar vector fp load rounded extended" arch12 zarch -+e700000000ef vfmax VRR_VVV0UUU "vector fp maximum" arch12 zarch -+e700000020ef vfmaxsb VRR_VVV0U0 "vector fp maximum short" arch12 zarch -+e700000030ef vfmaxdb VRR_VVV0U0 "vector fp maximum long" arch12 zarch -+e700000820ef wfmaxsb VRR_VVV0U0 "scalar fp maximum scalar short" arch12 zarch -+e700000830ef wfmaxdb VRR_VVV0U0 "scalar fp maximum scalar long" arch12 zarch -+e700000840ef wfmaxxb VRR_VVV0U0 "scalar fp maximum scalar extended" arch12 zarch -+e700000000ee vfmin VRR_VVV0UUU "vector fp minimum" arch12 zarch -+e700000020ee vfminsb VRR_VVV0U0 "vector fp minimum short" arch12 zarch -+e700000030ee vfmindb VRR_VVV0U0 "vector fp minimum long" arch12 zarch -+e700000820ee wfminsb VRR_VVV0U0 "scalar fp minimum scalar short" arch12 zarch -+e700000830ee wfmindb VRR_VVV0U0 "scalar fp minimum scalar long" arch12 zarch -+e700000840ee wfminxb VRR_VVV0U0 "scalar fp minimum scalar extended" arch12 zarch -+e700000020e7 vfmsb VRR_VVV "vector fp multiply short" arch12 zarch -+e700000820e7 wfmsb VRR_VVV "scalar vector fp multiply scalar short" arch12 zarch -+e700000840e7 wfmxb VRR_VVV "scalar vector fp multiply scalar extended" arch12 zarch -+e7000200008f vfmasb VRR_VVVV "vector fp multiply and add short" arch12 zarch -+e7000208008f wfmasb VRR_VVVV "scalar vector fp multiply and add scalar short" arch12 zarch -+e7000408008f wfmaxb VRR_VVVV "scalar vector fp multiply and add scalar extended" arch12 zarch -+e7000200008e vfmssb VRR_VVVV "vector fp multiply and subtract short" arch12 zarch -+e7000208008e wfmssb VRR_VVVV "scalar vector fp multiply and subtract scalar short" arch12 zarch -+e7000408008e wfmsxb VRR_VVVV "scalar vector fp multiply and subtract scalar extended" arch12 zarch -+e7000000009f vfnma VRR_VVVU0UV "vector fp negative multiply and add" arch12 zarch -+e7000200009f vfnmasb VRR_VVVV "vector fp negative multiply and add short" arch12 zarch -+e7000208009f wfnmasb VRR_VVVV "scalar vector fp negative multiply and add scalar short" arch12 zarch -+e7000300009f vfnmadb VRR_VVVV "vector fp negative multiply and add long" arch12 zarch -+e7000308009f wfnmadb VRR_VVVV "scalar vector fp negative multiply and add scalar long" arch12 zarch -+e7000408009f wfnmaxb VRR_VVVV "scalar vector fp negative multiply and add scalar extended" arch12 zarch -+e7000000009e vfnms VRR_VVVU0UV "vector fp negative multiply and subtract" arch12 zarch -+e7000200009e vfnmssb VRR_VVVV "vector fp negative multiply and subtract short" arch12 zarch -+e7000208009e wfnmssb VRR_VVVV "scalar vector fp negative multiply and subtract scalar short" arch12 zarch -+e7000300009e vfnmsdb VRR_VVVV "vector fp negative multiply and subtract long" arch12 zarch -+e7000308009e wfnmsdb VRR_VVVV "scalar vector fp negative multiply and subtract scalar long" arch12 zarch -+e7000408009e wfnmsxb VRR_VVVV "scalar vector fp negative multiply and subtract scalar extended" arch12 zarch -+e700000020cc vfpsosb VRR_VV0U2 "vector fp perform sign operation short" arch12 zarch -+e700000820cc wfpsosb VRR_VV0U2 "scalar vector fp perform sign operation scalar short" arch12 zarch -+e700000020cc vflcsb VRR_VV "vector fp perform sign operation short" arch12 zarch -+e700000820cc wflcsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch -+e700001020cc vflnsb VRR_VV "vector fp perform sign operation short" arch12 zarch -+e700001820cc wflnsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch -+e700002020cc vflpsb VRR_VV "vector fp perform sign operation short" arch12 zarch -+e700002820cc wflpsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch -+e700000840cc wfpsoxb VRR_VV0U2 "scalar vector fp perform sign operation scalar extended" arch12 zarch -+e700000840cc wflcxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch -+e700001840cc wflnxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch -+e700002840cc wflpxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch -+e700000020ce vfsqsb VRR_VV "vector fp square root short" arch12 zarch -+e700000820ce wfsqsb VRR_VV "scalar vector fp square root scalar short" arch12 zarch -+e700000840ce wfsqxb VRR_VV "scalar vector fp square root scalar extended" arch12 zarch -+e700000020e2 vfssb VRR_VVV "vector fp subtract short" arch12 zarch -+e700000820e2 wfssb VRR_VVV "scalar vector fp subtract scalar short" arch12 zarch -+e700000840e2 wfsxb VRR_VVV "scalar vector fp subtract scalar extended" arch12 zarch -+e7000000204a vftcisb VRI_VVU2 "vector fp test data class immediate short" arch12 zarch -+e7000008204a wftcisb VRI_VVU2 "scalar vector fp test data class immediate scalar short" arch12 zarch -+e7000008404a wftcixb VRI_VVU2 "scalar vector fp test data class immediate scalar extended" arch12 zarch - - # Miscellaneous Instruction Extensions Facility 2 - -@@ -1843,28 +1843,28 @@ e30000000039 sgh RXY_RRRD "subtract halfword from 64 bit value" arch12 zarch - - # Vector packed decimal facility - --e60000000037 vlrlr VRS_RRDV "vector load rightmost with length" arch12 zarch vx2 --e60000000035 vlrl VSI_URDV "vector load rightmost with immediate length" arch12 zarch vx2 --e6000000003f vstrlr VRS_RRDV "vector store rightmost with length" arch12 zarch vx2 --e6000000003d vstrl VSI_URDV "vector store rightmost with immediate length" arch12 zarch vx2 --e60000000071 vap VRI_VVV0UU2 "vector add decimal" arch12 zarch vx2 --e60000000077 vcp VRR_0VV0U "vector compare decimal" arch12 zarch vx2 --e60000000050 vcvb VRR_RV0U "vector convert to binary 32 bit" arch12 zarch vx2 --e60000000052 vcvbg VRR_RV0U "vector convert to binary 64 bit" arch12 zarch vx2 --e60000000058 vcvd VRI_VR0UU "vector convert to decimal 32 bit" arch12 zarch vx2 --e6000000005a vcvdg VRI_VR0UU "vector convert to decimal 64 bit" arch12 zarch vx2 --e6000000007a vdp VRI_VVV0UU2 "vector divide decimal" arch12 zarch vx2 --e60000000049 vlip VRI_V0UU2 "vector load immediate decimal" arch12 zarch vx2 --e60000000078 vmp VRI_VVV0UU2 "vector multiply decimal" arch12 zarch vx2 --e60000000079 vmsp VRI_VVV0UU2 "vector multiply and shift decimal" arch12 zarch vx2 --e60000000034 vpkz VSI_URDV "vector pack zoned" arch12 zarch vx2 --e6000000005b vpsop VRI_VVUUU2 "vector perform sign operation decimal" arch12 zarch vx2 --e6000000007b vrp VRI_VVV0UU2 "vector remainder decimal" arch12 zarch vx2 --e6000000007e vsdp VRI_VVV0UU2 "vector shift and divide decimal" arch12 zarch vx2 --e60000000059 vsrp VRI_VVUUU2 "vector shift and round decimal" arch12 zarch vx2 --e60000000073 vsp VRI_VVV0UU2 "vector subtract decimal" arch12 zarch vx2 --e6000000005f vtp VRR_0V "vector test decimal" arch12 zarch vx2 --e6000000003c vupkz VSI_URDV "vector unpack zoned" arch12 zarch vx2 -+e60000000037 vlrlr VRS_RRDV "vector load rightmost with length" arch12 zarch -+e60000000035 vlrl VSI_URDV "vector load rightmost with immediate length" arch12 zarch -+e6000000003f vstrlr VRS_RRDV "vector store rightmost with length" arch12 zarch -+e6000000003d vstrl VSI_URDV "vector store rightmost with immediate length" arch12 zarch -+e60000000071 vap VRI_VVV0UU2 "vector add decimal" arch12 zarch -+e60000000077 vcp VRR_0VV0U "vector compare decimal" arch12 zarch -+e60000000050 vcvb VRR_RV0U "vector convert to binary 32 bit" arch12 zarch -+e60000000052 vcvbg VRR_RV0U "vector convert to binary 64 bit" arch12 zarch -+e60000000058 vcvd VRI_VR0UU "vector convert to decimal 32 bit" arch12 zarch -+e6000000005a vcvdg VRI_VR0UU "vector convert to decimal 64 bit" arch12 zarch -+e6000000007a vdp VRI_VVV0UU2 "vector divide decimal" arch12 zarch -+e60000000049 vlip VRI_V0UU2 "vector load immediate decimal" arch12 zarch -+e60000000078 vmp VRI_VVV0UU2 "vector multiply decimal" arch12 zarch -+e60000000079 vmsp VRI_VVV0UU2 "vector multiply and shift decimal" arch12 zarch -+e60000000034 vpkz VSI_URDV "vector pack zoned" arch12 zarch -+e6000000005b vpsop VRI_VVUUU2 "vector perform sign operation decimal" arch12 zarch -+e6000000007b vrp VRI_VVV0UU2 "vector remainder decimal" arch12 zarch -+e6000000007e vsdp VRI_VVV0UU2 "vector shift and divide decimal" arch12 zarch -+e60000000059 vsrp VRI_VVUUU2 "vector shift and round decimal" arch12 zarch -+e60000000073 vsp VRI_VVV0UU2 "vector subtract decimal" arch12 zarch -+e6000000005f vtp VRR_0V "vector test decimal" arch12 zarch -+e6000000003c vupkz VSI_URDV "vector unpack zoned" arch12 zarch - - # Guarded storage facility - diff --git a/binutils-2.28.tar.bz2 b/binutils-2.28.tar.bz2 deleted file mode 100644 index 7f6be09..0000000 --- a/binutils-2.28.tar.bz2 +++ /dev/null @@ -1,3 +0,0 @@ -version https://git-lfs.github.com/spec/v1 -oid sha256:6297433ee120b11b4b0a1c8f3512d7d73501753142ab9e2daa13c5a3edd32a72 -size 26556365 diff --git a/binutils-2.29.tar.bz2 b/binutils-2.29.tar.bz2 new file mode 100644 index 0000000..0460633 --- /dev/null +++ b/binutils-2.29.tar.bz2 @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:29a29549869039aad75fdf507ac30366da5ad0b974fbff4a8e7148dbf4f40ebf +size 29073316 diff --git a/binutils-bso21193.diff b/binutils-bso21193.diff deleted file mode 100644 index 63fd76e..0000000 --- a/binutils-bso21193.diff +++ /dev/null @@ -1,35 +0,0 @@ -commit 758d96d834ba725461abf4be36df9f13e0815054 -Author: Nick Clifton -Date: Wed Feb 22 17:28:33 2017 +0000 - - Align .gnu_debuglink sections on a 4-byte boundary. - - PR binutils/21193 - * opncls.c (bfd_create_gnu_debuglink_section): Give the newly - created section 4-byte alignment. - -diff --git a/bfd/opncls.c b/bfd/opncls.c -index 2ab7dfe..4137a3b 100644 ---- a/bfd/opncls.c -+++ b/bfd/opncls.c -@@ -1645,6 +1645,8 @@ bfd_create_gnu_debuglink_section (bfd *abfd, const char *filename) - if (sect == NULL) - return NULL; - -+ /* Compute the size of the section. Allow for the CRC after the filename, -+ and padding so that it will start on a 4-byte boundary. */ - debuglink_size = strlen (filename) + 1; - debuglink_size += 3; - debuglink_size &= ~3; -@@ -1654,6 +1656,11 @@ bfd_create_gnu_debuglink_section (bfd *abfd, const char *filename) - /* XXX Should we delete the section from the bfd ? */ - return NULL; - -+ /* PR 21193: Ensure that the section has 4-byte alignment for the CRC. -+ Note - despite the name of the function being called, we are -+ setting an alignment power, not a byte alignment value. */ -+ bfd_set_section_alignment (abfd, sect, 2); -+ - return sect; - } - diff --git a/binutils-bso21333.diff b/binutils-bso21333.diff deleted file mode 100644 index 4ae6f03..0000000 --- a/binutils-bso21333.diff +++ /dev/null @@ -1,18 +0,0 @@ -diff --git a/gas/config/tc-s390.c b/gas/config/tc-s390.c -index 35cee61..40c9f6f 100644 ---- a/gas/config/tc-s390.c -+++ b/gas/config/tc-s390.c -@@ -2133,9 +2133,11 @@ md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED) - int - tc_s390_fix_adjustable (fixS *fixP) - { -- /* Don't adjust references to merge sections. */ -- if ((S_GET_SEGMENT (fixP->fx_addsy)->flags & SEC_MERGE) != 0) -+ /* Don't adjust pc-relative references to merge sections. */ -+ if (fixP->fx_pcrel -+ && (S_GET_SEGMENT (fixP->fx_addsy)->flags & SEC_MERGE) != 0) - return 0; -+ - /* adjust_reloc_syms doesn't know about the GOT. */ - if ( fixP->fx_r_type == BFD_RELOC_16_GOTOFF - || fixP->fx_r_type == BFD_RELOC_32_GOTOFF diff --git a/binutils-build-as-needed.diff b/binutils-build-as-needed.diff index 6567673..9b51ff6 100644 --- a/binutils-build-as-needed.diff +++ b/binutils-build-as-needed.diff @@ -1,10 +1,10 @@ Index: ld/ldmain.c =================================================================== ---- ld/ldmain.c.orig 2016-01-27 13:44:14.092983985 +0100 -+++ ld/ldmain.c 2016-01-27 13:44:37.389254054 +0100 -@@ -286,6 +286,8 @@ main (int argc, char **argv) - #ifdef DEFAULT_FLAG_COMPRESS_DEBUG - link_info.compress_debug = COMPRESS_DEBUG_GABI_ZLIB; +--- ld/ldmain.c.orig 2017-07-26 10:07:31.862559913 +0200 ++++ ld/ldmain.c 2017-07-26 10:07:31.886560303 +0200 +@@ -302,6 +302,8 @@ main (int argc, char **argv) + #ifdef DEFAULT_NEW_DTAGS + link_info.new_dtags = DEFAULT_NEW_DTAGS; #endif + if (getenv ("SUSE_ASNEEDED") && atoi(getenv ("SUSE_ASNEEDED")) > 0) + input_flags.add_DT_NEEDED_for_regular = TRUE; diff --git a/binutils.changes b/binutils.changes index a88708f..3265a1a 100644 --- a/binutils.changes +++ b/binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/binutils.spec b/binutils.spec index e27866f..a6cb4e4 100644 --- a/binutils.spec +++ b/binutils.spec @@ -35,7 +35,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -82,12 +82,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -97,11 +96,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -157,13 +151,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -177,9 +170,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -256,6 +246,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -311,6 +302,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-aarch64-binutils.changes b/cross-aarch64-binutils.changes index a88708f..3265a1a 100644 --- a/cross-aarch64-binutils.changes +++ b/cross-aarch64-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-aarch64-binutils.spec b/cross-aarch64-binutils.spec index 7f10033..d6d0695 100644 --- a/cross-aarch64-binutils.spec +++ b/cross-aarch64-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-arm-binutils.changes b/cross-arm-binutils.changes index a88708f..3265a1a 100644 --- a/cross-arm-binutils.changes +++ b/cross-arm-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-arm-binutils.spec b/cross-arm-binutils.spec index 285d7f1..18e5f66 100644 --- a/cross-arm-binutils.spec +++ b/cross-arm-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-avr-binutils.changes b/cross-avr-binutils.changes index a88708f..3265a1a 100644 --- a/cross-avr-binutils.changes +++ b/cross-avr-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-avr-binutils.spec b/cross-avr-binutils.spec index ef1ce76..a6a7b83 100644 --- a/cross-avr-binutils.spec +++ b/cross-avr-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-epiphany-binutils.changes b/cross-epiphany-binutils.changes index a88708f..3265a1a 100644 --- a/cross-epiphany-binutils.changes +++ b/cross-epiphany-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-epiphany-binutils.spec b/cross-epiphany-binutils.spec index e5ea19e..98c7bce 100644 --- a/cross-epiphany-binutils.spec +++ b/cross-epiphany-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-hppa-binutils.changes b/cross-hppa-binutils.changes index a88708f..3265a1a 100644 --- a/cross-hppa-binutils.changes +++ b/cross-hppa-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-hppa-binutils.spec b/cross-hppa-binutils.spec index aa6ad44..d9af068 100644 --- a/cross-hppa-binutils.spec +++ b/cross-hppa-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-hppa64-binutils.changes b/cross-hppa64-binutils.changes index a88708f..3265a1a 100644 --- a/cross-hppa64-binutils.changes +++ b/cross-hppa64-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-hppa64-binutils.spec b/cross-hppa64-binutils.spec index 3eae3d0..6ece689 100644 --- a/cross-hppa64-binutils.spec +++ b/cross-hppa64-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-i386-binutils.changes b/cross-i386-binutils.changes index a88708f..3265a1a 100644 --- a/cross-i386-binutils.changes +++ b/cross-i386-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-i386-binutils.spec b/cross-i386-binutils.spec index 2c9737e..0495e90 100644 --- a/cross-i386-binutils.spec +++ b/cross-i386-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-ia64-binutils.changes b/cross-ia64-binutils.changes index a88708f..3265a1a 100644 --- a/cross-ia64-binutils.changes +++ b/cross-ia64-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-ia64-binutils.spec b/cross-ia64-binutils.spec index 1f9daf2..44be2ab 100644 --- a/cross-ia64-binutils.spec +++ b/cross-ia64-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-m68k-binutils.changes b/cross-m68k-binutils.changes index a88708f..3265a1a 100644 --- a/cross-m68k-binutils.changes +++ b/cross-m68k-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-m68k-binutils.spec b/cross-m68k-binutils.spec index f074b22..038fdb2 100644 --- a/cross-m68k-binutils.spec +++ b/cross-m68k-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-mips-binutils.changes b/cross-mips-binutils.changes index a88708f..3265a1a 100644 --- a/cross-mips-binutils.changes +++ b/cross-mips-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-mips-binutils.spec b/cross-mips-binutils.spec index 553e9aa..21ca1b4 100644 --- a/cross-mips-binutils.spec +++ b/cross-mips-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-ppc-binutils.changes b/cross-ppc-binutils.changes index a88708f..3265a1a 100644 --- a/cross-ppc-binutils.changes +++ b/cross-ppc-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-ppc-binutils.spec b/cross-ppc-binutils.spec index 810d41f..1d5d46f 100644 --- a/cross-ppc-binutils.spec +++ b/cross-ppc-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-ppc64-binutils.changes b/cross-ppc64-binutils.changes index a88708f..3265a1a 100644 --- a/cross-ppc64-binutils.changes +++ b/cross-ppc64-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-ppc64-binutils.spec b/cross-ppc64-binutils.spec index 7f7b1a0..31c4dde 100644 --- a/cross-ppc64-binutils.spec +++ b/cross-ppc64-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-ppc64le-binutils.changes b/cross-ppc64le-binutils.changes index a88708f..3265a1a 100644 --- a/cross-ppc64le-binutils.changes +++ b/cross-ppc64le-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-ppc64le-binutils.spec b/cross-ppc64le-binutils.spec index d24c09c..d2e02f6 100644 --- a/cross-ppc64le-binutils.spec +++ b/cross-ppc64le-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-riscv64-binutils.changes b/cross-riscv64-binutils.changes index a88708f..3265a1a 100644 --- a/cross-riscv64-binutils.changes +++ b/cross-riscv64-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-riscv64-binutils.spec b/cross-riscv64-binutils.spec index f920597..43d2c98 100644 --- a/cross-riscv64-binutils.spec +++ b/cross-riscv64-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-rx-binutils.changes b/cross-rx-binutils.changes index a88708f..3265a1a 100644 --- a/cross-rx-binutils.changes +++ b/cross-rx-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-rx-binutils.spec b/cross-rx-binutils.spec index e620996..b43db87 100644 --- a/cross-rx-binutils.spec +++ b/cross-rx-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-s390-binutils.changes b/cross-s390-binutils.changes index a88708f..3265a1a 100644 --- a/cross-s390-binutils.changes +++ b/cross-s390-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-s390-binutils.spec b/cross-s390-binutils.spec index 846de5e..485f001 100644 --- a/cross-s390-binutils.spec +++ b/cross-s390-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-s390x-binutils.changes b/cross-s390x-binutils.changes index a88708f..3265a1a 100644 --- a/cross-s390x-binutils.changes +++ b/cross-s390x-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-s390x-binutils.spec b/cross-s390x-binutils.spec index 911abcf..63d55cb 100644 --- a/cross-s390x-binutils.spec +++ b/cross-s390x-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-sparc-binutils.changes b/cross-sparc-binutils.changes index a88708f..3265a1a 100644 --- a/cross-sparc-binutils.changes +++ b/cross-sparc-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-sparc-binutils.spec b/cross-sparc-binutils.spec index 2f23b7c..d2f0757 100644 --- a/cross-sparc-binutils.spec +++ b/cross-sparc-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-sparc64-binutils.changes b/cross-sparc64-binutils.changes index a88708f..3265a1a 100644 --- a/cross-sparc64-binutils.changes +++ b/cross-sparc64-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-sparc64-binutils.spec b/cross-sparc64-binutils.spec index faf9e3d..bc36063 100644 --- a/cross-sparc64-binutils.spec +++ b/cross-sparc64-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-spu-binutils.changes b/cross-spu-binutils.changes index a88708f..3265a1a 100644 --- a/cross-spu-binutils.changes +++ b/cross-spu-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-spu-binutils.spec b/cross-spu-binutils.spec index 31dc965..1e52d30 100644 --- a/cross-spu-binutils.spec +++ b/cross-spu-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/cross-x86_64-binutils.changes b/cross-x86_64-binutils.changes index a88708f..3265a1a 100644 --- a/cross-x86_64-binutils.changes +++ b/cross-x86_64-binutils.changes @@ -1,3 +1,65 @@ +------------------------------------------------------------------- +Wed Jul 26 08:05:04 UTC 2017 - rguenther@suse.com + +- Update to binutils 2.29. + * The MIPS port now supports microMIPS eXtended Physical Addressing (XPA) + instructions for assembly and disassembly. + * The MIPS port now supports the microMIPS Release 5 ISA for assembly and + disassembly. + * The MIPS port now supports the Imagination interAptiv MR2 processor, + which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple + of implementation-specific regular MIPS and MIPS16e2 ASE instructions. + * The SPARC port now supports the SPARC M8 processor, which implements the + Oracle SPARC Architecture 2017. + * The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for the wasm32 ELF conversion of the WebAssembly file format. + * Add --inlines option to objdump, which extends the --line-numbers option + so that inlined functions will display their nesting information. + * Add --merge-notes options to objcopy to reduce the size of notes in + a binary file by merging and deleting redundant notes. + * Add support for locating separate debug info files using the build-id + method, where the separate file has a name based upon the build-id of + the original file. + GAS + * Add support for ELF SHF_GNU_MBIND. + * Add support for the WebAssembly file format and wasm32 ELF conversion. + * PowerPC gas now checks that the correct register class is used in + instructions. For instance, "addi %f4,%cr3,%r31" warns three times + that the registers are invalid. + * Add support for the Texas Instruments PRU processor. + * Support for the ARMv8-R architecture and Cortex-R52 processor has been + added to the ARM port. + GNU ld + * Support for -z shstk in the x86 ELF linker to generate + GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program properties. + * Add support for GNU_PROPERTY_X86_FEATURE_1_SHSTK in ELF GNU program + properties in the x86 ELF linker. + * Add support for GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties in the x86 ELF linker. + * Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled + PLT. + * Support for -z ibt in the x86 ELF linker to generate IBT-enabled + PLT as well as GNU_PROPERTY_X86_FEATURE_1_IBT in ELF GNU program + properties. + * Add support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. + * Add support for ELF GNU program properties. + * Add support for the Texas Instruments PRU processor. + * When configuring for arc*-*-linux* targets the default linker emulation will + change if --with-cpu=nps400 is used at configure time. + * Improve assignment of LMAs to orphan sections in some edge cases where a + mixture of both AT>LMA_REGION and AT(LMA) are used. + * Orphan sections placed after an empty section that has an AT(LMA) will now + take an load memory address starting from LMA. + * Section groups can now be resolved (the group deleted and the group members + placed like normal sections) at partial link time either using the new + linker option --force-group-allocation or by placing FORCE_GROUP_ALLOCATION + into the linker script. +- Includes binutils-bso21193.diff, binutils-bso21333.diff and + fix-security-bugs.diff. +- Remove ld-dtags.diff, instead configure with --enable-new-dtags. +- Refresh binutils-build-as-needed.diff. + ------------------------------------------------------------------- Wed Apr 5 11:55:17 UTC 2017 - afaerber@suse.de diff --git a/cross-x86_64-binutils.spec b/cross-x86_64-binutils.spec index 757cf51..205d8b7 100644 --- a/cross-x86_64-binutils.spec +++ b/cross-x86_64-binutils.spec @@ -38,7 +38,7 @@ BuildRequires: zlib-devel-static %else BuildRequires: zlib-devel %endif -Version: 2.28 +Version: 2.29 Release: 0 # # RUN_TESTS @@ -85,12 +85,11 @@ Source: binutils-%{binutils_version}.tar.bz2 Source1: pre_checkin.sh Source2: README.First-for.SuSE.packagers Source3: baselibs.conf -Patch: binutils-2.28-branch.diff +#Patch: binutils-2.29-branch.diff Patch3: binutils-skip-rpaths.patch Patch4: s390-biarch.diff Patch5: x86-64-biarch.patch Patch6: unit-at-a-time.patch -Patch7: ld-dtags.diff Patch8: ld-relro.diff Patch9: testsuite.diff Patch10: enable-targets-gold.diff @@ -100,11 +99,6 @@ Patch14: binutils-build-as-needed.diff Patch18: gold-depend-on-opcodes.diff Patch22: binutils-bfd_h.patch Patch34: aarch64-common-pagesize.patch -# Backport 758d96d834ba725461a -Patch36: binutils-bso21193.diff -Patch37: fix-security-bugs.diff -# Backport dc1e4d6dedcb8ee3bb1 -Patch38: binutils-bso21333.diff Patch90: cross-avr-nesc-as.patch Patch92: cross-avr-omit_section_dynsym.patch Patch93: cross-avr-size.patch @@ -160,13 +154,12 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %setup -q -n binutils-%{binutils_version} # Patch is outside test_vanilla because it's supposed to be the # patch bringing the tarball to the newest upstream version -%patch -p1 +#%patch -p1 %if !%{test_vanilla} %patch3 %patch4 %patch5 %patch6 -%patch7 -p1 %patch8 %patch9 %patch10 @@ -180,9 +173,6 @@ echo "make check will return with %{make_check_handling} in case of testsuite fa %patch18 %patch22 %patch34 -p1 -%patch36 -p1 -%patch37 -p1 -%patch38 -p1 %if "%{TARGET}" == "avr" cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h %patch90 @@ -259,6 +249,7 @@ cd build-dir %if %{suse_version} > 1320 --enable-compressed-debug-sections=gas \ %endif + --enable-new-dtags \ --enable-shared make %{?_smp_mflags} all-bfd TARGET-bfd=headers # force reconfiguring (???) @@ -314,6 +305,7 @@ EXTRA_TARGETS="$EXTRA_TARGETS,aarch64-suse-linux" --with-pkgversion="GNU Binutils; %{DIST}" \ --with-system-zlib \ --disable-nls \ + --enable-new-dtags \ %if %{suse_version} <= 1320 --disable-x86-relax-relocations \ %endif diff --git a/fix-security-bugs.diff b/fix-security-bugs.diff deleted file mode 100644 index 73013b7..0000000 --- a/fix-security-bugs.diff +++ /dev/null @@ -1,762 +0,0 @@ -This contains a merge of the following commits. -It fixes bnc#1029907, bnc#1029908, bnc#1029909 and more. - -commit 03f7786e2f440b9892b1c34a58fb26222ce1b493 -Author: Nick Clifton -Date: Mon Feb 13 13:08:32 2017 +0000 - - Fix readelf writing to illegal addresses whilst processing corrupt input files containing symbol-difference relocations. - - PR binutils/21137 - * readelf.c (target_specific_reloc_handling): Add end parameter. - Check for buffer overflow before writing relocated values. - (apply_relocations): Pass end to target_specific_reloc_handling. - -commit f84ce13b6708801ca1d6289b7c4003e2f5a6d7f9 -Author: Nick Clifton -Date: Mon Feb 13 14:03:22 2017 +0000 - - Fix read-after-free error in readelf when processing multiple, relocated sections in an MSP430 binary. - - PR binutils/21139 - * readelf.c (target_specific_reloc_handling): Add num_syms - parameter. Check for symbol table overflow before accessing - symbol value. If reloc pointer is NULL, discard all saved state. - (apply_relocations): Pass num_syms to target_specific_reloc_handling. - Call target_specific_reloc_handling with a NULL reloc pointer - after processing all of the relocs. - -commit 0ee3043f58aae078a1ecc54b7be2810cae39a718 -Author: Nick Clifton -Date: Mon Feb 13 14:17:07 2017 +0000 - - Fix access violation when reporting sections that could not be dumped. - - PR binutils/21147 - * readelf.c (process_section_contents): Fix off by one error - reporting un-dumped sections. - -commit 4aeb00ad3cc6a29b32f0a4e42c2f64d55e25b76d -Author: Nick Clifton -Date: Mon Feb 13 14:35:24 2017 +0000 - - Fix check for buffer overflow when processing version information. - - PR binutils/21148 - * readelf.c (process_version_sections): Include size of auxillary - version information when checking for buffer overflow. - -commit ebdf1ebfa551fd4624c3cd05401aa3c01ea2ebbe -Author: Nick Clifton -Date: Mon Feb 13 14:52:48 2017 +0000 - - Fix invalid memory access attempting to read the compression header of a too-small compressed section. - - PR binutils/21149 - * readelf.c (get_compression_header): Add size parameter. Check - size against sizeof compression header before attempting to - extract the header. - (process_section_headers): Pass size to get_compression_header. - (dump_section_as_strings): Likewise. - (dump_section_as_bytes): Likewise. - (load_specific_debug_section): Likewise. - -commit f055032e4e922f1e1a5e11026c7c2669fa2a7d19 -Author: Nick Clifton -Date: Mon Feb 13 15:04:37 2017 +0000 - - Fix invalid read of section contents whilst processing a corrupt binary. - - PR binutils/21135 - * readelf.c (dump_section_as_bytes): Handle the case where - uncompress_section_contents returns false. - -commit 1835f746a7c7fff70a2cc03a051b14fdc6b3f73f -Author: Nick Clifton -Date: Mon Feb 13 15:19:48 2017 +0000 - - Extend previous patch to cover uncompress_section_contents returning FALSE to other callers. - - PR binutils/21135 - (dump_section_as_bytes, load_specific_debug_section): Likewise. - -commit c12214021dedefcc2320827bcc1751f2d94ca2c6 -Author: Nick Clifton -Date: Mon Feb 13 17:23:10 2017 +0000 - - Fix illegal memory access bug in nm when run on a corrupt binary. - - PR binutils/21150 - * nm.c (file_symbol): Add test of string length before testing - string characters. - -commit d11135f55294d75099ad03f81bacbe8ae93a6b28 -Author: Nick Clifton -Date: Mon Feb 13 17:51:27 2017 +0000 - - Fix invalid memory access in the BFD library's DWARF parser. - - PR binutils/21151 - * dwarf2.c (_bfd_dwarf2_find_nearest_line): Check for an invalid - unit length field. - -commit b32e566ba6ee02687c6def22ade0899076adf7dd -Author: Nick Clifton -Date: Tue Feb 14 13:24:09 2017 +0000 - - Fix illegal memory access problems with readelf processing corrupt RL78 binaries. - - PR binutils/21155 - * readelf.c (IN_RANGE): New macro. Tests for an address + offset - being within a given range. - (target_specific_reloc_handling): Use macro to test for underflow - as well as overflow of reloc offset. - -commit a2dea0b20bc66a4c287c3c50002b8c3b3e9d953a -Author: Nick Clifton -Date: Tue Feb 14 14:07:29 2017 +0000 - - Fix handling of corrupt STABS enum type strings. - - PR binutils/21157 - * stabs.c (parse_stab_enum_type): Check for corrupt NAME:VALUE - pairs. - (parse_number): Exit early if passed an empty string. - -commit 92134dc19b4bf6407a88a306b771c9c6c88658d6 -Author: Nick Clifton -Date: Tue Feb 14 14:17:09 2017 +0000 - - Fix an illegal memory access parsing corrupt STABD debug information. - - PR binutils/21158 - * rddbg.c (read_symbol_stabs_debugging_info): Check for a null or - empty symbol name. - -commit bc303e5d6c2dd33086478f80fd1d3096d4e1bc01 -Author: Nick Clifton -Date: Tue Feb 14 15:10:34 2017 +0000 - - Fix invalid memory access displayiing contents of sections. - - PR binutils/21159 - * readelf.c (dump_section_as_strings): Reset the start address if - no decompression is perfromed. - (dump_section_as_bytes): Likewise. - -commit b814a36d3440de95f2ac6eaa4fc7935c322ea456 -Author: Nick Clifton -Date: Fri Feb 17 15:59:45 2017 +0000 - - Fix illegal memory accesses in readelf when parsing a corrupt binary. - - PR binutils/21156 - * readelf.c (find_section_in_set): Test for invalid section - indicies. - -commit 43a444f9c5bfd44b4304eafd78338e21d54bea14 -Author: Nick Clifton -Date: Mon Feb 20 14:40:39 2017 +0000 - - Fix another memory access error in readelf when parsing a corrupt binary. - - PR binutils/21156 - * dwarf.c (cu_tu_indexes_read): Move into... - (load_cu_tu_indexes): ... here. Change the variable into - tri-state. Change the function into boolean, returning - false if the indicies could not be loaded. - (find_cu_tu_set): Return NULL if the indicies could not be - loaded. - -commit 6438d1be9e9b6802a465c70c76b9cec7e23270f3 -Author: Nick Clifton -Date: Fri Feb 17 11:39:20 2017 +0000 - - Fix potential illegal memory access in ZLIB because of an erroneous declaration of the size of the input buffer. - - * compress.c (bfd_get_full_section_contents): Remember to reduce - compressed size by the sizeof the compression header when - decompressing the contents. - -Index: binutils-2.28/binutils/readelf.c -=================================================================== ---- binutils-2.28.orig/binutils/readelf.c 2017-03-02 09:23:53.000000000 +0100 -+++ binutils-2.28/binutils/readelf.c 2017-03-17 16:24:11.000000000 +0100 -@@ -675,8 +675,14 @@ find_section_in_set (const char * name, - if (set != NULL) - { - while ((i = *set++) > 0) -- if (streq (SECTION_NAME (section_headers + i), name)) -- return section_headers + i; -+ { -+ /* See PR 21156 for a reproducer. */ -+ if (i >= elf_header.e_shnum) -+ continue; /* FIXME: Should we issue an error message ? */ -+ -+ if (streq (SECTION_NAME (section_headers + i), name)) -+ return section_headers + i; -+ } - } - - return find_section (name); -@@ -5708,12 +5714,18 @@ get_elf_section_flags (bfd_vma sh_flags) - } - - static unsigned int --get_compression_header (Elf_Internal_Chdr *chdr, unsigned char *buf) -+get_compression_header (Elf_Internal_Chdr *chdr, unsigned char *buf, bfd_size_type size) - { - if (is_32bit_elf) - { - Elf32_External_Chdr *echdr = (Elf32_External_Chdr *) buf; - -+ if (size < sizeof (* echdr)) -+ { -+ error (_("Compressed section is too small even for a compression header\n")); -+ return 0; -+ } -+ - chdr->ch_type = BYTE_GET (echdr->ch_type); - chdr->ch_size = BYTE_GET (echdr->ch_size); - chdr->ch_addralign = BYTE_GET (echdr->ch_addralign); -@@ -5723,6 +5735,12 @@ get_compression_header (Elf_Internal_Chd - { - Elf64_External_Chdr *echdr = (Elf64_External_Chdr *) buf; - -+ if (size < sizeof (* echdr)) -+ { -+ error (_("Compressed section is too small even for a compression header\n")); -+ return 0; -+ } -+ - chdr->ch_type = BYTE_GET (echdr->ch_type); - chdr->ch_size = BYTE_GET (echdr->ch_size); - chdr->ch_addralign = BYTE_GET (echdr->ch_addralign); -@@ -6304,7 +6322,7 @@ process_section_headers (FILE * file) - { - Elf_Internal_Chdr chdr; - -- (void) get_compression_header (&chdr, buf); -+ (void) get_compression_header (&chdr, buf, sizeof (buf)); - - if (chdr.ch_type == ELFCOMPRESS_ZLIB) - printf (" ZLIB, "); -@@ -10012,7 +10030,7 @@ process_version_sections (FILE * file) - ent.vd_ndx, ent.vd_cnt); - - /* Check for overflow. */ -- if (ent.vd_aux > (size_t) (endbuf - vstart)) -+ if (ent.vd_aux + sizeof (* eaux) > (size_t) (endbuf - vstart)) - break; - - vstart += ent.vd_aux; -@@ -11577,16 +11595,32 @@ process_syminfo (FILE * file ATTRIBUTE_U - return 1; - } - -+#define IN_RANGE(START,END,ADDR,OFF) \ -+ (((ADDR) >= (START)) && ((ADDR) + (OFF) < (END))) -+ - /* Check to see if the given reloc needs to be handled in a target specific - manner. If so then process the reloc and return TRUE otherwise return -- FALSE. */ -+ FALSE. -+ -+ If called with reloc == NULL, then this is a signal that reloc processing -+ for the current section has finished, and any saved state should be -+ discarded. */ - - static bfd_boolean - target_specific_reloc_handling (Elf_Internal_Rela * reloc, - unsigned char * start, -- Elf_Internal_Sym * symtab) -+ unsigned char * end, -+ Elf_Internal_Sym * symtab, -+ unsigned long num_syms) - { -- unsigned int reloc_type = get_reloc_type (reloc->r_info); -+ unsigned int reloc_type = 0; -+ unsigned long sym_index = 0; -+ -+ if (reloc) -+ { -+ reloc_type = get_reloc_type (reloc->r_info); -+ sym_index = get_reloc_symindex (reloc->r_info); -+ } - - switch (elf_header.e_machine) - { -@@ -11595,6 +11629,12 @@ target_specific_reloc_handling (Elf_Inte - { - static Elf_Internal_Sym * saved_sym = NULL; - -+ if (reloc == NULL) -+ { -+ saved_sym = NULL; -+ return TRUE; -+ } -+ - switch (reloc_type) - { - case 10: /* R_MSP430_SYM_DIFF */ -@@ -11602,7 +11642,12 @@ target_specific_reloc_handling (Elf_Inte - break; - /* Fall through. */ - case 21: /* R_MSP430X_SYM_DIFF */ -- saved_sym = symtab + get_reloc_symindex (reloc->r_info); -+ /* PR 21139. */ -+ if (sym_index >= num_syms) -+ error (_("MSP430 SYM_DIFF reloc contains invalid symbol index %lu\n"), -+ sym_index); -+ else -+ saved_sym = symtab + sym_index; - return TRUE; - - case 1: /* R_MSP430_32 or R_MSP430_ABS32 */ -@@ -11624,13 +11669,24 @@ target_specific_reloc_handling (Elf_Inte - handle_sym_diff: - if (saved_sym != NULL) - { -+ int reloc_size = reloc_type == 1 ? 4 : 2; - bfd_vma value; - -- value = reloc->r_addend -- + (symtab[get_reloc_symindex (reloc->r_info)].st_value -- - saved_sym->st_value); -+ if (sym_index >= num_syms) -+ error (_("MSP430 reloc contains invalid symbol index %lu\n"), -+ sym_index); -+ else -+ { -+ value = reloc->r_addend + (symtab[sym_index].st_value -+ - saved_sym->st_value); - -- byte_put (start + reloc->r_offset, value, reloc_type == 1 ? 4 : 2); -+ if (IN_RANGE (start, end, start + reloc->r_offset, reloc_size)) -+ byte_put (start + reloc->r_offset, value, reloc_size); -+ else -+ /* PR 21137 */ -+ error (_("MSP430 sym diff reloc contains invalid offset: 0x%lx\n"), -+ (long) reloc->r_offset); -+ } - - saved_sym = NULL; - return TRUE; -@@ -11650,24 +11706,45 @@ target_specific_reloc_handling (Elf_Inte - { - static Elf_Internal_Sym * saved_sym = NULL; - -+ if (reloc == NULL) -+ { -+ saved_sym = NULL; -+ return TRUE; -+ } -+ - switch (reloc_type) - { - case 34: /* R_MN10300_ALIGN */ - return TRUE; - case 33: /* R_MN10300_SYM_DIFF */ -- saved_sym = symtab + get_reloc_symindex (reloc->r_info); -+ if (sym_index >= num_syms) -+ error (_("MN10300_SYM_DIFF reloc contains invalid symbol index %lu\n"), -+ sym_index); -+ else -+ saved_sym = symtab + sym_index; - return TRUE; -+ - case 1: /* R_MN10300_32 */ - case 2: /* R_MN10300_16 */ - if (saved_sym != NULL) - { -+ int reloc_size = reloc_type == 1 ? 4 : 2; - bfd_vma value; - -- value = reloc->r_addend -- + (symtab[get_reloc_symindex (reloc->r_info)].st_value -- - saved_sym->st_value); -+ if (sym_index >= num_syms) -+ error (_("MN10300 reloc contains invalid symbol index %lu\n"), -+ sym_index); -+ else -+ { -+ value = reloc->r_addend + (symtab[sym_index].st_value -+ - saved_sym->st_value); - -- byte_put (start + reloc->r_offset, value, reloc_type == 1 ? 4 : 2); -+ if (IN_RANGE (start, end, start + reloc->r_offset, reloc_size)) -+ byte_put (start + reloc->r_offset, value, reloc_size); -+ else -+ error (_("MN10300 sym diff reloc contains invalid offset: 0x%lx\n"), -+ (long) reloc->r_offset); -+ } - - saved_sym = NULL; - return TRUE; -@@ -11687,12 +11764,24 @@ target_specific_reloc_handling (Elf_Inte - static bfd_vma saved_sym2 = 0; - static bfd_vma value; - -+ if (reloc == NULL) -+ { -+ saved_sym1 = saved_sym2 = 0; -+ return TRUE; -+ } -+ - switch (reloc_type) - { - case 0x80: /* R_RL78_SYM. */ - saved_sym1 = saved_sym2; -- saved_sym2 = symtab[get_reloc_symindex (reloc->r_info)].st_value; -- saved_sym2 += reloc->r_addend; -+ if (sym_index >= num_syms) -+ error (_("RL78_SYM reloc contains invalid symbol index %lu\n"), -+ sym_index); -+ else -+ { -+ saved_sym2 = symtab[sym_index].st_value; -+ saved_sym2 += reloc->r_addend; -+ } - return TRUE; - - case 0x83: /* R_RL78_OPsub. */ -@@ -11702,12 +11791,20 @@ target_specific_reloc_handling (Elf_Inte - break; - - case 0x41: /* R_RL78_ABS32. */ -- byte_put (start + reloc->r_offset, value, 4); -+ if (IN_RANGE (start, end, start + reloc->r_offset, 4)) -+ byte_put (start + reloc->r_offset, value, 4); -+ else -+ error (_("RL78 sym diff reloc contains invalid offset: 0x%lx\n"), -+ (long) reloc->r_offset); - value = 0; - return TRUE; - - case 0x43: /* R_RL78_ABS16. */ -- byte_put (start + reloc->r_offset, value, 2); -+ if (IN_RANGE (start, end, start + reloc->r_offset, 2)) -+ byte_put (start + reloc->r_offset, value, 2); -+ else -+ error (_("RL78 sym diff reloc contains invalid offset: 0x%lx\n"), -+ (long) reloc->r_offset); - value = 0; - return TRUE; - -@@ -12324,7 +12421,7 @@ apply_relocations (void * - - reloc_type = get_reloc_type (rp->r_info); - -- if (target_specific_reloc_handling (rp, start, symtab)) -+ if (target_specific_reloc_handling (rp, start, end, symtab, num_syms)) - continue; - else if (is_none_reloc (reloc_type)) - continue; -@@ -12420,6 +12517,9 @@ apply_relocations (void * - } - - free (symtab); -+ /* Let the target specific reloc processing code know that -+ we have finished with these relocs. */ -+ target_specific_reloc_handling (NULL, NULL, NULL, NULL, 0); - - if (relocs_return) - { -@@ -12548,7 +12648,8 @@ dump_section_as_strings (Elf_Internal_Sh - { - Elf_Internal_Chdr chdr; - unsigned int compression_header_size -- = get_compression_header (& chdr, (unsigned char *) start); -+ = get_compression_header (& chdr, (unsigned char *) start, -+ num_bytes); - - if (chdr.ch_type != ELFCOMPRESS_ZLIB) - { -@@ -12583,10 +12684,20 @@ dump_section_as_strings (Elf_Internal_Sh - new_size -= 12; - } - -- if (uncompressed_size -- && uncompress_section_contents (& start, -- uncompressed_size, & new_size)) -- num_bytes = new_size; -+ if (uncompressed_size) -+ { -+ if (uncompress_section_contents (& start, -+ uncompressed_size, & new_size)) -+ num_bytes = new_size; -+ else -+ { -+ error (_("Unable to decompress section %s\n"), -+ printable_section_name (section)); -+ return; -+ } -+ } -+ else -+ start = real_start; - } - - /* If the section being dumped has relocations against it the user might -@@ -12682,7 +12793,7 @@ dump_section_as_bytes (Elf_Internal_Shdr - { - Elf_Internal_Chdr chdr; - unsigned int compression_header_size -- = get_compression_header (& chdr, start); -+ = get_compression_header (& chdr, start, section_size); - - if (chdr.ch_type != ELFCOMPRESS_ZLIB) - { -@@ -12717,10 +12828,23 @@ dump_section_as_bytes (Elf_Internal_Shdr - new_size -= 12; - } - -- if (uncompressed_size -- && uncompress_section_contents (& start, uncompressed_size, -- & new_size)) -- section_size = new_size; -+ if (uncompressed_size) -+ { -+ if (uncompress_section_contents (& start, uncompressed_size, -+ & new_size)) -+ { -+ section_size = new_size; -+ } -+ else -+ { -+ error (_("Unable to decompress section %s\n"), -+ printable_section_name (section)); -+ /* FIXME: Print the section anyway ? */ -+ return; -+ } -+ } -+ else -+ start = real_start; - } - - if (relocate) -@@ -12835,7 +12959,7 @@ load_specific_debug_section (enum dwarf_ - return 0; - } - -- compression_header_size = get_compression_header (&chdr, start); -+ compression_header_size = get_compression_header (&chdr, start, size); - - if (chdr.ch_type != ELFCOMPRESS_ZLIB) - { -@@ -12870,15 +12994,24 @@ load_specific_debug_section (enum dwarf_ - size -= 12; - } - -- if (uncompressed_size -- && uncompress_section_contents (&start, uncompressed_size, -- &size)) -- { -- /* Free the compressed buffer, update the section buffer -- and the section size if uncompress is successful. */ -- free (section->start); -- section->start = start; -+ if (uncompressed_size) -+ { -+ if (uncompress_section_contents (&start, uncompressed_size, -+ &size)) -+ { -+ /* Free the compressed buffer, update the section buffer -+ and the section size if uncompress is successful. */ -+ free (section->start); -+ section->start = start; -+ } -+ else -+ { -+ error (_("Unable to decompress section %s\n"), -+ printable_section_name (sec)); -+ return 0; -+ } - } -+ - section->size = size; - } - -@@ -13077,9 +13210,12 @@ process_section_contents (FILE * file) - - /* Check to see if the user requested a - dump of a section that does not exist. */ -- while (i++ < num_dump_sects) -- if (dump_sects[i]) -- warn (_("Section %d was not dumped because it does not exist!\n"), i); -+ while (i < num_dump_sects) -+ { -+ if (dump_sects[i]) -+ warn (_("Section %d was not dumped because it does not exist!\n"), i); -+ i++; -+ } - } - - static void -Index: binutils-2.28/binutils/nm.c -=================================================================== ---- binutils-2.28.orig/binutils/nm.c 2017-03-02 09:23:53.000000000 +0100 -+++ binutils-2.28/binutils/nm.c 2017-03-17 16:24:11.000000000 +0100 -@@ -685,7 +685,8 @@ size_forward1 (const void *P_x, const vo - - #define file_symbol(s, sn, snl) \ - (((s)->flags & BSF_FILE) != 0 \ -- || ((sn)[(snl) - 2] == '.' \ -+ || ((snl) > 2 \ -+ && (sn)[(snl) - 2] == '.' \ - && ((sn)[(snl) - 1] == 'o' \ - || (sn)[(snl) - 1] == 'a'))) - -Index: binutils-2.28/bfd/dwarf2.c -=================================================================== ---- binutils-2.28.orig/bfd/dwarf2.c 2017-03-02 09:23:53.000000000 +0100 -+++ binutils-2.28/bfd/dwarf2.c 2017-03-17 16:24:11.000000000 +0100 -@@ -4288,6 +4288,10 @@ _bfd_dwarf2_find_nearest_line (bfd *abfd - { - bfd_byte * new_ptr; - -+ /* PR 21151 */ -+ if (stash->info_ptr + length > stash->info_ptr_end) -+ return FALSE; -+ - each = parse_comp_unit (stash, length, info_ptr_unit, - offset_size); - if (!each) -Index: binutils-2.28/binutils/stabs.c -=================================================================== ---- binutils-2.28.orig/binutils/stabs.c 2017-03-02 09:23:53.000000000 +0100 -+++ binutils-2.28/binutils/stabs.c 2017-03-17 16:24:11.000000000 +0100 -@@ -232,6 +232,10 @@ parse_number (const char **pp, bfd_boole - - orig = *pp; - -+ /* Stop early if we are passed an empty string. */ -+ if (*orig == 0) -+ return (bfd_vma) 0; -+ - errno = 0; - ul = strtoul (*pp, (char **) pp, 0); - if (ul + 1 != 0 || errno == 0) -@@ -1975,9 +1979,17 @@ parse_stab_enum_type (void *dhandle, con - bfd_signed_vma val; - - p = *pp; -- while (*p != ':') -+ while (*p != ':' && *p != 0) - ++p; - -+ if (*p == 0) -+ { -+ bad_stab (orig); -+ free (names); -+ free (values); -+ return DEBUG_TYPE_NULL; -+ } -+ - name = savestring (*pp, p - *pp); - - *pp = p + 1; -Index: binutils-2.28/binutils/rddbg.c -=================================================================== ---- binutils-2.28.orig/binutils/rddbg.c 2017-03-02 09:23:53.000000000 +0100 -+++ binutils-2.28/binutils/rddbg.c 2017-03-17 16:24:11.000000000 +0100 -@@ -299,7 +299,10 @@ read_symbol_stabs_debugging_info (bfd *a - *pfound = TRUE; - - s = i.name; -+ if (s == NULL || strlen (s) < 1) -+ return FALSE; - f = NULL; -+ - while (s[strlen (s) - 1] == '\\' - && ps + 1 < symend) - { -Index: binutils-2.28/binutils/dwarf.c -=================================================================== ---- binutils-2.28.orig/binutils/dwarf.c 2017-03-02 09:23:53.000000000 +0100 -+++ binutils-2.28/binutils/dwarf.c 2017-03-17 16:24:11.000000000 +0100 -@@ -76,7 +76,6 @@ int dwarf_check = 0; - as a zero-terminated list of section indexes comprising one set of debug - sections from a .dwo file. */ - --static int cu_tu_indexes_read = 0; - static unsigned int *shndx_pool = NULL; - static unsigned int shndx_pool_size = 0; - static unsigned int shndx_pool_used = 0; -@@ -99,7 +98,7 @@ static int tu_count = 0; - static struct cu_tu_set *cu_sets = NULL; - static struct cu_tu_set *tu_sets = NULL; - --static void load_cu_tu_indexes (void *file); -+static bfd_boolean load_cu_tu_indexes (void *); - - /* Values for do_debug_lines. */ - #define FLAG_DEBUG_LINES_RAW 1 -@@ -2715,7 +2714,7 @@ load_debug_info (void * file) - return num_debug_info_entries; - - /* If this is a DWARF package file, load the CU and TU indexes. */ -- load_cu_tu_indexes (file); -+ (void) load_cu_tu_indexes (file); - - if (load_debug_section (info, file) - && process_debug_info (&debug_displays [info].section, file, abbrev, 1, 0)) -@@ -7378,21 +7377,27 @@ process_cu_tu_index (struct dwarf_sectio - section sets that we can use to associate a .debug_info.dwo section - with its associated .debug_abbrev.dwo section in a .dwp file. */ - --static void -+static bfd_boolean - load_cu_tu_indexes (void *file) - { -+ static int cu_tu_indexes_read = -1; /* Tri-state variable. */ -+ - /* If we have already loaded (or tried to load) the CU and TU indexes - then do not bother to repeat the task. */ -- if (cu_tu_indexes_read) -- return; -- -- if (load_debug_section (dwp_cu_index, file)) -- process_cu_tu_index (&debug_displays [dwp_cu_index].section, 0); -+ if (cu_tu_indexes_read == -1) -+ { -+ cu_tu_indexes_read = TRUE; -+ -+ if (load_debug_section (dwp_cu_index, file)) -+ if (! process_cu_tu_index (&debug_displays [dwp_cu_index].section, 0)) -+ cu_tu_indexes_read = FALSE; - -- if (load_debug_section (dwp_tu_index, file)) -- process_cu_tu_index (&debug_displays [dwp_tu_index].section, 0); -+ if (load_debug_section (dwp_tu_index, file)) -+ if (! process_cu_tu_index (&debug_displays [dwp_tu_index].section, 0)) -+ cu_tu_indexes_read = FALSE; -+ } - -- cu_tu_indexes_read = 1; -+ return (bfd_boolean) cu_tu_indexes_read; - } - - /* Find the set of sections that includes section SHNDX. */ -@@ -7402,7 +7407,8 @@ find_cu_tu_set (void *file, unsigned int - { - unsigned int i; - -- load_cu_tu_indexes (file); -+ if (! load_cu_tu_indexes (file)) -+ return NULL; - - /* Find SHNDX in the shndx pool. */ - for (i = 0; i < shndx_pool_used; i++) -Index: binutils-2.28/bfd/compress.c -=================================================================== ---- binutils-2.28.orig/bfd/compress.c 2017-03-02 09:23:53.000000000 +0100 -+++ binutils-2.28/bfd/compress.c 2017-03-17 16:24:11.000000000 +0100 -@@ -300,7 +300,7 @@ bfd_get_full_section_contents (bfd *abfd - SHF_COMPRESSED section. */ - compression_header_size = 12; - if (!decompress_contents (compressed_buffer + compression_header_size, -- sec->compressed_size, p, sz)) -+ sec->compressed_size - compression_header_size, p, sz)) - { - bfd_set_error (bfd_error_bad_value); - if (p != *ptr) diff --git a/ld-dtags.diff b/ld-dtags.diff deleted file mode 100644 index 0ef8c3c..0000000 --- a/ld-dtags.diff +++ /dev/null @@ -1,73 +0,0 @@ -Index: binutils-2.24/ld/ld.texinfo -=================================================================== ---- binutils-2.24.orig/ld/ld.texinfo -+++ binutils-2.24/ld/ld.texinfo -@@ -2117,7 +2117,7 @@ systems may not understand them. If you - @option{--enable-new-dtags}, the new dynamic tags will be created as needed - and older dynamic tags will be omitted. - If you specify @option{--disable-new-dtags}, no new dynamic tags will be --created. By default, the new dynamic tags are not created. Note that -+created. By default, the new dynamic tags are created. Note that - those options are only available for ELF systems. - - @kindex --hash-size=@var{number} -Index: binutils-2.24/ld/ldmain.c -=================================================================== ---- binutils-2.24.orig/ld/ldmain.c -+++ binutils-2.24/ld/ldmain.c -@@ -276,6 +276,7 @@ main (int argc, char **argv) - - link_info.allow_undefined_version = TRUE; - link_info.keep_memory = TRUE; -+ link_info.new_dtags = TRUE; - link_info.combreloc = TRUE; - link_info.strip_discarded = TRUE; - link_info.emit_hash = TRUE; -Index: binutils-2.24/ld/testsuite/ld-elf/now-3.d -=================================================================== ---- binutils-2.24.orig/ld/testsuite/ld-elf/now-3.d -+++ binutils-2.24/ld/testsuite/ld-elf/now-3.d -@@ -1,6 +1,6 @@ - #source: start.s - #readelf: -d -W --#ld: -shared -z now -+#ld: -shared -z now --disable-new-dtags - #target: *-*-linux* *-*-gnu* - - #failif -Index: binutils-2.24/ld/testsuite/ld-elf/now-4.d -=================================================================== ---- binutils-2.24.orig/ld/testsuite/ld-elf/now-4.d -+++ binutils-2.24/ld/testsuite/ld-elf/now-4.d -@@ -1,6 +1,6 @@ - #source: start.s - #readelf: -d -W --#ld: -shared -z now -+#ld: -shared -z now --disable-new-dtags - #target: *-*-linux* *-*-gnu* - - #... -Index: binutils-2.24/ld/testsuite/ld-elf/rpath-1.d -=================================================================== ---- binutils-2.24.orig/ld/testsuite/ld-elf/rpath-1.d -+++ binutils-2.24/ld/testsuite/ld-elf/rpath-1.d -@@ -1,6 +1,6 @@ - #source: start.s - #readelf: -d -W --#ld: -shared -rpath . -+#ld: -shared -rpath . --disable-new-dtags - #target: *-*-linux* *-*-gnu* - - #failif -Index: binutils-2.24/ld/testsuite/ld-elf/rpath-2.d -=================================================================== ---- binutils-2.24.orig/ld/testsuite/ld-elf/rpath-2.d -+++ binutils-2.24/ld/testsuite/ld-elf/rpath-2.d -@@ -1,6 +1,6 @@ - #source: start.s - #readelf: -d -W --#ld: -shared -rpath . -+#ld: -shared -rpath . --disable-new-dtags - #target: *-*-linux* *-*-gnu* - - #...