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binutils/binutils-fix-relax.diff
Michael Matz f32da6f20f - Update to version 2.43:
* new .base64 pseudo-op, allowing base64 encoded data as strings
* Intel APX: add support for CFCMOV, CCMP, CTEST, zero-upper, NF
  (APX_F now fully supported)
* x86 Intel syntax now warns about more mnemonic suffixes
* macros and .irp/.irpc/.rept bodies can use \+ to get at number of times
  the macro/body was executed
* aarch64: support 'armv9.5-a' for -march, add support for LUT and LUT2
* s390: base register operand in D(X,B) and D(L,B) can now be omitted
  (ala 'D(X,)'); warn when register type doesn't match operand type
  (use option 'warn-regtype-mismatch=[strict|relaxed|no]' to adjust)
* riscv: support various extensions: Zacas, Zcmp, Zfbfmin, Zvfbfmin,
  Zvfbfwma, Smcsrind/Sscsrind, XCvMem, XCvBi, XCvElw, XSfCease, all at
  version 1.0;
  remove support for assembly of privileged spec 1.9.1 (linking support
  remains)
* arm: remove support for some old co-processors: Maverick and FPA
* mips: '--trap' now causes either trap or breakpoint instructions to
  be emitted as per current ISA, instead of always using trap insn
  and failing when current ISA was incompatible with that
* LoongArch: accept .option pseudo-op for fine-grained control
  of assembly code options; add support for DT_RELR
* readelf: now displays RELR relocations in full detail;
  add -j/--display-section to show just those section(s) content
  according to their type
* objdump/readelf now dump also .eh_frame_hdr (when present) when
  dumping .eh_frame
* gprofng: add event types for AMD Zen3/Zen4 and Intel Ice Lake processors;
  add minimal support for riscv
* linker:

OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=471
2024-08-06 14:38:53 +00:00

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Diff

Fix for bsc#1179341
the movload->movconst relaxation can be done only with REX
rewriting, and hence needs a GOTPCRELX relocation. With old object
files we might still see GOTPCREL relocs, even with REX bytes available.
We still can't do such rewriting and hence need to stay with the old
rewriting into a lea.
diff --git a/bfd/elf64-x86-64.c b/bfd/elf64-x86-64.c
index 549a8be6a6..b89b0023db 100644
--- a/bfd/elf64-x86-64.c
+++ b/bfd/elf64-x86-64.c
@@ -1731,7 +1731,7 @@ elf_x86_64_convert_load_reloc (bfd *abfd,
if (opcode == 0x8b)
{
- if (abs_symbol && local_ref && relocx)
+ if (abs_symbol && local_ref && relocx && rex)
to_reloc_pc32 = false;
if (to_reloc_pc32)