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binutils/binutils-revert-hlasm-insns.diff
Michael Matz f32da6f20f - Update to version 2.43:
* new .base64 pseudo-op, allowing base64 encoded data as strings
* Intel APX: add support for CFCMOV, CCMP, CTEST, zero-upper, NF
  (APX_F now fully supported)
* x86 Intel syntax now warns about more mnemonic suffixes
* macros and .irp/.irpc/.rept bodies can use \+ to get at number of times
  the macro/body was executed
* aarch64: support 'armv9.5-a' for -march, add support for LUT and LUT2
* s390: base register operand in D(X,B) and D(L,B) can now be omitted
  (ala 'D(X,)'); warn when register type doesn't match operand type
  (use option 'warn-regtype-mismatch=[strict|relaxed|no]' to adjust)
* riscv: support various extensions: Zacas, Zcmp, Zfbfmin, Zvfbfmin,
  Zvfbfwma, Smcsrind/Sscsrind, XCvMem, XCvBi, XCvElw, XSfCease, all at
  version 1.0;
  remove support for assembly of privileged spec 1.9.1 (linking support
  remains)
* arm: remove support for some old co-processors: Maverick and FPA
* mips: '--trap' now causes either trap or breakpoint instructions to
  be emitted as per current ISA, instead of always using trap insn
  and failing when current ISA was incompatible with that
* LoongArch: accept .option pseudo-op for fine-grained control
  of assembly code options; add support for DT_RELR
* readelf: now displays RELR relocations in full detail;
  add -j/--display-section to show just those section(s) content
  according to their type
* objdump/readelf now dump also .eh_frame_hdr (when present) when
  dumping .eh_frame
* gprofng: add event types for AMD Zen3/Zen4 and Intel Ice Lake processors;
  add minimal support for riscv
* linker:

OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=471
2024-08-06 14:38:53 +00:00

366 lines
16 KiB
Diff

This reverts commit b10b530a4566, because generating 'jgnop'
from 'bcrl' confuses some parsing tools (in particular kernels
recordmcount.pl tool) on s390x.
Due to the way the assembler and disassembler are implemented we need
to disable both, the assembly and disassembly of the problematic
mnemonic (that's only a problem for jgnop vs brcl, but still).
So, just revert the whole commit.
v2: this adjusts the reversion of above commit to care for commit
0cfd6cffde32726ca69cde6ed3cc1ece21b9cf7c that changes the touched
testcases so that it applies again, so it's not a simple revert of
above commit anymore.
v3: Adjust for 9c422a59953 and 3f3c1e513.
(We leave out the patch to ChangeLog in the reversion)
Index: binutils-2.42/gas/testsuite/gas/s390/esa-g5.d
===================================================================
--- binutils-2.42.orig/gas/testsuite/gas/s390/esa-g5.d 2024-01-29 01:00:00.000000000 +0100
+++ binutils-2.42/gas/testsuite/gas/s390/esa-g5.d 2024-01-30 17:37:08.609356666 +0100
@@ -78,15 +78,11 @@ Disassembly of section .text:
.*: 07 29 [ ]*bhr %r9
.*: 07 f9 [ ]*br %r9
*([\da-f]+): a7 95 00 00 [ ]*bras %r9,\1 <foo\+0x\1>
- *([\da-f]+): a7 65 00 00 [ ]*bras %r6,\1 <foo\+0x\1>
*([\da-f]+): a7 64 00 00 [ ]*jlh \1 <foo\+0x\1>
*([\da-f]+): a7 64 00 00 [ ]*jlh \1 <foo\+0x\1>
*([\da-f]+): a7 66 00 00 [ ]*brct %r6,\1 <foo\+0x\1>
- *([\da-f]+): a7 66 00 00 [ ]*brct %r6,\1 <foo\+0x\1>
- *([\da-f]+): 84 69 00 00 [ ]*brxh %r6,%r9,\1 <foo\+0x\1>
*([\da-f]+): 84 69 00 00 [ ]*brxh %r6,%r9,\1 <foo\+0x\1>
*([\da-f]+): 85 69 00 00 [ ]*brxle %r6,%r9,\1 <foo\+0x\1>
- *([\da-f]+): 85 69 00 00 [ ]*brxle %r6,%r9,\1 <foo\+0x\1>
.*: b2 5a 00 69 [ ]*bsa %r6,%r9
.*: b2 58 00 69 [ ]*bsg %r6,%r9
.*: 0b 69 [ ]*bsm %r6,%r9
@@ -206,28 +202,6 @@ Disassembly of section .text:
*([\da-f]+): a7 14 00 00 [ ]*jo \1 <foo\+0x\1>
*([\da-f]+): a7 24 00 00 [ ]*jh \1 <foo\+0x\1>
*([\da-f]+): a7 84 00 00 [ ]*je \1 <foo\+0x\1>
- *([\da-f]+): a7 04 00 00 [ ]*jnop \1 <foo\+0x\1>
- *([\da-f]+): a7 14 00 00 [ ]*jo \1 <foo\+0x\1>
- *([\da-f]+): a7 24 00 00 [ ]*jh \1 <foo\+0x\1>
- *([\da-f]+): a7 24 00 00 [ ]*jh \1 <foo\+0x\1>
- *([\da-f]+): a7 34 00 00 [ ]*jnle \1 <foo\+0x\1>
- *([\da-f]+): a7 44 00 00 [ ]*jl \1 <foo\+0x\1>
- *([\da-f]+): a7 44 00 00 [ ]*jl \1 <foo\+0x\1>
- *([\da-f]+): a7 54 00 00 [ ]*jnhe \1 <foo\+0x\1>
- *([\da-f]+): a7 64 00 00 [ ]*jlh \1 <foo\+0x\1>
- *([\da-f]+): a7 74 00 00 [ ]*jne \1 <foo\+0x\1>
- *([\da-f]+): a7 74 00 00 [ ]*jne \1 <foo\+0x\1>
- *([\da-f]+): a7 84 00 00 [ ]*je \1 <foo\+0x\1>
- *([\da-f]+): a7 84 00 00 [ ]*je \1 <foo\+0x\1>
- *([\da-f]+): a7 94 00 00 [ ]*jnlh \1 <foo\+0x\1>
- *([\da-f]+): a7 a4 00 00 [ ]*jhe \1 <foo\+0x\1>
- *([\da-f]+): a7 b4 00 00 [ ]*jnl \1 <foo\+0x\1>
- *([\da-f]+): a7 b4 00 00 [ ]*jnl \1 <foo\+0x\1>
- *([\da-f]+): a7 c4 00 00 [ ]*jle \1 <foo\+0x\1>
- *([\da-f]+): a7 d4 00 00 [ ]*jnh \1 <foo\+0x\1>
- *([\da-f]+): a7 d4 00 00 [ ]*jnh \1 <foo\+0x\1>
- *([\da-f]+): a7 e4 00 00 [ ]*jno \1 <foo\+0x\1>
- *([\da-f]+): a7 f4 00 00 [ ]*j \1 <foo\+0x\1>
.*: ed 65 af ff 00 18 [ ]*kdb %f6,4095\(%r5,%r10\)
.*: b3 18 00 69 [ ]*kdbr %f6,%f9
.*: ed 65 af ff 00 08 [ ]*keb %f6,4095\(%r5,%r10\)
@@ -510,4 +484,4 @@ Disassembly of section .text:
.*: f8 58 5f ff af ff [ ]*zap 4095\(6,%r5\),4095\(9,%r10\)
.*: b2 21 b0 69 [ ]*ipte %r6,%r9,%r11
.*: b2 21 bd 69 [ ]*ipte %r6,%r9,%r11,13
-.*: 07 07 [ ]*nopr %r7
+.*: 07 07 [ ]*nopr %r7
Index: binutils-2.42/gas/testsuite/gas/s390/esa-g5.s
===================================================================
--- binutils-2.42.orig/gas/testsuite/gas/s390/esa-g5.s 2024-01-29 01:00:00.000000000 +0100
+++ binutils-2.42/gas/testsuite/gas/s390/esa-g5.s 2024-01-30 17:11:14.563730960 +0100
@@ -72,15 +72,11 @@ foo:
bpr %r9
br %r9
bras %r9,.
- jas %r6,.
brc 6,.
jc 6,.
brct 6,.
- jct %r6,.
brxh %r6,%r9,.
- jxh %r6,%r9,.
brxle %r6,%r9,.
- jxle %r6,%r9,.
bsa %r6,%r9
bsg %r6,%r9
bsm %r6,%r9
@@ -200,28 +196,6 @@ foo:
jo .
jp .
jz .
- jnop .
- bro .
- brh .
- brp .
- brnle .
- brl .
- brm .
- brnhe .
- brlh .
- brne .
- brnz .
- bre .
- brz .
- brnlh .
- brhe .
- brnl .
- brnm .
- brle .
- brnh .
- brnp .
- brno .
- bru .
kdb %f6,4095(%r5,%r10)
kdbr %f6,%f9
keb %f6,4095(%r5,%r10)
Index: binutils-2.42/gas/testsuite/gas/s390/esa-z900.d
===================================================================
--- binutils-2.42.orig/gas/testsuite/gas/s390/esa-z900.d 2024-01-29 01:00:00.000000000 +0100
+++ binutils-2.42/gas/testsuite/gas/s390/esa-z900.d 2024-01-30 17:46:09.638230382 +0100
@@ -7,28 +7,6 @@ Disassembly of section .text:
.* <foo>:
.*: c0 f4 00 00 00 00 [ ]*jg 0 <foo>
- *([\da-f]+): c0 04 00 00 00 00 [ ]*jgnop \1 <foo\+0x\1>
- *([\da-f]+): c0 14 00 00 00 00 [ ]*jgo \1 <foo\+0x\1>
- *([\da-f]+): c0 24 00 00 00 00 [ ]*jgh \1 <foo\+0x\1>
- *([\da-f]+): c0 24 00 00 00 00 [ ]*jgh \1 <foo\+0x\1>
- *([\da-f]+): c0 34 00 00 00 00 [ ]*jgnle \1 <foo\+0x\1>
- *([\da-f]+): c0 44 00 00 00 00 [ ]*jgl \1 <foo\+0x\1>
- *([\da-f]+): c0 44 00 00 00 00 [ ]*jgl \1 <foo\+0x\1>
- *([\da-f]+): c0 54 00 00 00 00 [ ]*jgnhe \1 <foo\+0x\1>
- *([\da-f]+): c0 64 00 00 00 00 [ ]*jglh \1 <foo\+0x\1>
- *([\da-f]+): c0 74 00 00 00 00 [ ]*jgne \1 <foo\+0x\1>
- *([\da-f]+): c0 74 00 00 00 00 [ ]*jgne \1 <foo\+0x\1>
- *([\da-f]+): c0 84 00 00 00 00 [ ]*jge \1 <foo\+0x\1>
- *([\da-f]+): c0 84 00 00 00 00 [ ]*jge \1 <foo\+0x\1>
- *([\da-f]+): c0 94 00 00 00 00 [ ]*jgnlh \1 <foo\+0x\1>
- *([\da-f]+): c0 a4 00 00 00 00 [ ]*jghe \1 <foo\+0x\1>
- *([\da-f]+): c0 b4 00 00 00 00 [ ]*jgnl \1 <foo\+0x\1>
- *([\da-f]+): c0 b4 00 00 00 00 [ ]*jgnl \1 <foo\+0x\1>
- *([\da-f]+): c0 c4 00 00 00 00 [ ]*jgle \1 <foo\+0x\1>
- *([\da-f]+): c0 d4 00 00 00 00 [ ]*jgnh \1 <foo\+0x\1>
- *([\da-f]+): c0 d4 00 00 00 00 [ ]*jgnh \1 <foo\+0x\1>
- *([\da-f]+): c0 e4 00 00 00 00 [ ]*jgno \1 <foo\+0x\1>
- *([\da-f]+): c0 f4 00 00 00 00 [ ]*jg \1 <foo\+0x\1>
*([\da-f]+): c0 14 00 00 00 00 [ ]*jgo \1 <foo\+0x\1>
*([\da-f]+): c0 24 00 00 00 00 [ ]*jgh \1 <foo\+0x\1>
*([\da-f]+): c0 24 00 00 00 00 [ ]*jgh \1 <foo\+0x\1>
@@ -51,11 +29,8 @@ Disassembly of section .text:
*([\da-f]+): c0 e4 00 00 00 00 [ ]*jgno \1 <foo\+0x\1>
*([\da-f]+): c0 f4 00 00 00 00 [ ]*jg \1 <foo\+0x\1>
*([\da-f]+): c0 65 00 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
- *([\da-f]+): c0 65 00 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
- *([\da-f]+): c0 65 80 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
*([\da-f]+): c0 65 80 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
-.*: c0 65 7f ff ff ff [ ]*brasl %r6,11e <foo\+0x11e>
-.*: c0 65 7f ff ff ff [ ]*brasl %r6,124 <foo\+0x124>
+.*: c0 65 7f ff ff ff [ ]*brasl %r6,8e <foo\+0x8e>
.*: 01 0b [ ]*tam
.*: 01 0c [ ]*sam24
.*: 01 0d [ ]*sam31
@@ -76,4 +51,3 @@ Disassembly of section .text:
.*: e3 65 af ff 00 98 [ ]*alc %r6,4095\(%r5,%r10\)
.*: e3 65 af ff 00 99 [ ]*slb %r6,4095\(%r5,%r10\)
.*: eb 69 5f ff 00 1d [ ]*rll %r6,%r9,4095\(%r5\)
-.*: 07 07 [ ]*nopr %r7
Index: binutils-2.42/gas/testsuite/gas/s390/esa-z900.s
===================================================================
--- binutils-2.42.orig/gas/testsuite/gas/s390/esa-z900.s 2024-01-29 01:00:00.000000000 +0100
+++ binutils-2.42/gas/testsuite/gas/s390/esa-z900.s 2024-01-30 17:05:15.811158036 +0100
@@ -1,7 +1,6 @@
.text
foo:
brcl 15,.
- jgnop .
jgo .
jgh .
jgp .
@@ -23,33 +22,9 @@ foo:
jgnp .
jgno .
jg .
- brol .
- brhl .
- brpl .
- brnlel .
- brll .
- brml .
- brnhel .
- brlhl .
- brnel .
- brnzl .
- brel .
- brzl .
- brnlhl .
- brhel .
- brnll .
- brnml .
- brlel .
- brnhl .
- brnpl .
- brnol .
- brul .
brasl %r6,.
- jasl %r6,.
brasl %r6,.-0x100000000
- jasl %r6,.-0x100000000
brasl %r6,.+0xfffffffe
- jasl %r6,.+0xfffffffe
tam
sam24
sam31
Index: binutils-2.42/gas/testsuite/gas/s390/zarch-z900.d
===================================================================
--- binutils-2.42.orig/gas/testsuite/gas/s390/zarch-z900.d 2024-01-29 01:00:00.000000000 +0100
+++ binutils-2.42/gas/testsuite/gas/s390/zarch-z900.d 2024-01-30 17:51:15.809891527 +0100
@@ -20,11 +20,8 @@ Disassembly of section .text:
.*: e3 95 af ff 00 46 [ ]*bctg %r9,4095\(%r5,%r10\)
.*: b9 46 00 96 [ ]*bctgr %r9,%r6
*([\da-f]+): a7 97 00 00 [ ]*brctg %r9,\1 <foo\+0x\1>
- *([\da-f]+): a7 67 00 00 [ ]*brctg %r6,\1 <foo\+0x\1>
*([\da-f]+): ec 96 00 00 00 44 [ ]*brxhg %r9,%r6,\1 <foo\+0x\1>
- *([\da-f]+): ec 69 00 00 00 44 [ ]*brxhg %r6,%r9,\1 <foo\+0x\1>
*([\da-f]+): ec 96 00 00 00 45 [ ]*brxlg %r9,%r6,\1 <foo\+0x\1>
- *([\da-f]+): ec 69 00 00 00 45 [ ]*brxlg %r6,%r9,\1 <foo\+0x\1>
.*: eb 96 5f ff 00 44 [ ]*bxhg %r9,%r6,4095\(%r5\)
.*: eb 96 5f ff 00 45 [ ]*bxleg %r9,%r6,4095\(%r5\)
.*: b3 a5 00 96 [ ]*cdgbr %f9,%r6
@@ -151,9 +148,5 @@ Disassembly of section .text:
.*: e3 95 af ff 00 82 [ ]*xg %r9,4095\(%r5,%r10\)
.*: b9 82 00 96 [ ]*xgr %r9,%r6
*([\da-f]+): c0 65 00 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
- *([\da-f]+): c0 65 00 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
- *([\da-f]+): c0 65 80 00 00 00 [ ]*brasl %r6,ffffffff0+\1 <foo\+0xffffffff0+\1>
*([\da-f]+): c0 65 80 00 00 00 [ ]*brasl %r6,ffffffff0+\1 <foo\+0xffffffff0+\1>
-.*: c0 65 7f ff ff ff [ ]*brasl %r6,1000002d4 <foo\+0x1000002d4>
-.*: c0 65 7f ff ff ff [ ]*brasl %r6,1000002da <foo\+0x1000002da>
-.*: 07 07 [ ]*nopr %r7
+.*: c0 65 7f ff ff ff [ ]*brasl %r6,1000002b8 <foo\+0x1000002b8>
Index: binutils-2.42/gas/testsuite/gas/s390/zarch-z900.s
===================================================================
--- binutils-2.42.orig/gas/testsuite/gas/s390/zarch-z900.s 2024-01-29 01:00:00.000000000 +0100
+++ binutils-2.42/gas/testsuite/gas/s390/zarch-z900.s 2024-01-30 17:23:32.652555451 +0100
@@ -14,11 +14,8 @@ foo:
bctg %r9,4095(%r5,%r10)
bctgr %r9,%r6
brctg %r9,.
- jctg %r6,.
brxhg %r9,%r6,.
- jxhg %r6,%r9,.
brxlg %r9,%r6,.
- jxleg %r6,%r9,.
bxhg %r9,%r6,4095(%r5)
bxleg %r9,%r6,4095(%r5)
cdgbr %f9,%r6
@@ -145,8 +142,5 @@ foo:
xg %r9,4095(%r5,%r10)
xgr %r9,%r6
brasl %r6,.
- jasl %r6,.
brasl %r6,.-0x100000000
- jasl %r6,.-0x100000000
brasl %r6,.+0xfffffffe
- jasl %r6,.+0xfffffffe
Index: binutils-2.42/ld/testsuite/ld-s390/tlsbin_64.dd
===================================================================
--- binutils-2.42.orig/ld/testsuite/ld-s390/tlsbin_64.dd 2024-01-29 01:00:00.000000000 +0100
+++ binutils-2.42/ld/testsuite/ld-s390/tlsbin_64.dd 2024-01-30 17:05:15.811158036 +0100
@@ -87,26 +87,26 @@ Disassembly of section .text:
+[0-9a-f]+: 41 22 90 00 la %r2,0\(%r2,%r9\)
# GD -> LE with global variable defined in executable
+[0-9a-f]+: e3 20 d0 10 00 04 lg %r2,16\(%r13\)
- +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ <fn2\+0xca>
+ +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ <fn2\+0xca>
+[0-9a-f]+: 41 22 90 00 la %r2,0\(%r2,%r9\)
# GD -> LE with local variable defined in executable
+[0-9a-f]+: e3 20 d0 18 00 04 lg %r2,24\(%r13\)
- +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ <fn2\+0xda>
+ +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ <fn2\+0xda>
+[0-9a-f]+: 41 22 90 00 la %r2,0\(%r2,%r9\)
# GD -> LE with hidden variable defined in executable
+[0-9a-f]+: e3 20 d0 20 00 04 lg %r2,32\(%r13\)
- +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ <fn2\+0xea>
+ +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ <fn2\+0xea>
+[0-9a-f]+: 41 22 90 00 la %r2,0\(%r2,%r9\)
# LD -> LE
+[0-9a-f]+: e3 20 d0 28 00 04 lg %r2,40\(%r13\)
- +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ <fn2\+0xfa>
+ +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ <fn2\+0xfa>
+[0-9a-f]+: 41 32 90 00 la %r3,0\(%r2,%r9\)
+[0-9a-f]+: e3 40 d0 30 00 04 lg %r4,48\(%r13\)
+[0-9a-f]+: 41 54 30 00 la %r5,0\(%r4,%r3\)
+[0-9a-f]+: e3 40 d0 38 00 04 lg %r4,56\(%r13\)
+[0-9a-f]+: 41 54 30 00 la %r5,0\(%r4,%r3\)
+[0-9a-f]+: e3 20 d0 40 00 04 lg %r2,64\(%r13\)
- +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ <fn2\+0x11e>
+ +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ <fn2\+0x11e>
+[0-9a-f]+: 41 32 90 00 la %r3,0\(%r2,%r9\)
+[0-9a-f]+: e3 40 d0 48 00 04 lg %r4,72\(%r13\)
+[0-9a-f]+: 41 54 30 00 la %r5,0\(%r4,%r3\)
Index: binutils-2.42/opcodes/s390-opc.txt
===================================================================
--- binutils-2.42.orig/opcodes/s390-opc.txt 2024-01-29 01:00:00.000000000 +0100
+++ binutils-2.42/opcodes/s390-opc.txt 2024-01-30 17:10:00.085838136 +0100
@@ -246,14 +246,10 @@ d7 xc SS_L0RDRD "exclusive or" g5 esa,za
f8 zap SS_LLRDRD "zero and add" g5 esa,zarch
a70a ahi RI_RI "add halfword immediate" g5 esa,zarch
84 brxh RSI_RRP "branch relative on index high" g5 esa,zarch condjump
-84 jxh RSI_RRP "branch relative on index high" g5 esa,zarch condjump
85 brxle RSI_RRP "branch relative on index low or equal" g5 esa,zarch condjump
-85 jxle RSI_RRP "branch relative on index low or equal" g5 esa,zarch condjump
a705 bras RI_RP "branch relative and save" g5 esa,zarch jumpsr
-a705 jas RI_RP "branch relative and save" g5 esa,zarch jumpsr
a704 brc RI_UP "branch relative on condition" g5 esa,zarch condjump
a706 brct RI_RP "branch relative on count" g5 esa,zarch condjump
-a706 jct RI_RP "branch relative on count" g5 esa,zarch condjump
b241 cksm RRE_RR "checksum" g5 esa,zarch
a70e chi RI_RI "compare halfword immediate" g5 esa,zarch
a9 clcle RS_RRRD "compare logical long extended" g5 esa,zarch
@@ -273,11 +269,8 @@ a701 tml RI_RU "test under mask low" g5
4700 b*8 RX_0RRD "conditional branch" g5 esa,zarch
47f0 b RX_0RRD "unconditional branch" g5 esa,zarch
a704 jc RI_UP "conditional jump" g5 esa,zarch condjump
-a704 jnop RI_0P "nop jump" g5 esa,zarch
a704 j*8 RI_0P "conditional jump" g5 esa,zarch condjump
-a704 br*8 RI_0P "conditional jump" g5 esa,zarch condjump
a7f4 j RI_0P "unconditional jump" g5 esa,zarch jump
-a7f4 bru RI_0P "unconditional jump" g5 esa,zarch jump
b34a axbr RRE_FEFE "add extended bfp" g5 esa,zarch
b31a adbr RRE_FF "add long bfp" g5 esa,zarch
ed000000001a adb RXE_FRRD "add long bfp" g5 esa,zarch
@@ -447,9 +440,7 @@ e3000000001b slgf RXE_RRRD "subtract log
e3000000000c msg RXE_RRRD "multiply single 64" z900 zarch
e3000000001c msgf RXE_RRRD "multiply single 64<32" z900 zarch
ec0000000044 brxhg RIE_RRP "branch relative on index high 64" z900 zarch condjump
-ec0000000044 jxhg RIE_RRP "branch relative on index high 64" z900 zarch condjump
ec0000000045 brxlg RIE_RRP "branch relative on index low or equal 64" z900 zarch condjump
-ec0000000045 jxleg RIE_RRP "branch relative on index low or equal 64" z900 zarch condjump
eb0000000044 bxhg RSE_RRRD "branch on index high 64" z900 zarch
eb0000000045 bxleg RSE_RRRD "branch on index low or equal 64" z900 zarch
eb000000000c srlg RSE_RRRD "shift right single logical 64" z900 zarch
@@ -475,16 +466,11 @@ a702 tmhh RI_RU "test under mask high hi
a703 tmhl RI_RU "test under mask high low" z900 zarch
c004 brcl RIL_UP "branch relative on condition long" z900 esa,zarch condjump
# jlc omitted due to missing jl* (see jl*8) and not added as non-standard jgc
-c004 jgnop RIL_0P "nop jump long" z900 esa,zarch
c004 jg*8 RIL_0P "conditional jump long" z900 esa,zarch condjump
# jl*8 omitted due to clash with non-standard j*8 flavors jle and jlh; exists as non-standard jg*8 instead
-c004 br*8l RIL_0P "conditional jump long" z900 esa,zarch condjump
c0f4 jg RIL_0P "unconditional jump long" z900 esa,zarch jump
-c0f4 brul RIL_0P "unconditional jump long" z900 esa,zarch jump
c005 brasl RIL_RP "branch relative and save long" z900 esa,zarch jumpsr
-c005 jasl RIL_RP "branch relative and save long" z900 esa,zarch jumpsr
a707 brctg RI_RP "branch relative on count 64" z900 zarch condjump
-a707 jctg RI_RP "branch relative on count 64" z900 zarch condjump
a709 lghi RI_RI "load halfword immediate 64" z900 zarch
a70b aghi RI_RI "add halfword immediate 64" z900 zarch
a70d mghi RI_RI "multiply halfword immediate 64" z900 zarch