forked from pool/binutils
f32da6f20f
* new .base64 pseudo-op, allowing base64 encoded data as strings * Intel APX: add support for CFCMOV, CCMP, CTEST, zero-upper, NF (APX_F now fully supported) * x86 Intel syntax now warns about more mnemonic suffixes * macros and .irp/.irpc/.rept bodies can use \+ to get at number of times the macro/body was executed * aarch64: support 'armv9.5-a' for -march, add support for LUT and LUT2 * s390: base register operand in D(X,B) and D(L,B) can now be omitted (ala 'D(X,)'); warn when register type doesn't match operand type (use option 'warn-regtype-mismatch=[strict|relaxed|no]' to adjust) * riscv: support various extensions: Zacas, Zcmp, Zfbfmin, Zvfbfmin, Zvfbfwma, Smcsrind/Sscsrind, XCvMem, XCvBi, XCvElw, XSfCease, all at version 1.0; remove support for assembly of privileged spec 1.9.1 (linking support remains) * arm: remove support for some old co-processors: Maverick and FPA * mips: '--trap' now causes either trap or breakpoint instructions to be emitted as per current ISA, instead of always using trap insn and failing when current ISA was incompatible with that * LoongArch: accept .option pseudo-op for fine-grained control of assembly code options; add support for DT_RELR * readelf: now displays RELR relocations in full detail; add -j/--display-section to show just those section(s) content according to their type * objdump/readelf now dump also .eh_frame_hdr (when present) when dumping .eh_frame * gprofng: add event types for AMD Zen3/Zen4 and Intel Ice Lake processors; add minimal support for riscv * linker: OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=471
366 lines
16 KiB
Diff
366 lines
16 KiB
Diff
This reverts commit b10b530a4566, because generating 'jgnop'
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from 'bcrl' confuses some parsing tools (in particular kernels
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recordmcount.pl tool) on s390x.
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Due to the way the assembler and disassembler are implemented we need
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to disable both, the assembly and disassembly of the problematic
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mnemonic (that's only a problem for jgnop vs brcl, but still).
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So, just revert the whole commit.
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v2: this adjusts the reversion of above commit to care for commit
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0cfd6cffde32726ca69cde6ed3cc1ece21b9cf7c that changes the touched
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testcases so that it applies again, so it's not a simple revert of
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above commit anymore.
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v3: Adjust for 9c422a59953 and 3f3c1e513.
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(We leave out the patch to ChangeLog in the reversion)
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Index: binutils-2.42/gas/testsuite/gas/s390/esa-g5.d
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===================================================================
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--- binutils-2.42.orig/gas/testsuite/gas/s390/esa-g5.d 2024-01-29 01:00:00.000000000 +0100
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+++ binutils-2.42/gas/testsuite/gas/s390/esa-g5.d 2024-01-30 17:37:08.609356666 +0100
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@@ -78,15 +78,11 @@ Disassembly of section .text:
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.*: 07 29 [ ]*bhr %r9
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.*: 07 f9 [ ]*br %r9
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*([\da-f]+): a7 95 00 00 [ ]*bras %r9,\1 <foo\+0x\1>
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- *([\da-f]+): a7 65 00 00 [ ]*bras %r6,\1 <foo\+0x\1>
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*([\da-f]+): a7 64 00 00 [ ]*jlh \1 <foo\+0x\1>
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*([\da-f]+): a7 64 00 00 [ ]*jlh \1 <foo\+0x\1>
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*([\da-f]+): a7 66 00 00 [ ]*brct %r6,\1 <foo\+0x\1>
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- *([\da-f]+): a7 66 00 00 [ ]*brct %r6,\1 <foo\+0x\1>
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- *([\da-f]+): 84 69 00 00 [ ]*brxh %r6,%r9,\1 <foo\+0x\1>
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*([\da-f]+): 84 69 00 00 [ ]*brxh %r6,%r9,\1 <foo\+0x\1>
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*([\da-f]+): 85 69 00 00 [ ]*brxle %r6,%r9,\1 <foo\+0x\1>
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- *([\da-f]+): 85 69 00 00 [ ]*brxle %r6,%r9,\1 <foo\+0x\1>
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.*: b2 5a 00 69 [ ]*bsa %r6,%r9
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.*: b2 58 00 69 [ ]*bsg %r6,%r9
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.*: 0b 69 [ ]*bsm %r6,%r9
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@@ -206,28 +202,6 @@ Disassembly of section .text:
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*([\da-f]+): a7 14 00 00 [ ]*jo \1 <foo\+0x\1>
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*([\da-f]+): a7 24 00 00 [ ]*jh \1 <foo\+0x\1>
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*([\da-f]+): a7 84 00 00 [ ]*je \1 <foo\+0x\1>
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- *([\da-f]+): a7 04 00 00 [ ]*jnop \1 <foo\+0x\1>
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- *([\da-f]+): a7 14 00 00 [ ]*jo \1 <foo\+0x\1>
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- *([\da-f]+): a7 24 00 00 [ ]*jh \1 <foo\+0x\1>
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- *([\da-f]+): a7 24 00 00 [ ]*jh \1 <foo\+0x\1>
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- *([\da-f]+): a7 34 00 00 [ ]*jnle \1 <foo\+0x\1>
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- *([\da-f]+): a7 44 00 00 [ ]*jl \1 <foo\+0x\1>
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- *([\da-f]+): a7 44 00 00 [ ]*jl \1 <foo\+0x\1>
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- *([\da-f]+): a7 54 00 00 [ ]*jnhe \1 <foo\+0x\1>
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- *([\da-f]+): a7 64 00 00 [ ]*jlh \1 <foo\+0x\1>
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- *([\da-f]+): a7 74 00 00 [ ]*jne \1 <foo\+0x\1>
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- *([\da-f]+): a7 74 00 00 [ ]*jne \1 <foo\+0x\1>
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- *([\da-f]+): a7 84 00 00 [ ]*je \1 <foo\+0x\1>
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- *([\da-f]+): a7 84 00 00 [ ]*je \1 <foo\+0x\1>
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- *([\da-f]+): a7 94 00 00 [ ]*jnlh \1 <foo\+0x\1>
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- *([\da-f]+): a7 a4 00 00 [ ]*jhe \1 <foo\+0x\1>
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- *([\da-f]+): a7 b4 00 00 [ ]*jnl \1 <foo\+0x\1>
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- *([\da-f]+): a7 b4 00 00 [ ]*jnl \1 <foo\+0x\1>
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- *([\da-f]+): a7 c4 00 00 [ ]*jle \1 <foo\+0x\1>
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- *([\da-f]+): a7 d4 00 00 [ ]*jnh \1 <foo\+0x\1>
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- *([\da-f]+): a7 d4 00 00 [ ]*jnh \1 <foo\+0x\1>
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- *([\da-f]+): a7 e4 00 00 [ ]*jno \1 <foo\+0x\1>
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- *([\da-f]+): a7 f4 00 00 [ ]*j \1 <foo\+0x\1>
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.*: ed 65 af ff 00 18 [ ]*kdb %f6,4095\(%r5,%r10\)
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.*: b3 18 00 69 [ ]*kdbr %f6,%f9
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.*: ed 65 af ff 00 08 [ ]*keb %f6,4095\(%r5,%r10\)
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@@ -510,4 +484,4 @@ Disassembly of section .text:
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.*: f8 58 5f ff af ff [ ]*zap 4095\(6,%r5\),4095\(9,%r10\)
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.*: b2 21 b0 69 [ ]*ipte %r6,%r9,%r11
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.*: b2 21 bd 69 [ ]*ipte %r6,%r9,%r11,13
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-.*: 07 07 [ ]*nopr %r7
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+.*: 07 07 [ ]*nopr %r7
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Index: binutils-2.42/gas/testsuite/gas/s390/esa-g5.s
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===================================================================
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--- binutils-2.42.orig/gas/testsuite/gas/s390/esa-g5.s 2024-01-29 01:00:00.000000000 +0100
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+++ binutils-2.42/gas/testsuite/gas/s390/esa-g5.s 2024-01-30 17:11:14.563730960 +0100
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@@ -72,15 +72,11 @@ foo:
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bpr %r9
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br %r9
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bras %r9,.
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- jas %r6,.
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brc 6,.
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jc 6,.
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brct 6,.
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- jct %r6,.
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brxh %r6,%r9,.
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- jxh %r6,%r9,.
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brxle %r6,%r9,.
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- jxle %r6,%r9,.
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bsa %r6,%r9
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bsg %r6,%r9
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bsm %r6,%r9
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@@ -200,28 +196,6 @@ foo:
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jo .
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jp .
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jz .
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- jnop .
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- bro .
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- brh .
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- brp .
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- brnle .
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- brl .
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- brm .
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- brnhe .
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- brlh .
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- brne .
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- brnz .
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- bre .
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- brz .
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- brnlh .
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- brhe .
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- brnl .
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- brnm .
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- brle .
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- brnh .
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- brnp .
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- brno .
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- bru .
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kdb %f6,4095(%r5,%r10)
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kdbr %f6,%f9
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keb %f6,4095(%r5,%r10)
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Index: binutils-2.42/gas/testsuite/gas/s390/esa-z900.d
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===================================================================
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--- binutils-2.42.orig/gas/testsuite/gas/s390/esa-z900.d 2024-01-29 01:00:00.000000000 +0100
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+++ binutils-2.42/gas/testsuite/gas/s390/esa-z900.d 2024-01-30 17:46:09.638230382 +0100
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@@ -7,28 +7,6 @@ Disassembly of section .text:
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.* <foo>:
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.*: c0 f4 00 00 00 00 [ ]*jg 0 <foo>
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- *([\da-f]+): c0 04 00 00 00 00 [ ]*jgnop \1 <foo\+0x\1>
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- *([\da-f]+): c0 14 00 00 00 00 [ ]*jgo \1 <foo\+0x\1>
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- *([\da-f]+): c0 24 00 00 00 00 [ ]*jgh \1 <foo\+0x\1>
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- *([\da-f]+): c0 24 00 00 00 00 [ ]*jgh \1 <foo\+0x\1>
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- *([\da-f]+): c0 34 00 00 00 00 [ ]*jgnle \1 <foo\+0x\1>
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- *([\da-f]+): c0 44 00 00 00 00 [ ]*jgl \1 <foo\+0x\1>
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- *([\da-f]+): c0 44 00 00 00 00 [ ]*jgl \1 <foo\+0x\1>
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- *([\da-f]+): c0 54 00 00 00 00 [ ]*jgnhe \1 <foo\+0x\1>
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- *([\da-f]+): c0 64 00 00 00 00 [ ]*jglh \1 <foo\+0x\1>
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- *([\da-f]+): c0 74 00 00 00 00 [ ]*jgne \1 <foo\+0x\1>
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- *([\da-f]+): c0 74 00 00 00 00 [ ]*jgne \1 <foo\+0x\1>
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- *([\da-f]+): c0 84 00 00 00 00 [ ]*jge \1 <foo\+0x\1>
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- *([\da-f]+): c0 84 00 00 00 00 [ ]*jge \1 <foo\+0x\1>
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- *([\da-f]+): c0 94 00 00 00 00 [ ]*jgnlh \1 <foo\+0x\1>
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- *([\da-f]+): c0 a4 00 00 00 00 [ ]*jghe \1 <foo\+0x\1>
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- *([\da-f]+): c0 b4 00 00 00 00 [ ]*jgnl \1 <foo\+0x\1>
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- *([\da-f]+): c0 b4 00 00 00 00 [ ]*jgnl \1 <foo\+0x\1>
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- *([\da-f]+): c0 c4 00 00 00 00 [ ]*jgle \1 <foo\+0x\1>
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- *([\da-f]+): c0 d4 00 00 00 00 [ ]*jgnh \1 <foo\+0x\1>
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- *([\da-f]+): c0 d4 00 00 00 00 [ ]*jgnh \1 <foo\+0x\1>
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- *([\da-f]+): c0 e4 00 00 00 00 [ ]*jgno \1 <foo\+0x\1>
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- *([\da-f]+): c0 f4 00 00 00 00 [ ]*jg \1 <foo\+0x\1>
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*([\da-f]+): c0 14 00 00 00 00 [ ]*jgo \1 <foo\+0x\1>
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*([\da-f]+): c0 24 00 00 00 00 [ ]*jgh \1 <foo\+0x\1>
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*([\da-f]+): c0 24 00 00 00 00 [ ]*jgh \1 <foo\+0x\1>
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@@ -51,11 +29,8 @@ Disassembly of section .text:
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*([\da-f]+): c0 e4 00 00 00 00 [ ]*jgno \1 <foo\+0x\1>
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*([\da-f]+): c0 f4 00 00 00 00 [ ]*jg \1 <foo\+0x\1>
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*([\da-f]+): c0 65 00 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
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- *([\da-f]+): c0 65 00 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
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- *([\da-f]+): c0 65 80 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
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*([\da-f]+): c0 65 80 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
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-.*: c0 65 7f ff ff ff [ ]*brasl %r6,11e <foo\+0x11e>
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-.*: c0 65 7f ff ff ff [ ]*brasl %r6,124 <foo\+0x124>
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+.*: c0 65 7f ff ff ff [ ]*brasl %r6,8e <foo\+0x8e>
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.*: 01 0b [ ]*tam
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.*: 01 0c [ ]*sam24
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.*: 01 0d [ ]*sam31
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@@ -76,4 +51,3 @@ Disassembly of section .text:
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.*: e3 65 af ff 00 98 [ ]*alc %r6,4095\(%r5,%r10\)
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.*: e3 65 af ff 00 99 [ ]*slb %r6,4095\(%r5,%r10\)
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.*: eb 69 5f ff 00 1d [ ]*rll %r6,%r9,4095\(%r5\)
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-.*: 07 07 [ ]*nopr %r7
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Index: binutils-2.42/gas/testsuite/gas/s390/esa-z900.s
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===================================================================
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--- binutils-2.42.orig/gas/testsuite/gas/s390/esa-z900.s 2024-01-29 01:00:00.000000000 +0100
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+++ binutils-2.42/gas/testsuite/gas/s390/esa-z900.s 2024-01-30 17:05:15.811158036 +0100
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@@ -1,7 +1,6 @@
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.text
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foo:
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brcl 15,.
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- jgnop .
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jgo .
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jgh .
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jgp .
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@@ -23,33 +22,9 @@ foo:
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jgnp .
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jgno .
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jg .
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- brol .
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- brhl .
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- brpl .
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- brnlel .
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- brll .
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- brml .
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- brnhel .
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- brlhl .
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- brnel .
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- brnzl .
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- brel .
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- brzl .
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- brnlhl .
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- brhel .
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- brnll .
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- brnml .
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- brlel .
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- brnhl .
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- brnpl .
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- brnol .
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- brul .
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brasl %r6,.
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- jasl %r6,.
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brasl %r6,.-0x100000000
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- jasl %r6,.-0x100000000
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brasl %r6,.+0xfffffffe
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- jasl %r6,.+0xfffffffe
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tam
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sam24
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sam31
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Index: binutils-2.42/gas/testsuite/gas/s390/zarch-z900.d
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===================================================================
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--- binutils-2.42.orig/gas/testsuite/gas/s390/zarch-z900.d 2024-01-29 01:00:00.000000000 +0100
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+++ binutils-2.42/gas/testsuite/gas/s390/zarch-z900.d 2024-01-30 17:51:15.809891527 +0100
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@@ -20,11 +20,8 @@ Disassembly of section .text:
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.*: e3 95 af ff 00 46 [ ]*bctg %r9,4095\(%r5,%r10\)
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.*: b9 46 00 96 [ ]*bctgr %r9,%r6
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*([\da-f]+): a7 97 00 00 [ ]*brctg %r9,\1 <foo\+0x\1>
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- *([\da-f]+): a7 67 00 00 [ ]*brctg %r6,\1 <foo\+0x\1>
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*([\da-f]+): ec 96 00 00 00 44 [ ]*brxhg %r9,%r6,\1 <foo\+0x\1>
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- *([\da-f]+): ec 69 00 00 00 44 [ ]*brxhg %r6,%r9,\1 <foo\+0x\1>
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*([\da-f]+): ec 96 00 00 00 45 [ ]*brxlg %r9,%r6,\1 <foo\+0x\1>
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- *([\da-f]+): ec 69 00 00 00 45 [ ]*brxlg %r6,%r9,\1 <foo\+0x\1>
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.*: eb 96 5f ff 00 44 [ ]*bxhg %r9,%r6,4095\(%r5\)
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.*: eb 96 5f ff 00 45 [ ]*bxleg %r9,%r6,4095\(%r5\)
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.*: b3 a5 00 96 [ ]*cdgbr %f9,%r6
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@@ -151,9 +148,5 @@ Disassembly of section .text:
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.*: e3 95 af ff 00 82 [ ]*xg %r9,4095\(%r5,%r10\)
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.*: b9 82 00 96 [ ]*xgr %r9,%r6
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*([\da-f]+): c0 65 00 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
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- *([\da-f]+): c0 65 00 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
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- *([\da-f]+): c0 65 80 00 00 00 [ ]*brasl %r6,ffffffff0+\1 <foo\+0xffffffff0+\1>
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*([\da-f]+): c0 65 80 00 00 00 [ ]*brasl %r6,ffffffff0+\1 <foo\+0xffffffff0+\1>
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-.*: c0 65 7f ff ff ff [ ]*brasl %r6,1000002d4 <foo\+0x1000002d4>
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-.*: c0 65 7f ff ff ff [ ]*brasl %r6,1000002da <foo\+0x1000002da>
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-.*: 07 07 [ ]*nopr %r7
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+.*: c0 65 7f ff ff ff [ ]*brasl %r6,1000002b8 <foo\+0x1000002b8>
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Index: binutils-2.42/gas/testsuite/gas/s390/zarch-z900.s
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===================================================================
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--- binutils-2.42.orig/gas/testsuite/gas/s390/zarch-z900.s 2024-01-29 01:00:00.000000000 +0100
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+++ binutils-2.42/gas/testsuite/gas/s390/zarch-z900.s 2024-01-30 17:23:32.652555451 +0100
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@@ -14,11 +14,8 @@ foo:
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bctg %r9,4095(%r5,%r10)
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bctgr %r9,%r6
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brctg %r9,.
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- jctg %r6,.
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brxhg %r9,%r6,.
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- jxhg %r6,%r9,.
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brxlg %r9,%r6,.
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- jxleg %r6,%r9,.
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bxhg %r9,%r6,4095(%r5)
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bxleg %r9,%r6,4095(%r5)
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cdgbr %f9,%r6
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@@ -145,8 +142,5 @@ foo:
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xg %r9,4095(%r5,%r10)
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xgr %r9,%r6
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brasl %r6,.
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- jasl %r6,.
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brasl %r6,.-0x100000000
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- jasl %r6,.-0x100000000
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brasl %r6,.+0xfffffffe
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- jasl %r6,.+0xfffffffe
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Index: binutils-2.42/ld/testsuite/ld-s390/tlsbin_64.dd
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===================================================================
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--- binutils-2.42.orig/ld/testsuite/ld-s390/tlsbin_64.dd 2024-01-29 01:00:00.000000000 +0100
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+++ binutils-2.42/ld/testsuite/ld-s390/tlsbin_64.dd 2024-01-30 17:05:15.811158036 +0100
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@@ -87,26 +87,26 @@ Disassembly of section .text:
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+[0-9a-f]+: 41 22 90 00 la %r2,0\(%r2,%r9\)
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# GD -> LE with global variable defined in executable
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+[0-9a-f]+: e3 20 d0 10 00 04 lg %r2,16\(%r13\)
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- +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ <fn2\+0xca>
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+ +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ <fn2\+0xca>
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+[0-9a-f]+: 41 22 90 00 la %r2,0\(%r2,%r9\)
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# GD -> LE with local variable defined in executable
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+[0-9a-f]+: e3 20 d0 18 00 04 lg %r2,24\(%r13\)
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- +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ <fn2\+0xda>
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+ +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ <fn2\+0xda>
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+[0-9a-f]+: 41 22 90 00 la %r2,0\(%r2,%r9\)
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# GD -> LE with hidden variable defined in executable
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+[0-9a-f]+: e3 20 d0 20 00 04 lg %r2,32\(%r13\)
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- +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ <fn2\+0xea>
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+ +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ <fn2\+0xea>
|
|
+[0-9a-f]+: 41 22 90 00 la %r2,0\(%r2,%r9\)
|
|
# LD -> LE
|
|
+[0-9a-f]+: e3 20 d0 28 00 04 lg %r2,40\(%r13\)
|
|
- +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ <fn2\+0xfa>
|
|
+ +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ <fn2\+0xfa>
|
|
+[0-9a-f]+: 41 32 90 00 la %r3,0\(%r2,%r9\)
|
|
+[0-9a-f]+: e3 40 d0 30 00 04 lg %r4,48\(%r13\)
|
|
+[0-9a-f]+: 41 54 30 00 la %r5,0\(%r4,%r3\)
|
|
+[0-9a-f]+: e3 40 d0 38 00 04 lg %r4,56\(%r13\)
|
|
+[0-9a-f]+: 41 54 30 00 la %r5,0\(%r4,%r3\)
|
|
+[0-9a-f]+: e3 20 d0 40 00 04 lg %r2,64\(%r13\)
|
|
- +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ <fn2\+0x11e>
|
|
+ +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ <fn2\+0x11e>
|
|
+[0-9a-f]+: 41 32 90 00 la %r3,0\(%r2,%r9\)
|
|
+[0-9a-f]+: e3 40 d0 48 00 04 lg %r4,72\(%r13\)
|
|
+[0-9a-f]+: 41 54 30 00 la %r5,0\(%r4,%r3\)
|
|
Index: binutils-2.42/opcodes/s390-opc.txt
|
|
===================================================================
|
|
--- binutils-2.42.orig/opcodes/s390-opc.txt 2024-01-29 01:00:00.000000000 +0100
|
|
+++ binutils-2.42/opcodes/s390-opc.txt 2024-01-30 17:10:00.085838136 +0100
|
|
@@ -246,14 +246,10 @@ d7 xc SS_L0RDRD "exclusive or" g5 esa,za
|
|
f8 zap SS_LLRDRD "zero and add" g5 esa,zarch
|
|
a70a ahi RI_RI "add halfword immediate" g5 esa,zarch
|
|
84 brxh RSI_RRP "branch relative on index high" g5 esa,zarch condjump
|
|
-84 jxh RSI_RRP "branch relative on index high" g5 esa,zarch condjump
|
|
85 brxle RSI_RRP "branch relative on index low or equal" g5 esa,zarch condjump
|
|
-85 jxle RSI_RRP "branch relative on index low or equal" g5 esa,zarch condjump
|
|
a705 bras RI_RP "branch relative and save" g5 esa,zarch jumpsr
|
|
-a705 jas RI_RP "branch relative and save" g5 esa,zarch jumpsr
|
|
a704 brc RI_UP "branch relative on condition" g5 esa,zarch condjump
|
|
a706 brct RI_RP "branch relative on count" g5 esa,zarch condjump
|
|
-a706 jct RI_RP "branch relative on count" g5 esa,zarch condjump
|
|
b241 cksm RRE_RR "checksum" g5 esa,zarch
|
|
a70e chi RI_RI "compare halfword immediate" g5 esa,zarch
|
|
a9 clcle RS_RRRD "compare logical long extended" g5 esa,zarch
|
|
@@ -273,11 +269,8 @@ a701 tml RI_RU "test under mask low" g5
|
|
4700 b*8 RX_0RRD "conditional branch" g5 esa,zarch
|
|
47f0 b RX_0RRD "unconditional branch" g5 esa,zarch
|
|
a704 jc RI_UP "conditional jump" g5 esa,zarch condjump
|
|
-a704 jnop RI_0P "nop jump" g5 esa,zarch
|
|
a704 j*8 RI_0P "conditional jump" g5 esa,zarch condjump
|
|
-a704 br*8 RI_0P "conditional jump" g5 esa,zarch condjump
|
|
a7f4 j RI_0P "unconditional jump" g5 esa,zarch jump
|
|
-a7f4 bru RI_0P "unconditional jump" g5 esa,zarch jump
|
|
b34a axbr RRE_FEFE "add extended bfp" g5 esa,zarch
|
|
b31a adbr RRE_FF "add long bfp" g5 esa,zarch
|
|
ed000000001a adb RXE_FRRD "add long bfp" g5 esa,zarch
|
|
@@ -447,9 +440,7 @@ e3000000001b slgf RXE_RRRD "subtract log
|
|
e3000000000c msg RXE_RRRD "multiply single 64" z900 zarch
|
|
e3000000001c msgf RXE_RRRD "multiply single 64<32" z900 zarch
|
|
ec0000000044 brxhg RIE_RRP "branch relative on index high 64" z900 zarch condjump
|
|
-ec0000000044 jxhg RIE_RRP "branch relative on index high 64" z900 zarch condjump
|
|
ec0000000045 brxlg RIE_RRP "branch relative on index low or equal 64" z900 zarch condjump
|
|
-ec0000000045 jxleg RIE_RRP "branch relative on index low or equal 64" z900 zarch condjump
|
|
eb0000000044 bxhg RSE_RRRD "branch on index high 64" z900 zarch
|
|
eb0000000045 bxleg RSE_RRRD "branch on index low or equal 64" z900 zarch
|
|
eb000000000c srlg RSE_RRRD "shift right single logical 64" z900 zarch
|
|
@@ -475,16 +466,11 @@ a702 tmhh RI_RU "test under mask high hi
|
|
a703 tmhl RI_RU "test under mask high low" z900 zarch
|
|
c004 brcl RIL_UP "branch relative on condition long" z900 esa,zarch condjump
|
|
# jlc omitted due to missing jl* (see jl*8) and not added as non-standard jgc
|
|
-c004 jgnop RIL_0P "nop jump long" z900 esa,zarch
|
|
c004 jg*8 RIL_0P "conditional jump long" z900 esa,zarch condjump
|
|
# jl*8 omitted due to clash with non-standard j*8 flavors jle and jlh; exists as non-standard jg*8 instead
|
|
-c004 br*8l RIL_0P "conditional jump long" z900 esa,zarch condjump
|
|
c0f4 jg RIL_0P "unconditional jump long" z900 esa,zarch jump
|
|
-c0f4 brul RIL_0P "unconditional jump long" z900 esa,zarch jump
|
|
c005 brasl RIL_RP "branch relative and save long" z900 esa,zarch jumpsr
|
|
-c005 jasl RIL_RP "branch relative and save long" z900 esa,zarch jumpsr
|
|
a707 brctg RI_RP "branch relative on count 64" z900 zarch condjump
|
|
-a707 jctg RI_RP "branch relative on count 64" z900 zarch condjump
|
|
a709 lghi RI_RI "load halfword immediate 64" z900 zarch
|
|
a70b aghi RI_RI "add halfword immediate 64" z900 zarch
|
|
a70d mghi RI_RI "multiply halfword immediate 64" z900 zarch
|