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binutils/binutils-revert-plt32-in-branches.diff

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This reverts the below commit to not generate PLT32 relocs
on branches by default. Used for old distros to not have to
update several packages/tools that can't handle them. I.e.
a compatibility patch.
The patch isn't exactly the reverse of commit bd7ab16b
because commit 83924b38 later moved the checking code
around somewhat.
The changes in nop-[345].d and pr22842b.S are followups to
not break the testsuite because of this revert.
As are the changes to x86-64-branch-2.d and x86-64-branch-3.d.
commit bd7ab16b4537788ad53521c45469a1bdae84ad4a
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Tue Feb 13 07:34:22 2018 -0800
x86-64: Generate branch with PLT32 relocation
Since there is no need to prepare for PLT branch on x86-64, generate
R_X86_64_PLT32, instead of R_X86_64_PC32, if possible, which can be
used as a marker for 32-bit PC-relative branches.
To compile Linux kernel, this patch:
From: "H.J. Lu" <hjl.tools@gmail.com>
Subject: [PATCH] x86: Treat R_X86_64_PLT32 as R_X86_64_PC32
On i386, there are 2 types of PLTs, PIC and non-PIC. PIE and shared
objects must use PIC PLT. To use PIC PLT, you need to load
_GLOBAL_OFFSET_TABLE_ into EBX first. There is no need for that on
x86-64 since x86-64 uses PC-relative PLT.
On x86-64, for 32-bit PC-relative branches, we can generate PLT32
relocation, instead of PC32 relocation, which can also be used as
a marker for 32-bit PC-relative branches. Linker can always reduce
PLT32 relocation to PC32 if function is defined locally. Local
functions should use PC32 relocation. As far as Linux kernel is
concerned, R_X86_64_PLT32 can be treated the same as R_X86_64_PC32
since Linux kernel doesn't use PLT.
is needed. It is available on hjl/plt32/master branch at
https://github.com/hjl-tools/linux
bfd/
PR gas/22791
* elf64-x86-64.c (is_32bit_relative_branch): Removed.
(elf_x86_64_relocate_section): Check PIC relocations in PIE.
Remove is_32bit_relative_branch usage. Disallow PC32 reloc
against protected function in shared object.
gas/
PR gas/22791
* config/tc-i386.c (need_plt32_p): New function.
(output_jump): Generate BFD_RELOC_X86_64_PLT32 if possible.
(md_estimate_size_before_relax): Likewise.
* testsuite/gas/i386/reloc64.d: Updated.
* testsuite/gas/i386/x86-64-jump.d: Likewise.
* testsuite/gas/i386/x86-64-mpx-branch-1.d: Likewise.
* testsuite/gas/i386/x86-64-mpx-branch-2.d: Likewise.
* testsuite/gas/i386/x86-64-relax-2.d: Likewise.
* testsuite/gas/i386/x86-64-relax-3.d: Likewise.
* testsuite/gas/i386/ilp32/reloc64.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-branch.d: Likewise.
ld/
PR gas/22791
* testsuite/ld-x86-64/mpx1c.rd: Updated.
* testsuite/ld-x86-64/pr22791-1.err: New file.
* testsuite/ld-x86-64/pr22791-1a.c: Likewise.
* testsuite/ld-x86-64/pr22791-1b.s: Likewise.
* testsuite/ld-x86-64/pr22791-2.rd: Likewise.
* testsuite/ld-x86-64/pr22791-2a.s: Likewise.
* testsuite/ld-x86-64/pr22791-2b.c: Likewise.
* testsuite/ld-x86-64/pr22791-2c.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run PR ld/22791 tests.
Index: binutils-2.35/bfd/elf64-x86-64.c
===================================================================
--- binutils-2.35.orig/bfd/elf64-x86-64.c
+++ binutils-2.35/bfd/elf64-x86-64.c
@@ -1834,6 +1834,24 @@ elf_x86_64_convert_load_reloc (bfd *abfd
return TRUE;
}
+/* Is the instruction before OFFSET in CONTENTS a 32bit relative
+ branch? */
+
+static bfd_boolean
+is_32bit_relative_branch (bfd_byte *contents, bfd_vma offset)
+{
+ /* Opcode Instruction
+ 0xe8 call
+ 0xe9 jump
+ 0x0f 0x8x conditional jump */
+ return ((offset > 0
+ && (contents [offset - 1] == 0xe8
+ || contents [offset - 1] == 0xe9))
+ || (offset > 1
+ && contents [offset - 2] == 0x0f
+ && (contents [offset - 1] & 0xf0) == 0x80));
+}
+
/* Look through the relocs for a section during the first phase, and
calculate needed space in the global offset table, procedure
linkage table, and dynamic reloc sections. */
@@ -3143,28 +3161,30 @@ elf_x86_64_relocate_section (bfd *output
&& (eh == NULL
|| !UNDEFINED_WEAK_RESOLVED_TO_ZERO (info,
eh)))
- || (bfd_link_pie (info)
- && !SYMBOL_DEFINED_NON_SHARED_P (h)
- && h->def_dynamic)
|| (no_copyreloc_p
&& h->def_dynamic
&& !(h->root.u.def.section->flags & SEC_CODE))))
|| bfd_link_dll (info)))
{
bfd_boolean fail = FALSE;
+ bfd_boolean branch
+ = ((r_type == R_X86_64_PC32
+ || r_type == R_X86_64_PC32_BND)
+ && is_32bit_relative_branch (contents, rel->r_offset));
+
if (SYMBOL_REFERENCES_LOCAL_P (info, h))
{
/* Symbol is referenced locally. Make sure it is
- defined locally. */
- fail = !SYMBOL_DEFINED_NON_SHARED_P (h);
+ defined locally or for a branch. */
+ fail = !SYMBOL_DEFINED_NON_SHARED_P (h) && !branch;
}
else if (bfd_link_pie (info))
{
/* We can only use PC-relative relocations in PIE
- from non-code sections. */
+ from non-code sections or branches. */
if (h->type == STT_FUNC
&& (sec->flags & SEC_CODE) != 0)
- fail = TRUE;
+ fail = !branch;
}
else if (no_copyreloc_p || bfd_link_dll (info))
{
@@ -3173,9 +3193,10 @@ elf_x86_64_relocate_section (bfd *output
relocations against default and protected
symbols since address of protected function
and location of protected data may not be in
- the shared object. */
+ the shared object. We do allow branch to symbol
+ with non-default visibility. */
fail = (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
- || ELF_ST_VISIBILITY (h->other) == STV_PROTECTED);
+ || !branch);
}
if (fail)
Index: binutils-2.35/gas/config/tc-i386.c
===================================================================
--- binutils-2.35.orig/gas/config/tc-i386.c
+++ binutils-2.35/gas/config/tc-i386.c
@@ -8493,52 +8493,12 @@ output_branch (void)
frag_var (rs_machine_dependent, 5, i.reloc[0], subtype, sym, off, p);
}
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
-/* Return TRUE iff PLT32 relocation should be used for branching to
- symbol S. */
-
-static bfd_boolean
-need_plt32_p (symbolS *s)
-{
- /* PLT32 relocation is ELF only. */
- if (!IS_ELF)
- return FALSE;
-
-#ifdef TE_SOLARIS
- /* Don't emit PLT32 relocation on Solaris: neither native linker nor
- krtld support it. */
- return FALSE;
-#endif
-
- /* Since there is no need to prepare for PLT branch on x86-64, we
- can generate R_X86_64_PLT32, instead of R_X86_64_PC32, which can
- be used as a marker for 32-bit PC-relative branches. */
- if (!object_64bit)
- return FALSE;
-
- /* Weak or undefined symbol need PLT32 relocation. */
- if (S_IS_WEAK (s) || !S_IS_DEFINED (s))
- return TRUE;
-
- /* Non-global symbol doesn't need PLT32 relocation. */
- if (! S_IS_EXTERNAL (s))
- return FALSE;
-
- /* Other global symbols need PLT32 relocation. NB: Symbol with
- non-default visibilities are treated as normal global symbol
- so that PLT32 relocation can be used as a marker for 32-bit
- PC-relative branches. It is useful for linker relaxation. */
- return TRUE;
-}
-#endif
-
static void
output_jump (void)
{
char *p;
int size;
fixS *fixP;
- bfd_reloc_code_real_type jump_reloc = i.reloc[0];
if (i.tm.opcode_modifier.jump == JUMP_BYTE)
{
@@ -8606,17 +8566,8 @@ output_jump (void)
abort ();
}
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
- if (size == 4
- && jump_reloc == NO_RELOC
- && need_plt32_p (i.op[0].disps->X_add_symbol))
- jump_reloc = BFD_RELOC_X86_64_PLT32;
-#endif
-
- jump_reloc = reloc (size, 1, 1, jump_reloc);
-
fixP = fix_new_exp (frag_now, p - frag_now->fr_literal, size,
- i.op[0].disps, 1, jump_reloc);
+ i.op[0].disps, 1, reloc (size, 1, 1, i.reloc[0]));
/* All jumps handled here are signed, but don't use a signed limit
check for 32 and 16 bit jumps as we want to allow wrap around at
@@ -11921,10 +11872,6 @@ md_estimate_size_before_relax (fragS *fr
reloc_type = (enum bfd_reloc_code_real) fragP->fr_var;
else if (size == 2)
reloc_type = BFD_RELOC_16_PCREL;
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
- else if (need_plt32_p (fragP->fr_symbol))
- reloc_type = BFD_RELOC_X86_64_PLT32;
-#endif
else
reloc_type = BFD_RELOC_32_PCREL;
Index: binutils-2.35/gas/testsuite/gas/i386/ilp32/reloc64.d
===================================================================
--- binutils-2.35.orig/gas/testsuite/gas/i386/ilp32/reloc64.d
+++ binutils-2.35/gas/testsuite/gas/i386/ilp32/reloc64.d
@@ -17,7 +17,7 @@ Disassembly of section \.text:
.*[ ]+R_X86_64_PC8[ ]+xtrn\+0x0*1
.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
-.*[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4
+.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
.*[ ]+R_X86_64_PC8[ ]+xtrn-0x0*1
.*[ ]+R_X86_64_GOT32[ ]+xtrn
.*[ ]+R_X86_64_GOT32[ ]+xtrn
Index: binutils-2.35/gas/testsuite/gas/i386/ilp32/x86-64-branch.d
===================================================================
--- binutils-2.35.orig/gas/testsuite/gas/i386/ilp32/x86-64-branch.d
+++ binutils-2.35/gas/testsuite/gas/i386/ilp32/x86-64-branch.d
@@ -20,9 +20,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 66 ff 20 data16 jmpq \*\(%rax\)
[ ]*[a-f0-9]+: e8 00 00 00 00 callq 0x1f 1b: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 0x24 20: R_X86_64_PC32 \*ABS\*\+0x10003c
-[ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 callq 0x2a 26: R_X86_64_PLT32 foo-0x4
-[ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmpq 0x30 2c: R_X86_64_PLT32 foo-0x4
-[ ]*[a-f0-9]+: 66 0f 82 00 00 00 00 data16 jb 0x37 33: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 callq 0x2a 26: R_X86_64_PC32 foo-0x4
+[ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmpq 0x30 2c: R_X86_64_PC32 foo-0x4
+[ ]*[a-f0-9]+: 66 0f 82 00 00 00 00 data16 jb 0x37 33: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: 66 c3 data16 retq *
[ ]*[a-f0-9]+: 66 c2 08 00 data16 retq \$0x8
[ ]*[a-f0-9]+: ff d0 callq \*%rax
Index: binutils-2.35/gas/testsuite/gas/i386/reloc64.d
===================================================================
--- binutils-2.35.orig/gas/testsuite/gas/i386/reloc64.d
+++ binutils-2.35/gas/testsuite/gas/i386/reloc64.d
@@ -20,7 +20,7 @@ Disassembly of section \.text:
.*[ ]+R_X86_64_PC8[ ]+xtrn\+0x0*1
.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
-.*[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4
+.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
.*[ ]+R_X86_64_PC8[ ]+xtrn-0x0*1
.*[ ]+R_X86_64_GOT64[ ]+xtrn
.*[ ]+R_X86_64_GOT32[ ]+xtrn
Index: binutils-2.35/gas/testsuite/gas/i386/x86-64-jump.d
===================================================================
--- binutils-2.35.orig/gas/testsuite/gas/i386/x86-64-jump.d
+++ binutils-2.35/gas/testsuite/gas/i386/x86-64-jump.d
@@ -9,7 +9,7 @@ Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: eb fe jmp (0x0|0 <.text>)
-[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 0x7 3: R_X86_64_PLT32 xxx-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 0x7 3: R_X86_64_PC32 xxx-0x4
[ ]*[a-f0-9]+: ff 24 25 00 00 00 00 jmpq \*0x0 a: R_X86_64_32S xxx
[ ]*[a-f0-9]+: ff e7 jmpq \*%rdi
[ ]*[a-f0-9]+: ff 27 jmpq \*\(%rdi\)
@@ -18,7 +18,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: ff 2c 25 00 00 00 00 ljmp \*0x0 24: R_X86_64_32S xxx
[ ]*[a-f0-9]+: 66 ff 2c 25 00 00 00 00 ljmpw \*0x0 2c: R_X86_64_32S xxx
[ ]*[a-f0-9]+: e8 cb ff ff ff callq 0x0
-[ ]*[a-f0-9]+: e8 00 00 00 00 callq 0x3a 36: R_X86_64_PLT32 xxx-0x4
+[ ]*[a-f0-9]+: e8 00 00 00 00 callq 0x3a 36: R_X86_64_PC32 xxx-0x4
[ ]*[a-f0-9]+: ff 14 25 00 00 00 00 callq \*0x0 3d: R_X86_64_32S xxx
[ ]*[a-f0-9]+: ff d7 callq \*%rdi
[ ]*[a-f0-9]+: ff 17 callq \*\(%rdi\)
Index: binutils-2.35/gas/testsuite/gas/i386/x86-64-mpx-branch-1.d
===================================================================
--- binutils-2.35.orig/gas/testsuite/gas/i386/x86-64-mpx-branch-1.d
+++ binutils-2.35/gas/testsuite/gas/i386/x86-64-mpx-branch-1.d
@@ -23,9 +23,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 34 <foo2>
0+34 <foo2>:
-[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 3a <foo2\+0x6> 36: R_X86_64_PLT32 foo-0x4
-[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 41 <foo2\+0xd> 3d: R_X86_64_PLT32 foo-0x4
-[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 47 <foo2\+0x13> 43: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 3a <foo2\+0x6> 36: R_X86_64_PC32 foo-0x4
+[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 41 <foo2\+0xd> 3d: R_X86_64_PC32 foo-0x4
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 47 <foo2\+0x13> 43: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 4d <foo2\+0x19> 49: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 54 <foo2\+0x20> 50: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 5a <foo2\+0x26> 56: R_X86_64_PLT32 foo-0x4
Index: binutils-2.35/gas/testsuite/gas/i386/x86-64-nop-3.d
===================================================================
--- binutils-2.35.orig/gas/testsuite/gas/i386/x86-64-nop-3.d
+++ binutils-2.35/gas/testsuite/gas/i386/x86-64-nop-3.d
@@ -18,5 +18,5 @@ Disassembly of section .text:
Disassembly of section .altinstr_replacement:
0+ <.altinstr_replacement>:
- +[a-f0-9]+: e9 00 00 00 00 jmpq 5 <_start\+0x5> 1: R_X86_64_PLT32 foo-0x4
+ +[a-f0-9]+: e9 00 00 00 00 jmpq 5 <_start\+0x5> 1: R_X86_64_PC32 foo-0x4
#pass
Index: binutils-2.35/gas/testsuite/gas/i386/x86-64-nop-4.d
===================================================================
--- binutils-2.35.orig/gas/testsuite/gas/i386/x86-64-nop-4.d
+++ binutils-2.35/gas/testsuite/gas/i386/x86-64-nop-4.d
@@ -21,5 +21,5 @@ Disassembly of section .altinstr_replace
+[a-f0-9]+: 89 c0 mov %eax,%eax
+[a-f0-9]+: 89 c0 mov %eax,%eax
+[a-f0-9]+: 89 c0 mov %eax,%eax
- +[a-f0-9]+: e9 00 00 00 00 jmpq b <_start\+0xb> 7: R_X86_64_PLT32 foo-0x4
+ +[a-f0-9]+: e9 00 00 00 00 jmpq b <_start\+0xb> 7: R_X86_64_PC32 foo-0x4
#pass
Index: binutils-2.35/gas/testsuite/gas/i386/x86-64-nop-5.d
===================================================================
--- binutils-2.35.orig/gas/testsuite/gas/i386/x86-64-nop-5.d
+++ binutils-2.35/gas/testsuite/gas/i386/x86-64-nop-5.d
@@ -24,5 +24,5 @@ Disassembly of section .altinstr_replace
+[a-f0-9]+: 89 c0 mov %eax,%eax
+[a-f0-9]+: 89 c0 mov %eax,%eax
+[a-f0-9]+: 89 c0 mov %eax,%eax
- +[a-f0-9]+: e9 00 00 00 00 jmpq d <_start\+0xd> 9: R_X86_64_PLT32 foo-0x4
+ +[a-f0-9]+: e9 00 00 00 00 jmpq d <_start\+0xd> 9: R_X86_64_PC32 foo-0x4
#pass
Index: binutils-2.35/gas/testsuite/gas/i386/x86-64-relax-2.d
===================================================================
--- binutils-2.35.orig/gas/testsuite/gas/i386/x86-64-relax-2.d
+++ binutils-2.35/gas/testsuite/gas/i386/x86-64-relax-2.d
@@ -11,12 +11,12 @@ Disassembly of section .text:
0+ <foo>:
[ ]*[a-f0-9]+: eb 24 jmp 26 <local>
[ ]*[a-f0-9]+: eb 1e jmp 22 <hidden_def>
-[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 9 <foo\+0x9> 5: R_X86_64_PLT32 global_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 9 <foo\+0x9> 5: R_X86_64_PC32 global_def-0x4
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq e <foo\+0xe> a: R_X86_64_PLT32 global_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 13 <foo\+0x13> f: R_X86_64_PLT32 weak_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 18 <foo\+0x18> 14: R_X86_64_PLT32 weak_hidden_undef-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1d <foo\+0x1d> 19: R_X86_64_PLT32 weak_hidden_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 22 <hidden_def> 1e: R_X86_64_PLT32 hidden_undef-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 13 <foo\+0x13> f: R_X86_64_PC32 weak_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 18 <foo\+0x18> 14: R_X86_64_PC32 weak_hidden_undef-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1d <foo\+0x1d> 19: R_X86_64_PC32 weak_hidden_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 22 <hidden_def> 1e: R_X86_64_PC32 hidden_undef-0x4
0+22 <hidden_def>:
[ ]*[a-f0-9]+: c3 retq
Index: binutils-2.35/gas/testsuite/gas/i386/x86-64-relax-3.d
===================================================================
--- binutils-2.35.orig/gas/testsuite/gas/i386/x86-64-relax-3.d
+++ binutils-2.35/gas/testsuite/gas/i386/x86-64-relax-3.d
@@ -12,10 +12,10 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: eb 1b jmp 1f <hidden_def>
[ ]*[a-f0-9]+: eb 1b jmp 21 <global_def>
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq b <foo\+0xb> 7: R_X86_64_PLT32 global_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 10 <foo\+0x10> c: R_X86_64_PLT32 weak_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 15 <foo\+0x15> 11: R_X86_64_PLT32 weak_hidden_undef-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1a <foo\+0x1a> 16: R_X86_64_PLT32 weak_hidden_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1f <hidden_def> 1b: R_X86_64_PLT32 hidden_undef-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 10 <foo\+0x10> c: R_X86_64_PC32 weak_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 15 <foo\+0x15> 11: R_X86_64_PC32 weak_hidden_undef-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1a <foo\+0x1a> 16: R_X86_64_PC32 weak_hidden_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1f <hidden_def> 1b: R_X86_64_PC32 hidden_undef-0x4
0+1f <hidden_def>:
[ ]*[a-f0-9]+: c3 retq
Index: binutils-2.35/ld/testsuite/ld-x86-64/mpx1c.rd
===================================================================
--- binutils-2.35.orig/ld/testsuite/ld-x86-64/mpx1c.rd
+++ binutils-2.35/ld/testsuite/ld-x86-64/mpx1c.rd
@@ -1,3 +1,3 @@
#...
-[0-9a-f ]+R_X86_64_PLT32 +0+ +.*
+[0-9a-f ]+R_X86_64_PC32 +0+ +.*
#...
Index: binutils-2.35/ld/testsuite/ld-x86-64/pr22791-1.err
===================================================================
--- binutils-2.35.orig/ld/testsuite/ld-x86-64/pr22791-1.err
+++ /dev/null
@@ -1,2 +0,0 @@
-.*relocation R_X86_64_PC32 against symbol `foo' can not be used when making a PIE object; recompile with -fPIE
-#...
Index: binutils-2.35/ld/testsuite/ld-x86-64/pr22791-1a.c
===================================================================
--- binutils-2.35.orig/ld/testsuite/ld-x86-64/pr22791-1a.c
+++ /dev/null
@@ -1,4 +0,0 @@
-void
-foo (void)
-{
-}
Index: binutils-2.35/ld/testsuite/ld-x86-64/pr22791-1b.s
===================================================================
--- binutils-2.35.orig/ld/testsuite/ld-x86-64/pr22791-1b.s
+++ /dev/null
@@ -1,6 +0,0 @@
- .text
- .globl main
- .type main, @function
-main:
- movl foo(%rip), %eax
- .size main, .-main
Index: binutils-2.35/ld/testsuite/ld-x86-64/pr22791-2.rd
===================================================================
--- binutils-2.35.orig/ld/testsuite/ld-x86-64/pr22791-2.rd
+++ /dev/null
@@ -1,6 +0,0 @@
-#failif
-#...
-.*\(TEXTREL\).*
-#...
-[0-9a-f ]+R_X86_64_NONE.*
-#...
Index: binutils-2.35/ld/testsuite/ld-x86-64/pr22791-2a.s
===================================================================
--- binutils-2.35.orig/ld/testsuite/ld-x86-64/pr22791-2a.s
+++ /dev/null
@@ -1,8 +0,0 @@
- .text
- .p2align 4,,15
- .globl foo
- .type foo, @function
-foo:
- jmp bar
- .size foo, .-foo
- .section .note.GNU-stack,"",@progbits
Index: binutils-2.35/ld/testsuite/ld-x86-64/pr22791-2b.c
===================================================================
--- binutils-2.35.orig/ld/testsuite/ld-x86-64/pr22791-2b.c
+++ /dev/null
@@ -1,7 +0,0 @@
-#include <stdio.h>
-
-void
-bar (void)
-{
- puts ("PASS");
-}
Index: binutils-2.35/ld/testsuite/ld-x86-64/pr22791-2c.s
===================================================================
--- binutils-2.35.orig/ld/testsuite/ld-x86-64/pr22791-2c.s
+++ /dev/null
@@ -1,12 +0,0 @@
- .text
- .p2align 4,,15
- .globl main
- .type main, @function
-main:
- subq $8, %rsp
- call foo
- xorl %eax, %eax
- addq $8, %rsp
- ret
- .size main, .-main
- .section .note.GNU-stack,"",@progbits
Index: binutils-2.35/ld/testsuite/ld-x86-64/pr22842b.S
===================================================================
--- binutils-2.35.orig/ld/testsuite/ld-x86-64/pr22842b.S
+++ binutils-2.35/ld/testsuite/ld-x86-64/pr22842b.S
@@ -7,7 +7,7 @@ main:
leaq bar(%rip), %rdi
addq %rax, %rdi
- callq foo
+ callq foo@PLT
xorl %eax, %eax
popq %rcx
retq
Index: binutils-2.35/ld/testsuite/ld-x86-64/x86-64.exp
===================================================================
--- binutils-2.35.orig/ld/testsuite/ld-x86-64/x86-64.exp
+++ binutils-2.35/ld/testsuite/ld-x86-64/x86-64.exp
@@ -1215,44 +1215,6 @@ if { [isnative] && [check_compiler_avail
"pr22393-3-static" \
] \
[list \
- "Build pr22791-1.so" \
- "-shared" \
- "-fPIC -Wa,-mx86-used-note=yes" \
- { pr22791-1a.c } \
- {} \
- "pr22791-1.so" \
- ] \
- [list \
- "Build pr22791-1" \
- "-pie -Wl,--no-as-needed,-z,notext tmpdir/pr22791-1.so" \
- "$NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \
- { pr22791-1b.s } \
- {{error_output "pr22791-1.err"}} \
- "pr22791-1" \
- ] \
- [list \
- "Build pr22791-2a.o" \
- "" \
- "$NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \
- { pr22791-2a.s } \
- ] \
- [list \
- "Build pr22791-2.so" \
- "-shared tmpdir/pr22791-2a.o" \
- "-fPIC -Wa,-mx86-used-note=yes" \
- { pr22791-2b.c } \
- {{readelf -drW pr22791-2.rd}} \
- "pr22791-2.so" \
- ] \
- [list \
- "Build pr22791-2" \
- "-pie -Wl,--no-as-needed tmpdir/pr22791-2.so" \
- "$NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \
- { pr22791-2c.s } \
- {{readelf -drW pr22791-2.rd}} \
- "pr22791-2" \
- ] \
- [list \
"Build pr22842.so" \
"-shared" \
"-fPIC -Wa,-mx86-used-note=yes" \
@@ -1701,15 +1663,6 @@ if { [isnative] && [check_compiler_avail
"pass.out" \
] \
[list \
- "Run pr22791-2" \
- "-pie -Wl,--no-as-needed tmpdir/pr22791-2.so" \
- "-Wa,-mx86-used-note=yes" \
- { pr22791-2c.s } \
- "pr22791-2" \
- "pass.out" \
- "$NOPIE_CFLAGS" \
- ] \
- [list \
"Run pr22842" \
"-pie -Wl,--no-as-needed tmpdir/pr22842.so" \
"-Wa,-mx86-used-note=yes" \
Index: binutils-2.35/gas/testsuite/gas/i386/x86-64-branch-2.d
===================================================================
--- binutils-2.35.orig/gas/testsuite/gas/i386/x86-64-branch-2.d
+++ binutils-2.35/gas/testsuite/gas/i386/x86-64-branch-2.d
@@ -9,12 +9,12 @@ Disassembly of section .text:
0+ <bar-0xb>:
[ ]*[a-f0-9]+: 66 e9 00 00 jmpw 4 <bar-0x7> 2: R_X86_64_PC16 foo-0x2
-[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 jmpq b <bar> 7: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 jmpq b <bar> 7: R_X86_64_PC32 foo-0x4
0+b <bar>:
[ ]*[a-f0-9]+: 89 c3 mov %eax,%ebx
[ ]*[a-f0-9]+: 66 e8 00 00 callw 11 <bar\+0x6> f: R_X86_64_PC16 foo-0x2
-[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 callq 18 <bar\+0xd> 14: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 callq 18 <bar\+0xd> 14: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: 66 c3 retw *
[ ]*[a-f0-9]+: 66 c2 08 00 retw \$0x8
#pass
Index: binutils-2.35/gas/testsuite/gas/i386/x86-64-branch-3.d
===================================================================
--- binutils-2.35.orig/gas/testsuite/gas/i386/x86-64-branch-3.d
+++ binutils-2.35/gas/testsuite/gas/i386/x86-64-branch-3.d
@@ -8,15 +8,15 @@
Disassembly of section .text:
0+ <bar-0xd>:
-[ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmpq 6 <bar-0x7> 2: R_X86_64_PLT32 foo-0x4
-[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 rex\.W jmpq d <bar> 9: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmpq 6 <bar-0x7> 2: R_X86_64_PC32 foo-0x4
+[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 rex\.W jmpq d <bar> 9: R_X86_64_PC32 foo-0x4
0+d <bar>:
[ ]*[a-f0-9]+: 89 c3 mov %eax,%ebx
-[ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 callq 15 <bar\+0x8> 11: R_X86_64_PLT32 foo-0x4
-[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 rex\.W callq 1c <bar\+0xf> 18: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 callq 15 <bar\+0x8> 11: R_X86_64_PC32 foo-0x4
+[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 rex\.W callq 1c <bar\+0xf> 18: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: 66 c7 f8 00 00 xbeginw 21 <bar\+0x14> 1f: R_X86_64_PC16 foo-0x2
-[ ]*[a-f0-9]+: 66 48 c7 f8 00 00 00 00 data16 xbeginq 29 <bar\+0x1c> 25: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: 66 48 c7 f8 00 00 00 00 data16 xbeginq 29 <bar\+0x1c> 25: R_X86_64_PC32 foo-0x4
[ ]*[a-f0-9]+: 48 ff 18 lcallq \*\(%rax\)
[ ]*[a-f0-9]+: 48 ff 29 ljmpq \*\(%rcx\)
#pass
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