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forked from pool/binutils
binutils/binutils-2.26-branch.diff

8646 lines
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Diff

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index e860c3e..6d70417 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,233 @@
+2016-06-09 Alan Modra <amodra@gmail.com>
+
+ PR ld/20159
+ PR ld/16467
+ * elflink.c (_bfd_elf_merge_symbol): Revert PR16467 change.
+ (_bfd_elf_add_default_symbol): Don't indirect to/from defined
+ symbol given a version by a script different to the version
+ of the symbol being added.
+ (elf_link_add_object_symbols): Use _bfd_elf_strtab_save and
+ _bfd_elf_strtab_restore. Don't fudge dynstr references.
+ * elf-strtab.c (_bfd_elf_strtab_restore_size): Delete.
+ (struct strtab_save): New.
+ (_bfd_elf_strtab_save, _bfd_elf_strtab_restore): New functions.
+ * elf-bfd.h (_bfd_elf_strtab_restore_size): Delete.
+ (_bfd_elf_strtab_save, _bfd_elf_strtab_restore): Declare.
+
+2016-05-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-05-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf32-i386.c (elf_i386_check_relocs): Don't check R_386_GOT32
+ when setting need_convert_load.
+
+ 2016-05-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/20117
+ * elf32-i386.c (elf_i386_convert_load): Don't convert
+ R_386_GOT32.
+
+2016-05-18 Christophe Monat <christophe.monat@st.com>
+
+ Backport from master
+ 2016-05-09 Christophe Monat <christophe.monat@st.com>
+
+ PR ld/20030
+ * elf32-arm.c (is_thumb2_vldm): Account for T1 (DP) encoding.
+ (stm32l4xx_need_create_replacing_stub): Rename ambiguous nb_regs
+ to nb_words.
+ (create_instruction_vldmia): Add is_dp to disambiguate SP/DP
+ encoding.
+ (create_instruction_vldmdb): Likewise.
+ (stm32l4xx_create_replacing_stub_vldm): is_dp detects DP encoding,
+ uses it to re-encode.
+
+2016-05-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-05-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/20093
+ * elf64-x86-64.c (elf_x86_64_convert_load_reloc): Don't convert
+ GOTPCREL relocation against large section.
+
+ * elflink.c (bfd_elf_final_link): Likewise.
+
+2016-05-11 Alan Modra <amodra@gmail.com>
+
+ PR 20060
+ * elf64-ppc.c (ppc64_elf_tls_setup): Clear forced_local.
+ * elf32-ppc.c (ppc_elf_tls_setup): Likewise.
+
+2016-04-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-04-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/20006
+ * elf64-x86-64.c (elf_x86_64_convert_load): Skip debug sections
+ when estimating distances between output sections.
+
+2016-03-29 Toni Spets <toni.spets@iki.fi>
+
+ PR 19878
+ * coffcode.h (coff_write_object_contents): Revert accidental
+ 2014-11-10 change.
+
+2016-03-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19827
+ * elf32-i386.c (elf_i386_check_relocs): Bind defined symbol
+ locally in PIE.
+ (elf_i386_relocate_section): Likewise.
+ * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
+ (elf_x86_64_relocate_section): Likewise.
+
+2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-01-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19539
+ * elf32-i386.c (elf_i386_reloc_type_class): Check relocation
+ against STT_GNU_IFUNC symbol only with dynamic symbols.
+ * elf64-x86-64.c (elf_x86_64_reloc_type_class): Likewise.
+
+2016-03-15 Nick Clifton <nickc@redhat.com>
+
+ Backport from master:
+ 2016-03-09 Leon Winter <winter-gcc@bfw-online.de>
+
+ PR ld/19623
+ * cofflink.c (_bfd_coff_generic_relocate_section): Do not apply
+ relocations against absolute symbols.
+
+2016-03-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-01-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/19523
+ * dwarf2.c (_bfd_dwarf2_slurp_debug_info): Set BFD_DECOMPRESS to
+ decompress debug sections.
+
+2016-03-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19579
+ Backport from master
+ 2016-03-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elflink.c (_bfd_elf_merge_symbol): Group common symbol checking
+ together.
+
+ 2016-03-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elflink.c (_bfd_elf_merge_symbol): Treat common symbol in
+ executable as definition if the new definition comes from a
+ shared library.
+
+2016-03-09 Nick Clifton <nickc@redhat.com>
+ Alan Modra <amodra@gmail.com>
+
+ PR binutils/19775
+ * archive.c (bfd_generic_openr_next_archived_file): Allow zero
+ length elements in the archive.
+ * coff-alpha.c (alpha_ecoff_openr_next_archived_file): Likewise.
+
+2016-03-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19752
+ Backport from master
+ 2015-12-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ * coff-x86_64.c (coff_amd64_reloc): Fix formatting.
+
+ 2015-12-18 Nick Clifton <nickc@redhat.com>
+
+ * coff-i386.c (coff_i386_reloc): Fix formatting.
+
+2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-02-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19698
+ * elflink.c (bfd_elf_record_link_assignment): Set versioned if
+ symbol version is unknown.
+
+2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-02-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19553
+ * elflink.c (elf_link_add_object_symbols): Don't add DT_NEEDED
+ if a symbol from a library loaded via DT_NEEDED doesn't match
+ the symbol referenced by regular object.
+
+2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-02-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf32-i386.c (elf_i386_allocate_dynrelocs): Set plt_got.offset
+ to (bfd_vma) -1 when setting needs_plt to 0.
+ * elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewise.
+
+2016-02-26 Alan Modra <amodra@gmail.com>
+
+ * elf64-ppc.c (create_linkage_sections): Create sfpr when
+ save_restore_funcs, rest of sections when not relocatable.
+ (ppc64_elf_init_stub_bfd): Always call create_linkage_sections.
+ (sfpr_define): Define all symbols on emitted code.
+ (ppc64_elf_func_desc_adjust): Adjust for sfpr now being created
+ when relocatable. Move sfpr_define loop earlier.
+
+2016-02-25 Jiong Wang <jiong.wang@arm.com>
+
+ Backport from master
+ 2016-01-21 Jiong Wang <jiong.wang@arm.com>
+
+ * elfnn-aarch64.c (aarch64_type_of_stub): Allow insert long branch
+ veneer for sym_sec != input_sec.
+ (elfNN_aarch64_size_stub): Support STT_SECTION symbol.
+ (elfNN_aarch64_final_link_relocate): Take rela addend into account when
+ calculation destination.
+
+2016-02-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-02-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19601
+ * elf32-i386.c (elf_i386_relocate_section): Mask off the least
+ significant bit in GOT offset for R_386_GOT32X.
+
+2016-02-02 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-02-02 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19542
+ * elf64-x86-64.c (elf_x86_64_convert_load): Store the estimated
+ distances in the compressed_size field of the output section.
+
+2016-02-01 John David Anglin <danglin@gcc.gnu.org>
+
+ PR ld/19526
+ * elf32-hppa.c (elf32_hppa_final_link): Don't sort non-regular output
+ files.
+ * elf64-hppa.c (elf32_hppa_final_link): Likewise. Remove retval.
+
+2016-01-25 Tristan Gingold <gingold@adacore.com>
+
+ * version.m4: Bump version to 2.26.0
+ * configure: Regenerate.
+
2016-01-25 Tristan Gingold <gingold@adacore.com>
* version.m4: Bump version to 2.26
@@ -119,7 +349,7 @@
* configure: Regenerate.
2015-11-11 Alan Modra <amodra@gmail.com>
- Peter Bergner <bergner@vnet.ibm.com>
+ Peter Bergner <bergner@vnet.ibm.com>
* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA.
(ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA.
@@ -179,8 +409,8 @@
2015-10-29 Catherine Moore <clm@codesourcery.com>
- * elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output
- section to bfd_abs_section_ptr if the stub is discarded.
+ * elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output
+ section to bfd_abs_section_ptr if the stub is discarded.
2015-10-29 Ed Schouten <ed@nuxi.nl>
@@ -232,7 +462,7 @@
* bfd-in2.h: Regenerate.
2015-10-27 Laurent Alfonsi <laurent.alfonsi@st.com>
- Christophe Monat <christophe.monat@st.com>
+ Christophe Monat <christophe.monat@st.com>
* bfd-in2.h: Regenerate.
* bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how
@@ -1225,115 +1455,115 @@
2015-08-18 H.J. Lu <hongjiu.lu@intel.com>
- * bfd/aoutx.h: Replace shared, executable, relocatable and pie
+ * aoutx.h: Replace shared, executable, relocatable and pie
fields with bfd_link_executable, bfd_link_dll,
bfd_link_relocatable, bfd_link_pic and bfd_link_pie.
- * bfd/bout.c: Likewise.
- * bfd/coff-alpha.c: Likewise.
- * bfd/coff-arm.c: Likewise.
- * bfd/coff-i386.c: Likewise.
- * bfd/coff-i960.c: Likewise.
- * bfd/coff-m68k.c: Likewise.
- * bfd/coff-mcore.c: Likewise.
- * bfd/coff-mips.c: Likewise.
- * bfd/coff-ppc.c: Likewise.
- * bfd/coff-rs6000.c: Likewise.
- * bfd/coff-sh.c: Likewise.
- * bfd/coff-tic80.c: Likewise.
- * bfd/coff-x86_64.c: Likewise.
- * bfd/coff64-rs6000.c: Likewise.
- * bfd/coffgen.c: Likewise.
- * bfd/cofflink.c: Likewise.
- * bfd/ecoff.c: Likewise.
- * bfd/ecofflink.c: Likewise.
- * bfd/elf-bfd.h: Likewise.
- * bfd/elf-eh-frame.c: Likewise.
- * bfd/elf-ifunc.c: Likewise.
- * bfd/elf-m10200.c: Likewise.
- * bfd/elf-m10300.c: Likewise.
- * bfd/elf-s390-common.c: Likewise.
- * bfd/elf-vxworks.c: Likewise.
- * bfd/elf.c: Likewise.
- * bfd/elf32-arm.c: Likewise.
- * bfd/elf32-avr.c: Likewise.
- * bfd/elf32-bfin.c: Likewise.
- * bfd/elf32-cr16.c: Likewise.
- * bfd/elf32-cr16c.c: Likewise.
- * bfd/elf32-cris.c: Likewise.
- * bfd/elf32-crx.c: Likewise.
- * bfd/elf32-d10v.c: Likewise.
- * bfd/elf32-dlx.c: Likewise.
- * bfd/elf32-epiphany.c: Likewise.
- * bfd/elf32-fr30.c: Likewise.
- * bfd/elf32-frv.c: Likewise.
- * bfd/elf32-ft32.c: Likewise.
- * bfd/elf32-h8300.c: Likewise.
- * bfd/elf32-hppa.c: Likewise.
- * bfd/elf32-i370.c: Likewise.
- * bfd/elf32-i386.c: Likewise.
- * bfd/elf32-i860.c: Likewise.
- * bfd/elf32-ip2k.c: Likewise.
- * bfd/elf32-iq2000.c: Likewise.
- * bfd/elf32-lm32.c: Likewise.
- * bfd/elf32-m32c.c: Likewise.
- * bfd/elf32-m32r.c: Likewise.
- * bfd/elf32-m68hc11.c: Likewise.
- * bfd/elf32-m68hc1x.c: Likewise.
- * bfd/elf32-m68k.c: Likewise.
- * bfd/elf32-mcore.c: Likewise.
- * bfd/elf32-mep.c: Likewise.
- * bfd/elf32-metag.c: Likewise.
- * bfd/elf32-microblaze.c: Likewise.
- * bfd/elf32-moxie.c: Likewise.
- * bfd/elf32-msp430.c: Likewise.
- * bfd/elf32-mt.c: Likewise.
- * bfd/elf32-nds32.c: Likewise.
- * bfd/elf32-nios2.c: Likewise.
- * bfd/elf32-or1k.c: Likewise.
- * bfd/elf32-ppc.c: Likewise.
- * bfd/elf32-rl78.c: Likewise.
- * bfd/elf32-rx.c: Likewise.
- * bfd/elf32-s390.c: Likewise.
- * bfd/elf32-score.c: Likewise.
- * bfd/elf32-score7.c: Likewise.
- * bfd/elf32-sh-symbian.c: Likewise.
- * bfd/elf32-sh.c: Likewise.
- * bfd/elf32-sh64.c: Likewise.
- * bfd/elf32-spu.c: Likewise.
- * bfd/elf32-tic6x.c: Likewise.
- * bfd/elf32-tilepro.c: Likewise.
- * bfd/elf32-v850.c: Likewise.
- * bfd/elf32-vax.c: Likewise.
- * bfd/elf32-visium.c: Likewise.
- * bfd/elf32-xc16x.c: Likewise.
- * bfd/elf32-xstormy16.c: Likewise.
- * bfd/elf32-xtensa.c: Likewise.
- * bfd/elf64-alpha.c: Likewise.
- * bfd/elf64-hppa.c: Likewise.
- * bfd/elf64-ia64-vms.c: Likewise.
- * bfd/elf64-mmix.c: Likewise.
- * bfd/elf64-ppc.c: Likewise.
- * bfd/elf64-s390.c: Likewise.
- * bfd/elf64-sh64.c: Likewise.
- * bfd/elf64-x86-64.c: Likewise.
- * bfd/elflink.c: Likewise.
- * bfd/elfnn-aarch64.c: Likewise.
- * bfd/elfnn-ia64.c: Likewise.
- * bfd/elfxx-mips.c: Likewise.
- * bfd/elfxx-sparc.c: Likewise.
- * bfd/elfxx-tilegx.c: Likewise.
- * bfd/i386linux.c: Likewise.
- * bfd/linker.c: Likewise.
- * bfd/m68klinux.c: Likewise.
- * bfd/pdp11.c: Likewise.
- * bfd/pe-mips.c: Likewise.
- * bfd/peXXigen.c: Likewise.
- * bfd/reloc.c: Likewise.
- * bfd/reloc16.c: Likewise.
- * bfd/sparclinux.c: Likewise.
- * bfd/sunos.c: Likewise.
- * bfd/vms-alpha.c: Likewise.
- * bfd/xcofflink.c: Likewise.
+ * bout.c: Likewise.
+ * coff-alpha.c: Likewise.
+ * coff-arm.c: Likewise.
+ * coff-i386.c: Likewise.
+ * coff-i960.c: Likewise.
+ * coff-m68k.c: Likewise.
+ * coff-mcore.c: Likewise.
+ * coff-mips.c: Likewise.
+ * coff-ppc.c: Likewise.
+ * coff-rs6000.c: Likewise.
+ * coff-sh.c: Likewise.
+ * coff-tic80.c: Likewise.
+ * coff-x86_64.c: Likewise.
+ * coff64-rs6000.c: Likewise.
+ * coffgen.c: Likewise.
+ * cofflink.c: Likewise.
+ * ecoff.c: Likewise.
+ * ecofflink.c: Likewise.
+ * elf-bfd.h: Likewise.
+ * elf-eh-frame.c: Likewise.
+ * elf-ifunc.c: Likewise.
+ * elf-m10200.c: Likewise.
+ * elf-m10300.c: Likewise.
+ * elf-s390-common.c: Likewise.
+ * elf-vxworks.c: Likewise.
+ * elf.c: Likewise.
+ * elf32-arm.c: Likewise.
+ * elf32-avr.c: Likewise.
+ * elf32-bfin.c: Likewise.
+ * elf32-cr16.c: Likewise.
+ * elf32-cr16c.c: Likewise.
+ * elf32-cris.c: Likewise.
+ * elf32-crx.c: Likewise.
+ * elf32-d10v.c: Likewise.
+ * elf32-dlx.c: Likewise.
+ * elf32-epiphany.c: Likewise.
+ * elf32-fr30.c: Likewise.
+ * elf32-frv.c: Likewise.
+ * elf32-ft32.c: Likewise.
+ * elf32-h8300.c: Likewise.
+ * elf32-hppa.c: Likewise.
+ * elf32-i370.c: Likewise.
+ * elf32-i386.c: Likewise.
+ * elf32-i860.c: Likewise.
+ * elf32-ip2k.c: Likewise.
+ * elf32-iq2000.c: Likewise.
+ * elf32-lm32.c: Likewise.
+ * elf32-m32c.c: Likewise.
+ * elf32-m32r.c: Likewise.
+ * elf32-m68hc11.c: Likewise.
+ * elf32-m68hc1x.c: Likewise.
+ * elf32-m68k.c: Likewise.
+ * elf32-mcore.c: Likewise.
+ * elf32-mep.c: Likewise.
+ * elf32-metag.c: Likewise.
+ * elf32-microblaze.c: Likewise.
+ * elf32-moxie.c: Likewise.
+ * elf32-msp430.c: Likewise.
+ * elf32-mt.c: Likewise.
+ * elf32-nds32.c: Likewise.
+ * elf32-nios2.c: Likewise.
+ * elf32-or1k.c: Likewise.
+ * elf32-ppc.c: Likewise.
+ * elf32-rl78.c: Likewise.
+ * elf32-rx.c: Likewise.
+ * elf32-s390.c: Likewise.
+ * elf32-score.c: Likewise.
+ * elf32-score7.c: Likewise.
+ * elf32-sh-symbian.c: Likewise.
+ * elf32-sh.c: Likewise.
+ * elf32-sh64.c: Likewise.
+ * elf32-spu.c: Likewise.
+ * elf32-tic6x.c: Likewise.
+ * elf32-tilepro.c: Likewise.
+ * elf32-v850.c: Likewise.
+ * elf32-vax.c: Likewise.
+ * elf32-visium.c: Likewise.
+ * elf32-xc16x.c: Likewise.
+ * elf32-xstormy16.c: Likewise.
+ * elf32-xtensa.c: Likewise.
+ * elf64-alpha.c: Likewise.
+ * elf64-hppa.c: Likewise.
+ * elf64-ia64-vms.c: Likewise.
+ * elf64-mmix.c: Likewise.
+ * elf64-ppc.c: Likewise.
+ * elf64-s390.c: Likewise.
+ * elf64-sh64.c: Likewise.
+ * elf64-x86-64.c: Likewise.
+ * elflink.c: Likewise.
+ * elfnn-aarch64.c: Likewise.
+ * elfnn-ia64.c: Likewise.
+ * elfxx-mips.c: Likewise.
+ * elfxx-sparc.c: Likewise.
+ * elfxx-tilegx.c: Likewise.
+ * i386linux.c: Likewise.
+ * linker.c: Likewise.
+ * m68klinux.c: Likewise.
+ * pdp11.c: Likewise.
+ * pe-mips.c: Likewise.
+ * peXXigen.c: Likewise.
+ * reloc.c: Likewise.
+ * reloc16.c: Likewise.
+ * sparclinux.c: Likewise.
+ * sunos.c: Likewise.
+ * vms-alpha.c: Likewise.
+ * xcofflink.c: Likewise.
2015-08-18 Alan Modra <amodra@gmail.com>
@@ -1387,7 +1617,7 @@
2015-08-11 Jiong Wang <jiong.wang@arm.com>
- * bfd/elfnn-aarch64.c (aarch64_type_of_stub): New parameter "sym_sec".
+ * elfnn-aarch64.c (aarch64_type_of_stub): New parameter "sym_sec".
Loose the check for symbol from ABS section.
(elfNN_aarch64_size_stubs): Pass sym_sec.
@@ -1688,10 +1918,10 @@
2015-07-10 H.J. Lu <hongjiu.lu@intel.com>
- PR binutils/18656
- * bfd.c (bfd_convert_section_size): New function.
- (bfd_convert_section_contents): Likewise.
- * bfd-in2.h: Regenerated.
+ PR binutils/18656
+ * bfd.c (bfd_convert_section_size): New function.
+ (bfd_convert_section_contents): Likewise.
+ * bfd-in2.h: Regenerated.
2015-07-09 Catherine Moore <clm@codesourcery.com>
@@ -2004,7 +2234,6 @@
Bernd Schmidt <bernds@codesourcery.com>
Paul Brook <paul@codesourcery.com>
- bfd/
* bfd-in2.h: Regenerated.
* elf-bfd.h (DWARF2_EH_HDR, COMPACT_EH_HDR): Define.
(COMPACT_EH_CANT_UNWIND_OPCODE): Define.
@@ -2913,7 +3142,7 @@
2015-03-18 H.J. Lu <hongjiu.lu@intel.com>
* compress.c (bfd_compress_section_contents): Make it static.
- * bfd/bfd-in2.h: Regenerated.
+ * bfd-in2.h: Regenerated.
2015-03-18 Eric Youngdale <eyoungdale@ptc.com>
@@ -3062,8 +3291,8 @@
2015-02-27 Marcus Shawcroft <marcus.shawcroft@arm.com>
- * bfd/bfd-in2.h: Regenerate.
- * bfd/libbfd.h: Regenerate.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
2015-02-26 Marcus Shawcroft <marcus.shawcroft@arm.com>
@@ -3534,7 +3763,7 @@
is weak or pointer_equality_needed is FALSE.
* elf32-arm.c (elf32_arm_finish_dynamic_symbol): Improve
- comment discussing why we clear st_value for some symbols.
+ comment discussing why we clear st_value for some symbols.
2015-02-02 Kuan-Lin Chen <kuanlinchentw@gmail.com>
diff --git a/bfd/archive.c b/bfd/archive.c
index b3d03d3..1fc3a94 100644
--- a/bfd/archive.c
+++ b/bfd/archive.c
@@ -802,7 +802,7 @@ bfd_generic_openr_next_archived_file (bfd *archive, bfd *last_file)
Note that last_file->origin can be odd in the case of
BSD-4.4-style element with a long odd size. */
filestart += filestart % 2;
- if (filestart <= last_file->proxy_origin)
+ if (filestart < last_file->proxy_origin)
{
/* Prevent looping. See PR19256. */
bfd_set_error (bfd_error_malformed_archive);
diff --git a/bfd/coff-alpha.c b/bfd/coff-alpha.c
index 7478f2f..fffb9f7 100644
--- a/bfd/coff-alpha.c
+++ b/bfd/coff-alpha.c
@@ -2208,7 +2208,7 @@ alpha_ecoff_openr_next_archived_file (bfd *archive, bfd *last_file)
BSD-4.4-style element with a long odd size. */
filestart = last_file->proxy_origin + size;
filestart += filestart % 2;
- if (filestart <= last_file->proxy_origin)
+ if (filestart < last_file->proxy_origin)
{
/* Prevent looping. See PR19256. */
bfd_set_error (bfd_error_malformed_archive);
diff --git a/bfd/coff-i386.c b/bfd/coff-i386.c
index a9725c4..1b1a815 100644
--- a/bfd/coff-i386.c
+++ b/bfd/coff-i386.c
@@ -139,41 +139,41 @@ coff_i386_reloc (bfd *abfd,
#define DOIT(x) \
x = ((x & ~howto->dst_mask) | (((x & howto->src_mask) + diff) & howto->dst_mask))
- if (diff != 0)
- {
- reloc_howto_type *howto = reloc_entry->howto;
- unsigned char *addr = (unsigned char *) data + reloc_entry->address;
+ if (diff != 0)
+ {
+ reloc_howto_type *howto = reloc_entry->howto;
+ unsigned char *addr = (unsigned char *) data + reloc_entry->address;
+
+ switch (howto->size)
+ {
+ case 0:
+ {
+ char x = bfd_get_8 (abfd, addr);
+ DOIT (x);
+ bfd_put_8 (abfd, x, addr);
+ }
+ break;
- switch (howto->size)
+ case 1:
{
- case 0:
- {
- char x = bfd_get_8 (abfd, addr);
- DOIT (x);
- bfd_put_8 (abfd, x, addr);
- }
- break;
-
- case 1:
- {
- short x = bfd_get_16 (abfd, addr);
- DOIT (x);
- bfd_put_16 (abfd, (bfd_vma) x, addr);
- }
- break;
-
- case 2:
- {
- long x = bfd_get_32 (abfd, addr);
- DOIT (x);
- bfd_put_32 (abfd, (bfd_vma) x, addr);
- }
- break;
-
- default:
- abort ();
+ short x = bfd_get_16 (abfd, addr);
+ DOIT (x);
+ bfd_put_16 (abfd, (bfd_vma) x, addr);
}
- }
+ break;
+
+ case 2:
+ {
+ long x = bfd_get_32 (abfd, addr);
+ DOIT (x);
+ bfd_put_32 (abfd, (bfd_vma) x, addr);
+ }
+ break;
+
+ default:
+ abort ();
+ }
+ }
/* Now let bfd_perform_relocation finish everything up. */
return bfd_reloc_continue;
diff --git a/bfd/coff-x86_64.c b/bfd/coff-x86_64.c
index 4e6420a..9d7c845 100644
--- a/bfd/coff-x86_64.c
+++ b/bfd/coff-x86_64.c
@@ -138,59 +138,61 @@ coff_amd64_reloc (bfd *abfd,
#define DOIT(x) \
x = ((x & ~howto->dst_mask) | (((x & howto->src_mask) + diff) & howto->dst_mask))
- if (diff != 0)
- {
- reloc_howto_type *howto = reloc_entry->howto;
- unsigned char *addr = (unsigned char *) data + reloc_entry->address;
-
- /* FIXME: We do not have an end address for data, so we cannot
- accurately range check any addresses computed against it.
- cf: PR binutils/17512: file: 1085-1761-0.004.
- For now we do the best that we can. */
- if (addr < (unsigned char *) data || addr > ((unsigned char *) data) + input_section->size)
+ if (diff != 0)
+ {
+ reloc_howto_type *howto = reloc_entry->howto;
+ unsigned char *addr = (unsigned char *) data + reloc_entry->address;
+
+ /* FIXME: We do not have an end address for data, so we cannot
+ accurately range check any addresses computed against it.
+ cf: PR binutils/17512: file: 1085-1761-0.004.
+ For now we do the best that we can. */
+ if (addr < (unsigned char *) data
+ || addr > ((unsigned char *) data) + input_section->size)
+ {
+ bfd_set_error (bfd_error_bad_value);
+ return bfd_reloc_notsupported;
+ }
+
+ switch (howto->size)
+ {
+ case 0:
+ {
+ char x = bfd_get_8 (abfd, addr);
+ DOIT (x);
+ bfd_put_8 (abfd, x, addr);
+ }
+ break;
+
+ case 1:
+ {
+ short x = bfd_get_16 (abfd, addr);
+ DOIT (x);
+ bfd_put_16 (abfd, (bfd_vma) x, addr);
+ }
+ break;
+
+ case 2:
{
- bfd_set_error (bfd_error_bad_value);
- return bfd_reloc_notsupported;
+ long x = bfd_get_32 (abfd, addr);
+ DOIT (x);
+ bfd_put_32 (abfd, (bfd_vma) x, addr);
}
+ break;
- switch (howto->size)
+ case 4:
{
- case 0:
- {
- char x = bfd_get_8 (abfd, addr);
- DOIT (x);
- bfd_put_8 (abfd, x, addr);
- }
- break;
-
- case 1:
- {
- short x = bfd_get_16 (abfd, addr);
- DOIT (x);
- bfd_put_16 (abfd, (bfd_vma) x, addr);
- }
- break;
-
- case 2:
- {
- long x = bfd_get_32 (abfd, addr);
- DOIT (x);
- bfd_put_32 (abfd, (bfd_vma) x, addr);
- }
- break;
- case 4:
- {
- long long x = bfd_get_64 (abfd, addr);
- DOIT (x);
- bfd_put_64 (abfd, (bfd_vma) x, addr);
- }
- break;
-
- default:
- bfd_set_error (bfd_error_bad_value);
- return bfd_reloc_notsupported;
+ long long x = bfd_get_64 (abfd, addr);
+ DOIT (x);
+ bfd_put_64 (abfd, (bfd_vma) x, addr);
}
- }
+ break;
+
+ default:
+ bfd_set_error (bfd_error_bad_value);
+ return bfd_reloc_notsupported;
+ }
+ }
/* Now let bfd_perform_relocation finish everything up. */
return bfd_reloc_continue;
diff --git a/bfd/coffcode.h b/bfd/coffcode.h
index 2499885..97db5f7 100644
--- a/bfd/coffcode.h
+++ b/bfd/coffcode.h
@@ -4076,6 +4076,8 @@ coff_write_object_contents (bfd * abfd)
internal_f.f_flags |= F_DYNLOAD;
#endif
+ memset (&internal_a, 0, sizeof internal_a);
+
/* Set up architecture-dependent stuff. */
{
unsigned int magic = 0;
diff --git a/bfd/cofflink.c b/bfd/cofflink.c
index 8d98fec..88eb2b3 100644
--- a/bfd/cofflink.c
+++ b/bfd/cofflink.c
@@ -2977,6 +2977,12 @@ _bfd_coff_generic_relocate_section (bfd *output_bfd,
else
{
sec = sections[symndx];
+
+ /* PR 19623: Relocations against symbols in
+ the absolute sections should ignored. */
+ if (bfd_is_abs_section (sec))
+ continue;
+
val = (sec->output_section->vma
+ sec->output_offset
+ sym->n_value);
diff --git a/bfd/configure b/bfd/configure
index cf3c746..7411c6d 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated by GNU Autoconf 2.64 for bfd 2.26.
+# Generated by GNU Autoconf 2.64 for bfd 2.26.0.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@ MAKEFLAGS=
# Identity of this package.
PACKAGE_NAME='bfd'
PACKAGE_TARNAME='bfd'
-PACKAGE_VERSION='2.26'
-PACKAGE_STRING='bfd 2.26'
+PACKAGE_VERSION='2.26.0'
+PACKAGE_STRING='bfd 2.26.0'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -1351,7 +1351,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
-\`configure' configures bfd 2.26 to adapt to many kinds of systems.
+\`configure' configures bfd 2.26.0 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1422,7 +1422,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
- short | recursive ) echo "Configuration of bfd 2.26:";;
+ short | recursive ) echo "Configuration of bfd 2.26.0:";;
esac
cat <<\_ACEOF
@@ -1543,7 +1543,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
-bfd configure 2.26
+bfd configure 2.26.0
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -2185,7 +2185,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
-It was created by bfd $as_me 2.26, which was
+It was created by bfd $as_me 2.26.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -3993,7 +3993,7 @@ fi
# Define the identity of the package.
PACKAGE='bfd'
- VERSION='2.26'
+ VERSION='2.26.0'
cat >>confdefs.h <<_ACEOF
@@ -16533,7 +16533,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
-This file was extended by bfd $as_me 2.26, which was
+This file was extended by bfd $as_me 2.26.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -16597,7 +16597,7 @@ Report bugs to the package provider."
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
-bfd config.status 2.26
+bfd config.status 2.26.0
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
diff --git a/bfd/dwarf2.c b/bfd/dwarf2.c
index 176f018..64cfe9b 100644
--- a/bfd/dwarf2.c
+++ b/bfd/dwarf2.c
@@ -3706,8 +3706,10 @@ _bfd_dwarf2_slurp_debug_info (bfd *abfd, bfd *debug_bfd,
fail more quickly. */
return FALSE;
+ /* Set BFD_DECOMPRESS to decompress debug sections. */
if ((debug_bfd = bfd_openr (debug_filename, NULL)) == NULL
- || ! bfd_check_format (debug_bfd, bfd_object)
+ || !(debug_bfd->flags |= BFD_DECOMPRESS,
+ bfd_check_format (debug_bfd, bfd_object))
|| (msec = find_debug_info (debug_bfd,
debug_sections, NULL)) == NULL
|| !bfd_generic_link_read_symbols (debug_bfd))
diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h
index 70e3327..f36b945 100644
--- a/bfd/elf-bfd.h
+++ b/bfd/elf-bfd.h
@@ -2039,9 +2039,11 @@ extern void _bfd_elf_strtab_delref
extern unsigned int _bfd_elf_strtab_refcount
(struct elf_strtab_hash *, bfd_size_type);
extern void _bfd_elf_strtab_clear_all_refs
- (struct elf_strtab_hash *tab);
-extern void _bfd_elf_strtab_restore_size
- (struct elf_strtab_hash *, bfd_size_type);
+ (struct elf_strtab_hash *);
+extern void *_bfd_elf_strtab_save
+ (struct elf_strtab_hash *);
+extern void _bfd_elf_strtab_restore
+ (struct elf_strtab_hash *, void *);
extern bfd_size_type _bfd_elf_strtab_size
(struct elf_strtab_hash *);
extern bfd_size_type _bfd_elf_strtab_offset
diff --git a/bfd/elf-strtab.c b/bfd/elf-strtab.c
index 4d38e04..e7de973 100644
--- a/bfd/elf-strtab.c
+++ b/bfd/elf-strtab.c
@@ -215,16 +215,45 @@ _bfd_elf_strtab_clear_all_refs (struct elf_strtab_hash *tab)
tab->array[idx]->refcount = 0;
}
-/* Downsizes strtab. Entries from IDX up to the current size are
- removed from the array. */
+/* Save strtab refcounts prior to adding --as-needed library. */
+
+struct strtab_save
+{
+ bfd_size_type size;
+ unsigned int refcount[1];
+};
+
+void *
+_bfd_elf_strtab_save (struct elf_strtab_hash *tab)
+{
+ struct strtab_save *save;
+ bfd_size_type idx, size;
+
+ size = sizeof (*save) + (tab->size - 1) * sizeof (save->refcount[0]);
+ save = bfd_malloc (size);
+ if (save == NULL)
+ return save;
+
+ save->size = tab->size;
+ for (idx = 1; idx < tab->size; idx++)
+ save->refcount[idx] = tab->array[idx]->refcount;
+ return save;
+}
+
+/* Restore strtab refcounts on finding --as-needed library not needed. */
+
void
-_bfd_elf_strtab_restore_size (struct elf_strtab_hash *tab, bfd_size_type idx)
+_bfd_elf_strtab_restore (struct elf_strtab_hash *tab, void *buf)
{
- bfd_size_type curr_size = tab->size;
+ bfd_size_type idx, curr_size = tab->size;
+ struct strtab_save *save = (struct strtab_save *) buf;
BFD_ASSERT (tab->sec_size == 0);
- BFD_ASSERT (idx <= curr_size);
- tab->size = idx;
+ BFD_ASSERT (save->size <= curr_size);
+ tab->size = save->size;
+ for (idx = 1; idx < save->size; ++idx)
+ tab->array[idx]->refcount = save->refcount[idx];
+
for (; idx < curr_size; ++idx)
{
/* We don't remove entries from the hash table, just set their
diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
index 5affc76..b585e5b 100644
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -7374,18 +7374,21 @@ is_thumb2_vldm (const insn32 insn)
{
/* A6.5 Extension register load or store instruction
A7.7.229
- We look only for the 32-bit registers case since the DP (64-bit
- registers) are not supported for STM32L4XX
+ We look for SP 32-bit and DP 64-bit registers.
+ Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
+ <list> is consecutive 64-bit registers
+ 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
<list> is consecutive 32-bit registers
1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
if P==0 && U==1 && W==1 && Rn=1101 VPOP
if PUW=010 || PUW=011 || PUW=101 VLDM. */
return
- ((insn & 0xfe100f00) == 0xec100a00)
+ (((insn & 0xfe100f00) == 0xec100b00) ||
+ ((insn & 0xfe100f00) == 0xec100a00))
&& /* (IA without !). */
(((((insn << 7) >> 28) & 0xd) == 0x4)
- /* (IA with !), includes VPOP (when reg number is SP). */
+ /* (IA with !), includes VPOP (when reg number is SP). */
|| ((((insn << 7) >> 28) & 0xd) == 0x5)
/* (DB with !). */
|| ((((insn << 7) >> 28) & 0xd) == 0x9));
@@ -7402,19 +7405,19 @@ static bfd_boolean
stm32l4xx_need_create_replacing_stub (const insn32 insn,
bfd_arm_stm32l4xx_fix stm32l4xx_fix)
{
- int nb_regs = 0;
+ int nb_words = 0;
/* The field encoding the register list is the same for both LDMIA
and LDMDB encodings. */
if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
- nb_regs = popcount (insn & 0x0000ffff);
+ nb_words = popcount (insn & 0x0000ffff);
else if (is_thumb2_vldm (insn))
- nb_regs = (insn & 0xff);
+ nb_words = (insn & 0xff);
/* DEFAULT mode accounts for the real bug condition situation,
ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
return
- (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_regs > 8 :
+ (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
(stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
}
@@ -16242,30 +16245,31 @@ create_instruction_sub (int target_reg, int source_reg, int value)
}
static inline bfd_vma
-create_instruction_vldmia (int base_reg, int wback, int num_regs,
+create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
int first_reg)
{
/* A8.8.332 VLDM (A8-922)
- VLMD{MODE} Rn{!}, {list} (Encoding T2). */
- bfd_vma patched_inst = 0xec900a00
+ VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
+ bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
| (/*W=*/wback << 21)
| (base_reg << 16)
- | (num_regs & 0x000000ff)
- | (((unsigned)first_reg>>1) & 0x0000000f) << 12
+ | (num_words & 0x000000ff)
+ | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
| (first_reg & 0x00000001) << 22;
return patched_inst;
}
static inline bfd_vma
-create_instruction_vldmdb (int base_reg, int num_regs, int first_reg)
+create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
+ int first_reg)
{
/* A8.8.332 VLDM (A8-922)
- VLMD{MODE} Rn!, {} (Encoding T2). */
- bfd_vma patched_inst = 0xed300a00
+ VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
+ bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
| (base_reg << 16)
- | (num_regs & 0x000000ff)
- | (((unsigned)first_reg>>1) & 0x0000000f) << 12
+ | (num_words & 0x000000ff)
+ | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
| (first_reg & 0x00000001) << 22;
return patched_inst;
@@ -16745,15 +16749,15 @@ stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
const bfd_byte *const initial_insn_addr,
bfd_byte *const base_stub_contents)
{
- int num_regs = ((unsigned int)initial_insn << 24) >> 24;
+ int num_words = ((unsigned int) initial_insn << 24) >> 24;
bfd_byte *current_stub_contents = base_stub_contents;
BFD_ASSERT (is_thumb2_vldm (initial_insn));
/* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
- smaller than 8 registers load sequences that do not cause the
+ smaller than 8 words load sequences that do not cause the
hardware issue. */
- if (num_regs <= 8)
+ if (num_words <= 8)
{
/* Untouched instruction. */
current_stub_contents =
@@ -16768,28 +16772,30 @@ stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
}
else
{
+ bfd_boolean is_dp = /* DP encoding. */
+ (initial_insn & 0xfe100f00) == 0xec100b00;
bfd_boolean is_ia_nobang = /* (IA without !). */
(((initial_insn << 7) >> 28) & 0xd) == 0x4;
bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
(((initial_insn << 7) >> 28) & 0xd) == 0x5;
bfd_boolean is_db_bang = /* (DB with !). */
(((initial_insn << 7) >> 28) & 0xd) == 0x9;
- int base_reg = ((unsigned int)initial_insn << 12) >> 28;
+ int base_reg = ((unsigned int) initial_insn << 12) >> 28;
/* d = UInt (Vd:D);. */
- int first_reg = ((((unsigned int)initial_insn << 16) >> 28) << 1)
+ int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
| (((unsigned int)initial_insn << 9) >> 31);
- /* Compute the number of 8-register chunks needed to split. */
- int chunks = (num_regs%8) ? (num_regs/8 + 1) : (num_regs/8);
+ /* Compute the number of 8-words chunks needed to split. */
+ int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
int chunk;
/* The test coverage has been done assuming the following
hypothesis that exactly one of the previous is_ predicates is
true. */
- BFD_ASSERT ((is_ia_nobang ^ is_ia_bang ^ is_db_bang) &&
- !(is_ia_nobang & is_ia_bang & is_db_bang));
+ BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
+ && !(is_ia_nobang & is_ia_bang & is_db_bang));
- /* We treat the cutting of the register in one pass for all
+ /* We treat the cutting of the words in one pass for all
cases, then we emit the adjustments:
vldm rx, {...}
@@ -16802,29 +16808,34 @@ stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
vldmd rx!, {...}
-> vldmb rx!, {8_words_or_less} for each needed 8_word. */
- for (chunk = 0; chunk<chunks; ++chunk)
+ for (chunk = 0; chunk < chunks; ++chunk)
{
+ bfd_vma new_insn = 0;
+
if (is_ia_nobang || is_ia_bang)
{
- current_stub_contents =
- push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
- create_instruction_vldmia
- (base_reg,
- /*wback= . */1,
- chunks - (chunk + 1) ?
- 8 : num_regs - chunk * 8,
- first_reg + chunk * 8));
+ new_insn = create_instruction_vldmia
+ (base_reg,
+ is_dp,
+ /*wback= . */1,
+ chunks - (chunk + 1) ?
+ 8 : num_words - chunk * 8,
+ first_reg + chunk * 8);
}
else if (is_db_bang)
{
- current_stub_contents =
- push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
- create_instruction_vldmdb
- (base_reg,
- chunks - (chunk + 1) ?
- 8 : num_regs - chunk * 8,
- first_reg + chunk * 8));
+ new_insn = create_instruction_vldmdb
+ (base_reg,
+ is_dp,
+ chunks - (chunk + 1) ?
+ 8 : num_words - chunk * 8,
+ first_reg + chunk * 8);
}
+
+ if (new_insn)
+ current_stub_contents =
+ push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
+ new_insn);
}
/* Only this case requires the base register compensation
@@ -16834,7 +16845,7 @@ stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
current_stub_contents =
push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
create_instruction_sub
- (base_reg, base_reg, 4*num_regs));
+ (base_reg, base_reg, 4*num_words));
}
/* B initial_insn_addr+4. */
diff --git a/bfd/elf32-hppa.c b/bfd/elf32-hppa.c
index ad40914..3fc1f57 100644
--- a/bfd/elf32-hppa.c
+++ b/bfd/elf32-hppa.c
@@ -3245,6 +3245,8 @@ tpoff (struct bfd_link_info *info, bfd_vma address)
static bfd_boolean
elf32_hppa_final_link (bfd *abfd, struct bfd_link_info *info)
{
+ struct stat buf;
+
/* Invoke the regular ELF linker to do all the work. */
if (!bfd_elf_final_link (abfd, info))
return FALSE;
@@ -3254,6 +3256,13 @@ elf32_hppa_final_link (bfd *abfd, struct bfd_link_info *info)
if (bfd_link_relocatable (info))
return TRUE;
+ /* Do not attempt to sort non-regular files. This is here
+ especially for configure scripts and kernel builds which run
+ tests with "ld [...] -o /dev/null". */
+ if (stat (abfd->filename, &buf) != 0
+ || !S_ISREG(buf.st_mode))
+ return TRUE;
+
return elf_hppa_sort_unwind (abfd);
}
diff --git a/bfd/elf32-i386.c b/bfd/elf32-i386.c
index 300839b..a3a241f 100644
--- a/bfd/elf32-i386.c
+++ b/bfd/elf32-i386.c
@@ -1830,7 +1830,8 @@ do_size:
&& (sec->flags & SEC_ALLOC) != 0
&& (r_type != R_386_PC32
|| (h != NULL
- && (! SYMBOLIC_BIND (info, h)
+ && (! (bfd_link_pie (info)
+ || SYMBOLIC_BIND (info, h))
|| h->root.type == bfd_link_hash_defweak
|| !h->def_regular))))
|| (ELIMINATE_COPY_RELOCS
@@ -1961,7 +1962,7 @@ do_size:
return FALSE;
}
- if ((r_type == R_386_GOT32 || r_type == R_386_GOT32X)
+ if (r_type == R_386_GOT32X
&& (h == NULL || h->type != STT_GNU_IFUNC))
sec->need_convert_load = 1;
}
@@ -2490,12 +2491,14 @@ elf_i386_allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
}
else
{
+ eh->plt_got.offset = (bfd_vma) -1;
h->plt.offset = (bfd_vma) -1;
h->needs_plt = 0;
}
}
else
{
+ eh->plt_got.offset = (bfd_vma) -1;
h->plt.offset = (bfd_vma) -1;
h->needs_plt = 0;
}
@@ -2813,14 +2816,16 @@ elf_i386_convert_load (bfd *abfd, asection *sec,
unsigned int nop;
bfd_vma nop_offset;
- if (r_type != R_386_GOT32 && r_type != R_386_GOT32X)
+ /* Don't convert R_386_GOT32 since we can't tell if it is applied
+ to "mov $foo@GOT, %reg" which isn't a load via GOT. */
+ if (r_type != R_386_GOT32X)
continue;
roff = irel->r_offset;
if (roff < 2)
continue;
- /* Addend for R_386_GOT32 and R_386_GOT32X relocations must be 0. */
+ /* Addend for R_386_GOT32X relocation must be 0. */
addend = bfd_get_32 (abfd, contents + roff);
if (addend != 0)
continue;
@@ -2828,13 +2833,11 @@ elf_i386_convert_load (bfd *abfd, asection *sec,
modrm = bfd_get_8 (abfd, contents + roff - 1);
baseless = (modrm & 0xc7) == 0x5;
- if (r_type == R_386_GOT32X
- && baseless
+ if (baseless
&& bfd_link_pic (link_info))
{
/* For PIC, disallow R_386_GOT32X without a base register
- since we don't know what the GOT base is. Allow
- R_386_GOT32 for existing object files. */
+ since we don't know what the GOT base is. */
const char *name;
if (r_symndx < symtab_hdr->sh_info)
@@ -2862,12 +2865,6 @@ elf_i386_convert_load (bfd *abfd, asection *sec,
/* It is OK to convert mov to lea. */
if (opcode != 0x8b)
{
- /* Only convert R_386_GOT32X relocation for call, jmp or
- one of adc, add, and, cmp, or, sbb, sub, test, xor
- instructions. */
- if (r_type != R_386_GOT32X)
- continue;
-
/* It is OK to convert indirect branch to direct branch. It
is OK to convert adc, add, and, cmp, or, sbb, sub, test,
xor only when PIC is false. */
@@ -2875,8 +2872,8 @@ elf_i386_convert_load (bfd *abfd, asection *sec,
continue;
}
- /* Try to convert R_386_GOT32 and R_386_GOT32X. Get the symbol
- referred to by the reloc. */
+ /* Try to convert R_386_GOT32X. Get the symbol referred to by
+ the reloc. */
if (r_symndx < symtab_hdr->sh_info)
{
isym = bfd_sym_from_r_symndx (&htab->sym_cache,
@@ -2988,8 +2985,7 @@ convert_load:
{
/* Convert "mov foo@GOT(%reg1), %reg2" to
"lea foo@GOTOFF(%reg1), %reg2". */
- if (r_type == R_386_GOT32X
- && (baseless || !bfd_link_pic (link_info)))
+ if (baseless || !bfd_link_pic (link_info))
{
r_type = R_386_32;
/* For R_386_32, convert
@@ -4016,10 +4012,12 @@ elf_i386_relocate_section (bfd *output_bfd,
/* It is relative to .got.plt section. */
if (h->got.offset != (bfd_vma) -1)
- /* Use GOT entry. */
+ /* Use GOT entry. Mask off the least significant bit in
+ GOT offset which may be set by R_386_GOT32 processing
+ below. */
relocation = (htab->elf.sgot->output_section->vma
+ htab->elf.sgot->output_offset
- + h->got.offset - offplt);
+ + (h->got.offset & ~1) - offplt);
else
/* Use GOTPLT entry. */
relocation = (h->plt.offset / plt_entry_size - 1 + 3) * 4;
@@ -4285,8 +4283,8 @@ r_386_got32:
else if (h != NULL
&& h->dynindx != -1
&& (r_type == R_386_PC32
- || !bfd_link_pic (info)
- || !SYMBOLIC_BIND (info, h)
+ || !(bfd_link_executable (info)
+ || SYMBOLIC_BIND (info, h))
|| !h->def_regular))
outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
else
@@ -5355,19 +5353,23 @@ elf_i386_reloc_type_class (const struct bfd_link_info *info,
bfd *abfd = info->output_bfd;
const struct elf_backend_data *bed = get_elf_backend_data (abfd);
struct elf_link_hash_table *htab = elf_hash_table (info);
- unsigned long r_symndx = ELF32_R_SYM (rela->r_info);
- Elf_Internal_Sym sym;
-
- if (htab->dynsym == NULL
- || !bed->s->swap_symbol_in (abfd,
- (htab->dynsym->contents
- + r_symndx * sizeof (Elf32_External_Sym)),
- 0, &sym))
- abort ();
- /* Check relocation against STT_GNU_IFUNC symbol. */
- if (ELF32_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
- return reloc_class_ifunc;
+ if (htab->dynsym != NULL
+ && htab->dynsym->contents != NULL)
+ {
+ /* Check relocation against STT_GNU_IFUNC symbol if there are
+ dynamic symbols. */
+ unsigned long r_symndx = ELF32_R_SYM (rela->r_info);
+ Elf_Internal_Sym sym;
+ if (!bed->s->swap_symbol_in (abfd,
+ (htab->dynsym->contents
+ + r_symndx * sizeof (Elf32_External_Sym)),
+ 0, &sym))
+ abort ();
+
+ if (ELF32_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
+ return reloc_class_ifunc;
+ }
switch (ELF32_R_TYPE (rela->r_info))
{
diff --git a/bfd/elf32-ppc.c b/bfd/elf32-ppc.c
index ea03598..cfc6e57 100644
--- a/bfd/elf32-ppc.c
+++ b/bfd/elf32-ppc.c
@@ -5166,6 +5166,7 @@ ppc_elf_tls_setup (bfd *obfd, struct bfd_link_info *info)
tga->root.type = bfd_link_hash_indirect;
tga->root.u.i.link = &opt->root;
ppc_elf_copy_indirect_symbol (info, opt, tga);
+ opt->forced_local = 0;
if (opt->dynindx != -1)
{
/* Use __tls_get_addr_opt in dynamic relocations. */
diff --git a/bfd/elf64-hppa.c b/bfd/elf64-hppa.c
index 3b628b4..aa9cfd2 100644
--- a/bfd/elf64-hppa.c
+++ b/bfd/elf64-hppa.c
@@ -2945,7 +2945,7 @@ elf_hppa_record_segment_addrs (bfd *abfd,
static bfd_boolean
elf_hppa_final_link (bfd *abfd, struct bfd_link_info *info)
{
- bfd_boolean retval;
+ struct stat buf;
struct elf64_hppa_link_hash_table *hppa_info = hppa_link_hash_table (info);
if (hppa_info == NULL)
@@ -3029,7 +3029,8 @@ elf_hppa_final_link (bfd *abfd, struct bfd_link_info *info)
info);
/* Invoke the regular ELF backend linker to do all the work. */
- retval = bfd_elf_final_link (abfd, info);
+ if (!bfd_elf_final_link (abfd, info))
+ return FALSE;
elf_link_hash_traverse (elf_hash_table (info),
elf_hppa_remark_useless_dynamic_symbols,
@@ -3037,10 +3038,17 @@ elf_hppa_final_link (bfd *abfd, struct bfd_link_info *info)
/* If we're producing a final executable, sort the contents of the
unwind section. */
- if (retval && !bfd_link_relocatable (info))
- retval = elf_hppa_sort_unwind (abfd);
+ if (bfd_link_relocatable (info))
+ return TRUE;
+
+ /* Do not attempt to sort non-regular files. This is here
+ especially for configure scripts and kernel builds which run
+ tests with "ld [...] -o /dev/null". */
+ if (stat (abfd->filename, &buf) != 0
+ || !S_ISREG(buf.st_mode))
+ return TRUE;
- return retval;
+ return elf_hppa_sort_unwind (abfd);
}
/* Relocate the given INSN. VALUE should be the actual value we want
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index 162862c..d72b631 100644
--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -4344,14 +4344,20 @@ create_linkage_sections (bfd *dynobj, struct bfd_link_info *info)
htab = ppc_hash_table (info);
- /* Create .sfpr for code to save and restore fp regs. */
flags = (SEC_ALLOC | SEC_LOAD | SEC_CODE | SEC_READONLY
| SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED);
- htab->sfpr = bfd_make_section_anyway_with_flags (dynobj, ".sfpr",
- flags);
- if (htab->sfpr == NULL
- || ! bfd_set_section_alignment (dynobj, htab->sfpr, 2))
- return FALSE;
+ if (htab->params->save_restore_funcs)
+ {
+ /* Create .sfpr for code to save and restore fp regs. */
+ htab->sfpr = bfd_make_section_anyway_with_flags (dynobj, ".sfpr",
+ flags);
+ if (htab->sfpr == NULL
+ || ! bfd_set_section_alignment (dynobj, htab->sfpr, 2))
+ return FALSE;
+ }
+
+ if (bfd_link_relocatable (info))
+ return TRUE;
/* Create .glink for lazy dynamic linking support. */
htab->glink = bfd_make_section_anyway_with_flags (dynobj, ".glink",
@@ -4429,9 +4435,6 @@ ppc64_elf_init_stub_bfd (struct bfd_link_info *info,
htab->elf.dynobj = params->stub_bfd;
htab->params = params;
- if (bfd_link_relocatable (info))
- return TRUE;
-
return create_linkage_sections (htab->elf.dynobj, info);
}
@@ -6665,7 +6668,7 @@ sfpr_define (struct bfd_link_info *info,
sym[len + 0] = i / 10 + '0';
sym[len + 1] = i % 10 + '0';
h = (struct ppc_link_hash_entry *)
- elf_link_hash_lookup (&htab->elf, sym, FALSE, FALSE, TRUE);
+ elf_link_hash_lookup (&htab->elf, sym, writing, TRUE, TRUE);
if (stub_sec != NULL)
{
if (h != NULL
@@ -6706,6 +6709,7 @@ sfpr_define (struct bfd_link_info *info,
h->elf.root.u.def.value = htab->sfpr->size;
h->elf.type = STT_FUNC;
h->elf.def_regular = 1;
+ h->elf.non_elf = 0;
_bfd_elf_link_hash_hide_symbol (info, &h->elf, TRUE);
writing = TRUE;
if (htab->sfpr->contents == NULL)
@@ -7050,14 +7054,28 @@ ppc64_elf_func_desc_adjust (bfd *obfd ATTRIBUTE_UNUSED,
struct bfd_link_info *info)
{
struct ppc_link_hash_table *htab;
- unsigned int i;
htab = ppc_hash_table (info);
if (htab == NULL)
return FALSE;
- if (!bfd_link_relocatable (info)
- && htab->elf.hgot != NULL)
+ /* Provide any missing _save* and _rest* functions. */
+ if (htab->sfpr != NULL)
+ {
+ unsigned int i;
+
+ htab->sfpr->size = 0;
+ for (i = 0; i < ARRAY_SIZE (save_res_funcs); i++)
+ if (!sfpr_define (info, &save_res_funcs[i], NULL))
+ return FALSE;
+ if (htab->sfpr->size == 0)
+ htab->sfpr->flags |= SEC_EXCLUDE;
+ }
+
+ if (bfd_link_relocatable (info))
+ return TRUE;
+
+ if (htab->elf.hgot != NULL)
{
_bfd_elf_link_hash_hide_symbol (info, htab->elf.hgot, TRUE);
/* Make .TOC. defined so as to prevent it being made dynamic.
@@ -7076,22 +7094,8 @@ ppc64_elf_func_desc_adjust (bfd *obfd ATTRIBUTE_UNUSED,
| STV_HIDDEN);
}
- if (htab->sfpr == NULL)
- /* We don't have any relocs. */
- return TRUE;
-
- /* Provide any missing _save* and _rest* functions. */
- htab->sfpr->size = 0;
- if (htab->params->save_restore_funcs)
- for (i = 0; i < ARRAY_SIZE (save_res_funcs); i++)
- if (!sfpr_define (info, &save_res_funcs[i], NULL))
- return FALSE;
-
elf_link_hash_traverse (&htab->elf, func_desc_adjust, info);
- if (htab->sfpr->size == 0)
- htab->sfpr->flags |= SEC_EXCLUDE;
-
return TRUE;
}
@@ -8224,6 +8228,7 @@ ppc64_elf_tls_setup (struct bfd_link_info *info)
tga_fd->root.type = bfd_link_hash_indirect;
tga_fd->root.u.i.link = &opt_fd->root;
ppc64_elf_copy_indirect_symbol (info, opt_fd, tga_fd);
+ opt_fd->forced_local = 0;
if (opt_fd->dynindx != -1)
{
/* Use __tls_get_addr_opt in dynamic relocations. */
@@ -8240,6 +8245,7 @@ ppc64_elf_tls_setup (struct bfd_link_info *info)
tga->root.type = bfd_link_hash_indirect;
tga->root.u.i.link = &opt->root;
ppc64_elf_copy_indirect_symbol (info, opt, tga);
+ opt->forced_local = 0;
_bfd_elf_link_hash_hide_symbol (info, opt,
tga->forced_local);
htab->tls_get_addr = (struct ppc_link_hash_entry *) opt;
diff --git a/bfd/elf64-x86-64.c b/bfd/elf64-x86-64.c
index 63957bb..7261405 100644
--- a/bfd/elf64-x86-64.c
+++ b/bfd/elf64-x86-64.c
@@ -2029,7 +2029,8 @@ do_size:
&& (sec->flags & SEC_ALLOC) != 0
&& (! IS_X86_64_PCREL_TYPE (r_type)
|| (h != NULL
- && (! SYMBOLIC_BIND (info, h)
+ && (! (bfd_link_pie (info)
+ || SYMBOLIC_BIND (info, h))
|| h->root.type == bfd_link_hash_defweak
|| !h->def_regular))))
|| (ELIMINATE_COPY_RELOCS
@@ -2723,12 +2724,14 @@ elf_x86_64_allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
}
else
{
+ eh->plt_got.offset = (bfd_vma) -1;
h->plt.offset = (bfd_vma) -1;
h->needs_plt = 0;
}
}
else
{
+ eh->plt_got.offset = (bfd_vma) -1;
h->plt.offset = (bfd_vma) -1;
h->needs_plt = 0;
}
@@ -3151,6 +3154,11 @@ elf_x86_64_convert_load (bfd *abfd, asection *sec,
continue;
}
+ /* Don't convert GOTPCREL relocation against large section. */
+ if (elf_section_data (tsec) != NULL
+ && (elf_section_flags (tsec) & SHF_X86_64_LARGE) != 0)
+ continue;
+
if (tsec->sec_info_type == SEC_INFO_TYPE_MERGE)
{
/* At this stage in linking, no SEC_MERGE symbol has been
@@ -3190,35 +3198,46 @@ elf_x86_64_convert_load (bfd *abfd, asection *sec,
}
else
{
- asection *asect;
- bfd_size_type size;
+ bfd_signed_vma distance;
/* At this point, we don't know the load addresses of TSEC
section nor SEC section. We estimate the distrance between
- SEC and TSEC. */
- size = 0;
- for (asect = sec->output_section;
- asect != NULL && asect != tsec->output_section;
- asect = asect->next)
+ SEC and TSEC. We store the estimated distances in the
+ compressed_size field of the output section, which is only
+ used to decompress the compressed input section. */
+ if (sec->output_section->compressed_size == 0)
{
- asection *i;
- for (i = asect->output_section->map_head.s;
- i != NULL;
- i = i->map_head.s)
- {
- size = align_power (size, i->alignment_power);
- size += i->size;
- }
+ asection *asect;
+ bfd_size_type size = 0;
+ for (asect = link_info->output_bfd->sections;
+ asect != NULL;
+ asect = asect->next)
+ /* Skip debug sections since compressed_size is used to
+ compress debug sections. */
+ if ((asect->flags & SEC_DEBUGGING) == 0)
+ {
+ asection *i;
+ for (i = asect->map_head.s;
+ i != NULL;
+ i = i->map_head.s)
+ {
+ size = align_power (size, i->alignment_power);
+ size += i->size;
+ }
+ asect->compressed_size = size;
+ }
}
/* Don't convert GOTPCREL relocations if TSEC isn't placed
after SEC. */
- if (asect == NULL)
+ distance = (tsec->output_section->compressed_size
+ - sec->output_section->compressed_size);
+ if (distance < 0)
continue;
/* Take PT_GNU_RELRO segment into account by adding
maxpagesize. */
- if ((toff + size + maxpagesize - roff + 0x80000000)
+ if ((toff + distance + maxpagesize - roff + 0x80000000)
> 0xffffffff)
continue;
}
@@ -4631,8 +4650,8 @@ direct:
else if (h != NULL
&& h->dynindx != -1
&& (IS_X86_64_PCREL_TYPE (r_type)
- || ! bfd_link_pic (info)
- || ! SYMBOLIC_BIND (info, h)
+ || !(bfd_link_executable (info)
+ || SYMBOLIC_BIND (info, h))
|| ! h->def_regular))
{
outrel.r_info = htab->r_info (h->dynindx, r_type);
@@ -5728,19 +5747,23 @@ elf_x86_64_reloc_type_class (const struct bfd_link_info *info,
bfd *abfd = info->output_bfd;
const struct elf_backend_data *bed = get_elf_backend_data (abfd);
struct elf_x86_64_link_hash_table *htab = elf_x86_64_hash_table (info);
- unsigned long r_symndx = htab->r_sym (rela->r_info);
- Elf_Internal_Sym sym;
-
- if (htab->elf.dynsym == NULL
- || !bed->s->swap_symbol_in (abfd,
- (htab->elf.dynsym->contents
- + r_symndx * bed->s->sizeof_sym),
- 0, &sym))
- abort ();
- /* Check relocation against STT_GNU_IFUNC symbol. */
- if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
- return reloc_class_ifunc;
+ if (htab->elf.dynsym != NULL
+ && htab->elf.dynsym->contents != NULL)
+ {
+ /* Check relocation against STT_GNU_IFUNC symbol if there are
+ dynamic symbols. */
+ unsigned long r_symndx = htab->r_sym (rela->r_info);
+ Elf_Internal_Sym sym;
+ if (!bed->s->swap_symbol_in (abfd,
+ (htab->elf.dynsym->contents
+ + r_symndx * bed->s->sizeof_sym),
+ 0, &sym))
+ abort ();
+
+ if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
+ return reloc_class_ifunc;
+ }
switch ((int) ELF32_R_TYPE (rela->r_info))
{
diff --git a/bfd/elflink.c b/bfd/elflink.c
index 3d37bb4..4e7de0c 100644
--- a/bfd/elflink.c
+++ b/bfd/elflink.c
@@ -555,6 +555,19 @@ bfd_elf_record_link_assignment (bfd *output_bfd,
if (h == NULL)
return provide;
+ if (h->versioned == unknown)
+ {
+ /* Set versioned if symbol version is unknown. */
+ char *version = strrchr (name, ELF_VER_CHR);
+ if (version)
+ {
+ if (version > name && version[-1] != ELF_VER_CHR)
+ h->versioned = versioned_hidden;
+ else
+ h->versioned = versioned;
+ }
+ }
+
switch (h->root.type)
{
case bfd_link_hash_defined:
@@ -1171,21 +1184,20 @@ _bfd_elf_merge_symbol (bfd *abfd,
oldfunc = (h->type != STT_NOTYPE
&& bed->is_function_type (h->type));
- /* When we try to create a default indirect symbol from the dynamic
- definition with the default version, we skip it if its type and
- the type of existing regular definition mismatch. */
+ /* If creating a default indirect symbol ("foo" or "foo@") from a
+ dynamic versioned definition ("foo@@") skip doing so if there is
+ an existing regular definition with a different type. We don't
+ want, for example, a "time" variable in the executable overriding
+ a "time" function in a shared library. */
if (pold_alignment == NULL
&& newdyn
&& newdef
&& !olddyn
- && (((olddef || h->root.type == bfd_link_hash_common)
- && ELF_ST_TYPE (sym->st_info) != h->type
- && ELF_ST_TYPE (sym->st_info) != STT_NOTYPE
- && h->type != STT_NOTYPE
- && !(newfunc && oldfunc))
- || (olddef
- && ((h->type == STT_GNU_IFUNC)
- != (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC)))))
+ && (olddef || h->root.type == bfd_link_hash_common)
+ && ELF_ST_TYPE (sym->st_info) != h->type
+ && ELF_ST_TYPE (sym->st_info) != STT_NOTYPE
+ && h->type != STT_NOTYPE
+ && !(newfunc && oldfunc))
{
*skip = TRUE;
return TRUE;
@@ -1472,13 +1484,16 @@ _bfd_elf_merge_symbol (bfd *abfd,
represent variables; this can cause confusion in principle, but
any such confusion would seem to indicate an erroneous program or
shared library. We also permit a common symbol in a regular
- object to override a weak symbol in a shared object. */
+ object to override a weak symbol in a shared object. A common
+ symbol in executable also overrides a symbol in a shared object. */
if (newdyn
&& newdef
&& (olddef
|| (h->root.type == bfd_link_hash_common
- && (newweak || newfunc))))
+ && (newweak
+ || newfunc
+ || (!olddyn && bfd_link_executable (info))))))
{
*override = TRUE;
newdef = FALSE;
@@ -1750,6 +1765,31 @@ _bfd_elf_add_default_symbol (bfd *abfd,
if (skip)
goto nondefault;
+ if (hi->def_regular)
+ {
+ /* If the undecorated symbol will have a version added by a
+ script different to H, then don't indirect to/from the
+ undecorated symbol. This isn't ideal because we may not yet
+ have seen symbol versions, if given by a script on the
+ command line rather than via --version-script. */
+ if (hi->verinfo.vertree == NULL && info->version_info != NULL)
+ {
+ bfd_boolean hide;
+
+ hi->verinfo.vertree
+ = bfd_find_version_for_sym (info->version_info,
+ hi->root.root.string, &hide);
+ if (hi->verinfo.vertree != NULL && hide)
+ {
+ (*bed->elf_backend_hide_symbol) (info, hi, TRUE);
+ goto nondefault;
+ }
+ }
+ if (hi->verinfo.vertree != NULL
+ && strcmp (p + 1 + (p[1] == '@'), hi->verinfo.vertree->name) != 0)
+ goto nondefault;
+ }
+
if (! override)
{
/* Add the default symbol if not performing a relocatable link. */
@@ -3481,8 +3521,7 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info)
void *old_ent;
struct bfd_link_hash_entry *old_undefs = NULL;
struct bfd_link_hash_entry *old_undefs_tail = NULL;
- long old_dynsymcount = 0;
- bfd_size_type old_dynstr_size = 0;
+ void *old_strtab = NULL;
size_t tabsize = 0;
asection *s;
bfd_boolean just_syms;
@@ -3923,8 +3962,9 @@ error_free_dyn:
old_table = htab->root.table.table;
old_size = htab->root.table.size;
old_count = htab->root.table.count;
- old_dynsymcount = htab->dynsymcount;
- old_dynstr_size = _bfd_elf_strtab_size (htab->dynstr);
+ old_strtab = _bfd_elf_strtab_save (htab->dynstr);
+ if (old_strtab == NULL)
+ goto error_free_vers;
for (i = 0; i < htab->root.table.size; i++)
{
@@ -4562,8 +4602,10 @@ error_free_dyn:
break;
}
- /* Don't add DT_NEEDED for references from the dummy bfd. */
+ /* Don't add DT_NEEDED for references from the dummy bfd nor
+ for unmatched symbol. */
if (!add_needed
+ && matched
&& definition
&& ((dynsym
&& h->ref_regular_nonweak
@@ -4633,7 +4675,9 @@ error_free_dyn:
memcpy (htab->root.table.table, old_tab, tabsize);
htab->root.undefs = old_undefs;
htab->root.undefs_tail = old_undefs_tail;
- _bfd_elf_strtab_restore_size (htab->dynstr, old_dynstr_size);
+ _bfd_elf_strtab_restore (htab->dynstr, old_strtab);
+ free (old_strtab);
+ old_strtab = NULL;
for (i = 0; i < htab->root.table.size; i++)
{
struct bfd_hash_entry *p;
@@ -4646,9 +4690,6 @@ error_free_dyn:
h = (struct elf_link_hash_entry *) p;
if (h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
- if (h->dynindx >= old_dynsymcount
- && h->dynstr_index < old_dynstr_size)
- _bfd_elf_strtab_delref (htab->dynstr, h->dynstr_index);
/* Preserve the maximum alignment and size for common
symbols even if this dynamic lib isn't on DT_NEEDED
@@ -5018,6 +5059,8 @@ error_free_dyn:
error_free_vers:
if (old_tab != NULL)
free (old_tab);
+ if (old_strtab != NULL)
+ free (old_strtab);
if (nondeflt_vers != NULL)
free (nondeflt_vers);
if (extversym != NULL)
diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index 59c51cc..d83dc1b 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -2655,7 +2655,7 @@ aarch64_type_of_stub (struct bfd_link_info *info,
bfd_boolean via_plt_p;
if (st_type != STT_FUNC
- && (sym_sec != bfd_abs_section_ptr))
+ && (sym_sec == input_sec))
return stub_type;
globals = elf_aarch64_hash_table (info);
@@ -4174,7 +4174,7 @@ elfNN_aarch64_size_stubs (bfd *output_bfd,
goto error_ret_free_internal;
}
- stub_entry->target_value = sym_value;
+ stub_entry->target_value = sym_value + irela->r_addend;
stub_entry->target_section = sym_sec;
stub_entry->stub_type = stub_type;
stub_entry->h = hash;
@@ -5280,15 +5280,28 @@ elfNN_aarch64_final_link_relocate (reloc_howto_type *howto,
/* Check if a stub has to be inserted because the destination
is too far away. */
struct elf_aarch64_stub_hash_entry *stub_entry = NULL;
- if (! aarch64_valid_branch_p (value, place))
+
+ /* If the branch destination is directed to plt stub, "value" will be
+ the final destination, otherwise we should plus signed_addend, it may
+ contain non-zero value, for example call to local function symbol
+ which are turned into "sec_sym + sec_off", and sec_off is kept in
+ signed_addend. */
+ if (! aarch64_valid_branch_p (via_plt_p ? value : value + signed_addend,
+ place))
/* The target is out of reach, so redirect the branch to
the local stub for this function. */
stub_entry = elfNN_aarch64_get_stub_entry (input_section, sym_sec, h,
rel, globals);
if (stub_entry != NULL)
- value = (stub_entry->stub_offset
- + stub_entry->stub_sec->output_offset
- + stub_entry->stub_sec->output_section->vma);
+ {
+ value = (stub_entry->stub_offset
+ + stub_entry->stub_sec->output_offset
+ + stub_entry->stub_sec->output_section->vma);
+
+ /* We have redirected the destination to stub entry address,
+ so ignore any addend record in the original rela entry. */
+ signed_addend = 0;
+ }
}
value = _bfd_aarch64_elf_resolve_relocation (bfd_r_type, place, value,
signed_addend, weak_undef_p);
diff --git a/bfd/version.h b/bfd/version.h
index ed51cc9..7d96419 100644
--- a/bfd/version.h
+++ b/bfd/version.h
@@ -1,4 +1,4 @@
-#define BFD_VERSION_DATE 20160125
+#define BFD_VERSION_DATE 20160613
#define BFD_VERSION @bfd_version@
#define BFD_VERSION_STRING @bfd_version_package@ @bfd_version_string@
#define REPORT_BUGS_TO @report_bugs_to@
diff --git a/bfd/version.m4 b/bfd/version.m4
index 9fb81c5..607d328 100644
--- a/bfd/version.m4
+++ b/bfd/version.m4
@@ -1 +1 @@
-m4_define([BFD_VERSION], [2.26])
+m4_define([BFD_VERSION], [2.26.0])
diff --git a/binutils/ChangeLog b/binutils/ChangeLog
index 2250b30..81cb7bd 100644
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -1,3 +1,38 @@
+2016-06-13 Alan Modra <amodra@gmail.com>
+
+ * objcopy.c (copy_main): Init newsym->othersym.
+
+2016-03-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-01-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/19523
+ * Makefile.am (check-DEJAGNU): Pass CC and CC_FOR_BUILD to
+ runtest.
+ * Makefile.in: Regenerated.
+ * testsuite/binutils-all/compress.exp (test_gnu_debuglink): New
+ proc.
+ Run test_gnu_debuglink for native ELF build.
+
+2016-03-09 Nick Clifton <nickc@redhat.com>
+
+ PR binutils/19775
+ * testsuite/binutils-all/ar.exp (proc empty_archive): New proc.
+ Run the new proc.
+ * testsuite/binutils-all/empty: New, empty, file.
+
+2016-02-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-02-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * doc/binutils.texi: Fix a typo.
+
+2016-01-25 Tristan Gingold <gingold@adacore.com>
+
+ * configure: Regenerate.
+
2016-01-25 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
@@ -238,12 +273,12 @@
2015-07-10 H.J. Lu <hongjiu.lu@intel.com>
- PR binutils/18656
- * objcopy.c (setup_section): Call bfd_convert_section_size
- to get the output section size.
- (copy_section): Get the section size from the output section
- and call bfd_get_full_section_contents to convert section
- contents for output.
+ PR binutils/18656
+ * objcopy.c (setup_section): Call bfd_convert_section_size
+ to get the output section size.
+ (copy_section): Get the section size from the output section
+ and call bfd_get_full_section_contents to convert section
+ contents for output.
2015-07-10 H.J. Lu <hongjiu.lu@intel.com>
diff --git a/binutils/Makefile.am b/binutils/Makefile.am
index 1735022..4f618ce 100644
--- a/binutils/Makefile.am
+++ b/binutils/Makefile.am
@@ -192,6 +192,7 @@ check-DEJAGNU: site.exp
EXPECT=$(EXPECT); export EXPECT; \
runtest=$(RUNTEST); \
if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
+ CC="$(CC)" CC_FOR_BUILD="$(CC_FOR_BUILD)" \
CC_FOR_TARGET="$(CC_FOR_TARGET)" CFLAGS_FOR_TARGET="$(CFLAGS)" \
$$runtest --tool $(DEJATOOL) --srcdir $${srcdir}/testsuite \
$(RUNTESTFLAGS); \
diff --git a/binutils/Makefile.in b/binutils/Makefile.in
index 5642925..eddd617 100644
--- a/binutils/Makefile.in
+++ b/binutils/Makefile.in
@@ -1290,6 +1290,7 @@ check-DEJAGNU: site.exp
EXPECT=$(EXPECT); export EXPECT; \
runtest=$(RUNTEST); \
if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
+ CC="$(CC)" CC_FOR_BUILD="$(CC_FOR_BUILD)" \
CC_FOR_TARGET="$(CC_FOR_TARGET)" CFLAGS_FOR_TARGET="$(CFLAGS)" \
$$runtest --tool $(DEJATOOL) --srcdir $${srcdir}/testsuite \
$(RUNTESTFLAGS); \
diff --git a/binutils/configure b/binutils/configure
index 6e1f21e..d4f3e1e 100755
--- a/binutils/configure
+++ b/binutils/configure
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated by GNU Autoconf 2.64 for binutils 2.26.
+# Generated by GNU Autoconf 2.64 for binutils 2.26.0.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@ MAKEFLAGS=
# Identity of this package.
PACKAGE_NAME='binutils'
PACKAGE_TARNAME='binutils'
-PACKAGE_VERSION='2.26'
-PACKAGE_STRING='binutils 2.26'
+PACKAGE_VERSION='2.26.0'
+PACKAGE_STRING='binutils 2.26.0'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -1335,7 +1335,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
-\`configure' configures binutils 2.26 to adapt to many kinds of systems.
+\`configure' configures binutils 2.26.0 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1406,7 +1406,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
- short | recursive ) echo "Configuration of binutils 2.26:";;
+ short | recursive ) echo "Configuration of binutils 2.26.0:";;
esac
cat <<\_ACEOF
@@ -1527,7 +1527,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
-binutils configure 2.26
+binutils configure 2.26.0
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -2169,7 +2169,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
-It was created by binutils $as_me 2.26, which was
+It was created by binutils $as_me 2.26.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -3977,7 +3977,7 @@ fi
# Define the identity of the package.
PACKAGE='binutils'
- VERSION='2.26'
+ VERSION='2.26.0'
cat >>confdefs.h <<_ACEOF
@@ -15142,7 +15142,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
-This file was extended by binutils $as_me 2.26, which was
+This file was extended by binutils $as_me 2.26.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -15206,7 +15206,7 @@ Report bugs to the package provider."
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
-binutils config.status 2.26
+binutils config.status 2.26.0
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
diff --git a/binutils/doc/binutils.texi b/binutils/doc/binutils.texi
index 7dc09c3..2e424ef 100644
--- a/binutils/doc/binutils.texi
+++ b/binutils/doc/binutils.texi
@@ -1872,7 +1872,7 @@ ELF ABI. Note - if compression would actually make a section
@itemx --compress-debug-sections=zlib-gabi
For ELF files, these options control how DWARF debug sections are
compressed. @option{--compress-debug-sections=none} is equivalent
-to @option{--nocompress-debug-sections}.
+to @option{--decompress-debug-sections}.
@option{--compress-debug-sections=zlib} and
@option{--compress-debug-sections=zlib-gabi} are equivalent to
@option{--compress-debug-sections}.
diff --git a/binutils/objcopy.c b/binutils/objcopy.c
index 4a9f043..7feddb4 100644
--- a/binutils/objcopy.c
+++ b/binutils/objcopy.c
@@ -4096,6 +4096,7 @@ copy_main (int argc, char *argv[])
}
t = strchr (t + 1, ',');
+ newsym->othersym = NULL;
if (t)
newsym->flags = parse_symflags (t+1, &newsym->othersym);
else
diff --git a/binutils/testsuite/ChangeLog b/binutils/testsuite/ChangeLog
index c579c69..52ddadc 100644
--- a/binutils/testsuite/ChangeLog
+++ b/binutils/testsuite/ChangeLog
@@ -90,7 +90,7 @@
* binutils-all/localize-hidden-1.d: Allow for extra symbols in the
output.
- * binutils-all/strip-11.d: Skip for the RL78.
+ * binutils-all/strip-11.d: Skip for the RL78.
2015-07-14 H.J. Lu <hongjiu.lu@intel.com>
@@ -98,9 +98,9 @@
2015-07-10 H.J. Lu <hongjiu.lu@intel.com>
- PR binutils/18656
- * binutils-all/compress.exp (convert_test): New proc.
- Run conversion tests between x86-64 and x32.
+ PR binutils/18656
+ * binutils-all/compress.exp (convert_test): New proc.
+ Run conversion tests between x86-64 and x32.
2015-07-10 H.J. Lu <hongjiu.lu@intel.com>
diff --git a/binutils/testsuite/binutils-all/ar.exp b/binutils/testsuite/binutils-all/ar.exp
index 4c33874..e971350 100644
--- a/binutils/testsuite/binutils-all/ar.exp
+++ b/binutils/testsuite/binutils-all/ar.exp
@@ -555,6 +555,45 @@ proc move_an_element { } {
pass $testname
}
+# PR 19775: Test creating and listing archives with an empty element.
+
+proc empty_archive { } {
+ global AR
+ global srcdir
+ global subdir
+
+ set testname "archive with empty element"
+
+ # FIXME: There ought to be a way to dynamically create an empty file.
+ set empty $srcdir/$subdir/empty
+
+ if [is_remote host] {
+ set archive artest.a
+ set objfile [remote_download host $empty]
+ remote_file host delete $archive
+ } else {
+ set archive tmpdir/artest.a
+ set objfile $empty
+ }
+
+ remote_file build delete tmpdir/artest.a
+
+ set got [binutils_run $AR "-r -c $archive ${objfile}"]
+ if ![string match "" $got] {
+ fail $testname
+ return
+ }
+
+ # This commmand used to fail with: "Malformed archive".
+ set got [binutils_run $AR "-t $archive"]
+ if ![string match "empty
" $got] {
+ fail $testname
+ return
+ }
+
+ pass $testname
+}
+
# Run the tests.
# Only run the bfdtest checks if the programs exist. Since these
@@ -574,6 +613,7 @@ argument_parsing
deterministic_archive
delete_an_element
move_an_element
+empty_archive
if { [is_elf_format]
&& ![istarget "*-*-hpux*"]
diff --git a/binutils/testsuite/binutils-all/compress.exp b/binutils/testsuite/binutils-all/compress.exp
index 4dac503..ac24812 100644
--- a/binutils/testsuite/binutils-all/compress.exp
+++ b/binutils/testsuite/binutils-all/compress.exp
@@ -667,4 +667,97 @@ if { ([istarget "x86_64-*-elf*"]
set testname "Convert x32 object to x86-64 (3)"
convert_test "$testname" "--nocompress-debug-sections --x32" "-O elf64-x86-64 --compress-debug-sections=zlib-gnu"
- }
+}
+
+proc test_gnu_debuglink {} {
+ global srcdir
+ global subdir
+ global env
+ global CC_FOR_TARGET
+ global STRIP
+ global OBJCOPY
+ global OBJDUMP
+
+ set test "gnu-debuglink"
+ if {![info exists CC_FOR_TARGET]} {
+ set CC_FOR_TARGET $env(CC)
+ }
+ if { $CC_FOR_TARGET == "" } {
+ unsupported $test
+ return
+ }
+
+ if { [target_compile $srcdir/$subdir/testprog.c tmpdir/testprog exectuable debug] != "" } {
+ fail "$test (build)"
+ return
+ }
+ set got [remote_exec host "$OBJDUMP -S tmpdir/testprog" "" "/dev/null" "tmpdir/testprog.dump"]
+ if { [lindex $got 0] != 0 || ![string match "" [lindex $got 1]] } then {
+ fail "$test (objcopy dump)"
+ return
+ }
+ if { [binutils_run $STRIP "--strip-debug --remove-section=.comment --remove-section=.note tmpdir/testprog -o tmpdir/testprog.strip"] != "" } {
+ fail "$test (strip)"
+ return
+ }
+ if { [binutils_run $OBJCOPY "--only-keep-debug --decompress-debug-sections tmpdir/testprog tmpdir/testprog.decompress"] != "" } {
+ fail "$test (objcopy decompress)"
+ return
+ }
+ if { [binutils_run $OBJCOPY "--only-keep-debug --compress-debug-sections tmpdir/testprog tmpdir/testprog.compress"] != "" } {
+ fail "$test (objcopy compress)"
+ return
+ }
+ if { [binutils_run $OBJCOPY "--add-gnu-debuglink=tmpdir/testprog.decompress tmpdir/testprog.strip tmpdir/testprog"] != "" } {
+ fail "$test (objcopy link decompress)"
+ return
+ }
+ set got [remote_exec host "$OBJDUMP -S tmpdir/testprog" "" "/dev/null" "tmpdir/testprog.decompress.dump"]
+ if { [lindex $got 0] != 0 || ![string match "" [lindex $got 1]] } then {
+ fail "$test (objcopy dump decompress)"
+ return
+ }
+ if { [binutils_run $OBJCOPY "--add-gnu-debuglink=tmpdir/testprog.compress tmpdir/testprog.strip tmpdir/testprog"] != "" } {
+ fail "$test (objcopy link compress)"
+ return
+ }
+ set got [remote_exec host "$OBJDUMP -S tmpdir/testprog" "" "/dev/null" "tmpdir/testprog.compress.dump"]
+ if { [lindex $got 0] != 0 || ![string match "" [lindex $got 1]] } then {
+ fail "$test (objcopy dump compress)"
+ return
+ }
+
+ set src1 tmpdir/testprog.dump
+ set src2 tmpdir/testprog.compress.dump
+ send_log "cmp ${src1} ${src2}\n"
+ verbose "cmp ${src1} ${src2}"
+ set status [remote_exec build cmp "${src1} ${src2}"]
+ set exec_output [lindex $status 1]
+ set exec_output [prune_warnings $exec_output]
+ if ![string match "" $exec_output] then {
+ send_log "$exec_output\n"
+ verbose "$exec_output" 1
+ fail "$test (objdump 1)"
+ } else {
+ pass "$test (objdump 1)"
+ }
+
+ set src1 tmpdir/testprog.decompress.dump
+ set src2 tmpdir/testprog.compress.dump
+ send_log "cmp ${src1} ${src2}\n"
+ verbose "cmp ${src1} ${src2}"
+ set status [remote_exec build cmp "${src1} ${src2}"]
+ set exec_output [lindex $status 1]
+ set exec_output [prune_warnings $exec_output]
+ if ![string match "" $exec_output] then {
+ send_log "$exec_output\n"
+ verbose "$exec_output" 1
+ fail "$test (objdump 2)"
+ } else {
+ pass "$test (objdump 2)"
+ }
+}
+
+if {[isnative] && [is_elf_format]} then {
+ test_gnu_debuglink
+}
diff --git a/binutils/testsuite/binutils-all/empty b/binutils/testsuite/binutils-all/empty
new file mode 100644
index 0000000..e69de29
diff --git a/elfcpp/ChangeLog b/elfcpp/ChangeLog
index 0f54787..f95130a 100644
--- a/elfcpp/ChangeLog
+++ b/elfcpp/ChangeLog
@@ -339,11 +339,11 @@
2009-10-16 Doug Kwan <dougkwan@google.com>
- * elfcpp/elfcpp.h (DT_PREINIT_ARRAY): Correct enum value.
+ * elfcpp.h (DT_PREINIT_ARRAY): Correct enum value.
2009-10-09 Andrew Pinski <andrew_pinski@playstation.sony.com>
- * elfcpp/elfcpp_file.h (Elf_file::section_name): Change shstr_size
+ * elfcpp_file.h (Elf_file::section_name): Change shstr_size
to Elf_WXword.
2009-10-09 Mikolaj Zalewski <mikolajz@google.com>
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 534a954..4ef4094 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,114 @@
+2016-06-03 Peter Bergner <bergner@vnet.ibm.com>
+
+ Backport from master
+ 2016-06-03 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR binutils/20196
+ * gas/testsuite/gas/ppc/e6500.s <lbarx, lharx, lwarx, ldarx,
+ stbcx., sthcx., stwcx., stdcx.>: Add tests.
+ * gas/testsuite/gas/ppc/e6500.d: Likewise.
+ * gas/testsuite/gas/ppc/power8.s: Likewise.
+ * gas/testsuite/gas/ppc/power8.d: Likewise.
+ * gas/testsuite/gas/ppc/power4.s <lwarx, ldarx, stwcx.,
+ stdcx.>: Add tests.
+ * gas/testsuite/gas/ppc/power4.d: Likewise.
+
+2016-06-01 Peter Bergner <bergner@vnet.ibm.com>
+
+ Backport from master
+ 2016-05-26 Peter Bergner <bergner@vnet.ibm.com>
+
+ * testsuite/gas/ppc/altivec3.d <vmsumudm>: Add test.
+ * testsuite/gas/ppc/altivec3.s: Likewise.
+ * testsuite/gas/ppc/power9.d <addex[.], lwzmx, vmsumudm>: Add tests.
+ * testsuite/gas/ppc/power9.s: Likewise.
+
+2016-05-11 Nick Clifton <nickc@redhat.com>
+
+ PR gas/20047
+ * config/tc-arc.c (md_parse_option): Return 1 for recognised dummy
+ options.
+
+2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-04-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/19909
+ * config/tc-i386.c (check_VecOperands): Try vec_disp8 encoding
+ only if i.disp_encoding != disp_encoding_32bit.
+ * gas/testsuite/gas/i386/disp32.s: Add tests for vmovdqu64.d32.
+ * gas/testsuite/gas/i386/x86-64-disp32.s: Likewise.
+ * gas/testsuite/gas/i386/disp32.d: Updated.
+ * gas/testsuite/gas/i386/x86-64-disp32.d: Likewise.
+
+2016-02-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-02-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (register_number): Check RegVRex.
+ * testsuite/gas/i386/x86-64-avx512f.s: Add a test for vgatherqpd
+ with %zmm19 and %zmm3.
+ * testsuite/gas/i386/x86-64-avx512f-intel.d: Updated.
+ * testsuite/gas/i386/x86-64-avx512f.d: Likewise.
+
+2016-02-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-02-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/19520
+ * NEWS: Mention new command line option -mrelax-relocations and
+ new configure option --enable-x86-relax-relocations for x86
+ target.
+ * config.in: Regenerated.
+ * configure.ac: Add --enable-x86-relax-relocations.
+ (ac_default_x86_relax_relocations): New. Default to 1 except
+ for x86 Solaris targets older than Solaris 12.
+ (DEFAULT_GENERATE_X86_RELAX_RELOCATIONS): Define.
+ * configure: Likewise.
+ * config/tc-i386.c (generate_relax_relocations): New.
+ (OPTION_MRELAX_RELOCATIONS): Likewise.
+ (output_disp): Don't generate relax relocations if
+ generate_relax_relocations is 0.
+ (md_longopts): Add -mrelax-relocations.
+ (md_show_usage): Likewise.
+ (md_parse_option): Handle OPTION_MRELAX_RELOCATIONS.
+ * doc/c-i386.texi: Document -mrelax-relocations=.
+ * testsuite/gas/i386/got-no-relax.d: New file.
+ * testsuite/gas/i386/x86-64-gotpcrel-no-relax.d: Likewise.
+ * testsuite/gas/i386/got.d: Pass -mrelax-relocations=yes to as.
+ * testsuite/gas/i386/localpic.d: Likewise.
+ * testsuite/gas/i386/mixed-mode-reloc32.d: Likewise.
+ * testsuite/gas/i386/reloc32.d: Likewise.
+ * testsuite/gas/i386/x86-64-gotpcrel.d: Likewise.
+ * testsuite/gas/i386/x86-64-localpic.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-gotpcrel.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
+ * testsuite/gas/i386/i386.exp: Run got-no-relax and
+ x86-64-gotpcrel-no-relax.
+
+2016-02-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-02-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Remove duplicated marker for 2.26.
+
+2016-01-29 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-01-29 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/19532
+ * configure.ac (compressed_debug_sections): Replace == with =.
+ * configure: Regenerated.
+
+2016-01-25 Tristan Gingold <gingold@adacore.com>
+
+ * configure: Regenerate.
+
2016-01-25 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
@@ -8,12 +119,8 @@
2015-12-17 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
- * gas/config/tc-arm.c (aeabi_set_public_attributes): Adjust
+ * config/tc-arm.c (aeabi_set_public_attributes): Adjust
TAG_ARCH_profile for armv8-a.
- * gas/testsuite/gas/arm/armv8a-automatic-hlt.d: New test.
- * gas/testsuite/gas/arm/armv8a-automatic-hlt.s: New test.
- * gas/testsuite/gas/arm/armv8a-automatic-lda.d: New test.
- * gas/testsuite/gas/arm/armv8a-automatic-lda.s: New test.
2015-12-15 Nick Clifton <nickc@redhat.com>
@@ -320,10 +427,10 @@
2015-10-07 Claudiu Zissulescu <claziss@synopsys.com>
- * config/tc-arc.c: Revamped file for ARC support.
- * config/tc-arc.h: Likewise.
- * doc/as.texinfo: Add new ARC options.
- * doc/c-arc.texi: Likewise.
+ * config/tc-arc.c: Revamped file for ARC support.
+ * config/tc-arc.h: Likewise.
+ * doc/as.texinfo: Add new ARC options.
+ * doc/c-arc.texi: Likewise.
2015-10-02 Renlin Li <renlin.li@arm.com>
@@ -572,9 +679,9 @@
2015-08-17 Alan Modra <amodra@gmail.com>
- * gas/config/tc-arm.c (s_align): Delete.
+ * config/tc-arm.c (s_align): Delete.
(md_pseudo_table): Use s_align_ptwo for "align".
- * gas/config/tc-arm.h (TC_ALIGN_ZERO_IS_DEFAULT): Define.
+ * config/tc-arm.h (TC_ALIGN_ZERO_IS_DEFAULT): Define.
* read.c (s_align): Modify for TC_ALIGN_ZERO_IS_DEFAULT.
2015-08-13 Alan Modra <amodra@gmail.com>
@@ -952,7 +1059,7 @@
2015-06-11 John David Anglin <danglin@gcc.gnu.org>
PR gas/18427
- * gas/config/tc-hppa.c (last_label_symbol): Declare.
+ * config/tc-hppa.c (last_label_symbol): Declare.
(pa_get_label): Return last label in current space/segment or NULL.
(pa_define_label): Record last label and add to root.
(pa_undefine_label): Remove last label from root.
@@ -1028,7 +1135,6 @@
Bernd Schmidt <bernds@codesourcery.com>
Paul Brook <paul@codesourcery.com>
- gas/
* config/tc-alpha.c (all_cfi_sections): Declare.
(s_alpha_ent): Initialize all_cfi_sections.
(alpha_elf_md_end): Invoke cfi_set_sections.
@@ -1796,7 +1902,7 @@
2015-01-12 Jan Beulich <jbeulich@suse.com>
- * gas/dw2gencfi.c (cfi_add_label, dot_cfi_label): New.
+ * dw2gencfi.c (cfi_add_label, dot_cfi_label): New.
(cfi_pseudo_table): Add "cfi_label".
(output_cfi_insn): Handle CFI_label.
(select_cie_for_fde): Als terminate CIE when encountering
@@ -1809,7 +1915,7 @@
2015-01-12 Jan Beulich <jbeulich@suse.com>
- * gas/config/tc-arm.c (do_neon_shl_imm): Check immediate range.
+ * config/tc-arm.c (do_neon_shl_imm): Check immediate range.
(do_neon_qshl_imm): Likewise.
2015-01-12 Alan Modra <amodra@gmail.com>
diff --git a/gas/NEWS b/gas/NEWS
index 2cb2fab..e20a073 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,12 @@
-*- text -*-
+* Add a configure option --enable-x86-relax-relocations to decide whether
+ x86 assembler should generate relax relocations by default. Default to
+ yes, except for x86 Solaris targets older than Solaris 12.
+
+* New command line option -mrelax-relocations= for x86 target to control
+ whether to generate relax relocations.
+
Changes in 2.26:
* Add a configure option --enable-compressed-debug-sections={all,gas} to
@@ -8,8 +15,6 @@ Changes in 2.26:
* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
assembler support for Argonaut RISC architectures.
-Changes in 2.26:
-
* Symbol and label names can now be enclosed in double quotes (") which allows
them to contain characters that are not part of valid symbol names in high
level languages.
diff --git a/gas/config.in b/gas/config.in
index 35c8202..8b040fc 100644
--- a/gas/config.in
+++ b/gas/config.in
@@ -39,6 +39,9 @@
/* Define if you want compressed debug sections by default. */
#undef DEFAULT_FLAG_COMPRESS_DEBUG
+/* Define to 1 if you want to generate x86 relax relocations by default. */
+#undef DEFAULT_GENERATE_X86_RELAX_RELOCATIONS
+
/* Supported emulations. */
#undef EMULATIONS
diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c
index ca43566..1ec01cb 100644
--- a/gas/config/tc-arc.c
+++ b/gas/config/tc-arc.c
@@ -1747,6 +1747,7 @@ md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
case OPTION_RTSC:
case OPTION_FPUDA:
/* Dummy options. */
+ break;
default:
return 0;
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 1573043..664f381 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -552,6 +552,10 @@ static int allow_index_reg = 0;
specified explicitly. */
static int omit_lock_prefix = 0;
+/* 1 if the assembler should generate relax relocations. */
+static int generate_relax_relocations
+ = DEFAULT_GENERATE_X86_RELAX_RELOCATIONS;
+
static enum check_kind
{
check_none = 0,
@@ -1871,6 +1875,9 @@ register_number (const reg_entry *r)
if (r->reg_flags & RegRex)
nr += 8;
+ if (r->reg_flags & RegVRex)
+ nr += 16;
+
return nr;
}
@@ -4557,7 +4564,9 @@ check_VecOperands (const insn_template *t)
&& i.op[op].disps->X_op == O_constant)
{
offsetT value = i.op[op].disps->X_add_number;
- int vec_disp8_ok = fits_in_vec_disp8 (value);
+ int vec_disp8_ok
+ = (i.disp_encoding != disp_encoding_32bit
+ && fits_in_vec_disp8 (value));
if (t->operand_types [op].bitfield.vec_disp8)
{
if (vec_disp8_ok)
@@ -7241,9 +7250,14 @@ output_disp (fragS *insn_start_frag, offsetT insn_start_off)
/* Check for "call/jmp *mem", "mov mem, %reg",
"test %reg, mem" and "binop mem, %reg" where binop
is one of adc, add, and, cmp, or, sbb, sub, xor
- instructions. */
- if ((i.rm.mode == 2
- || (i.rm.mode == 0 && i.rm.regmem == 5))
+ instructions. Always generate R_386_GOT32X for
+ "sym*GOT" operand in 32-bit mode. */
+ if ((generate_relax_relocations
+ || (!object_64bit
+ && i.rm.mode == 0
+ && i.rm.regmem == 5))
+ && (i.rm.mode == 2
+ || (i.rm.mode == 0 && i.rm.regmem == 5))
&& ((i.operands == 1
&& i.tm.base_opcode == 0xff
&& (i.rm.reg == 2 || i.rm.reg == 4))
@@ -9616,6 +9630,7 @@ const char *md_shortopts = "qn";
#define OPTION_MSHARED (OPTION_MD_BASE + 21)
#define OPTION_MAMD64 (OPTION_MD_BASE + 22)
#define OPTION_MINTEL64 (OPTION_MD_BASE + 23)
+#define OPTION_MRELAX_RELOCATIONS (OPTION_MD_BASE + 24)
struct option md_longopts[] =
{
@@ -9647,6 +9662,7 @@ struct option md_longopts[] =
{"mbig-obj", no_argument, NULL, OPTION_MBIG_OBJ},
#endif
{"momit-lock-prefix", required_argument, NULL, OPTION_OMIT_LOCK_PREFIX},
+ {"mrelax-relocations", required_argument, NULL, OPTION_MRELAX_RELOCATIONS},
{"mevexrcig", required_argument, NULL, OPTION_MEVEXRCIG},
{"mamd64", no_argument, NULL, OPTION_MAMD64},
{"mintel64", no_argument, NULL, OPTION_MINTEL64},
@@ -9966,6 +9982,15 @@ md_parse_option (int c, char *arg)
as_fatal (_("invalid -momit-lock-prefix= option: `%s'"), arg);
break;
+ case OPTION_MRELAX_RELOCATIONS:
+ if (strcasecmp (arg, "yes") == 0)
+ generate_relax_relocations = 1;
+ else if (strcasecmp (arg, "no") == 0)
+ generate_relax_relocations = 0;
+ else
+ as_fatal (_("invalid -mrelax-relocations= option: `%s'"), arg);
+ break;
+
case OPTION_MAMD64:
cpu_arch_flags.bitfield.cpuamd64 = 1;
cpu_arch_flags.bitfield.cpuintel64 = 0;
@@ -10146,6 +10171,9 @@ md_show_usage (FILE *stream)
-momit-lock-prefix=[no|yes]\n\
strip all lock prefixes\n"));
fprintf (stream, _("\
+ -mrelax-relocations=[no|yes]\n\
+ generate relax relocations\n"));
+ fprintf (stream, _("\
-mamd64 accept only AMD64 ISA\n"));
fprintf (stream, _("\
-mintel64 accept only Intel64 ISA\n"));
diff --git a/gas/configure b/gas/configure
index f959e95..dd9c953 100755
--- a/gas/configure
+++ b/gas/configure
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated by GNU Autoconf 2.64 for gas 2.26.
+# Generated by GNU Autoconf 2.64 for gas 2.26.0.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@ MAKEFLAGS=
# Identity of this package.
PACKAGE_NAME='gas'
PACKAGE_TARNAME='gas'
-PACKAGE_VERSION='2.26'
-PACKAGE_STRING='gas 2.26'
+PACKAGE_VERSION='2.26.0'
+PACKAGE_STRING='gas 2.26.0'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -765,6 +765,7 @@ enable_largefile
enable_targets
enable_checking
enable_compressed_debug_sections
+enable_x86_relax_relocations
enable_werror
enable_build_warnings
enable_nls
@@ -1323,7 +1324,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
-\`configure' configures gas 2.26 to adapt to many kinds of systems.
+\`configure' configures gas 2.26.0 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1394,7 +1395,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
- short | recursive ) echo "Configuration of gas 2.26:";;
+ short | recursive ) echo "Configuration of gas 2.26.0:";;
esac
cat <<\_ACEOF
@@ -1415,6 +1416,8 @@ Optional Features:
--enable-checking enable run-time checks
--enable-compressed-debug-sections={all,gas,none}
compress debug sections by default]
+ --enable-x86-relax-relocations
+ generate x86 relax relocations by default
--enable-werror treat compile warnings as errors
--enable-build-warnings enable build-time compiler warnings
--disable-nls do not use Native Language Support
@@ -1510,7 +1513,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
-gas configure 2.26
+gas configure 2.26.0
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -1920,7 +1923,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
-It was created by gas $as_me 2.26, which was
+It was created by gas $as_me 2.26.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -3728,7 +3731,7 @@ fi
# Define the identity of the package.
PACKAGE='gas'
- VERSION='2.26'
+ VERSION='2.26.0'
cat >>confdefs.h <<_ACEOF
@@ -10972,7 +10975,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 10975 "configure"
+#line 10978 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -11078,7 +11081,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 11081 "configure"
+#line 11084 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -11680,6 +11683,17 @@ if test "${enable_compressed_debug_sections+set}" = set; then :
esac
fi
+# PR gas/19520
+# Decide if x86 assembler should generate relax relocations.
+ac_default_x86_relax_relocations=unset
+# Provide a configure time option to override our default.
+# Check whether --enable-x86_relax_relocations was given.
+if test "${enable_x86_relax_relocations+set}" = set; then :
+ enableval=$enable_x86_relax_relocations; case "${enableval}" in
+ no) ac_default_x86_relax_relocations=0 ;;
+esac
+fi
+
using_cgen=no
@@ -12085,6 +12099,17 @@ $as_echo "#define STRICTCOFF 1" >>confdefs.h
;;
+ i386-*-solaris2 \
+ | x86_64-*-solaris2 \
+ | i386-*-solaris2.[0-9] \
+ | i386-*-solaris2.1[01] \
+ | x86_64-*-solaris2.1[01])
+ if test ${this_target} = $target \
+ && test ${ac_default_x86_relax_relocations} = unset; then
+ ac_default_x86_relax_relocations=0
+ fi
+ ;;
+
i860-*-*)
{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: GAS support for ${generic_target} is preliminary and a work in progress" >&5
$as_echo "$as_me: WARNING: GAS support for ${generic_target} is preliminary and a work in progress" >&2;}
@@ -12505,7 +12530,16 @@ _ACEOF
done
-if test x$ac_default_compressed_debug_sections == xyes ; then
+if test ${ac_default_x86_relax_relocations} = unset; then
+ ac_default_x86_relax_relocations=1
+fi
+
+cat >>confdefs.h <<_ACEOF
+#define DEFAULT_GENERATE_X86_RELAX_RELOCATIONS $ac_default_x86_relax_relocations
+_ACEOF
+
+
+if test x$ac_default_compressed_debug_sections = xyes ; then
$as_echo "#define DEFAULT_FLAG_COMPRESS_DEBUG 1" >>confdefs.h
@@ -15029,7 +15063,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
-This file was extended by gas $as_me 2.26, which was
+This file was extended by gas $as_me 2.26.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -15093,7 +15127,7 @@ Report bugs to the package provider."
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
-gas config.status 2.26
+gas config.status 2.26.0
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
diff --git a/gas/configure.ac b/gas/configure.ac
index 07f825d..0e22593 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -77,6 +77,17 @@ AC_ARG_ENABLE(compressed_debug_sections,
*) ac_default_compressed_debug_sections=unset ;;
esac])dnl
+# PR gas/19520
+# Decide if x86 assembler should generate relax relocations.
+ac_default_x86_relax_relocations=unset
+# Provide a configure time option to override our default.
+AC_ARG_ENABLE(x86_relax_relocations,
+ AS_HELP_STRING([--enable-x86-relax-relocations],
+ [generate x86 relax relocations by default]),
+[case "${enableval}" in
+ no) ac_default_x86_relax_relocations=0 ;;
+esac])dnl
+
using_cgen=no
AM_BINUTILS_WARNINGS
@@ -168,6 +179,17 @@ for this_target in $target $canon_targets ; do
AC_DEFINE(STRICTCOFF, 1, [Using strict COFF?])
;;
+ i386-*-solaris2 \
+ | x86_64-*-solaris2 \
+ | i386-*-solaris2.[[0-9]] \
+ | i386-*-solaris2.1[[01]] \
+ | x86_64-*-solaris2.1[[01]])
+ if test ${this_target} = $target \
+ && test ${ac_default_x86_relax_relocations} = unset; then
+ ac_default_x86_relax_relocations=0
+ fi
+ ;;
+
i860-*-*)
AC_MSG_WARN(GAS support for ${generic_target} is preliminary and a work in progress)
;;
@@ -549,7 +571,14 @@ changequote([,])dnl
done
-if test x$ac_default_compressed_debug_sections == xyes ; then
+if test ${ac_default_x86_relax_relocations} = unset; then
+ ac_default_x86_relax_relocations=1
+fi
+AC_DEFINE_UNQUOTED(DEFAULT_GENERATE_X86_RELAX_RELOCATIONS,
+ $ac_default_x86_relax_relocations,
+ [Define to 1 if you want to generate x86 relax relocations by default.])
+
+if test x$ac_default_compressed_debug_sections = xyes ; then
AC_DEFINE(DEFAULT_FLAG_COMPRESS_DEBUG, 1, [Define if you want compressed debug sections by default.])
fi
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 4af05e3..7eb1fbc 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -327,6 +327,18 @@ single-thread computers
@option{-momit-lock-prefix=@var{no}} will encode lock prefix as usual,
which is the default.
+@cindex @samp{-mrelax-relocations=} option, i386
+@cindex @samp{-mrelax-relocations=} option, x86-64
+@item -mrelax-relocations=@var{no}
+@itemx -mrelax-relocations=@var{yes}
+These options control whether the assembler should generate relax
+relocations, R_386_GOT32X, in 32-bit mode, or R_X86_64_GOTPCRELX and
+R_X86_64_REX_GOTPCRELX, in 64-bit mode.
+@option{-mrelax-relocations=@var{yes}} will generate relax relocations.
+@option{-mrelax-relocations=@var{no}} will not generate relax
+relocations. The default can be controlled by a configure option
+@option{--enable-x86-relax-relocations}.
+
@cindex @samp{-mevexrcig=} option, i386
@cindex @samp{-mevexrcig=} option, x86-64
@item -mevexrcig=@var{rne}
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 4c86c8c..2c01d7b 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -15,6 +15,13 @@
* gas/arm/armv8-a.d: <ldaexh>: Rename mismatched mnemonics ...
<ldah>: ... to this.
+2015-12-17 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+
+ * gas/arm/armv8a-automatic-hlt.d: New test.
+ * gas/arm/armv8a-automatic-hlt.s: New test.
+ * gas/arm/armv8a-automatic-lda.d: New test.
+ * gas/arm/armv8a-automatic-lda.s: New test.
+
2015-12-15 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/advsimd-fp16.d: Update expected output.
@@ -153,7 +160,7 @@
Apply from master.
2015-11-19 Alan Modra <amodra@gmail.com>
* gas/ppc/altivec3.d: Allow for padding at end of section.
- * gas/testsuite/gas/ppc/power9.d: Likewise.
+ * gas/ppc/power9.d: Likewise.
2015-12-09 H.J. Lu <hongjiu.lu@intel.com>
@@ -207,8 +214,8 @@
2015-10-28 Andre Vieira <andre.simoesdiasvieira@arm.com>
- * gas/arm/pinsn.s: New.
- * gas/arm/pinsn.d: Likewise.
+ * gas/arm/pinsn.s: New.
+ * gas/arm/pinsn.d: Likewise.
2015-10-27 Nick Clifton <nickc@redhat.com>
@@ -385,8 +392,8 @@
2015-10-02 Renlin Li <renlin.li@arm.com>
- * gas/aarch64/reloc-tlsgd_g0_nc.d: New.
- * gas/aarch64/reloc-tlsgd_g0_nc.s: New.
+ * gas/aarch64/reloc-tlsgd_g0_nc.d: New.
+ * gas/aarch64/reloc-tlsgd_g0_nc.s: New.
2015-10-02 Renlin Li <renlin.li@arm.com>
@@ -958,9 +965,7 @@
2015-05-28 Catherine Moore <clm@codesourcery.com>
Bernd Schmidt <bernds@codesourcery.com>
- gas/testsuite/
* gas/mips/mips.exp: Run new tests.
-
* gas/mips/compact-eh-1.s: New file.
* gas/mips/compact-eh-2.s: New file.
* gas/mips/compact-eh-3.s: New file.
diff --git a/gas/testsuite/gas/i386/disp32.d b/gas/testsuite/gas/i386/disp32.d
index a3255fa..24ada81 100644
--- a/gas/testsuite/gas/i386/disp32.d
+++ b/gas/testsuite/gas/i386/disp32.d
@@ -15,11 +15,12 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 8b 98 ff 0f 00 00 mov 0xfff\(%eax\),%ebx
[ ]*[a-f0-9]+: 8b 98 00 00 00 00 mov 0x0\(%eax\),%ebx
[ ]*[a-f0-9]+: 8b 98 03 00 00 00 mov 0x3\(%eax\),%ebx
-[ ]*[a-f0-9]+: eb 07 jmp 26 <foo>
-[ ]*[a-f0-9]+: eb 05 jmp 26 <foo>
-[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 26 <foo>
+[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%eax\),%xmm3
+[ ]*[a-f0-9]+: eb 07 jmp 30 <foo>
+[ ]*[a-f0-9]+: eb 05 jmp 30 <foo>
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 30 <foo>
-0+26 <foo>:
+0+30 <foo>:
[ ]*[a-f0-9]+: 89 18 mov %ebx,\(%eax\)
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%eax\)
[ ]*[a-f0-9]+: 89 98 ff 0f 00 00 mov %ebx,0xfff\(%eax\)
@@ -27,4 +28,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%eax\)
[ ]*[a-f0-9]+: 89 98 00 00 00 00 mov %ebx,0x0\(%eax\)
[ ]*[a-f0-9]+: 89 98 03 00 00 00 mov %ebx,0x3\(%eax\)
+[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%eax\),%xmm3
#pass
diff --git a/gas/testsuite/gas/i386/disp32.s b/gas/testsuite/gas/i386/disp32.s
index c3bec3a..fa85ae5 100644
--- a/gas/testsuite/gas/i386/disp32.s
+++ b/gas/testsuite/gas/i386/disp32.s
@@ -9,6 +9,8 @@
mov.d32 (%eax),%ebx
mov.d32 3(%eax),%ebx
+ vmovdqu64.d32 -0x40(%eax),%xmm3
+
jmp foo
jmp.d8 foo
jmp.d32 foo
@@ -24,3 +26,5 @@ foo:
mov.d32 DWORD PTR [eax], ebx
mov.d32 DWORD PTR [eax+3], ebx
+
+ vmovdqu64.d32 xmm3,XMMWORD PTR [eax-0x40]
diff --git a/gas/testsuite/gas/i386/got-no-relax.d b/gas/testsuite/gas/i386/got-no-relax.d
new file mode 100644
index 0000000..6bf138a
--- /dev/null
+++ b/gas/testsuite/gas/i386/got-no-relax.d
@@ -0,0 +1,31 @@
+#source: got.s
+#as: -mrelax-relocations=no
+#objdump: -dwr
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax 1: R_386_GOT32 foo
+[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0,%eax 7: R_386_GOT32X foo
+[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%eax\),%eax d: R_386_GOT32 foo
+[ ]*[a-f0-9]+: 05 00 00 00 00 add \$0x0,%eax 12: R_386_GOT32 foo
+[ ]*[a-f0-9]+: 03 05 00 00 00 00 add 0x0,%eax 18: R_386_GOT32X foo
+[ ]*[a-f0-9]+: 03 80 00 00 00 00 add 0x0\(%eax\),%eax 1e: R_386_GOT32 foo
+[ ]*[a-f0-9]+: ff 15 00 00 00 00 call \*0x0 24: R_386_GOT32X foo
+[ ]*[a-f0-9]+: ff 90 00 00 00 00 call \*0x0\(%eax\) 2a: R_386_GOT32 foo
+[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmp \*0x0 30: R_386_GOT32X foo
+[ ]*[a-f0-9]+: ff a0 00 00 00 00 jmp \*0x0\(%eax\) 36: R_386_GOT32 foo
+[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax 3b: R_386_GOT32 foo
+[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0,%eax 41: R_386_GOT32X foo
+[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%eax\),%eax 47: R_386_GOT32 foo
+[ ]*[a-f0-9]+: 05 00 00 00 00 add \$0x0,%eax 4c: R_386_GOT32 foo
+[ ]*[a-f0-9]+: 03 05 00 00 00 00 add 0x0,%eax 52: R_386_GOT32X foo
+[ ]*[a-f0-9]+: 03 80 00 00 00 00 add 0x0\(%eax\),%eax 58: R_386_GOT32 foo
+[ ]*[a-f0-9]+: ff 90 00 00 00 00 call \*0x0\(%eax\) 5e: R_386_GOT32 foo
+[ ]*[a-f0-9]+: ff 15 00 00 00 00 call \*0x0 64: R_386_GOT32X foo
+[ ]*[a-f0-9]+: ff a0 00 00 00 00 jmp \*0x0\(%eax\) 6a: R_386_GOT32 foo
+[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmp \*0x0 70: R_386_GOT32X foo
+#pass
diff --git a/gas/testsuite/gas/i386/got.d b/gas/testsuite/gas/i386/got.d
index f76ca47..7621cdf 100644
--- a/gas/testsuite/gas/i386/got.d
+++ b/gas/testsuite/gas/i386/got.d
@@ -1,3 +1,4 @@
+#as: -mrelax-relocations=yes
#objdump: -dwr
.*: +file format .*
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index d881cd8..9ad7a9e 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -406,6 +406,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "relax-4"
run_dump_test "got"
+ run_dump_test "got-no-relax"
if {![istarget "*-*-nacl*"]} then {
run_dump_test "iamcu-1"
@@ -784,6 +785,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_list_test "x86-64-branch-3" "-al -mintel64"
run_dump_test "x86-64-gotpcrel"
+ run_dump_test "x86-64-gotpcrel-no-relax"
}
set ASFLAGS "$old_ASFLAGS"
diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d b/gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d
index e5a3b1c..1314e5b 100644
--- a/gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d
+++ b/gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d
@@ -1,4 +1,5 @@
#source: ../x86-64-gotpcrel.s
+#as: --x32 -mrelax-relocations=yes
#objdump: -dwr
#name: x86-64 (ILP32) gotpcrel
diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-localpic.d b/gas/testsuite/gas/i386/ilp32/x86-64-localpic.d
index 0ca69c7..a9528a2 100644
--- a/gas/testsuite/gas/i386/ilp32/x86-64-localpic.d
+++ b/gas/testsuite/gas/i386/ilp32/x86-64-localpic.d
@@ -1,4 +1,5 @@
#source: ../x86-64-localpic.s
+#as: --x32 -mrelax-relocations=yes
#readelf: -rsW
#name: x86-64 (ILP32) local PIC
diff --git a/gas/testsuite/gas/i386/localpic.d b/gas/testsuite/gas/i386/localpic.d
index 04fb5ce..0a5eec5 100644
--- a/gas/testsuite/gas/i386/localpic.d
+++ b/gas/testsuite/gas/i386/localpic.d
@@ -1,3 +1,4 @@
+#as: -mrelax-relocations=yes
#readelf: -rs
#name: i386 local PIC
diff --git a/gas/testsuite/gas/i386/mixed-mode-reloc32.d b/gas/testsuite/gas/i386/mixed-mode-reloc32.d
index 9affc36..a2ef6a0 100644
--- a/gas/testsuite/gas/i386/mixed-mode-reloc32.d
+++ b/gas/testsuite/gas/i386/mixed-mode-reloc32.d
@@ -1,3 +1,4 @@
+#as: -mrelax-relocations=yes
#objdump: -r
#source: mixed-mode-reloc.s
#name: x86 mixed mode relocs (32-bit object)
diff --git a/gas/testsuite/gas/i386/reloc32.d b/gas/testsuite/gas/i386/reloc32.d
index 45c9cd2..b6e1bbd 100644
--- a/gas/testsuite/gas/i386/reloc32.d
+++ b/gas/testsuite/gas/i386/reloc32.d
@@ -1,3 +1,4 @@
+#as: -mrelax-relocations=yes
#objdump: -Drw
#name: i386 relocs
diff --git a/gas/testsuite/gas/i386/x86-64-avx512f-intel.d b/gas/testsuite/gas/i386/x86-64-avx512f-intel.d
index c6bdbc5..ff2a3d1 100644
--- a/gas/testsuite/gas/i386/x86-64-avx512f-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512f-intel.d
@@ -3666,6 +3666,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 62 02 fd 41 93 b4 fe 7b 00 00 00 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[r14\+zmm31\*8\+0x7b\]
[ ]*[a-f0-9]+: 62 02 fd 41 93 74 39 20 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[r9\+zmm31\*1\+0x100\]
[ ]*[a-f0-9]+: 62 22 fd 41 93 b4 b9 00 04 00 00 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[rcx\+zmm31\*4\+0x400\]
+[ ]*[a-f0-9]+: 62 d2 fd 41 93 9c de 7b 00 00 00 vgatherqpd zmm3\{k1\},ZMMWORD PTR \[r14\+zmm19\*8\+0x7b\]
[ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 7b 00 00 00 vgatherqps ymm30\{k1\},YMMWORD PTR \[r14\+zmm31\*8\+0x7b\]
[ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 7b 00 00 00 vgatherqps ymm30\{k1\},YMMWORD PTR \[r14\+zmm31\*8\+0x7b\]
[ ]*[a-f0-9]+: 62 02 7d 41 93 74 39 40 vgatherqps ymm30\{k1\},YMMWORD PTR \[r9\+zmm31\*1\+0x100\]
@@ -10686,6 +10687,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 62 02 fd 41 93 b4 fe 85 ff ff ff vgatherqpd zmm30\{k1\},ZMMWORD PTR \[r14\+zmm31\*8-0x7b\]
[ ]*[a-f0-9]+: 62 02 fd 41 93 74 39 20 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[r9\+zmm31\*1\+0x100\]
[ ]*[a-f0-9]+: 62 22 fd 41 93 b4 b9 00 04 00 00 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[rcx\+zmm31\*4\+0x400\]
+[ ]*[a-f0-9]+: 62 d2 fd 41 93 9c de 7b 00 00 00 vgatherqpd zmm3\{k1\},ZMMWORD PTR \[r14\+zmm19\*8\+0x7b\]
[ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 85 ff ff ff vgatherqps ymm30\{k1\},YMMWORD PTR \[r14\+zmm31\*8-0x7b\]
[ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 85 ff ff ff vgatherqps ymm30\{k1\},YMMWORD PTR \[r14\+zmm31\*8-0x7b\]
[ ]*[a-f0-9]+: 62 02 7d 41 93 74 39 40 vgatherqps ymm30\{k1\},YMMWORD PTR \[r9\+zmm31\*1\+0x100\]
diff --git a/gas/testsuite/gas/i386/x86-64-avx512f.d b/gas/testsuite/gas/i386/x86-64-avx512f.d
index d672fa5..2db0b3e 100644
--- a/gas/testsuite/gas/i386/x86-64-avx512f.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512f.d
@@ -3665,6 +3665,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 62 02 fd 41 93 b4 fe 7b 00 00 00 vgatherqpd 0x7b\(%r14,%zmm31,8\),%zmm30\{%k1\}
[ ]*[a-f0-9]+: 62 02 fd 41 93 74 39 20 vgatherqpd 0x100\(%r9,%zmm31,1\),%zmm30\{%k1\}
[ ]*[a-f0-9]+: 62 22 fd 41 93 b4 b9 00 04 00 00 vgatherqpd 0x400\(%rcx,%zmm31,4\),%zmm30\{%k1\}
+[ ]*[a-f0-9]+: 62 d2 fd 41 93 9c de 7b 00 00 00 vgatherqpd 0x7b\(%r14,%zmm19,8\),%zmm3\{%k1\}
[ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 7b 00 00 00 vgatherqps 0x7b\(%r14,%zmm31,8\),%ymm30\{%k1\}
[ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 7b 00 00 00 vgatherqps 0x7b\(%r14,%zmm31,8\),%ymm30\{%k1\}
[ ]*[a-f0-9]+: 62 02 7d 41 93 74 39 40 vgatherqps 0x100\(%r9,%zmm31,1\),%ymm30\{%k1\}
@@ -10685,6 +10686,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 62 02 fd 41 93 b4 fe 85 ff ff ff vgatherqpd -0x7b\(%r14,%zmm31,8\),%zmm30\{%k1\}
[ ]*[a-f0-9]+: 62 02 fd 41 93 74 39 20 vgatherqpd 0x100\(%r9,%zmm31,1\),%zmm30\{%k1\}
[ ]*[a-f0-9]+: 62 22 fd 41 93 b4 b9 00 04 00 00 vgatherqpd 0x400\(%rcx,%zmm31,4\),%zmm30\{%k1\}
+[ ]*[a-f0-9]+: 62 d2 fd 41 93 9c de 7b 00 00 00 vgatherqpd 0x7b\(%r14,%zmm19,8\),%zmm3\{%k1\}
[ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 85 ff ff ff vgatherqps -0x7b\(%r14,%zmm31,8\),%ymm30\{%k1\}
[ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 85 ff ff ff vgatherqps -0x7b\(%r14,%zmm31,8\),%ymm30\{%k1\}
[ ]*[a-f0-9]+: 62 02 7d 41 93 74 39 40 vgatherqps 0x100\(%r9,%zmm31,1\),%ymm30\{%k1\}
diff --git a/gas/testsuite/gas/i386/x86-64-avx512f.s b/gas/testsuite/gas/i386/x86-64-avx512f.s
index fa42326..e2cbb12 100644
--- a/gas/testsuite/gas/i386/x86-64-avx512f.s
+++ b/gas/testsuite/gas/i386/x86-64-avx512f.s
@@ -3973,6 +3973,7 @@ _start:
vgatherqpd 123(%r14,%zmm31,8), %zmm30{%k1} # AVX512F
vgatherqpd 256(%r9,%zmm31), %zmm30{%k1} # AVX512F
vgatherqpd 1024(%rcx,%zmm31,4), %zmm30{%k1} # AVX512F
+ vgatherqpd 123(%r14,%zmm19,8), %zmm3{%k1} # AVX512F
vgatherqps 123(%r14,%zmm31,8), %ymm30{%k1} # AVX512F
vgatherqps 123(%r14,%zmm31,8), %ymm30{%k1} # AVX512F
@@ -11630,6 +11631,7 @@ _start:
vgatherqpd zmm30{k1}, ZMMWORD PTR [r14+zmm31*8-123] # AVX512F
vgatherqpd zmm30{k1}, ZMMWORD PTR [r9+zmm31+256] # AVX512F
vgatherqpd zmm30{k1}, ZMMWORD PTR [rcx+zmm31*4+1024] # AVX512F
+ vgatherqpd zmm3{k1}, ZMMWORD PTR [r14+zmm19*8+123] # AVX512F
vgatherqps ymm30{k1}, YMMWORD PTR [r14+zmm31*8-123] # AVX512F
vgatherqps ymm30{k1}, YMMWORD PTR [r14+zmm31*8-123] # AVX512F
diff --git a/gas/testsuite/gas/i386/x86-64-disp32.d b/gas/testsuite/gas/i386/x86-64-disp32.d
index 8e307ee..da5dcb0 100644
--- a/gas/testsuite/gas/i386/x86-64-disp32.d
+++ b/gas/testsuite/gas/i386/x86-64-disp32.d
@@ -15,11 +15,12 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 8b 98 ff 0f 00 00 mov 0xfff\(%rax\),%ebx
[ ]*[a-f0-9]+: 8b 98 00 00 00 00 mov 0x0\(%rax\),%ebx
[ ]*[a-f0-9]+: 8b 98 03 00 00 00 mov 0x3\(%rax\),%ebx
-[ ]*[a-f0-9]+: eb 07 jmp 26 <foo>
-[ ]*[a-f0-9]+: eb 05 jmp 26 <foo>
-[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 26 <foo>
+[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%rax\),%xmm3
+[ ]*[a-f0-9]+: eb 07 jmp 30 <foo>
+[ ]*[a-f0-9]+: eb 05 jmp 30 <foo>
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 30 <foo>
-0+26 <foo>:
+0+30 <foo>:
[ ]*[a-f0-9]+: 89 18 mov %ebx,\(%rax\)
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%rax\)
[ ]*[a-f0-9]+: 89 98 ff 0f 00 00 mov %ebx,0xfff\(%rax\)
@@ -27,4 +28,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%rax\)
[ ]*[a-f0-9]+: 89 98 00 00 00 00 mov %ebx,0x0\(%rax\)
[ ]*[a-f0-9]+: 89 98 03 00 00 00 mov %ebx,0x3\(%rax\)
+[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%rax\),%xmm3
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-disp32.s b/gas/testsuite/gas/i386/x86-64-disp32.s
index 0856339..e00aa02 100644
--- a/gas/testsuite/gas/i386/x86-64-disp32.s
+++ b/gas/testsuite/gas/i386/x86-64-disp32.s
@@ -8,6 +8,7 @@
mov.d32 (%rax),%ebx
mov.d32 3(%rax),%ebx
+ vmovdqu64.d32 -0x40(%rax),%xmm3
jmp foo
jmp.d8 foo
@@ -24,3 +25,5 @@ foo:
mov.d32 DWORD PTR [rax], ebx
mov.d32 DWORD PTR [rax+3], ebx
+
+ vmovdqu64.d32 xmm3,XMMWORD PTR [rax-0x40]
diff --git a/gas/testsuite/gas/i386/x86-64-gotpcrel-no-relax.d b/gas/testsuite/gas/i386/x86-64-gotpcrel-no-relax.d
new file mode 100644
index 0000000..a3f8943
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-gotpcrel-no-relax.d
@@ -0,0 +1,27 @@
+#source: x86-64-gotpcrel.s
+#as: -mrelax-relocations=no
+#objdump: -dwr
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax 3: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: 48 8b 04 25 00 00 00 00 mov 0x0,%rax b: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: 48 8b 05 00 00 00 00 mov 0x0\(%rip\),%rax # 16 <_start\+0x16> 12: R_X86_64_GOTPCREL foo-0x4
+[ ]*[a-f0-9]+: 48 8b 81 00 00 00 00 mov 0x0\(%rcx\),%rax 19: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: ff 15 00 00 00 00 callq \*0x0\(%rip\) # 23 <_start\+0x23> 1f: R_X86_64_GOTPCREL foo-0x4
+[ ]*[a-f0-9]+: ff 90 00 00 00 00 callq \*0x0\(%rax\) 25: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmpq \*0x0\(%rip\) # 2f <_start\+0x2f> 2b: R_X86_64_GOTPCREL foo-0x4
+[ ]*[a-f0-9]+: ff a1 00 00 00 00 jmpq \*0x0\(%rcx\) 31: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax 38: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: 48 8b 04 25 00 00 00 00 mov 0x0,%rax 40: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: 48 8b 05 00 00 00 00 mov 0x0\(%rip\),%rax # 4b <_start\+0x4b> 47: R_X86_64_GOTPCREL foo-0x4
+[ ]*[a-f0-9]+: 48 8b 81 00 00 00 00 mov 0x0\(%rcx\),%rax 4e: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: ff 15 00 00 00 00 callq \*0x0\(%rip\) # 58 <_start\+0x58> 54: R_X86_64_GOTPCREL foo-0x4
+[ ]*[a-f0-9]+: ff 90 00 00 00 00 callq \*0x0\(%rax\) 5a: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmpq \*0x0\(%rip\) # 64 <_start\+0x64> 60: R_X86_64_GOTPCREL foo-0x4
+[ ]*[a-f0-9]+: ff a1 00 00 00 00 jmpq \*0x0\(%rcx\) 66: R_X86_64_GOTPCREL foo
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-gotpcrel.d b/gas/testsuite/gas/i386/x86-64-gotpcrel.d
index 6ca3fc7..fbe5e47 100644
--- a/gas/testsuite/gas/i386/x86-64-gotpcrel.d
+++ b/gas/testsuite/gas/i386/x86-64-gotpcrel.d
@@ -1,3 +1,4 @@
+#as: -mrelax-relocations=yes
#objdump: -dwr
.*: +file format .*
diff --git a/gas/testsuite/gas/i386/x86-64-localpic.d b/gas/testsuite/gas/i386/x86-64-localpic.d
index 0a07149..bafaa9c 100644
--- a/gas/testsuite/gas/i386/x86-64-localpic.d
+++ b/gas/testsuite/gas/i386/x86-64-localpic.d
@@ -1,3 +1,4 @@
+#as: -mrelax-relocations=yes
#readelf: -rsW
#name: x86-64 local PIC
diff --git a/gas/testsuite/gas/ppc/altivec3.d b/gas/testsuite/gas/ppc/altivec3.d
index 1d05a8f..7b7ae0b 100644
--- a/gas/testsuite/gas/ppc/altivec3.d
+++ b/gas/testsuite/gas/ppc/altivec3.d
@@ -76,4 +76,5 @@ Disassembly of section \.text:
.*: (12 b5 17 44|44 17 b5 12) vslv v21,v21,v2
.*: (11 e9 0f 4d|4d 0f e9 11) vextuhrx r15,r9,v1
.*: (12 b1 87 8d|8d 87 b1 12) vextuwrx r21,r17,v16
+.*: (12 95 b5 e3|e3 b5 95 12) vmsumudm v20,v21,v22,v23
#pass
diff --git a/gas/testsuite/gas/ppc/altivec3.s b/gas/testsuite/gas/ppc/altivec3.s
index 6217da5..7fa28b3 100644
--- a/gas/testsuite/gas/ppc/altivec3.s
+++ b/gas/testsuite/gas/ppc/altivec3.s
@@ -67,3 +67,4 @@ start:
vslv 21,21,2
vextuhrx 15,9,1
vextuwrx 21,17,16
+ vmsumudm 20,21,22,23
diff --git a/gas/testsuite/gas/ppc/e6500.d b/gas/testsuite/gas/ppc/e6500.d
index c8d8f57..3ed94dc 100644
--- a/gas/testsuite/gas/ppc/e6500.d
+++ b/gas/testsuite/gas/ppc/e6500.d
@@ -73,3 +73,20 @@ Disassembly of section \.text:
fc: (7c 43 09 8d|8d 09 43 7c) icblq. 2,r3,r1
100: (7c 10 02 dc|dc 02 10 7c) mftmr r0,16
104: (7c 10 03 dc|dc 03 10 7c) mttmr 16,r0
+.*: (7e 80 38 68|68 38 80 7e) lbarx r20,0,r7
+.*: (7e 81 38 68|68 38 81 7e) lbarx r20,r1,r7
+.*: (7e a0 40 e8|e8 40 a0 7e) lharx r21,0,r8
+.*: (7e a1 40 e8|e8 40 a1 7e) lharx r21,r1,r8
+.*: (7e c0 48 28|28 48 c0 7e) lwarx r22,0,r9
+.*: (7e c1 48 28|28 48 c1 7e) lwarx r22,r1,r9
+.*: (7e e0 50 a8|a8 50 e0 7e) ldarx r23,0,r10
+.*: (7e e1 50 a8|a8 50 e1 7e) ldarx r23,r1,r10
+.*: (7d 40 3d 6d|6d 3d 40 7d) stbcx\. r10,0,r7
+.*: (7d 41 3d 6d|6d 3d 41 7d) stbcx\. r10,r1,r7
+.*: (7d 60 45 ad|ad 45 60 7d) sthcx\. r11,0,r8
+.*: (7d 61 45 ad|ad 45 61 7d) sthcx\. r11,r1,r8
+.*: (7d 80 49 2d|2d 49 80 7d) stwcx\. r12,0,r9
+.*: (7d 81 49 2d|2d 49 81 7d) stwcx\. r12,r1,r9
+.*: (7d a0 51 ad|ad 51 a0 7d) stdcx\. r13,0,r10
+.*: (7d a1 51 ad|ad 51 a1 7d) stdcx\. r13,r1,r10
+#pass
diff --git a/gas/testsuite/gas/ppc/e6500.s b/gas/testsuite/gas/ppc/e6500.s
index 2167cc6..d4b7f84 100644
--- a/gas/testsuite/gas/ppc/e6500.s
+++ b/gas/testsuite/gas/ppc/e6500.s
@@ -67,3 +67,19 @@ start:
icblq. 2,3,1
mftmr 0,16
mttmr 16,0
+ lbarx 20,0,7
+ lbarx 20,1,7
+ lharx 21,0,8
+ lharx 21,1,8
+ lwarx 22,0,9
+ lwarx 22,1,9
+ ldarx 23,0,10
+ ldarx 23,1,10
+ stbcx. 10,0,7
+ stbcx. 10,1,7
+ sthcx. 11,0,8
+ sthcx. 11,1,8
+ stwcx. 12,0,9
+ stwcx. 12,1,9
+ stdcx. 13,0,10
+ stdcx. 13,1,10
diff --git a/gas/testsuite/gas/ppc/power4.d b/gas/testsuite/gas/ppc/power4.d
index 8a09c05..cb487a7 100644
--- a/gas/testsuite/gas/ppc/power4.d
+++ b/gas/testsuite/gas/ppc/power4.d
@@ -10,7 +10,7 @@ start address 0x0+
Sections:
Idx Name +Size +VMA +LMA +File off +Algn
- +0 \.text +0+e8 +0+ +0+ +.*
+ +0 \.text +0+108 +0+ +0+ +.*
+CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
+1 \.data +0+20 +0+ +0+ +.*
+CONTENTS, ALLOC, LOAD, DATA
@@ -106,3 +106,12 @@ Disassembly of section \.text:
.*: (7c 20 04 ac|ac 04 20 7c) lwsync
.*: (7c 40 04 ac|ac 04 40 7c) ptesync
.*: (7c 40 04 ac|ac 04 40 7c) ptesync
+.*: (7e 80 30 28|28 30 80 7e) lwarx r20,0,r6
+.*: (7e 81 30 28|28 30 81 7e) lwarx r20,r1,r6
+.*: (7e a0 38 a8|a8 38 a0 7e) ldarx r21,0,r7
+.*: (7e a1 38 a8|a8 38 a1 7e) ldarx r21,r1,r7
+.*: (7e c0 41 2d|2d 41 c0 7e) stwcx\. r22,0,r8
+.*: (7e c1 41 2d|2d 41 c1 7e) stwcx\. r22,r1,r8
+.*: (7e e0 49 ad|ad 49 e0 7e) stdcx\. r23,0,r9
+.*: (7e e1 49 ad|ad 49 e1 7e) stdcx\. r23,r1,r9
+#pass
diff --git a/gas/testsuite/gas/ppc/power4.s b/gas/testsuite/gas/ppc/power4.s
index 583284c..b2ede93 100644
--- a/gas/testsuite/gas/ppc/power4.s
+++ b/gas/testsuite/gas/ppc/power4.s
@@ -79,6 +79,14 @@ dsym1:
sync 1
ptesync
sync 2
+ lwarx 20,0,6
+ lwarx 20,1,6
+ ldarx 21,0,7
+ ldarx 21,1,7
+ stwcx. 22,0,8
+ stwcx. 22,1,8
+ stdcx. 23,0,9
+ stdcx. 23,1,9
.section ".data"
usym0: .llong 0xcafebabe
diff --git a/gas/testsuite/gas/ppc/power8.d b/gas/testsuite/gas/ppc/power8.d
index aaa64c8..5c97ab9 100644
--- a/gas/testsuite/gas/ppc/power8.d
+++ b/gas/testsuite/gas/ppc/power8.d
@@ -160,4 +160,36 @@ Disassembly of section \.text:
.*: (7d 20 3f 99|99 3f 20 7d) stxvd2x vs41,0,r7
.*: (7d 75 47 98|98 47 75 7d) stxvd2x vs11,r21,r8
.*: (7d 75 47 98|98 47 75 7d) stxvd2x vs11,r21,r8
+.*: (7e 80 38 68|68 38 80 7e) lbarx r20,0,r7
+.*: (7e 80 38 68|68 38 80 7e) lbarx r20,0,r7
+.*: (7e 80 38 69|69 38 80 7e) lbarx r20,0,r7,1
+.*: (7e 81 38 68|68 38 81 7e) lbarx r20,r1,r7
+.*: (7e 81 38 68|68 38 81 7e) lbarx r20,r1,r7
+.*: (7e 81 38 69|69 38 81 7e) lbarx r20,r1,r7,1
+.*: (7e a0 40 a8|a8 40 a0 7e) ldarx r21,0,r8
+.*: (7e a0 40 a8|a8 40 a0 7e) ldarx r21,0,r8
+.*: (7e a0 40 a9|a9 40 a0 7e) ldarx r21,0,r8,1
+.*: (7e a1 40 a8|a8 40 a1 7e) ldarx r21,r1,r8
+.*: (7e a1 40 a8|a8 40 a1 7e) ldarx r21,r1,r8
+.*: (7e a1 40 a9|a9 40 a1 7e) ldarx r21,r1,r8,1
+.*: (7e c0 48 e8|e8 48 c0 7e) lharx r22,0,r9
+.*: (7e c0 48 e8|e8 48 c0 7e) lharx r22,0,r9
+.*: (7e c0 48 e9|e9 48 c0 7e) lharx r22,0,r9,1
+.*: (7e c1 48 e8|e8 48 c1 7e) lharx r22,r1,r9
+.*: (7e c1 48 e8|e8 48 c1 7e) lharx r22,r1,r9
+.*: (7e c1 48 e9|e9 48 c1 7e) lharx r22,r1,r9,1
+.*: (7e e0 50 28|28 50 e0 7e) lwarx r23,0,r10
+.*: (7e e0 50 28|28 50 e0 7e) lwarx r23,0,r10
+.*: (7e e0 50 29|29 50 e0 7e) lwarx r23,0,r10,1
+.*: (7e e1 50 28|28 50 e1 7e) lwarx r23,r1,r10
+.*: (7e e1 50 28|28 50 e1 7e) lwarx r23,r1,r10
+.*: (7e e1 50 29|29 50 e1 7e) lwarx r23,r1,r10,1
+.*: (7d 40 3d 6d|6d 3d 40 7d) stbcx\. r10,0,r7
+.*: (7d 41 3d 6d|6d 3d 41 7d) stbcx\. r10,r1,r7
+.*: (7d 60 45 ad|ad 45 60 7d) sthcx\. r11,0,r8
+.*: (7d 61 45 ad|ad 45 61 7d) sthcx\. r11,r1,r8
+.*: (7d 80 49 2d|2d 49 80 7d) stwcx\. r12,0,r9
+.*: (7d 81 49 2d|2d 49 81 7d) stwcx\. r12,r1,r9
+.*: (7d a0 51 ad|ad 51 a0 7d) stdcx\. r13,0,r10
+.*: (7d a1 51 ad|ad 51 a1 7d) stdcx\. r13,r1,r10
#pass
diff --git a/gas/testsuite/gas/ppc/power8.s b/gas/testsuite/gas/ppc/power8.s
index 0b350eb..728caae 100644
--- a/gas/testsuite/gas/ppc/power8.s
+++ b/gas/testsuite/gas/ppc/power8.s
@@ -152,3 +152,35 @@ power8:
stxvd2x 41,0,7
stxvx 11,21,8
stxvd2x 11,21,8
+ lbarx 20,0,7
+ lbarx 20,0,7,0
+ lbarx 20,0,7,1
+ lbarx 20,1,7
+ lbarx 20,1,7,0
+ lbarx 20,1,7,1
+ ldarx 21,0,8
+ ldarx 21,0,8,0
+ ldarx 21,0,8,1
+ ldarx 21,1,8
+ ldarx 21,1,8,0
+ ldarx 21,1,8,1
+ lharx 22,0,9
+ lharx 22,0,9,0
+ lharx 22,0,9,1
+ lharx 22,1,9
+ lharx 22,1,9,0
+ lharx 22,1,9,1
+ lwarx 23,0,10
+ lwarx 23,0,10,0
+ lwarx 23,0,10,1
+ lwarx 23,1,10
+ lwarx 23,1,10,0
+ lwarx 23,1,10,1
+ stbcx. 10,0,7
+ stbcx. 10,1,7
+ sthcx. 11,0,8
+ sthcx. 11,1,8
+ stwcx. 12,0,9
+ stwcx. 12,1,9
+ stdcx. 13,0,10
+ stdcx. 13,1,10
diff --git a/gas/testsuite/gas/ppc/power9.d b/gas/testsuite/gas/ppc/power9.d
index 2e5593d..bbbf555 100644
--- a/gas/testsuite/gas/ppc/power9.d
+++ b/gas/testsuite/gas/ppc/power9.d
@@ -363,6 +363,8 @@ Disassembly of section \.text:
.*: (7c 00 f6 e4|e4 f6 00 7c) rmieg r30
.*: (7d 40 7a 6a|6a 7a 40 7d) ldmx r10,0,r15
.*: (7d 43 7a 6a|6a 7a 43 7d) ldmx r10,r3,r15
+.*: (7d 60 83 6a|6a 83 60 7d) lwzmx r11,0,r16
+.*: (7d 63 83 6a|6a 83 63 7d) lwzmx r11,r3,r16
.*: (4c 00 02 e4|e4 02 00 4c) stop
.*: (7c 00 00 3c|3c 00 00 7c) wait
.*: (7c 00 00 3c|3c 00 00 7c) wait
@@ -381,4 +383,11 @@ Disassembly of section \.text:
.*: (f0 6d bc 07|07 bc 6d f0) xsmaxcdp vs35,vs45,vs55
.*: (f0 8e c4 c7|c7 c4 8e f0) xsminjdp vs36,vs46,vs56
.*: (f0 af cc 87|87 cc af f0) xsmaxjdp vs37,vs47,vs57
+.*: (12 95 b5 e3|e3 b5 95 12) vmsumudm v20,v21,v22,v23
+.*: (7d 6c 69 54|54 69 6c 7d) addex r11,r12,r13,0
+.*: (7d 6c 6b 54|54 6b 6c 7d) addex r11,r12,r13,1
+.*: (7d 6c 6d 54|54 6d 6c 7d) addex r11,r12,r13,2
+.*: (7e b6 b9 55|55 b9 b6 7e) addex\. r21,r22,r23,0
+.*: (7e b6 bb 55|55 bb b6 7e) addex\. r21,r22,r23,1
+.*: (7e b6 bd 55|55 bd b6 7e) addex\. r21,r22,r23,2
#pass
diff --git a/gas/testsuite/gas/ppc/power9.s b/gas/testsuite/gas/ppc/power9.s
index 6ee49d4..16929a7 100644
--- a/gas/testsuite/gas/ppc/power9.s
+++ b/gas/testsuite/gas/ppc/power9.s
@@ -354,6 +354,8 @@ power9:
rmieg 30
ldmx 10,0,15
ldmx 10,3,15
+ lwzmx 11,0,16
+ lwzmx 11,3,16
stop
wait
wait 0
@@ -372,3 +374,10 @@ power9:
xsmaxcdp 35,45,55
xsminjdp 36,46,56
xsmaxjdp 37,47,57
+ vmsumudm 20,21,22,23
+ addex 11,12,13,0
+ addex 11,12,13,1
+ addex 11,12,13,2
+ addex. 21,22,23,0
+ addex. 21,22,23,1
+ addex. 21,22,23,2
diff --git a/gold/ChangeLog b/gold/ChangeLog
index b283a88..ec8dacb 100644
--- a/gold/ChangeLog
+++ b/gold/ChangeLog
@@ -1,3 +1,11 @@
+2016-02-05 Sriraman Tallam <tmsriram@google.com>
+
+ PR gold/19047
+ * icf.cc (get_rel_addend): New function.
+ (get_section_contents): Move merge section addend computation to a
+ new function. Ignore negative values for SHT_REL and SHT_RELA addends.
+ Fix bug to not read past the length of the section.
+
2015-12-16 Roland McGrath <mcgrathr@google.com>
PR ld/17473
@@ -33,7 +41,7 @@
2015-11-11 Alan Modra <amodra@gmail.com>
Peter Bergner <bergner@vnet.ibm.com>
- * gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function.
+ * powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function.
(Powerpc_relocate_functions::addr16dx_ha): Likewise.
(Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA.
(Target_powerpc::Scan::global): Likewise.
@@ -339,7 +347,7 @@
2015-07-26 Doug Kwan <dougkwan@google.com>
* testsuite/arm_unaligned_reloc.{s,sh}: Make test less sensitive to
- disassembler output format.
+ disassembler output format.
2015-07-23 Ian Coolidge <icoolidge@google.com>
Plumb --pic-veneer option for gold.
@@ -566,7 +574,7 @@
2015-06-29 Doug Kwan <dougkwan@google.com>
* testsuite/arm_bl_out_of_range.s: Align stub table so that it appears
- at address expected by test.
+ at address expected by test.
* testsuite/arm_cortex_a8_b.s: Ditto.
* testsuite/arm_cortex_a8_b_cond.s: Ditto.
* testsuite/arm_cortex_a8_bl.s: Ditto.
@@ -940,7 +948,6 @@
2015-04-07 HC Yen <hc.yen@mediatek.com>
Add AArch32 support for gold linker.
- gold/
* arm.cc: Add V8 arch combine table.
2015-04-06 Rafael Ávila de Espíndola <rafael.espindola@gmail.com>
@@ -1455,7 +1462,6 @@
(Output_data_plt_arm::entry_count): Modified.
(Output_data_plt_arm::address_for_global): New method.
(Output_data_plt_arm::address_for_local): New method.
-gold/
(Output_data_plt_arm::set_final_data_size): Add irelative_count_.
(Output_data_plt_arm::insert_irelative_data): New method.
(Output_data_plt_arm::irelative_rel_): New member.
@@ -2490,7 +2496,7 @@ gold/
Add .gdb_index version 7 support.
- * gold/dwarf_reader.cc: include <utility> (for make_pair).
+ * dwarf_reader.cc: include <utility> (for make_pair).
(Dwarf_abbrev_table::do_read_abbrevs): Check for compressed
debug sections.
(Dwarf_ranges_table::read_ranges_table): Likewise.
@@ -2501,21 +2507,21 @@ gold/
for end of list by offset, not by offset == 0.
(Dwarf_info_reader::do_read_string_table): Check for compressed
debug sections.
- * gold/dwarf_reader.h (Dwarf_pubnames_table::Dwarf_pubnames_table):
+ * dwarf_reader.h (Dwarf_pubnames_table::Dwarf_pubnames_table):
Initialize new data members.
(Dwarf_pubnames_table::next_name): return flag_byte.
(Dwarf_pubnames_table::end_of_table_): New data member.
(Dwarf_pubnames_table::is_gnu_style_): New data member.
- * gold/gdb-index.cc (gdb_index_version): Update to version 7.
+ * gdb-index.cc (gdb_index_version): Update to version 7.
(Gdb_index_info_reader::read_pubtable): Read flag_byte.
(Gdb_index_info_reader::read_pubnames_and_pubtypes): Don't
read skeleton type unit DIEs.
(Gdb_index::add_symbol): Add flag_byte; adjust all callers.
(Gdb_index::do_write): Write flag_byte.
- * gold/gdb-index.h (Gdb_index::add_symbol): Add flags parameter.
+ * gdb-index.h (Gdb_index::add_symbol): Add flags parameter.
(Gdb_index::Cu_vector): Store flags along with cu indexes.
- * gold/testsuite/gdb_index_test_3.sh: Allow versions 4-7.
- * gold/testsuite/gdb_index_test_comm.sh: Likewise.
+ * testsuite/gdb_index_test_3.sh: Allow versions 4-7.
+ * testsuite/gdb_index_test_comm.sh: Likewise.
2014-01-08 H.J. Lu <hongjiu.lu@intel.com>
@@ -5554,15 +5560,15 @@ gold/
2012-01-03 Cary Coutant <ccoutant@google.com>
- * gold/incremental.cc (Sized_incremental_binary::do_process_got_plt):
+ * incremental.cc (Sized_incremental_binary::do_process_got_plt):
Use abstract base class for GOT.
- * gold/output.h (class Output_data_got_base): New abstract base class.
+ * output.h (class Output_data_got_base): New abstract base class.
(class Output_data_got): Derive from new base class, adjust ctors.
(Output_data_got::reserve_slot): Make virtual; rename to
do_reserve_slot; Adjust callers.
- * gold/target.h (Sized_target::init_got_plt_for_update): Return
+ * target.h (Sized_target::init_got_plt_for_update): Return
pointer to abstract base class.
- * gold/x86_64.cc (Target_x86_64::init_got_plt_for_update): Likewise.
+ * x86_64.cc (Target_x86_64::init_got_plt_for_update): Likewise.
2011-12-18 Ian Lance Taylor <iant@google.com>
@@ -6073,10 +6079,10 @@ gold/
2011-08-01 Cary Coutant <ccoutant@google.com>
- * gold/testsuite/Makefile.am (justsyms_exec): New testcase.
- * gold/testsuite/Makefile.in: Regenerate.
- * gold/testsuite/justsyms_exec.c: New source file.
- * gold/testsuite/justsyms_lib.c: New source file.
+ * testsuite/Makefile.am (justsyms_exec): New testcase.
+ * testsuite/Makefile.in: Regenerate.
+ * testsuite/justsyms_exec.c: New source file.
+ * testsuite/justsyms_lib.c: New source file.
2011-08-01 Cary Coutant <ccoutant@google.com>
@@ -6402,7 +6408,7 @@ gold/
2011-07-06 Cary Coutant <ccoutant@google.com>
- * gold/incremental.cc
+ * incremental.cc
(Output_section_incremental_inputs::write_info_blocks): Check for
hidden and internal symbols.
@@ -6943,9 +6949,9 @@ gold/
2011-06-09 Cary Coutant <ccoutant@google.com>
PR gold/12804
- * gold/gold.cc (queue_initial_tasks): Warn if --incremental is
+ * gold.cc (queue_initial_tasks): Warn if --incremental is
used with --compress-debug-sections.
- * gold/object.cc (Sized_relobj_file::do_layout): Report
+ * object.cc (Sized_relobj_file::do_layout): Report
uncompressed size of compressed input sections.
2011-06-08 Cary Coutant <ccoutant@google.com>
@@ -7073,10 +7079,10 @@ gold/
2011-06-02 Cary Coutant <ccoutant@google.com>
PR gold/12163
- * gold/archive.cc (Archive::Archive): Initialize new data member.
+ * archive.cc (Archive::Archive): Initialize new data member.
(Archive::include_all_members): Return if archive has already been
included.
- * gold/archive.h (Archive::include_all_members_): New data member.
+ * archive.h (Archive::include_all_members_): New data member.
2011-06-02 Nick Clifton <nickc@redhat.com>
@@ -7593,9 +7599,9 @@ gold/
2011-04-14 Cary Coutant <ccoutant@google.com>
- * gold/layout.cc (Layout::symtab_section_offset): New function.
- * gold/layout.h (Layout::symtab_section_offset): New function.
- * gold/reloc.cc (Sized_relobj::do_relocate): Call it.
+ * layout.cc (Layout::symtab_section_offset): New function.
+ * layout.h (Layout::symtab_section_offset): New function.
+ * reloc.cc (Sized_relobj::do_relocate): Call it.
2011-04-12 Ian Lance Taylor <iant@google.com>
@@ -8706,7 +8712,7 @@ gold/
2010-10-17 Doug Kwan <dougkwan@google.com>
- * gold/arm.cc (Target_arm::got_section): Use correct order and set
+ * arm.cc (Target_arm::got_section): Use correct order and set
GOT output section to be writable.
2010-10-14 Cary Coutant <ccoutant@google.com>
@@ -8858,7 +8864,7 @@ gold/
2010-09-30 Doug Kwan <dougkwan@google.com>
- * gold/testsuite/arm_branch_out_of_range.sh: Fix broken tests.
+ * testsuite/arm_branch_out_of_range.sh: Fix broken tests.
2010-09-28 Sriraman Tallam <tmsriram@google.com>
@@ -8902,13 +8908,13 @@ gold/
2010-09-15 Doug Kwan <dougkwan@google.com>
- * gold/testsuite/script_test_3.t: Add ARM special sections.
- * gold/testsuite/script_test_4.t: Same.
- * gold/testsuite/script_test_5.t: Same.
- * gold/testsuite/script_test_6.t: Same.
- * gold/testsuite/script_test_7.t: Same.
- * gold/testsuite/script_test_7.t: Same.
- * gold/testsuite/thumb_blx_out_of_range.s: Fix instruction alignment.
+ * testsuite/script_test_3.t: Add ARM special sections.
+ * testsuite/script_test_4.t: Same.
+ * testsuite/script_test_5.t: Same.
+ * testsuite/script_test_6.t: Same.
+ * testsuite/script_test_7.t: Same.
+ * testsuite/script_test_7.t: Same.
+ * testsuite/thumb_blx_out_of_range.s: Fix instruction alignment.
2010-09-14 Cary Coutant <ccoutant@google.com>
@@ -9041,7 +9047,7 @@ gold/
2010-08-27 Doug Kwan <dougkwan@google.com>
- * gold/resolve.cc (Symbol_table::should_override): Let a weak
+ * resolve.cc (Symbol_table::should_override): Let a weak
reference override an existing dynamic weak reference.
* testsuite/Makefile.am: Add new test dyn_weak_ref.
* testsuite/Makefile.in: Regenerate.
@@ -9133,11 +9139,11 @@ gold/
2010-08-19 Neil Vachharajani <nvachhar@google.com>
Cary Coutant <ccoutant@google.com>
- * gold/archive.h (Add_lib_group_symbols): Add readsyms_blocker_, adjust
+ * archive.h (Add_lib_group_symbols): Add readsyms_blocker_, adjust
constructor, and set_blocker.
- * gold/archive.cc (Add_lib_group_symbols::is_runnable): Also check
+ * archive.cc (Add_lib_group_symbols::is_runnable): Also check
readsyms_blocker_.
- * gold/readsyms.cc (Read_symbols::do_lib_group): Also pass
+ * readsyms.cc (Read_symbols::do_lib_group): Also pass
this->this_blocker_ to Add_lib_group_symbols::set_blocker.
* testsuite/Makefile.am (start_lib_test): New test case.
* testsuite/Makefile.in: Regenerate.
@@ -9740,9 +9746,9 @@ gold/
2010-07-27 Jeffrey Yasskin <jyasskin@google.com>
* testsuite/debug_msg.sh: Test mixed weak/strong symbol behavior.
- * gold/testsuite/debug_msg.cc: Likewise.
- * gold/testsuite/odr_violation1.cc
- * gold/testsuite/odr_violation2.cc
+ * testsuite/debug_msg.cc: Likewise.
+ * testsuite/odr_violation1.cc
+ * testsuite/odr_violation2.cc
2010-07-21 Cary Coutant <ccoutant@google.com>
@@ -10087,13 +10093,13 @@ gold/
2010-05-26 Rafael Espindola <espindola@google.com>
PR 11604
- * gold/object.cc(Sized_relobj::do_layout_deferred_sections): Avoid
+ * object.cc(Sized_relobj::do_layout_deferred_sections): Avoid
adding sections the garbage collector removed.
- * gold/testsuite/Makefile.am: Add test.
- * gold/testsuite/Makefile.in: Regenerate.
- * gold/testsuite/plugin_test_7.sh: New.
- * gold/testsuite/plugin_test_7_1.c: New.
- * gold/testsuite/plugin_test_7_2.c: New.
+ * testsuite/Makefile.am: Add test.
+ * testsuite/Makefile.in: Regenerate.
+ * testsuite/plugin_test_7.sh: New.
+ * testsuite/plugin_test_7_1.c: New.
+ * testsuite/plugin_test_7_2.c: New.
2010-05-26 Rafael Espindola <espindola@google.com>
@@ -10577,7 +10583,7 @@ gold/
2010-03-25 Doug Kwan <dougkwan@google.com>
- * gold/arm.cc (Arm_exidx_fixup::update_offset_map): Rearrange code
+ * arm.cc (Arm_exidx_fixup::update_offset_map): Rearrange code
to avoid a conversion warning on a 32-bit host.
2010-03-24 Ian Lance Taylor <iant@google.com>
@@ -10781,7 +10787,7 @@ gold/
2010-03-08 Doug Kwan <dougkwan@google.com>
- * gold/arm.cc (Arm_exidx_fixup::update_offset_map): Fix build breakage
+ * arm.cc (Arm_exidx_fixup::update_offset_map): Fix build breakage
due to a conversion warning.
(Arm_relobj::update_output_local_symbol_count): Check for local
symbol with unset output index.
@@ -11403,7 +11409,7 @@ gold/
2010-01-29 Viktor Kutuzov <vkutuzov@accesssoftek.com>
- * gold/arm.cc: Added support for the ARM relocations: R_ARM_THM_PC8,
+ * arm.cc: Added support for the ARM relocations: R_ARM_THM_PC8,
R_ARM_THM_PC12, R_ARM_THM_ALU_PREL_11_0.
(Arm_relocate_functions::thm_alu11): New Method.
(Arm_relocate_functions::thm_pc8): New Method.
@@ -11553,12 +11559,12 @@ gold/
2010-01-22 Viktor Kutuzov <vkutuzov@accesssoftek.com>
- * gold/arm.cc (Target_arm): Updated fix_v4bx method and usage of
+ * arm.cc (Target_arm): Updated fix_v4bx method and usage of
Fix_v4bx enum values .
- * gold/options.h (General_options): New option definitions.
+ * options.h (General_options): New option definitions.
(General_options::fix_v4bx): New method.
(General_options::Fix_v4bx): New enum.
- * gold/options.cc (General_options::parse_fix_v4bx): New method.
+ * options.cc (General_options::parse_fix_v4bx): New method.
(General_options::parse_fix_v4bx_interworking): New method.
2010-01-22 Doug Kwan <dougkwan@google.com>
@@ -11618,7 +11624,7 @@ gold/
2010-01-20 Viktor Kutuzov <vkutuzov@accesssoftek.com>
- * gold/arm.cc: Added support for R_ARM_V4BX relocation
+ * arm.cc: Added support for R_ARM_V4BX relocation
(class Arm_v4bx_stub): New class.
(DEF_STUBS): Updated definition to support v4_veneer_bx.
(Stub_factory::make_arm_v4bx_stub): New method.
@@ -12675,7 +12681,7 @@ gold/
attributes_section and attributes_vendor.
* i386.cc (Target_i386::i386_info): Same.
* object.cc (Sized_relobj::do_layout): Skip attribute section.
- * gold/powerpc.cc (Target_powerpc::powerpc_info): Initialize new
+ * powerpc.cc (Target_powerpc::powerpc_info): Initialize new
fields attributes_section and attributes_vendor.
* sparc.cc (Target_sparc::sparc_info): Same.
* target.h (Target::attributes_section, Target::attributes_vendor,
@@ -13322,7 +13328,7 @@ gold/
(Segment_start_expression::value): New method definition.
(script_exp_function_segment_start): Return a new
Segment_start_expression.
- * gold/script-c.h (script_saw_segment_start_expression): New function
+ * script-c.h (script_saw_segment_start_expression): New function
prototype.
* script-sections.cc (Script_sections::Script_sections): Initialize
SAW_SEGMENT_START_EXPRESSION_ to false.
@@ -14113,9 +14119,9 @@ gold/
(Script_sections::attach_sections_using_phdrs_clause): Do not modify
segment list.
(Script_sections::release_segments): New method definition.
- * gold/script-sections.h (Script_sections::release_segments): New
+ * script-sections.h (Script_sections::release_segments): New
method declaration.
- * gold/target.h (Target::may_relax, Target::relax,
+ * target.h (Target::may_relax, Target::relax,
Target::do_may_relax, Target::do_relax): New method definitions.
2009-09-17 Viktor Kutuzov <vkutuzov@accesssoftek.com>
@@ -14689,7 +14695,7 @@ gold/
2009-06-03 Doug Kwan <dougkwan@google.com>
- * gold/arm.cc (namespace utils): New.
+ * arm.cc (namespace utils): New.
(Target_arm::reloc_is_non_pic): Define new method.
(class Arm_relocate_functions): New.
(Target_arm::Relocate::relocate): Handle relocation types used by
@@ -14701,7 +14707,7 @@ gold/
2009-06-02 Doug Kwan <dougkwan@google.com>
- * gold/arm.cc (Target_arm::Scan::Scan): Initialize
+ * arm.cc (Target_arm::Scan::Scan): Initialize
issued_non_pic_error_.
(class Target_arm::Scan): Declare new method check_non_pic.
Define new method symbol_needs_plt_entry.
@@ -14722,7 +14728,7 @@ gold/
2009-05-29 Doug Kwan <dougkwan@google.com>
- * gold/arm.cc (Output_data_plt_arm): Forward declaration for new
+ * arm.cc (Output_data_plt_arm): Forward declaration for new
template class.
(class Target_arm): Update comment.
(Target_arm::Target_arm): Initialize new data members GOT_,
diff --git a/gold/icf.cc b/gold/icf.cc
index 96b7f2d..663d579 100644
--- a/gold/icf.cc
+++ b/gold/icf.cc
@@ -213,6 +213,45 @@ preprocess_for_unique_sections(const std::vector<Section_id>& id_section,
}
}
+// For SHF_MERGE sections that use REL relocations, the addend is stored in
+// the text section at the relocation offset. Read the addend value given
+// the pointer to the addend in the text section and the addend size.
+// Update the addend value if a valid addend is found.
+// Parameters:
+// RELOC_ADDEND_PTR : Pointer to the addend in the text section.
+// ADDEND_SIZE : The size of the addend.
+// RELOC_ADDEND_VALUE : Pointer to the addend that is updated.
+
+inline void
+get_rel_addend(const unsigned char* reloc_addend_ptr,
+ const unsigned int addend_size,
+ uint64_t* reloc_addend_value)
+{
+ switch (addend_size)
+ {
+ case 0:
+ break;
+ case 1:
+ *reloc_addend_value =
+ read_from_pointer<8>(reloc_addend_ptr);
+ break;
+ case 2:
+ *reloc_addend_value =
+ read_from_pointer<16>(reloc_addend_ptr);
+ break;
+ case 4:
+ *reloc_addend_value =
+ read_from_pointer<32>(reloc_addend_ptr);
+ break;
+ case 8:
+ *reloc_addend_value =
+ read_from_pointer<64>(reloc_addend_ptr);
+ break;
+ default:
+ gold_unreachable();
+ }
+}
+
// This returns the buffer containing the section's contents, both
// text and relocs. Relocs are differentiated as those pointing to
// sections that could be folded and those that cannot. Only relocs
@@ -397,58 +436,36 @@ get_section_contents(bool first_iteration,
uint64_t entsize =
(it_v->first)->section_entsize(it_v->second);
long long offset = it_a->first;
-
- unsigned long long addend = it_a->second;
- // Ignoring the addend when it is a negative value. See the
- // comments in Merged_symbol_value::Value in object.h.
- if (addend < 0xffffff00)
- offset = offset + addend;
-
- // For SHT_REL relocation sections, the addend is stored in the
- // text section at the relocation offset.
- uint64_t reloc_addend_value = 0;
+ // Handle SHT_RELA and SHT_REL addends, only one of these
+ // addends exists.
+ // Get the SHT_RELA addend. For RELA relocations, we have
+ // the addend from the relocation.
+ uint64_t reloc_addend_value = it_a->second;
+
+ // Handle SHT_REL addends.
+ // For REL relocations, we need to fetch the addend from the
+ // section contents.
const unsigned char* reloc_addend_ptr =
contents + static_cast<unsigned long long>(*it_o);
- switch(*it_addend_size)
- {
- case 0:
- {
- break;
- }
- case 1:
- {
- reloc_addend_value =
- read_from_pointer<8>(reloc_addend_ptr);
- break;
- }
- case 2:
- {
- reloc_addend_value =
- read_from_pointer<16>(reloc_addend_ptr);
- break;
- }
- case 4:
- {
- reloc_addend_value =
- read_from_pointer<32>(reloc_addend_ptr);
- break;
- }
- case 8:
- {
- reloc_addend_value =
- read_from_pointer<64>(reloc_addend_ptr);
- break;
- }
- default:
- gold_unreachable();
- }
- offset = offset + reloc_addend_value;
+
+ // Update the addend value with the SHT_REL addend if
+ // available.
+ get_rel_addend(reloc_addend_ptr, *it_addend_size,
+ &reloc_addend_value);
+
+ // Ignore the addend when it is a negative value. See the
+ // comments in Merged_symbol_value::value in object.h.
+ if (reloc_addend_value < 0xffffff00)
+ offset = offset + reloc_addend_value;
section_size_type secn_len;
+
const unsigned char* str_contents =
(it_v->first)->section_contents(it_v->second,
&secn_len,
false) + offset;
+ gold_assert (offset < (long long) secn_len);
+
if ((secn_flags & elfcpp::SHF_STRINGS) != 0)
{
// String merge section.
@@ -489,10 +506,14 @@ get_section_contents(bool first_iteration,
}
else
{
- // Use the entsize to determine the length.
- buffer.append(reinterpret_cast<const
+ // Use the entsize to determine the length to copy.
+ uint64_t bufsize = entsize;
+ // If entsize is too big, copy all the remaining bytes.
+ if ((offset + entsize) > secn_len)
+ bufsize = secn_len - offset;
+ buffer.append(reinterpret_cast<const
char*>(str_contents),
- entsize);
+ bufsize);
}
buffer.append("@");
}
diff --git a/gprof/ChangeLog b/gprof/ChangeLog
index 9fa2109..cb3b0c3 100644
--- a/gprof/ChangeLog
+++ b/gprof/ChangeLog
@@ -2,6 +2,10 @@
* configure: Regenerate.
+2016-01-25 Tristan Gingold <gingold@adacore.com>
+
+ * configure: Regenerate.
+
2015-11-13 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
diff --git a/gprof/configure b/gprof/configure
index 8ea2c70..693b927 100755
--- a/gprof/configure
+++ b/gprof/configure
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated by GNU Autoconf 2.64 for gprof 2.26.
+# Generated by GNU Autoconf 2.64 for gprof 2.26.0.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@ MAKEFLAGS=
# Identity of this package.
PACKAGE_NAME='gprof'
PACKAGE_TARNAME='gprof'
-PACKAGE_VERSION='2.26'
-PACKAGE_STRING='gprof 2.26'
+PACKAGE_VERSION='2.26.0'
+PACKAGE_STRING='gprof 2.26.0'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -1299,7 +1299,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
-\`configure' configures gprof 2.26 to adapt to many kinds of systems.
+\`configure' configures gprof 2.26.0 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1370,7 +1370,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
- short | recursive ) echo "Configuration of gprof 2.26:";;
+ short | recursive ) echo "Configuration of gprof 2.26.0:";;
esac
cat <<\_ACEOF
@@ -1476,7 +1476,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
-gprof configure 2.26
+gprof configure 2.26.0
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -1841,7 +1841,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
-It was created by gprof $as_me 2.26, which was
+It was created by gprof $as_me 2.26.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -3649,7 +3649,7 @@ fi
# Define the identity of the package.
PACKAGE='gprof'
- VERSION='2.26'
+ VERSION='2.26.0'
cat >>confdefs.h <<_ACEOF
@@ -12706,7 +12706,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
-This file was extended by gprof $as_me 2.26, which was
+This file was extended by gprof $as_me 2.26.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -12770,7 +12770,7 @@ Report bugs to the package provider."
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
-gprof config.status 2.26
+gprof config.status 2.26.0
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
diff --git a/include/ChangeLog b/include/ChangeLog
index 01a25de..0ceba89 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -30,10 +30,6 @@
* dwarf2.def (DW_AT_GNU_numerator, DW_AT_GNU_denominator): New
attributes.
-2015-09-26 James Bowman <james.bowman@ftdichip.com>
-
- * opcode/ft32.h: Add instruction macros FT32_*()
-
2015-09-20 Rich Felker <dalias@libc.org>
* bfdlink.h (struct bfd_link_info): Add "nointerp" field.
@@ -55,7 +51,7 @@
2015-08-18 H.J. Lu <hongjiu.lu@intel.com>
- * include/bfdlink.h (output_type): New enum.
+ * bfdlink.h (output_type): New enum.
(bfd_link_executable): New macro.
(bfd_link_dll): Likewise.
(bfd_link_relocatable): Likewise.
@@ -71,10 +67,6 @@
* ansidecl.h (GCC_FINAL): New macro.
-2015-07-16 Jiong Wang <jiong.wang@arm.com>
-
- * elf/aarch64.h (R_AARCH64_P32_TLSLD_ADR_PREL21): New enumeration.
-
2015-07-14 H.J. Lu <hongjiu.lu@intel.com>
Sync with GCC
@@ -97,25 +89,12 @@
PR target/65261
* ansidecl.h (ATTRIBUTE_NO_SANITIZE_UNDEFINED): New macro.
-2015-07-09 Catherine Moore <clm@codesourcery.com>
-
- * elf/mips/mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New.
-
-2015-07-08 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
-
- * elf/avr.h: Add new 32 bit PC relative relocation.
-
-2015-06-26 Matthew Fortune <matthew.fortune@imgtec.com>
-
- * elf/mips.h (DT_MIPS_RLD_MAP_REL): New macro.
-
2015-06-22 Nick Clifton <nickc@redhat.com>
* dis-asm.h (struct disassemble_info): Add stop_vma field.
2015-05-28 Catherine Moore <clm@codesourcery.com>
- include/
* bfdlink.h: Rename eh_frame_hdr to eh_frame_hdr_type.
2015-05-22 Yunlian Jiang <yunlian@google.com>
@@ -123,10 +102,6 @@
* libiberty.h (asprintf): Don't declare if HAVE_DECL_ASPRINTF is
not defined.
-2015-05-12 Jiong Wang <jiong.wang@arm.com>
-
- * elf/aarch64.h (R_AARCH64_P32_LD32_GOTPAGE_LO14): New enumeration.
-
2015-05-01 H.J. Lu <hongjiu.lu@intel.com>
Merge with gcc:
@@ -160,11 +135,6 @@
PR ld/pr17709
* bfdlink.h (bfd_link_info): Add extern_protected_data.
-2015-03-10 Matthew Wahab <matthew.wahab@arm.com>
-
- PR ld/16572
- * elf/arm.h (EF_ARM_HASENTRY): Remove.
-
2015-02-19 Pedro Alves <palves@redhat.com>
* floatformat.h [__cplusplus]: Wrap in extern "C".
@@ -247,31 +217,14 @@
PR debug/63239
* dwarf2.def (DW_AT_GNU_deleted): New attribute.
-2014-11-21 Terry Guo <terry.guo@arm.com>
-
- * opcode/arm.h (FPU_VFP_EXT_ARMV8xD): New macro.
- (FPU_VFP_V5D16): Likewise.
- (FPU_VFP_V5_SP_D16): Likewise.
- (FPU_ARCH_VFP_V5D16): Likewise.
- (FPU_ARCH_VFP_V5_SP_D16): Likewise.
-
2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com>
* bfdlink.h (struct bfd_link_info): Add bndplt.
-2014-10-30 Andrew Pinski <apinski@cavium.com>
-
- * elf/mips.h (AFL_EXT_OCTEON3): Define.
- INSN_OCTEON3, CPU_OCTEON3): Define.
-
2014-10-28 Yury Gribov <y.gribov@samsung.com>
* libiberty.h (strtol, strtoul, strtoll, strtoull): New prototypes.
-2014-10-22 Matthew Fortune <matthew.fortune@imgtec.com>
-
- * elf/mips.h (AFL_ASE_MASK): Define.
-
2014-10-15 David Malcolm <dmalcolm@redhat.com>
* libiberty.h (choose_tmpdir): New prototype.
@@ -303,28 +256,6 @@
* bfdlink.h (struct bfd_link_info): Add lto_plugin_active.
-2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
-
- * elf/mips.h (PT_MIPS_ABIFLAGS, SHT_MIPS_ABIFLAGS): Define.
- (Val_GNU_MIPS_ABI_FP_OLD_64): Rename from Val_GNU_MIPS_ABI_FP_64.
- (Val_GNU_MIPS_ABI_FP_64): Redefine.
- (Val_GNU_MIPS_ABI_FP_XX): Define.
- (Elf_External_ABIFlags_v0, Elf_Internal_ABIFlags_v0): New structures.
- (AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): Define.
- (AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU): Likewise.
- (AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS): Likewise.
- (AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16): Likewise.
- (AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise.
- (AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP): Likewise.
- (AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900): Likewise.
- (AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900): Likewise.
- (AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120): Likewise.
- (AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E): Likewise.
- (AFL_EXT_LOONGSON_2F): Likewise.
- (bfd_mips_elf_swap_abiflags_v0_in): Prototype.
- (bfd_mips_elf_swap_abiflags_v0_out): Likewise.
- (bfd_mips_isa_ext): Likewise.
-
2014-06-13 Alan Modra <amodra@gmail.com>
* bfdlink.h (struct bfd_link_hash_table): Add hash_table_free field.
@@ -340,20 +271,12 @@
2014-05-01 Steve Ellcey <sellcey@mips.com>
- * include/longlong.h: Import latest version from GCC tree.
-
-2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
-
- * opcode/mips.h (ASE_XPA): New define.
+ * longlong.h: Import latest version from GCC tree.
2014-04-22 Christian Svensson <blue@cmd.nu>
* dis-asm.h: Remove openrisc and or32 support. Add support for or1k.
-2014-04-10 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
-
- * elf/avr.h: Add new DIFF relocs.
-
2014-03-05 Alan Modra <amodra@gmail.com>
Update copyright years.
@@ -386,11 +309,6 @@
* longlong.h: New file.
-2013-11-11 Catherine Moore <clm@codesourcery.com>
-
- * opcode/mips.h (INSN_LOAD_MEMORY_DELAY): Rename to...
- (INSN_LOAD_MEMORY): ...this.
-
2013-10-29 Marc Glisse <marc.glisse@inria.fr>
PR tree-optimization/58689
@@ -401,10 +319,6 @@
xmalloc, xrealloc, xcalloc, xstrdup, xstrndup, xmemdup, pex_init):
Mark with attribute returns_nonnull.
-2013-10-22 Sterling Augustine <saugustine@google.com>
-
- * gdb/gdb-index.h: Merge from gdb tree.
-
2013-10-10 Sean Keys <skeys@ipdatasys.com>
* xgate.h : Cleanup after opcode
@@ -424,31 +338,6 @@
* vtv-change-permission.h: New file.
-2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
- Konrad Eisele <konrad@gaisler.com>
-
- * opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_LEON.
-
-2013-06-08 Catherine Moore <clm@codesourcery.com>
-
- * opcode/mips.h (mips_opcode): Add ase field.
- (INSN_ASE_MASK): Delete.
- (INSN_DSP): Rename to ASE_DSP. Provide new value.
- (INSN_DSPR2): Rename to ASE_DSPR2. Provide new value.
- (INSN_MCU): Rename to ASE_MCU. Provide new value.
- (INSN_MDMX): Rename to ASE_MDMX. Provide new value.
- (INSN_MIPS3d): Rename to ASE_MIPS3D. Provide new value.
- (INSN_MT): Rename to ASE_MT. Provide new value.
- (INSN_SMARTMIPS): Rename to ASE_SMARTMIPS. Provide new value.
- (INSN_VIRT): Rename to ASE_VIRT. Provide new value.
- (INSN_VIRT64): Rename to ASE_VIRT64. Provide new value.
- (opcode_is_member): Add ase argument. Check ase.
-
-2013-05-06 Paul Brook <paul@codesourcery.com>
-
- include/elf/
- * mips.h (R_MIPS_PC32): Update comment.
-
2013-04-03 Jason Merrill <jason@redhat.com>
Demangle C++11 ref-qualifier.
@@ -456,20 +345,6 @@
DEMANGLE_COMPONENT_REFERENCE_THIS,
DEMANGLE_COMPONENT_RVALUE_REFERENCE_THIS.
-2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
-
- * opcode/nios2.h: Edit comment.
-
-2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
-
- * opcode/nios2.h (OPX_WRPRS): New define.
- (OP_MATCH_WRPRS): Likewise.
-
-2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
-
- * opcode/nios2.h (OP_RDPRS): New define.
- (OP_MATCH_RDPRS): Likewise.
-
2013-03-01 Cary Coutant <ccoutant@google.com>
* dwarf2.h (enum dwarf_sect): New enum type.
@@ -516,12 +391,6 @@
* fopen-bin.h: Likewise.
* fopen-same.h: Likewise.
* fopen-vms.h: Likewise.
- * aout/hppa.h: Likewise.
- * opcode/tahoe.h: Likewise.
-
-2012-12-11 Edgar E. Iglesias <edgar.iglesias@gmail.com>
-
- * elf/microblaze.h: Add TLS relocs to START_RELOC_NUMBERS
2012-11-09 Jason Merrill <jason@redhat.com>
@@ -570,14 +439,6 @@
PR other/54411
* objalloc.h (objalloc_alloc): Do not use fast path on wraparound.
-2012-09-27 Anthony Green <green@moxielogic.com>
-
- * opcode/moxie.h (MOXIE_BAD): New define.
-
-2012-09-12 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
-
- * elf/aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc.
-
2012-09-06 Cary Coutant <ccoutant@google.com>
* dwarf2.def: Edit comment.
@@ -592,30 +453,6 @@
(tv_allow_unique_segment_for_sections): New member.
(tv_unique_segment_for_sections): New member.
-2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
-
- * opcode/arm.h (ARM_CPU_IS_ANY): New define.
-
-2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
-
- * elf/arm.h (TAG_CPU_ARCH_V8): New define.
- (MAX_TAG_CPU_ARCH): Update.
- * opcode/arm.h (ARM_EXT_V8): New define.
- (FPU_VFP_EXT_ARMV8): Likewise.
- (FPU_NEON_EXT_ARMV8): Likewise.
- (FPU_CRYPTO_EXT_ARMV8): Likewise.
- (ARM_AEXT_V8A): Likewise.
- (FPU_VFP_ARMV8): Likwise.
- (FPU_NEON_ARMV8): Likewise.
- (FPU_CRYPTO_ARMV8): Likewise.
- (FPU_ARCH_VFP_ARMV8): Likewise.
- (FPU_ARCH_NEON_VFP_ARMV8): Likewise.
- (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise.
- (ARM_ARCH_V8A): Likwise.
- (ARM_ARCH_V8A_FP): Likewise.
- (ARM_ARCH_V8A_SIMD): Likewise.
- (ARM_ARCH_V8A_CRYPTO): Likewise.
-
2012-08-13 Ian Bolton <ian.bolton@arm.com>
Laurent Desnogues <laurent.desnogues@arm.com>
Jim MacArthur <jim.macarthur@arm.com>
@@ -631,10 +468,6 @@
(print_aarch64_disassembler_options): New declaration.
(aarch64_symbol_is_valid): New declaration.
-2012-08-02 Sean Keys <skeys@ipdatasys.com>
-
- * elf/m68hc11.h: #define E_M68HC11_NO_BANK_WARNING 0x000000200
-
2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
Dr David Alan Gilbert <dave@treblig.org>
@@ -646,15 +479,6 @@
* filenames.h: #include "hashtab.h".
(filename_hash, filename_eq): Declare.
-2012-07-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
-
- * elf/s390.h (START_RELOC_NUMBERS): Define R_390_IRELATIVE reloc.
-
-2012-07-05 Sean Keys <skeys@ipdatasys.com>
-
- * opcode/xgate.h: Changed the format string for mode
- XGATE_OP_DYA_MON.
-
2012-06-18 Doug Evans <dje@google.com>
* dwarf2.def (DW_OP): Add DW_OP_GNU_const_index.
@@ -724,11 +548,6 @@
(get_DW_OP_name, get_DW_ATE_name): Declare.
* dwarf2.def: New file, from dwarf2.h.
-2012-04-12 David S. Miller <davem@davemloft.net>
-
- * elf/sparc.h (R_SPARC_WDISP10): New reloc.
- * opcode/sparc.h: Define '=' as generating R_SPARC_WDISP10.
-
2012-04-10 Tristan Gingold <gingold@adacore.com>
* splay-tree.h: Conditionnaly includes stdint.h and inttypes.h
@@ -746,7 +565,7 @@
Add DWARF attribute value for the "Borland fastcall" calling
convention.
- * elf/dwarf2.h: Add DW_CC_GNU_borland_fastcall_i386 constant.
+ * dwarf2.h: Add DW_CC_GNU_borland_fastcall_i386 constant.
2012-01-31 H.J. Lu <hongjiu.lu@intel.com>
@@ -1049,14 +868,6 @@
* libiberty.h (setproctitle): Add prototype.
-2010-09-29 Bernd Schmidt <bernds@codesourcery.com>
-
- * opcode/tic6x-control-registers.h (tscl): Now read_write.
-
-2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
-
- * opcode/s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val.
-
2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm.h (ARM_EXT_V6Z): Remove.
@@ -1259,7 +1070,7 @@
2009-10-15 Jakub Jelinek <jakub@redhat.com>
- * include/dwarf2.h (DW_LANG_Python): Add comment that it is
+ * dwarf2.h (DW_LANG_Python): Add comment that it is
a DWARF 4 addition.
2009-10-14 Alan Modra <amodra@bigpond.net.au>
@@ -1348,16 +1159,6 @@
* bfdlink.h (struct bfd_link_hash_common_entry): Move to top
level.
-2009-09-04 Jie Zhang <jie.zhang@analog.com>
-
- * opcode/bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp.
- (PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define.
- (PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask,
- PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask):
- Adjust accordingly.
- (init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and
- PseudoDbg_Assert_grp_mask.
-
2009-08-06 Michael Eager <eager@eagercon.com>
* dis-asm.h: Decl print_insn_microblaze().
@@ -1518,10 +1319,6 @@
* demangle.h (enum demangle_component_type): Add
DEMANGLE_COMPONENT_PACK_EXPANSION.
-2008-09-24 Richard Henderson <rth@redhat.com>
-
- * elf/dwarf2.h (DW_OP_GNU_encoded_addr): New.
-
2008-09-22 Rafael Espindola <espindola@google.com>
* plugin-api.h (ld_plugin_status): Remove comma from the last item.
@@ -1550,32 +1347,17 @@
* bfdlink.h (bfd_generic_link_read_symbols): Declare.
-2008-08-08 Anatoly Sokolov <aesok@post.ru>
-
- * elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
- E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
- (EF_AVR_MACH): Redefine to 0x7F.
- * opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
- (AVR_ISA_AVR3): Redefine.
- (AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
- AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
- AVR_ISA_AVR6): Define.
-
2008-07-12 Jie Zhang <jie.zhang@analog.com>
Revert
2008-07-12 Jie Zhang <jie.zhang@analog.com>
* bfdlink.h (struct bfd_link_info): Add sep_code member
variable.
- * elf/bfin.h (EF_BFIN_CODE_IN_L1): Define.
- (EF_BFIN_DATA_IN_L1): Define.
2008-07-12 Jie Zhang <jie.zhang@analog.com>
* bfdlink.h (struct bfd_link_info): Add sep_code member
variable.
- * elf/bfin.h (EF_BFIN_CODE_IN_L1): Define.
- (EF_BFIN_DATA_IN_L1): Define.
2008-07-07 Stan Shebs <stan@codesourcery.com>
@@ -1938,10 +1720,6 @@
* libiberty.h (strverscmp): Prototype.
-2005-06-17 Jakub Jelinek <jakub@redhat.com>
-
- * elf/external.h (GRP_ENTRY_SIZE): Define.
-
2005-06-08 Zack Weinberg <zack@codesourcery.com>
* dis-asm.h (get_arm_regnames): Update prototype.
diff --git a/include/aout/ChangeLog b/include/aout/ChangeLog
index 790763b..7caa35b 100644
--- a/include/aout/ChangeLog
+++ b/include/aout/ChangeLog
@@ -6,6 +6,10 @@
Update copyright years.
+2012-12-17 Nick Clifton <nickc@redhat.com>
+
+ * hppa.h: Add copyright notice.
+
2010-04-15 Nick Clifton <nickc@redhat.com>
* adobe.h: Update copyright notice to use GPLv3.
diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog
index 3c6eddc..c10e95e 100644
--- a/include/elf/ChangeLog
+++ b/include/elf/ChangeLog
@@ -58,6 +58,18 @@
* aarch64.h (R_AARCH64_P32_TLSLD_ADR_PAGE21): Define.
+2015-07-16 Jiong Wang <jiong.wang@arm.com>
+
+ * aarch64.h (R_AARCH64_P32_TLSLD_ADR_PREL21): New enumeration.
+
+2015-07-09 Catherine Moore <clm@codesourcery.com>
+
+ * mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New.
+
+2015-07-08 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
+
+ * avr.h: Add new 32 bit PC relative relocation.
+
2015-07-01 Sandra Loosemore <sandra@codesourcery.com>
Cesar Philippidis <cesar@codesourcery.com>
@@ -81,11 +93,19 @@
* nios2.h (EF_NIOS2_ARCH_R1, EF_NIOS2_ARCH_R2): Define.
+2015-06-26 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * mips.h (DT_MIPS_RLD_MAP_REL): New macro.
+
2015-05-29 Roland McGrath <mcgrathr@google.com>
* common.h (GNU_ABI_TAG_SYLLABLE): New macro.
(GNU_ABI_TAG_NACL): New macro.
+2015-05-12 Jiong Wang <jiong.wang@arm.com>
+
+ * aarch64.h (R_AARCH64_P32_LD32_GOTPAGE_LO14): New enumeration.
+
2015-05-11 H.J. Lu <hongjiu.lu@intel.com>
* common.h (EM_486): Renamed to ...
@@ -133,6 +153,11 @@
(E_FLAG_RL78_CPU_MASK, E_FLAG_RL78_ANY_CPU, E_FLAG_RL78_G13
E_FLAG_RL78_G14): New flags.
+2015-03-10 Matthew Wahab <matthew.wahab@arm.com>
+
+ PR ld/16572
+ * arm.h (EF_ARM_HASENTRY): Remove.
+
2015-02-19 Marcus Shawcroft <marcus.shawcroft@arm.com>
* aarch64.h (R_AARCH64_P32_TLSGD_ADR_PREL21): Add.
@@ -188,6 +213,15 @@
* x86-64.h (R_X86_64_GOTPLT64): Mark it obsolete.
+2014-10-30 Andrew Pinski <apinski@cavium.com>
+
+ * mips.h (AFL_EXT_OCTEON3): Define.
+ (INSN_OCTEON3, CPU_OCTEON3): Define.
+
+2014-10-22 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * mips.h (AFL_ASE_MASK): Define.
+
2014-10-17 Jose E. Marchesi <jose.marchesi@oracle.com>
* sparc.h (ELF_SPARC_HWCAP2_VIS3B): Documentation improved.
@@ -227,6 +261,28 @@
* rl78.h (RL78_RELAXA_MASK): New. Relax types are enums, not bits
+2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * mips.h (PT_MIPS_ABIFLAGS, SHT_MIPS_ABIFLAGS): Define.
+ (Val_GNU_MIPS_ABI_FP_OLD_64): Rename from Val_GNU_MIPS_ABI_FP_64.
+ (Val_GNU_MIPS_ABI_FP_64): Redefine.
+ (Val_GNU_MIPS_ABI_FP_XX): Define.
+ (Elf_External_ABIFlags_v0, Elf_Internal_ABIFlags_v0): New structures.
+ (AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): Define.
+ (AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU): Likewise.
+ (AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS): Likewise.
+ (AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16): Likewise.
+ (AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise.
+ (AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP): Likewise.
+ (AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900): Likewise.
+ (AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900): Likewise.
+ (AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120): Likewise.
+ (AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E): Likewise.
+ (AFL_EXT_LOONGSON_2F): Likewise.
+ (bfd_mips_elf_swap_abiflags_v0_in): Prototype.
+ (bfd_mips_elf_swap_abiflags_v0_out): Likewise.
+ (bfd_mips_isa_ext): Likewise.
+
2014-07-07 Barney Stratford <barney_stratford@fastmail.fm>
* avr.h: Add R_AVR_PORT5 and R_AVR_PORT6.
@@ -252,6 +308,10 @@
* openrisc.h: Delete.
* or32.h: Delete.
+2014-04-10 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
+
+ * avr.h: Add new DIFF relocs.
+
2014-03-05 Alan Modra <amodra@gmail.com>
Update copyright years.
@@ -395,6 +455,10 @@
(EM_INTEL208): Likewise.
(EM_INTEL209): Likewise.
+2013-05-06 Paul Brook <paul@codesourcery.com>
+
+ * mips.h (R_MIPS_PC32): Update comment.
+
2013-05-02 Nick Clifton <nickc@redhat.com>
* msp430.h: Add MSP430X relocs.
@@ -443,6 +507,10 @@
* mips.h: Add MIPS machine variant number for r5900 which is
compatible with old Playstation 2 software.
+2012-12-11 Edgar E. Iglesias <edgar.iglesias@gmail.com>
+
+ * microblaze.h: Add TLS relocs to START_RELOC_NUMBERS
+
2012-11-16 H.J. Lu <hongjiu.lu@intel.com>
* common.h (DF_1_CONLFAT): Renamed to ...
@@ -477,13 +545,17 @@
2012-10-30 Steve McIntyre <steve.mcintyre@linaro.org>
- * elf/arm.h (EF_ARM_ABI_FLOAT_SOFT): New define.
+ * arm.h (EF_ARM_ABI_FLOAT_SOFT): New define.
(EF_ARM_ABI_FLOAT_HARD): Likewise.
2012-10-23 Tom Tromey <tromey@redhat.com>
* common.h (NT_SIGINFO, NT_FILE): New defines.
+2012-09-12 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
+
+ * aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc.
+
2012-08-27 Walter Lee <walt@tilera.com>
* tilegx.h (R_TILEGX_IMM16_X0_HW0_PLT_PCREL): New relocation.
@@ -501,6 +573,11 @@
(R_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL ): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): Ditto.
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * arm.h (TAG_CPU_ARCH_V8): New define.
+ (MAX_TAG_CPU_ARCH): Update.
+
2012-08-13 Ian Bolton <ian.bolton@arm.com>
Laurent Desnogues <laurent.desnogues@arm.com>
Jim MacArthur <jim.macarthur@arm.com>
@@ -516,6 +593,14 @@
* common.h (EM_res183): Rename to EM_AARCH64.
(EM_res184): Rename to EM_ARM184.
+2012-08-02 Sean Keys <skeys@ipdatasys.com>
+
+ * m68hc11.h: #define E_M68HC11_NO_BANK_WARNING 0x000000200
+
+2012-07-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * s390.h (START_RELOC_NUMBERS): Define R_390_IRELATIVE reloc.
+
2012-06-28 Iain Sandoe <iain@codesourcery.com>
* common.h (AT_L1I_CACHESHAPE, AT_L1D_CACHESHAPE,
@@ -565,7 +650,7 @@
2012-05-11 Georg-Johann Lay <avr@gjlay.de
PR target/13503
- * elf/avr.h (RELOC_NUMBERS): Add values for R_AVR_8_LO8,
+ * avr.h (RELOC_NUMBERS): Add values for R_AVR_8_LO8,
R_AVR_8_HI8, R_AVR_8_HHI8.
2012-05-03 Sean Keys <skeys@ipdatasys.com>
@@ -577,6 +662,10 @@
* sparc.h: Add new ELF_SPARC_HWCAP_* defines for crypto,
pause, and compare-and-branch instructions.
+2012-04-12 David S. Miller <davem@davemloft.net>
+
+ * sparc.h (R_SPARC_WDISP10): New reloc.
+
2012-03-07 Nick Clifton <nickc@redhat.com>
* mn10300.h (elf_mn10300_reloc_type): Add R_MN10300_TLS_GD,
@@ -1096,13 +1185,13 @@
2009-08-09 Michael Eager <eager@eagercon.com>
- * elf/common.h: Define EM_resnnn reserved values. Add EM_AVR32,
+ * common.h: Define EM_resnnn reserved values. Add EM_AVR32,
EM_STM8, EM_TILE64, EM_TILEPRO. Change EM_MICROBLAZE.
2009-08-06 Michael Eager <eager@eagercon.com>
- * elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
- * elf/microblaze.h: New reloc definitions.
+ * common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
+ * microblaze.h: New reloc definitions.
2009-07-30 Alan Modra <amodra@bigpond.net.au>
@@ -1171,7 +1260,7 @@
2009-04-24 Cary Coutant <ccoutant@google.com>
- * dwarf2.h (DW_LNE_set_discriminator): New enum value.
+ * dwarf2.h (DW_LNE_set_discriminator): New enum value.
2009-04-15 Anthony Green <green@moxielogic.com>
@@ -1303,12 +1392,22 @@
(R_CRIS_32_GOT_TPREL, R_CRIS_16_GOT_TPREL, R_CRIS_32_TPREL)
(R_CRIS_16_TPREL): New relocations.
+2008-09-24 Richard Henderson <rth@redhat.com>
+
+ * dwarf2.h (DW_OP_GNU_encoded_addr): New.
+
2008-08-20 Bob Wilson <bob.wilson@acm.org>
* xtensa.h (R_XTENSA_TLSDESC_FN, R_XTENSA_TLSDESC_ARG)
(R_XTENSA_TLS_DTPOFF, R_XTENSA_TLS_TPOFF, R_XTENSA_TLS_FUNC)
(R_XTENSA_TLS_ARG, R_XTENSA_TLS_CALL): New.
+2008-08-08 Anatoly Sokolov <aesok@post.ru>
+
+ * avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
+ E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
+ (EF_AVR_MACH): Redefine to 0x7F.
+
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
@@ -1329,6 +1428,18 @@
* common.h: Define NT_PPC_VSX.
+2008-07-12 Jie Zhang <jie.zhang@analog.com>
+
+ Revert
+ 2008-07-12 Jie Zhang <jie.zhang@analog.com>
+ * bfin.h (EF_BFIN_CODE_IN_L1): Define.
+ (EF_BFIN_DATA_IN_L1): Define.
+
+2008-07-12 Jie Zhang <jie.zhang@analog.com>
+
+ * bfin.h (EF_BFIN_CODE_IN_L1): Define.
+ (EF_BFIN_DATA_IN_L1): Define.
+
2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
* mips.h (ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): New macros.
@@ -1366,7 +1477,7 @@
2008-04-16 David S. Miller <davem@davemloft.net>
- * elf/sparc.h (R_SPARC_GOTDATA_HIX22,
+ * sparc.h (R_SPARC_GOTDATA_HIX22,
R_SPARC_GOTDATA_LOX10, R_SPARC_GOTDATA_OP_HIX22,
R_SPARC_GOTDATA_OP_LOX10, R_SPARC_GOTDATA_OP,
R_SPARC_H34, R_SPARC_SIZE32, R_SPARC_SIZE64): New relocs.
@@ -1689,6 +1800,7 @@
2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
Randolph Chung <randolph@tausq.org>
+
* hppa.h (R_PARISC_TLS_GD21L, R_PARISC_TLS_GD14R, R_PARISC_TLS_GDCALL,
R_PARISC_TLS_LDM21L, R_PARISC_TLS_LDM14R, R_PARISC_TLS_LDMCALL,
R_PARISC_TLS_LDO21L, R_PARISC_TLS_LDO14R, R_PARISC_TLS_DTPMOD32,
diff --git a/include/gdb/ChangeLog b/include/gdb/ChangeLog
index 57a83ce..5a3ecee 100644
--- a/include/gdb/ChangeLog
+++ b/include/gdb/ChangeLog
@@ -51,9 +51,13 @@
* section-scripts.h: New file.
+2013-10-22 Sterling Augustine <saugustine@google.com>
+
+ * gdb-index.h: Merge from gdb tree.
+
2013-03-15 Steve Ellcey <sellcey@mips.com>
- * gdb/remote-sim.h (sim_command_completer): Make char arguments const.
+ * remote-sim.h (sim_command_completer): Make char arguments const.
2013-01-01 Joel Brobecker <brobecker@adacore.com>
@@ -218,7 +222,7 @@
2003-06-10 Corinna Vinschen <vinschen@redhat.com>
- * gdb/fileio.h: New file.
+ * fileio.h: New file.
2003-05-07 Andrew Cagney <cagney@redhat.com>
@@ -256,7 +260,7 @@
2002-07-29 Andrey Volkov <avolkov@transas.com>
* sim-h8300.h: Rename all enums from H8300_ to SIM_H8300_
- prefix.
+ prefix.
2002-07-23 Andrey Volkov <avolkov@transas.com>
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 0aee194..87d4653 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -95,10 +95,10 @@
* aarch64.h [__cplusplus]: Wrap in extern "C".
2015-10-07 Claudiu Zissulescu <claziss@synopsys.com>
- Cupertino Miranda <cmiranda@synopsys.com>
+ Cupertino Miranda <cmiranda@synopsys.com>
- * arc-func.h: New file.
- * arc.h: Likewise.
+ * arc-func.h: New file.
+ * arc.h: Likewise.
2015-10-02 Yao Qi <yao.qi@linaro.org>
@@ -115,6 +115,10 @@
(S390_INSTR_FLAG_VX): New flag.
(S390_INSTR_FLAG_FACILITY_MASK): New flag mask.
+2015-09-26 James Bowman <james.bowman@ftdichip.com>
+
+ * ft32.h: Add instruction macros FT32_*()
+
2015-09-23 Nick Clifton <nickc@redhat.com>
* ppc.h (PPC_OPSHIFT_INV): Use an unsigned constant when left
@@ -258,6 +262,14 @@
(NIOS2_INSN_ORI, NIOS2_INSN_XORI): Delete.
(NIOS2_INSN_OPTARG): Renumber.
+2014-11-21 Terry Guo <terry.guo@arm.com>
+
+ * arm.h (FPU_VFP_EXT_ARMV8xD): New macro.
+ (FPU_VFP_V5D16): Likewise.
+ (FPU_VFP_V5_SP_D16): Likewise.
+ (FPU_ARCH_VFP_V5D16): Likewise.
+ (FPU_ARCH_VFP_V5_SP_D16): Likewise.
+
2014-11-06 Sandra Loosemore <sandra@codesourcery.com>
* nios2.h (nios2_find_opcode_hash): Add mach parameter to
@@ -347,7 +359,7 @@
* mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT,
OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6
instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B,
- +I, +O, +R, +:, +\, +", +;
+ +I, +O, +R, +:, +\, +", +;
(mips_check_prev_operand): New struct.
(INSN2_FORBIDDEN_SLOT): New define.
(INSN_ISA32R6): New define.
@@ -425,6 +437,10 @@
* mips.h (mips_isa_table): Avoid hard-coding INSN_ISA* values.
+2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
+
+ * mips.h (ASE_XPA): New define.
+
2014-04-22 Christian Svensson <blue@cmd.nu>
* or32.h: Delete.
@@ -472,6 +488,11 @@
* aarch64.h (aarch64_sys_reg_readonly_p): New declaration.
(aarch64_sys_reg_writeonly_p): Ditto.
+2013-11-11 Catherine Moore <clm@codesourcery.com>
+
+ * mips.h (INSN_LOAD_MEMORY_DELAY): Rename to...
+ (INSN_LOAD_MEMORY): ...this.
+
2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64.h (aarch64_sys_reg): New typedef.
@@ -514,6 +535,11 @@
* mips.h (OP_OPTIONAL_REG): New mips_operand_type.
(mips_optional_operand_p): New function.
+2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
+ Konrad Eisele <konrad@gaisler.com>
+
+ * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_LEON.
+
2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
Richard Sandiford <rdsandiford@googlemail.com>
@@ -677,6 +703,21 @@
* nios2.h (OP_MATCH_ERET): Correct eret encoding.
+2013-06-08 Catherine Moore <clm@codesourcery.com>
+
+ * mips.h (mips_opcode): Add ase field.
+ (INSN_ASE_MASK): Delete.
+ (INSN_DSP): Rename to ASE_DSP. Provide new value.
+ (INSN_DSPR2): Rename to ASE_DSPR2. Provide new value.
+ (INSN_MCU): Rename to ASE_MCU. Provide new value.
+ (INSN_MDMX): Rename to ASE_MDMX. Provide new value.
+ (INSN_MIPS3d): Rename to ASE_MIPS3D. Provide new value.
+ (INSN_MT): Rename to ASE_MT. Provide new value.
+ (INSN_SMARTMIPS): Rename to ASE_SMARTMIPS. Provide new value.
+ (INSN_VIRT): Rename to ASE_VIRT. Provide new value.
+ (INSN_VIRT64): Rename to ASE_VIRT64. Provide new value.
+ (opcode_is_member): Add ase argument. Check ase.
+
2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
* mips.h (M_LQC2_AB, M_SQC2_AB): New macros.
@@ -741,6 +782,20 @@
* tic6x-opcode-table.h: Modify absdp, dpint, dpsp, dptrunc, rcpdp
and rsqrdp opcodes to use the new field coding types.
+2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * nios2.h: Edit comment.
+
+2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * nios2.h (OPX_WRPRS): New define.
+ (OP_MATCH_WRPRS): Likewise.
+
+2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * nios2.h (OP_RDPRS): New define.
+ (OP_MATCH_RDPRS): Likewise.
+
2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* arm.h (CRC_EXT_ARMV8): New constant.
@@ -798,6 +853,10 @@
(make_instruction,match_opcode): Added function prototypes.
(cr16_words,cr16_allWords,cr16_currInsn): Declare as extern.
+2012-12-17 Nick Clifton <nickc@redhat.com>
+
+ * tahoe.h: Add copyright notice.
+
2012-11-23 Alan Modra <amodra@gmail.com>
* ppc.h (ppc_parse_cpu): Update prototype.
@@ -811,10 +870,36 @@
* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_ZEC12.
+2012-09-27 Anthony Green <green@moxielogic.com>
+
+ * moxie.h (MOXIE_BAD): New define.
+
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64.h (ia64_opnd): Add new operand types.
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * arm.h (ARM_CPU_IS_ANY): New define.
+
+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * arm.h (ARM_EXT_V8): New define.
+ (FPU_VFP_EXT_ARMV8): Likewise.
+ (FPU_NEON_EXT_ARMV8): Likewise.
+ (FPU_CRYPTO_EXT_ARMV8): Likewise.
+ (ARM_AEXT_V8A): Likewise.
+ (FPU_VFP_ARMV8): Likwise.
+ (FPU_NEON_ARMV8): Likewise.
+ (FPU_CRYPTO_ARMV8): Likewise.
+ (FPU_ARCH_VFP_ARMV8): Likewise.
+ (FPU_ARCH_NEON_VFP_ARMV8): Likewise.
+ (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise.
+ (ARM_ARCH_V8A): Likwise.
+ (ARM_ARCH_V8A_FP): Likewise.
+ (ARM_ARCH_V8A_SIMD): Likewise.
+ (ARM_ARCH_V8A_CRYPTO): Likewise.
+
2012-08-21 David S. Miller <davem@davemloft.net>
* sparc.h (F3F4): New macro.
@@ -859,6 +944,10 @@
* mips.h: Fix a typo in description.
+2012-07-05 Sean Keys <skeys@ipdatasys.com>
+
+ * xgate.h: Changed the format string for mode XGATE_OP_DYA_MON.
+
2012-06-07 Georg-Johann Lay <avr@gjlay.de>
* avr.h: (AVR_ISA_XCH): New define.
@@ -906,6 +995,10 @@
HWCAP_SHA256, HWCAP_SHA512, HWCAP_MPMUL, HWCAP_MONT, HWCAP_PAUSE,
HWCAP_CBCOND, HWCAP_CRC32): New defines.
+2012-04-12 David S. Miller <davem@davemloft.net>
+
+ * sparc.h: Define '=' as generating R_SPARC_WDISP10.
+
2012-03-10 Edmar Wienskoski <edmar@freescale.com>
* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR.
@@ -1275,6 +1368,14 @@
* cgen.h (CGEN_ATTR, CGEN_ATTR_TYPE): Rename bool attribute to bool_.
(CGEN_ATTR_BOOLS, CGEN_ATTR_CGEN_INSN_ALIAS_VALUE): Likewise.
+2010-09-29 Bernd Schmidt <bernds@codesourcery.com>
+
+ * tic6x-control-registers.h (tscl): Now read_write.
+
+2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val.
+
2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm.h (ARM_EXT_VIRT): New define.
@@ -1306,6 +1407,16 @@
* bfin.h: Strip trailing whitespace.
+2009-09-04 Jie Zhang <jie.zhang@analog.com>
+
+ * bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp.
+ (PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define.
+ (PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask,
+ PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask):
+ Adjust accordingly.
+ (init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and
+ PseudoDbg_Assert_grp_mask.
+
2010-07-29 DJ Delorie <dj@redhat.com>
* rx.h (RX_Operand_Type): Add TwoReg.
@@ -1358,7 +1469,7 @@
2010-05-26 Catherine Moore <clm@codesourcery.com>
- * opcode/mips.h (INSN_MIPS16): Remove.
+ * mips.h (INSN_MIPS16): Remove.
2010-04-21 Joseph Myers <joseph@codesourcery.com>
@@ -1428,7 +1539,7 @@
2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
- * opcode/ppc.h (PPC_OPCODE_TITAN): Define.
+ * ppc.h (PPC_OPCODE_TITAN): Define.
2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
@@ -1552,7 +1663,7 @@
2009-01-28 Doug Evans <dje@google.com>
- * opcode/i386.h: Add multiple inclusion protection.
+ * i386.h: Add multiple inclusion protection.
(EAX_REG_NUM,ECX_REG_NUM,EDX_REGNUM,EBX_REG_NUM,ESI_REG_NUM)
(EDI_REG_NUM): New macros.
(MODRM_MOD_FIELD,MODRM_REG_FIELD,MODRM_RM_FIELD): New macros.
@@ -1583,6 +1694,14 @@
* ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update
IA64_RS_CR.
+2008-08-08 Anatoly Sokolov <aesok@post.ru>
+
+ * avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
+ (AVR_ISA_AVR3): Redefine.
+ (AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
+ AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
+ AVR_ISA_AVR6): Define.
+
2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
* ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.
@@ -2039,7 +2158,7 @@
2005-07-28 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
PR gas/336
- * hppa.h (pa_opcodes): Allow 0 immediates in PA 2.0 variants of pdtlb
+ * hppa.h (pa_opcodes): Allow 0 immediates in PA 2.0 variants of pdtlb
and pitlb.
2005-07-27 Jan Beulich <jbeulich@novell.com>
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 75fd708..7594fac 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,300 @@
+2016-06-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-04-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19774
+ * testsuite/ld-x86-64/x86-64.exp: Link tmpdir/pr17689b.o before
+ tmpdir/pr17689.so, fix gotpcrel1 test and add more --as-needed
+ tests.
+
+ 2016-03-07 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19774
+ * testsuite/ld-i386/i386.exp: Link tmpdir/pr18900.o before
+ tmpdir/pr18900.so and test --as-needed. Link tmpdir/gotpc1.o
+ before tmpdir/got1d.so and test --as-needed.
+ * testsuite/ld-x86-64/x86-64.exp: Link tmpdir/pr18900.o before
+ tmpdir/pr18900.so and test --as-needed.
+
+ 2016-03-06 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/ld-i386/i386.exp: Link tmpdir/copyreloc-main.o
+ before tmpdir/copyreloc-lib.so and test --as-needed.
+ * testsuite/ld-x86-64/x86-64.exp: Likewise.
+
+2016-05-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-05-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/20117
+ * testsuite/ld-i386/i386.exp: Run pr20117.
+ * testsuite/ld-i386/pr20117.d: New file.
+ * testsuite/ld-i386/pr20117.s: Likewise.
+
+2016-05-18 Christophe Monat <christophe.monat@st.com>
+
+ Backport from master
+ 2016-05-09 Christophe Monat <christophe.monat@st.com>
+ PR ld/20030
+ * testsuite/ld-arm/arm-elf.exp: Run new stm32l4xx-fix-vldm-dp
+ tests. Fix misnamed stm32l4xx-fix-all.
+ * testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s: New tests for multiple
+ loads with DP registers.
+ * testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d: New reference file.
+ * testsuite/ld-arm/stm32l4xx-fix-vldm.s: Add missing comment.
+ * testsuite/ld-arm/stm32l4xx-fix-all.s: Add tests for multiple
+ loads with DP registers.
+ * testsuite/ld-arm/stm32l4xx-fix-all.d: Update reference.
+
+2016-05-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-05-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/20093
+ * testsuite/ld-x86-64/pr20093-1.d: New file.
+ * testsuite/ld-x86-64/pr20093-1.s: Likewise.
+ * testsuite/ld-x86-64/pr20093-2.d: Likewise.
+ * testsuite/ld-x86-64/pr20093-2.s: Likewise.
+ * testsuite/ld-x86-64/x86-64.exp: Run pr20093-1 and pr20093-2.
+
+2016-05-11 Alan Modra <amodra@gmail.com>
+
+ PR 20060
+ * testsuite/ld-powerpc/powerpc.exp: Run new tests.
+ * testsuite/ld-powerpc/tlsdll.s: New.
+ * testsuite/ld-powerpc/tlsdll.ver: New.
+ * testsuite/ld-powerpc/tlsdll_32.s: New.
+ * testsuite/ld-powerpc/tlsopt5.d: New.
+ * testsuite/ld-powerpc/tlsopt5.s: New.
+ * testsuite/ld-powerpc/tlsopt5_32.d: New.
+ * testsuite/ld-powerpc/tlsopt5_32.s: New.
+
+2016-04-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-04-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/20006
+ * testsuite/ld-elfvsb/elfvsb.exp (COMPRESS_LDFLAG): New.
+ (visibility_run): Pass COMPRESS_LDFLAG to visibility_test on
+ ELF targets.
+
+2016-04-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-04-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/ld-elf/compressed1b.d: Only run for Linux/GNU targets.
+
+ 2016-04-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/ld-elf/compressed1b.d: Pass
+ --compress-debug-sections=none to ld.
+ * testsuite/ld-elf/compressed1c.d: Likewise.
+
+2016-04-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-04-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19827
+ * testsuite/ld-i386/pr19827-nacl.rd: New file.
+ * testsuite/ld-x86-64/pr19827-nacl.rd: Likewise.
+
+2016-03-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19827
+ * testsuite/ld-i386/i386.exp: Run PR ld/19827 tests.
+ * testsuite/ld-x86-64/x86-64.exp: Likewise.
+ * testsuite/ld-i386/pr19827.rd: New file.
+ * testsuite/ld-i386/pr19827a.S: Likewise.
+ * testsuite/ld-i386/pr19827b.S: Likewise.
+ * testsuite/ld-x86-64/pr19827.rd: Likewise.
+ * testsuite/ld-x86-64/pr19827a.S: Likewise.
+ * testsuite/ld-x86-64/pr19827b.S: Likewise.
+
+2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-02-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/ld-elf/pr19539.d: Skip cris*-*-* targets.
+
+ 2016-01-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19539
+ * testsuite/ld-elf/pr19539.d: New file.
+ * testsuite/ld-elf/pr19539.s: Likewise.
+ * testsuite/ld-elf/pr19539.t: Likewise.
+
+2016-03-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2015-12-07 Jan Beulich <jbeulich@suse.com>
+
+ * ld-elf/gabiend.rt: Accept any alignment.
+ * ld-elf/gabinormal.rt: Likewise.
+
+2016-03-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-03-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19579
+ * testsuite/ld-elf/pr19579a.c: New file.
+ * testsuite/ld-elf/pr19579b.c: Likewise.
+ * testsuite/ld-elf/shared.exp: Run PR ld/19579 test.
+
+2016-03-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-03-02 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19739
+ * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Don't
+ merge flags of other input sections for relocatable link.
+ * emultempl/mmo.em (mmo_place_orphan): Likewise.
+ * emultempl/pe.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
+ * emultempl/pep.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
+
+2016-03-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-03-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/ld-plugin/lto.exp: Update PR ld/12365 test for GCC 6.
+
+2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-02-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19698
+ * testsuite/ld-elf/pr19698.d: New file.
+ * testsuite/ld-elf/pr19698.s: Likewise.
+ * testsuite/ld-elf/pr19698.t: Likewise.
+
+2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-02-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19553
+ * testsuite/ld-elf/indirect.exp: Run tests for PR ld/19553.
+ * testsuite/ld-elf/pr19553.map: New file.
+ * testsuite/ld-elf/pr19553.map: Likewise.
+ * testsuite/ld-elf/pr19553a.c: Likewise.
+ * testsuite/ld-elf/pr19553b.c: Likewise.
+ * testsuite/ld-elf/pr19553b.out: Likewise.
+ * testsuite/ld-elf/pr19553c.c: Likewise.
+ * testsuite/ld-elf/pr19553c.out: Likewise.
+ * testsuite/ld-elf/pr19553d.c: Likewise.
+ * testsuite/ld-elf/pr19553d.out: Likewise.
+
+2016-02-25 Jiong Wang <jiong.wang@arm.com>
+
+ Backport from master
+ 2016-01-20 Jiong Wang <jiong.wang@arm.com>
+
+ * testsuite/ld-aarch64/farcall-section.d: Delete.
+ * testsuite/ld-aarch64/farcall-section.s: Delete.
+ * testsuite/ld-aarch64/farcall-b-section.d: New expectation file.
+ * testsuite/ld-aarch64/farcall-bl-section.d: Likewise.
+ * testsuite/ld-aarch64/farcall-b-section.s: New testcase.
+ * testsuite/ld-aarch64/farcall-bl-section.s: Likewise.
+ * testsuite/ld-aarch64/aarch64-elf.exp: Likewise.
+
+2016-02-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-02-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19615
+ * ld.texinfo: Document -Bsymbolic and -Bsymbolic-functions for
+ PIE.
+ * lexsup.c (parse_args): Enable -Bsymbolic and
+ -Bsymbolic-functions for PIE.
+ * testsuite/ld-i386/i386.exp: Run pr19615.
+ * testsuite/ld-i386/pr19615.d: New file.
+ * testsuite/ld-i386/pr19615.s: Likewise.
+ * testsuite/ld-x86-64/pr19615.d: Likewise.
+ * testsuite/ld-x86-64/pr19615.s: Likewise.
+
+2016-02-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-02-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/19520
+ * testsuite/ld-i386/branch1.d: Pass -mrelax-relocations=yes to as.
+ * testsuite/ld-i386/call1.d: Likewise.
+ * testsuite/ld-i386/call2.d: Likewise.
+ * testsuite/ld-i386/call3a.d: Likewise.
+ * testsuite/ld-i386/call3b.d: Likewise.
+ * testsuite/ld-i386/call3c.d: Likewise.
+ * testsuite/ld-i386/call3d.d: Likewise.
+ * testsuite/ld-i386/call3e.d: Likewise.
+ * testsuite/ld-i386/call3f.d: Likewise.
+ * testsuite/ld-i386/call3g.d: Likewise.
+ * testsuite/ld-i386/call3h.d: Likewise.
+ * testsuite/ld-i386/jmp1.d: Likewise.
+ * testsuite/ld-i386/jmp2.d: Likewise.
+ * testsuite/ld-i386/lea1c.d: Likewise.
+ * testsuite/ld-i386/load1.d: Likewise.
+ * testsuite/ld-i386/load2.d: Likewise.
+ * testsuite/ld-i386/load3.d: Likewise.
+ * testsuite/ld-i386/load4a.d: Likewise.
+ * testsuite/ld-i386/load5a.d: Likewise.
+ * testsuite/ld-i386/mov2b.d: Likewise.
+ * testsuite/ld-i386/mov3.d: Likewise.
+ * testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
+ * testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
+ * testsuite/ld-ifunc/ifunc-5r-local-x86-64.d: Likewise.
+ * testsuite/ld-x86-64/call1a.d: Likewise.
+ * testsuite/ld-x86-64/call1b.d: Likewise.
+ * testsuite/ld-x86-64/call1c.d: Likewise.
+ * testsuite/ld-x86-64/call1d.d: Likewise.
+ * testsuite/ld-x86-64/call1e.d: Likewise.
+ * testsuite/ld-x86-64/call1f.d: Likewise.
+ * testsuite/ld-x86-64/call1h.d: Likewise.
+ * testsuite/ld-x86-64/call1i.d: Likewise.
+ * testsuite/ld-x86-64/load1a.d: Likewise.
+ * testsuite/ld-x86-64/load1b.d: Likewise.
+ * testsuite/ld-i386/got1a.S: Load GOT into %ecx and use it.
+ * testsuite/ld-i386/got1.dd: Updated.
+ * testsuite/ld-i386/got1d.S (1): Removed.
+ * testsuite/ld-i386/i386.exp: Add -Wa,-mrelax-relocations=yes.
+ * testsuite/ld-x86-64/x86-64.exp: Likewise.
+
+2016-02-02 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-02-02 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/18591
+ * testsuite/ld-x86-64/pr18591.d: New file.
+ * testsuite/ld-x86-64/pr18591.s: Likewise.
+ * testsuite/ld-x86-64/x86-64.exp: Run pr18591.
+
+2016-01-29 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-01-29 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/19533
+ * configure.ac (compressed_debug_sections): Replace == with =.
+ * configure: Regenerated.
+
+2016-01-25 Tristan Gingold <gingold@adacore.com>
+
+ * configure: Regenerate.
+
2016-01-25 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
@@ -89,7 +386,7 @@
decide placement.
2015-10-27 Laurent Alfonsi <laurent.alfonsi@st.com>
- Christophe Monat <christophe.monat@st.com>
+ Christophe Monat <christophe.monat@st.com>
* ld.texinfo: Add description of the STM32L4xx erratum
workaround.
@@ -129,7 +426,7 @@
2015-10-22 H.J. Lu <hongjiu.lu@intel.com>
- * ld/ld.texinfo: Document "-z call-nop=PADDING" option.
+ * ld.texinfo: Document "-z call-nop=PADDING" option.
* emulparams/call_nop.sh: New file.
* emulparams/elf_i386_be.sh: Source
${srcdir}/emulparams/call_nop.sh.
@@ -165,7 +462,7 @@
2015-10-15 Simon Dardis <Simon.Dardis@imgtec.com>
- * ld/ldexp.c: (try_copy_symbol_flags): New. Factored out from...
+ * ldexp.c: (try_copy_symbol_flags): New. Factored out from...
(exp_fold_tree_1): Here. Cope with ternary operator in
assignments. Use new helper.
@@ -308,7 +605,7 @@
2015-09-09 James Bowman <james.bowman@ftdichip.com>
* scripttempl/ft32.sc: default linker script RAM and
- FLASH size symbols
+ FLASH size symbols
2015-09-09 Nick Clifton <nickc@redhat.com>
@@ -359,58 +656,58 @@
2015-08-18 H.J. Lu <hongjiu.lu@intel.com>
- * ld/ldctor.c: Replace shared, executable, relocatable and pie
+ * ldctor.c: Replace shared, executable, relocatable and pie
fields with bfd_link_executable, bfd_link_dll,
bfd_link_relocatable, bfd_link_pic and bfd_link_pie.
- * ld/ldemul.c: Likewise.
- * ld/ldfile.c: Likewise.
- * ld/ldlang.c: Likewise.
- * ld/ldmain.c: Likewise.
- * ld/ldwrite.c: Likewise.
- * ld/lexsup.c: Likewise.
- * ld/pe-dll.c: Likewise.
- * ld/plugin.c: Likewise.
- * ld/emultempl/aarch64elf.em: Likewise.
- * ld/emultempl/aix.em: Likewise.
- * ld/emultempl/alphaelf.em: Likewise.
- * ld/emultempl/armcoff.em: Likewise.
- * ld/emultempl/armelf.em: Likewise.
- * ld/emultempl/avrelf.em: Likewise.
- * ld/emultempl/beos.em: Likewise.
- * ld/emultempl/cr16elf.em: Likewise.
- * ld/emultempl/elf-generic.em: Likewise.
- * ld/emultempl/elf32.em: Likewise.
- * ld/emultempl/genelf.em: Likewise.
- * ld/emultempl/generic.em: Likewise.
- * ld/emultempl/gld960.em: Likewise.
- * ld/emultempl/gld960c.em: Likewise.
- * ld/emultempl/hppaelf.em: Likewise.
- * ld/emultempl/irix.em: Likewise.
- * ld/emultempl/linux.em: Likewise.
- * ld/emultempl/lnk960.em: Likewise.
- * ld/emultempl/m68hc1xelf.em: Likewise.
- * ld/emultempl/m68kcoff.em: Likewise.
- * ld/emultempl/m68kelf.em: Likewise.
- * ld/emultempl/metagelf.em: Likewise.
- * ld/emultempl/mipself.em: Likewise.
- * ld/emultempl/mmo.em: Likewise.
- * ld/emultempl/msp430.em: Likewise.
- * ld/emultempl/nds32elf.em: Likewise.
- * ld/emultempl/needrelax.em: Likewise.
- * ld/emultempl/nios2elf.em: Likewise.
- * ld/emultempl/pe.em: Likewise.
- * ld/emultempl/pep.em: Likewise.
- * ld/emultempl/ppc32elf.em: Likewise.
- * ld/emultempl/ppc64elf.em: Likewise.
- * ld/emultempl/sh64elf.em: Likewise.
- * ld/emultempl/solaris2.em: Likewise.
- * ld/emultempl/spuelf.em: Likewise.
- * ld/emultempl/sunos.em: Likewise.
- * ld/emultempl/tic6xdsbt.em: Likewise.
- * ld/emultempl/ticoff.em: Likewise.
- * ld/emultempl/v850elf.em: Likewise.
- * ld/emultempl/vms.em: Likewise.
- * ld/emultempl/vxworks.em: Likewise.
+ * ldemul.c: Likewise.
+ * ldfile.c: Likewise.
+ * ldlang.c: Likewise.
+ * ldmain.c: Likewise.
+ * ldwrite.c: Likewise.
+ * lexsup.c: Likewise.
+ * pe-dll.c: Likewise.
+ * plugin.c: Likewise.
+ * emultempl/aarch64elf.em: Likewise.
+ * emultempl/aix.em: Likewise.
+ * emultempl/alphaelf.em: Likewise.
+ * emultempl/armcoff.em: Likewise.
+ * emultempl/armelf.em: Likewise.
+ * emultempl/avrelf.em: Likewise.
+ * emultempl/beos.em: Likewise.
+ * emultempl/cr16elf.em: Likewise.
+ * emultempl/elf-generic.em: Likewise.
+ * emultempl/elf32.em: Likewise.
+ * emultempl/genelf.em: Likewise.
+ * emultempl/generic.em: Likewise.
+ * emultempl/gld960.em: Likewise.
+ * emultempl/gld960c.em: Likewise.
+ * emultempl/hppaelf.em: Likewise.
+ * emultempl/irix.em: Likewise.
+ * emultempl/linux.em: Likewise.
+ * emultempl/lnk960.em: Likewise.
+ * emultempl/m68hc1xelf.em: Likewise.
+ * emultempl/m68kcoff.em: Likewise.
+ * emultempl/m68kelf.em: Likewise.
+ * emultempl/metagelf.em: Likewise.
+ * emultempl/mipself.em: Likewise.
+ * emultempl/mmo.em: Likewise.
+ * emultempl/msp430.em: Likewise.
+ * emultempl/nds32elf.em: Likewise.
+ * emultempl/needrelax.em: Likewise.
+ * emultempl/nios2elf.em: Likewise.
+ * emultempl/pe.em: Likewise.
+ * emultempl/pep.em: Likewise.
+ * emultempl/ppc32elf.em: Likewise.
+ * emultempl/ppc64elf.em: Likewise.
+ * emultempl/sh64elf.em: Likewise.
+ * emultempl/solaris2.em: Likewise.
+ * emultempl/spuelf.em: Likewise.
+ * emultempl/sunos.em: Likewise.
+ * emultempl/tic6xdsbt.em: Likewise.
+ * emultempl/ticoff.em: Likewise.
+ * emultempl/v850elf.em: Likewise.
+ * emultempl/vms.em: Likewise.
+ * emultempl/vxworks.em: Likewise.
2015-08-18 Alan Modra <amodra@gmail.com>
diff --git a/ld/configure b/ld/configure
index a446283..8095b71 100755
--- a/ld/configure
+++ b/ld/configure
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated by GNU Autoconf 2.64 for ld 2.26.
+# Generated by GNU Autoconf 2.64 for ld 2.26.0.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@ MAKEFLAGS=
# Identity of this package.
PACKAGE_NAME='ld'
PACKAGE_TARNAME='ld'
-PACKAGE_VERSION='2.26'
-PACKAGE_STRING='ld 2.26'
+PACKAGE_VERSION='2.26.0'
+PACKAGE_STRING='ld 2.26.0'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -1350,7 +1350,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
-\`configure' configures ld 2.26 to adapt to many kinds of systems.
+\`configure' configures ld 2.26.0 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1421,7 +1421,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
- short | recursive ) echo "Configuration of ld 2.26:";;
+ short | recursive ) echo "Configuration of ld 2.26.0:";;
esac
cat <<\_ACEOF
@@ -1545,7 +1545,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
-ld configure 2.26
+ld configure 2.26.0
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -2254,7 +2254,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
-It was created by ld $as_me 2.26, which was
+It was created by ld $as_me 2.26.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -4063,7 +4063,7 @@ fi
# Define the identity of the package.
PACKAGE='ld'
- VERSION='2.26'
+ VERSION='2.26.0'
cat >>confdefs.h <<_ACEOF
@@ -17134,7 +17134,7 @@ do
fi
done
-if test x$ac_default_compressed_debug_sections == xyes ; then
+if test x$ac_default_compressed_debug_sections = xyes ; then
$as_echo "#define DEFAULT_FLAG_COMPRESS_DEBUG 1" >>confdefs.h
@@ -17740,7 +17740,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
-This file was extended by ld $as_me 2.26, which was
+This file was extended by ld $as_me 2.26.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -17804,7 +17804,7 @@ Report bugs to the package provider."
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
-ld config.status 2.26
+ld config.status 2.26.0
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
diff --git a/ld/configure.ac b/ld/configure.ac
index 188172d..e28f38e 100644
--- a/ld/configure.ac
+++ b/ld/configure.ac
@@ -384,7 +384,7 @@ do
fi
done
-if test x$ac_default_compressed_debug_sections == xyes ; then
+if test x$ac_default_compressed_debug_sections = xyes ; then
AC_DEFINE(DEFAULT_FLAG_COMPRESS_DEBUG, 1, [Define if you want compressed debug sections by default.])
fi
diff --git a/ld/emultempl/elf32.em b/ld/emultempl/elf32.em
index 0405d4f..809b27c 100644
--- a/ld/emultempl/elf32.em
+++ b/ld/emultempl/elf32.em
@@ -1946,25 +1946,32 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
return os;
}
+ flags = s->flags;
+ if (!bfd_link_relocatable (&link_info))
+ {
+ nexts = s;
+ while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts))
+ != NULL)
+ if (nexts->output_section == NULL
+ && (nexts->flags & SEC_EXCLUDE) == 0
+ && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0
+ && (nexts->owner->flags & DYNAMIC) == 0
+ && nexts->owner->usrdata != NULL
+ && !(((lang_input_statement_type *) nexts->owner->usrdata)
+ ->flags.just_syms)
+ && _bfd_elf_match_sections_by_type (nexts->owner, nexts,
+ s->owner, s))
+ flags = (((flags ^ SEC_READONLY)
+ | (nexts->flags ^ SEC_READONLY))
+ ^ SEC_READONLY);
+ }
+
/* Decide which segment the section should go in based on the
section name and section flags. We put loadable .note sections
right after the .interp section, so that the PT_NOTE segment is
stored right after the program headers where the OS can read it
in the first page. */
- flags = s->flags;
- nexts = s;
- while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts)) != NULL)
- if (nexts->output_section == NULL
- && (nexts->flags & SEC_EXCLUDE) == 0
- && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0
- && (nexts->owner->flags & DYNAMIC) == 0
- && nexts->owner->usrdata != NULL
- && !(((lang_input_statement_type *) nexts->owner->usrdata)
- ->flags.just_syms)
- && _bfd_elf_match_sections_by_type (nexts->owner, nexts, s->owner, s))
- flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY))
- ^ SEC_READONLY);
place = NULL;
if ((flags & (SEC_ALLOC | SEC_DEBUGGING)) == 0)
place = &hold[orphan_nonalloc];
diff --git a/ld/emultempl/mmo.em b/ld/emultempl/mmo.em
index 8949aed..3a382ec 100644
--- a/ld/emultempl/mmo.em
+++ b/ld/emultempl/mmo.em
@@ -107,22 +107,28 @@ mmo_place_orphan (asection *s,
return os;
}
+ flags = s->flags;
+ if (!bfd_link_relocatable (&link_info))
+ {
+ nexts = s;
+ while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts))
+ != NULL)
+ if (nexts->output_section == NULL
+ && (nexts->flags & SEC_EXCLUDE) == 0
+ && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0
+ && (nexts->owner->flags & DYNAMIC) == 0
+ && nexts->owner->usrdata != NULL
+ && !(((lang_input_statement_type *) nexts->owner->usrdata)
+ ->flags.just_syms))
+ flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY))
+ ^ SEC_READONLY);
+ }
+
/* Check for matching section type flags for sections we care about.
A section without contents can have SEC_LOAD == 0, but we still
want it attached to a sane section so the symbols appear as
expected. */
- flags = s->flags;
- nexts = s;
- while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts)) != NULL)
- if (nexts->output_section == NULL
- && (nexts->flags & SEC_EXCLUDE) == 0
- && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0
- && (nexts->owner->flags & DYNAMIC) == 0
- && nexts->owner->usrdata != NULL
- && !(((lang_input_statement_type *) nexts->owner->usrdata)
- ->flags.just_syms))
- flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY))
- ^ SEC_READONLY);
+
if ((flags & (SEC_ALLOC | SEC_READONLY)) != SEC_READONLY)
for (i = 0; i < sizeof (holds) / sizeof (holds[0]); i++)
if ((flags & holds[i].nonzero_flags) != 0)
diff --git a/ld/emultempl/pe.em b/ld/emultempl/pe.em
index 0370c5a..bddd9a8 100644
--- a/ld/emultempl/pe.em
+++ b/ld/emultempl/pe.em
@@ -2225,21 +2225,27 @@ gld_${EMULATION_NAME}_place_orphan (asection *s,
orphan_init_done = 1;
}
+ flags = s->flags;
+ if (!bfd_link_relocatable (&link_info))
+ {
+ nexts = s;
+ while ((nexts = bfd_get_next_section_by_name (nexts->owner,
+ nexts)))
+ if (nexts->output_section == NULL
+ && (nexts->flags & SEC_EXCLUDE) == 0
+ && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0
+ && (nexts->owner->flags & DYNAMIC) == 0
+ && nexts->owner->usrdata != NULL
+ && !(((lang_input_statement_type *) nexts->owner->usrdata)
+ ->flags.just_syms))
+ flags = (((flags ^ SEC_READONLY)
+ | (nexts->flags ^ SEC_READONLY))
+ ^ SEC_READONLY);
+ }
+
/* Try to put the new output section in a reasonable place based
on the section name and section flags. */
- flags = s->flags;
- nexts = s;
- while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts)))
- if (nexts->output_section == NULL
- && (nexts->flags & SEC_EXCLUDE) == 0
- && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0
- && (nexts->owner->flags & DYNAMIC) == 0
- && nexts->owner->usrdata != NULL
- && !(((lang_input_statement_type *) nexts->owner->usrdata)
- ->flags.just_syms))
- flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY))
- ^ SEC_READONLY);
place = NULL;
if ((flags & SEC_ALLOC) == 0)
;
diff --git a/ld/emultempl/pep.em b/ld/emultempl/pep.em
index 91de501..5ddeffc 100644
--- a/ld/emultempl/pep.em
+++ b/ld/emultempl/pep.em
@@ -1996,21 +1996,27 @@ gld_${EMULATION_NAME}_place_orphan (asection *s,
orphan_init_done = 1;
}
+ flags = s->flags;
+ if (!bfd_link_relocatable (&link_info))
+ {
+ nexts = s;
+ while ((nexts = bfd_get_next_section_by_name (nexts->owner,
+ nexts)))
+ if (nexts->output_section == NULL
+ && (nexts->flags & SEC_EXCLUDE) == 0
+ && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0
+ && (nexts->owner->flags & DYNAMIC) == 0
+ && nexts->owner->usrdata != NULL
+ && !(((lang_input_statement_type *) nexts->owner->usrdata)
+ ->flags.just_syms))
+ flags = (((flags ^ SEC_READONLY)
+ | (nexts->flags ^ SEC_READONLY))
+ ^ SEC_READONLY);
+ }
+
/* Try to put the new output section in a reasonable place based
on the section name and section flags. */
- flags = s->flags;
- nexts = s;
- while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts)))
- if (nexts->output_section == NULL
- && (nexts->flags & SEC_EXCLUDE) == 0
- && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0
- && (nexts->owner->flags & DYNAMIC) == 0
- && nexts->owner->usrdata != NULL
- && !(((lang_input_statement_type *) nexts->owner->usrdata)
- ->flags.just_syms))
- flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY))
- ^ SEC_READONLY);
place = NULL;
if ((flags & SEC_ALLOC) == 0)
;
diff --git a/ld/ld.texinfo b/ld/ld.texinfo
index 1dd7492..2389661 100644
--- a/ld/ld.texinfo
+++ b/ld/ld.texinfo
@@ -1325,15 +1325,21 @@ libraries.
When creating a shared library, bind references to global symbols to the
definition within the shared library, if any. Normally, it is possible
for a program linked against a shared library to override the definition
-within the shared library. This option is only meaningful on ELF
-platforms which support shared libraries.
+within the shared library. This option can also be used with the
+@option{--export-dynamic} option, when creating a position independent
+executable, to bind references to global symbols to the definition within
+the executable. This option is only meaningful on ELF platforms which
+support shared libraries and position independent executables.
@kindex -Bsymbolic-functions
@item -Bsymbolic-functions
When creating a shared library, bind references to global function
symbols to the definition within the shared library, if any.
+This option can also be used with the @option{--export-dynamic} option,
+when creating a position independent executable, to bind references
+to global function symbols to the definition within the executable.
This option is only meaningful on ELF platforms which support shared
-libraries.
+libraries and position independent executables.
@kindex --dynamic-list=@var{dynamic-list-file}
@item --dynamic-list=@var{dynamic-list-file}
diff --git a/ld/lexsup.c b/ld/lexsup.c
index 4cad209..e2fb212 100644
--- a/ld/lexsup.c
+++ b/ld/lexsup.c
@@ -1586,15 +1586,14 @@ parse_args (unsigned argc, char **argv)
/* We may have -Bsymbolic, -Bsymbolic-functions, --dynamic-list-data,
--dynamic-list-cpp-new, --dynamic-list-cpp-typeinfo and
--dynamic-list FILE. -Bsymbolic and -Bsymbolic-functions are
- for shared libraries. -Bsymbolic overrides all others and vice
- versa. */
+ for PIC outputs. -Bsymbolic overrides all others and vice versa. */
switch (command_line.symbolic)
{
case symbolic_unset:
break;
case symbolic:
- /* -Bsymbolic is for shared library only. */
- if (bfd_link_dll (&link_info))
+ /* -Bsymbolic is for PIC output only. */
+ if (bfd_link_pic (&link_info))
{
link_info.symbolic = TRUE;
/* Should we free the unused memory? */
@@ -1603,8 +1602,8 @@ parse_args (unsigned argc, char **argv)
}
break;
case symbolic_functions:
- /* -Bsymbolic-functions is for shared library only. */
- if (bfd_link_dll (&link_info))
+ /* -Bsymbolic-functions is for PIC output only. */
+ if (bfd_link_pic (&link_info))
command_line.dynamic_list = dynamic_list_data;
break;
}
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index cb51928..d09a332 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -117,12 +117,12 @@
* ld-x86-64/plt-main3.rd: Also check GOTPCRELX.
2015-10-29 Catherine Moore <clm@codesourcery.com>
-
- * ld-mips-elf/mips16-fp-stub-1.s: New.
- * ld-mips-elf/mips16-fp-stub-2.s: New.
- * ld-mips-elf/mips16-fp-stub.d: New.
- * ld-mips-elf/mips-elf.exp: Run new tests.
- * ld-mips-elf/mips16-intermix.d: Update expected output.
+
+ * ld-mips-elf/mips16-fp-stub-1.s: New.
+ * ld-mips-elf/mips16-fp-stub-2.s: New.
+ * ld-mips-elf/mips16-fp-stub.d: New.
+ * ld-mips-elf/mips-elf.exp: Run new tests.
+ * ld-mips-elf/mips16-intermix.d: Update expected output.
2015-10-28 H.J. Lu <hongjiu.lu@intel.com>
@@ -133,7 +133,7 @@
* ld-x86-64/pr19162b.s: Likewise.
2015-10-27 Laurent Alfonsi <laurent.alfonsi@st.com>
- Christophe Monat <christophe.monat@st.com>
+ Christophe Monat <christophe.monat@st.com>
* ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX
tests.
@@ -1069,7 +1069,6 @@
2015-05-28 Catherine Moore <clm@codesourcery.com>
- ld/testsuite/
* ld-mips-elf/compact-eh.ld: New linker script.
* ld-mips-elf/compact-eh1.d: New.
* ld-mips-elf/compact-eh1.s: New.
diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp
index 0e5b31e..576cc65 100644
--- a/ld/testsuite/ld-aarch64/aarch64-elf.exp
+++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp
@@ -170,7 +170,6 @@ run_dump_test "pcrel_pic_defined_local"
run_dump_test "limit-b"
run_dump_test "limit-bl"
-run_dump_test "farcall-section"
run_dump_test "farcall-back"
run_dump_test "farcall-b-defsym"
run_dump_test "farcall-bl-defsym"
@@ -181,6 +180,8 @@ run_dump_test "farcall-bl"
run_dump_test "farcall-b"
run_dump_test "farcall-b-none-function"
run_dump_test "farcall-bl-none-function"
+run_dump_test "farcall-b-section"
+run_dump_test "farcall-bl-section"
run_dump_test "tls-relax-all"
run_dump_test "tls-relax-gd-le"
diff --git a/ld/testsuite/ld-aarch64/farcall-b-none-function.d b/ld/testsuite/ld-aarch64/farcall-b-none-function.d
index 34a6568..ba2981f 100644
--- a/ld/testsuite/ld-aarch64/farcall-b-none-function.d
+++ b/ld/testsuite/ld-aarch64/farcall-b-none-function.d
@@ -2,4 +2,23 @@
#source: farcall-b-none-function.s
#as:
#ld: -Ttext 0x1000 --section-start .foo=0x8001000
-#error: .*\(.text\+0x0\): relocation truncated to fit: R_AARCH64_JUMP26 against symbol `bar'.*
+#objdump: -dr
+#...
+
+Disassembly of section .text:
+
+.* <_start>:
+ 1000: 14000003 b 100c <__bar_veneer>
+ 1004: d65f03c0 ret
+ 1008: 14000007 b 1024 <__bar_veneer\+0x18>
+
+.* <__bar_veneer>:
+ 100c: 90040010 adrp x16, 8001000 <bar>
+ 1010: 91000210 add x16, x16, #0x0
+ 1014: d61f0200 br x16
+ ...
+
+Disassembly of section .foo:
+
+.* <bar>:
+ 8001000: d65f03c0 ret
diff --git a/ld/testsuite/ld-aarch64/farcall-b-section.d b/ld/testsuite/ld-aarch64/farcall-b-section.d
new file mode 100644
index 0000000..4745c0f
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-b-section.d
@@ -0,0 +1,34 @@
+#name: aarch64-farcall-b-section
+#source: farcall-b-section.s
+#as:
+#ld: -Ttext 0x1000 --section-start .foo=0x8001000
+#objdump: -dr
+#...
+
+Disassembly of section .text:
+
+.* <_start>:
+ 1000: 14000008 b 1020 <___veneer>
+ 1004: 14000003 b 1010 <___veneer>
+ 1008: d65f03c0 ret
+ 100c: 1400000d b 1040 <___veneer\+0x20>
+
+.* <___veneer>:
+ 1010: 90040010 adrp x16, 8001000 <bar>
+ 1014: 91001210 add x16, x16, #0x4
+ 1018: d61f0200 br x16
+ 101c: 00000000 .inst 0x00000000 ; undefined
+
+.* <___veneer>:
+ 1020: 90040010 adrp x16, 8001000 <bar>
+ 1024: 91000210 add x16, x16, #0x0
+ 1028: d61f0200 br x16
+ ...
+
+Disassembly of section .foo:
+
+.* <bar>:
+ 8001000: d65f03c0 ret
+
+.* <bar2>:
+ 8001004: d65f03c0 ret
diff --git a/ld/testsuite/ld-aarch64/farcall-b-section.s b/ld/testsuite/ld-aarch64/farcall-b-section.s
new file mode 100644
index 0000000..1a135ef
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-b-section.s
@@ -0,0 +1,20 @@
+.global _start
+
+# We will place the section .text at 0x1000.
+
+ .text
+
+_start:
+ b bar
+ b bar2
+ ret
+
+# We will place the section .foo at 0x8001000.
+
+ .section .foo, "xa"
+ .type bar, @function
+bar:
+ ret
+ .type bar2, @function
+bar2:
+ ret
diff --git a/ld/testsuite/ld-aarch64/farcall-bl-none-function.d b/ld/testsuite/ld-aarch64/farcall-bl-none-function.d
index 6ce9ca4..b6a4dda 100644
--- a/ld/testsuite/ld-aarch64/farcall-bl-none-function.d
+++ b/ld/testsuite/ld-aarch64/farcall-bl-none-function.d
@@ -2,4 +2,23 @@
#source: farcall-bl-none-function.s
#as:
#ld: -Ttext 0x1000 --section-start .foo=0x8001000
-#error: .*\(.text\+0x0\): relocation truncated to fit: R_AARCH64_CALL26 against symbol `bar'.*
+#objdump: -dr
+#...
+
+Disassembly of section .text:
+
+.* <_start>:
+ 1000: 94000003 bl 100c <__bar_veneer>
+ 1004: d65f03c0 ret
+ 1008: 14000007 b 1024 <__bar_veneer\+0x18>
+
+.* <__bar_veneer>:
+ 100c: 90040010 adrp x16, 8001000 <bar>
+ 1010: 91000210 add x16, x16, #0x0
+ 1014: d61f0200 br x16
+ ...
+
+Disassembly of section .foo:
+
+.* <bar>:
+ 8001000: d65f03c0 ret
diff --git a/ld/testsuite/ld-aarch64/farcall-bl-section.d b/ld/testsuite/ld-aarch64/farcall-bl-section.d
new file mode 100644
index 0000000..2bd4f85
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-bl-section.d
@@ -0,0 +1,34 @@
+#name: aarch64-farcall-bl-section
+#source: farcall-bl-section.s
+#as:
+#ld: -Ttext 0x1000 --section-start .foo=0x8001000
+#objdump: -dr
+#...
+
+Disassembly of section .text:
+
+.* <_start>:
+ 1000: 94000008 bl 1020 <___veneer>
+ 1004: 94000003 bl 1010 <___veneer>
+ 1008: d65f03c0 ret
+ 100c: 1400000d b 1040 <___veneer\+0x20>
+
+.* <___veneer>:
+ 1010: 90040010 adrp x16, 8001000 <bar>
+ 1014: 91001210 add x16, x16, #0x4
+ 1018: d61f0200 br x16
+ 101c: 00000000 .inst 0x00000000 ; undefined
+
+.* <___veneer>:
+ 1020: 90040010 adrp x16, 8001000 <bar>
+ 1024: 91000210 add x16, x16, #0x0
+ 1028: d61f0200 br x16
+ ...
+
+Disassembly of section .foo:
+
+.* <bar>:
+ 8001000: d65f03c0 ret
+
+.* <bar2>:
+ 8001004: d65f03c0 ret
diff --git a/ld/testsuite/ld-aarch64/farcall-bl-section.s b/ld/testsuite/ld-aarch64/farcall-bl-section.s
new file mode 100644
index 0000000..4469d4d
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-bl-section.s
@@ -0,0 +1,20 @@
+ .global _start
+
+# We will place the section .text at 0x1000.
+
+ .text
+
+_start:
+ bl bar
+ bl bar2
+ ret
+
+# We will place the section .foo at 0x8001000.
+
+ .section .foo, "xa"
+ .type bar, @function
+bar:
+ ret
+ .type bar2, @function
+bar2:
+ ret
diff --git a/ld/testsuite/ld-aarch64/farcall-section.d b/ld/testsuite/ld-aarch64/farcall-section.d
deleted file mode 100644
index 85775e1..0000000
--- a/ld/testsuite/ld-aarch64/farcall-section.d
+++ /dev/null
@@ -1,5 +0,0 @@
-#name: Aarch64 farcall to symbol of type STT_SECTION
-#source: farcall-section.s
-#as:
-#ld: -Ttext 0x1000 --section-start .foo=0x8001014
-#error: .*\(.text\+0x0\): relocation truncated to fit: R_AARCH64_CALL26 against `.foo'
diff --git a/ld/testsuite/ld-aarch64/farcall-section.s b/ld/testsuite/ld-aarch64/farcall-section.s
deleted file mode 100644
index 86a070c..0000000
--- a/ld/testsuite/ld-aarch64/farcall-section.s
+++ /dev/null
@@ -1,19 +0,0 @@
-# Test to ensure that an Aarch64 call exceeding 128MB generates an error
-# if the destination is of type STT_SECTION (eg non-global symbol)
-
- .global _start
-
-# We will place the section .text at 0x1000.
-
- .text
-
-_start:
- bl bar
-
-# We will place the section .foo at 0x8001020.
-
- .section .foo, "xa"
-
-bar:
- ret
-
diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp
index 1d9b1c8..73e1a6b 100644
--- a/ld/testsuite/ld-arm/arm-elf.exp
+++ b/ld/testsuite/ld-arm/arm-elf.exp
@@ -167,10 +167,14 @@ set armelftests_common {
"-EL --fix-stm32l4xx-629360 -Ttext=0x8000" "" "-EL -mcpu=cortex-m4 -mfpu=fpv4-sp-d16" {stm32l4xx-fix-vldm.s}
{{objdump -dr stm32l4xx-fix-vldm.d}}
"stm32l4xx-fix-vldm"}
+ {"STM32L4XX erratum fix VLDM, DP registers"
+ "-EL --fix-stm32l4xx-629360 -Ttext=0x8000" "" "-EL -mcpu=cortex-m4 -mfpu=fpv4-sp-d16" {stm32l4xx-fix-vldm-dp.s}
+ {{objdump -dr stm32l4xx-fix-vldm-dp.d}}
+ "stm32l4xx-fix-vldm-dp"}
{"STM32L4XX erratum fix ALL"
"-EL --fix-stm32l4xx-629360=all -Ttext=0x8000" "" "-EL -mcpu=cortex-m4 -mfpu=fpv4-sp-d16" {stm32l4xx-fix-all.s}
{{objdump -dr stm32l4xx-fix-all.d}}
- "stm32l4xx-fix-vldm-all"}
+ "stm32l4xx-fix-all"}
{"STM32L4XX erratum fix in IT context"
"-EL --fix-stm32l4xx-629360 -Ttext=0x8000" "" "-EL -mcpu=cortex-m4 -mfpu=fpv4-sp-d16" {stm32l4xx-fix-it-block.s}
{{objdump -dr stm32l4xx-fix-it-block.d}}
diff --git a/ld/testsuite/ld-arm/stm32l4xx-fix-all.d b/ld/testsuite/ld-arm/stm32l4xx-fix-all.d
index 59f3ed1..c67f95d 100644
--- a/ld/testsuite/ld-arm/stm32l4xx-fix-all.d
+++ b/ld/testsuite/ld-arm/stm32l4xx-fix-all.d
@@ -6,37 +6,37 @@ Disassembly of section \.text:
00008000 <__stm32l4xx_veneer_0>:
8000: e899 01fe ldmia\.w r9, {r1, r2, r3, r4, r5, r6, r7, r8}
- 8004: f000 b84a b\.w 809c <__stm32l4xx_veneer_0_r>
+ 8004: f000 b86e b\.w 80e4 <__stm32l4xx_veneer_0_r>
8008: f7f0 a000 udf\.w #0
800c: f7f0 a000 udf\.w #0
00008010 <__stm32l4xx_veneer_1>:
8010: e8b9 01fe ldmia\.w r9!, {r1, r2, r3, r4, r5, r6, r7, r8}
- 8014: f000 b844 b\.w 80a0 <__stm32l4xx_veneer_1_r>
+ 8014: f000 b868 b\.w 80e8 <__stm32l4xx_veneer_1_r>
8018: f7f0 a000 udf\.w #0
801c: f7f0 a000 udf\.w #0
00008020 <__stm32l4xx_veneer_2>:
8020: e919 01fe ldmdb r9, {r1, r2, r3, r4, r5, r6, r7, r8}
- 8024: f000 b83e b\.w 80a4 <__stm32l4xx_veneer_2_r>
+ 8024: f000 b862 b\.w 80ec <__stm32l4xx_veneer_2_r>
8028: f7f0 a000 udf\.w #0
802c: f7f0 a000 udf\.w #0
00008030 <__stm32l4xx_veneer_3>:
8030: e939 01fe ldmdb r9!, {r1, r2, r3, r4, r5, r6, r7, r8}
- 8034: f000 b838 b\.w 80a8 <__stm32l4xx_veneer_3_r>
+ 8034: f000 b85c b\.w 80f0 <__stm32l4xx_veneer_3_r>
8038: f7f0 a000 udf\.w #0
803c: f7f0 a000 udf\.w #0
00008040 <__stm32l4xx_veneer_4>:
8040: e8bd 01fe ldmia\.w sp!, {r1, r2, r3, r4, r5, r6, r7, r8}
- 8044: f000 b832 b\.w 80ac <__stm32l4xx_veneer_4_r>
+ 8044: f000 b856 b\.w 80f4 <__stm32l4xx_veneer_4_r>
8048: f7f0 a000 udf\.w #0
804c: f7f0 a000 udf\.w #0
00008050 <__stm32l4xx_veneer_5>:
8050: ecd9 0a08 vldmia r9, {s1-s8}
- 8054: f000 b82c b\.w 80b0 <__stm32l4xx_veneer_5_r>
+ 8054: f000 b850 b\.w 80f8 <__stm32l4xx_veneer_5_r>
8058: f7f0 a000 udf\.w #0
805c: f7f0 a000 udf\.w #0
8060: f7f0 a000 udf\.w #0
@@ -44,7 +44,7 @@ Disassembly of section \.text:
00008068 <__stm32l4xx_veneer_6>:
8068: ecf6 4a08 vldmia r6!, {s9-s16}
- 806c: f000 b822 b\.w 80b4 <__stm32l4xx_veneer_6_r>
+ 806c: f000 b846 b\.w 80fc <__stm32l4xx_veneer_6_r>
8070: f7f0 a000 udf\.w #0
8074: f7f0 a000 udf\.w #0
8078: f7f0 a000 udf\.w #0
@@ -52,32 +52,65 @@ Disassembly of section \.text:
00008080 <__stm32l4xx_veneer_7>:
8080: ecfd 0a08 vpop {s1-s8}
- 8084: f000 b818 b\.w 80b8 <__stm32l4xx_veneer_7_r>
+ 8084: f000 b83c b\.w 8100 <__stm32l4xx_veneer_7_r>
8088: f7f0 a000 udf\.w #0
808c: f7f0 a000 udf\.w #0
8090: f7f0 a000 udf\.w #0
8094: f7f0 a000 udf\.w #0
-00008098 <_start>:
- 8098: f7ff bfb2 b\.w 8000 <__stm32l4xx_veneer_0>
+00008098 <__stm32l4xx_veneer_8>:
+ 8098: ec99 1b08 vldmia r9, {d1-d4}
+ 809c: f000 b832 b\.w 8104 <__stm32l4xx_veneer_8_r>
+ 80a0: f7f0 a000 udf\.w #0
+ 80a4: f7f0 a000 udf\.w #0
+ 80a8: f7f0 a000 udf\.w #0
+ 80ac: f7f0 a000 udf\.w #0
-0000809c <__stm32l4xx_veneer_0_r>:
- 809c: f7ff bfb8 b\.w 8010 <__stm32l4xx_veneer_1>
+000080b0 <__stm32l4xx_veneer_9>:
+ 80b0: ecb6 8b08 vldmia r6!, {d8-d11}
+ 80b4: f000 b828 b\.w 8108 <__stm32l4xx_veneer_9_r>
+ 80b8: f7f0 a000 udf\.w #0
+ 80bc: f7f0 a000 udf\.w #0
+ 80c0: f7f0 a000 udf\.w #0
+ 80c4: f7f0 a000 udf\.w #0
-000080a0 <__stm32l4xx_veneer_1_r>:
- 80a0: f7ff bfbe b\.w 8020 <__stm32l4xx_veneer_2>
+000080c8 <__stm32l4xx_veneer_a>:
+ 80c8: ecbd 1b08 vpop {d1-d4}
+ 80cc: f000 b81e b\.w 810c <__stm32l4xx_veneer_a_r>
+ 80d0: f7f0 a000 udf\.w #0
+ 80d4: f7f0 a000 udf\.w #0
+ 80d8: f7f0 a000 udf\.w #0
+ 80dc: f7f0 a000 udf\.w #0
-000080a4 <__stm32l4xx_veneer_2_r>:
- 80a4: f7ff bfc4 b\.w 8030 <__stm32l4xx_veneer_3>
+000080e0 <_start>:
+ 80e0: f7ff bf8e b\.w 8000 <__stm32l4xx_veneer_0>
-000080a8 <__stm32l4xx_veneer_3_r>:
- 80a8: f7ff bfca b\.w 8040 <__stm32l4xx_veneer_4>
+000080e4 <__stm32l4xx_veneer_0_r>:
+ 80e4: f7ff bf94 b\.w 8010 <__stm32l4xx_veneer_1>
-000080ac <__stm32l4xx_veneer_4_r>:
- 80ac: f7ff bfd0 b\.w 8050 <__stm32l4xx_veneer_5>
+000080e8 <__stm32l4xx_veneer_1_r>:
+ 80e8: f7ff bf9a b\.w 8020 <__stm32l4xx_veneer_2>
-000080b0 <__stm32l4xx_veneer_5_r>:
- 80b0: f7ff bfda b\.w 8068 <__stm32l4xx_veneer_6>
+000080ec <__stm32l4xx_veneer_2_r>:
+ 80ec: f7ff bfa0 b\.w 8030 <__stm32l4xx_veneer_3>
-000080b4 <__stm32l4xx_veneer_6_r>:
- 80b4: f7ff bfe4 b\.w 8080 <__stm32l4xx_veneer_7>
+000080f0 <__stm32l4xx_veneer_3_r>:
+ 80f0: f7ff bfa6 b\.w 8040 <__stm32l4xx_veneer_4>
+
+000080f4 <__stm32l4xx_veneer_4_r>:
+ 80f4: f7ff bfac b\.w 8050 <__stm32l4xx_veneer_5>
+
+000080f8 <__stm32l4xx_veneer_5_r>:
+ 80f8: f7ff bfb6 b\.w 8068 <__stm32l4xx_veneer_6>
+
+000080fc <__stm32l4xx_veneer_6_r>:
+ 80fc: f7ff bfc0 b\.w 8080 <__stm32l4xx_veneer_7>
+
+00008100 <__stm32l4xx_veneer_7_r>:
+ 8100: f7ff bfca b\.w 8098 <__stm32l4xx_veneer_8>
+
+00008104 <__stm32l4xx_veneer_8_r>:
+ 8104: f7ff bfd4 b\.w 80b0 <__stm32l4xx_veneer_9>
+
+00008108 <__stm32l4xx_veneer_9_r>:
+ 8108: f7ff bfde b\.w 80c8 <__stm32l4xx_veneer_a>
diff --git a/ld/testsuite/ld-arm/stm32l4xx-fix-all.s b/ld/testsuite/ld-arm/stm32l4xx-fix-all.s
index 0c18266..580e5b2 100644
--- a/ld/testsuite/ld-arm/stm32l4xx-fix-all.s
+++ b/ld/testsuite/ld-arm/stm32l4xx-fix-all.s
@@ -20,3 +20,6 @@ _start:
vldm r9, {s1-s8}
vldm r6!, {s9-s16}
vpop {s1-s8}
+ vldm r9, {d1-d4}
+ vldm r6!, {d8-d11}
+ vpop {d1-d4}
diff --git a/ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d b/ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d
new file mode 100644
index 0000000..cd7de14
--- /dev/null
+++ b/ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d
@@ -0,0 +1,49 @@
+
+.*: file format elf32-littlearm.*
+
+
+Disassembly of section \.text:
+
+00008000 <__stm32l4xx_veneer_0>:
+ 8000: ecba 1b08 vldmia sl!, {d1-d4}
+ 8004: ecba 5b08 vldmia sl!, {d5-d8}
+ 8008: ecba 9b08 vldmia sl!, {d9-d12}
+ 800c: ecba db06 vldmia sl!, {d13-d15}
+ 8010: f1aa 0a78 sub\.w sl, sl, #120 ; 0x78
+ 8014: f000 b826 b\.w 8064 <__stm32l4xx_veneer_0_r>
+
+00008018 <__stm32l4xx_veneer_1>:
+ 8018: ecb7 5b08 vldmia r7!, {d5-d8}
+ 801c: ecb7 9b08 vldmia r7!, {d9-d12}
+ 8020: ecb7 db06 vldmia r7!, {d13-d15}
+ 8024: f000 b820 b\.w 8068 <__stm32l4xx_veneer_1_r>
+ 8028: f7f0 a000 udf\.w #0
+ 802c: f7f0 a000 udf\.w #0
+
+00008030 <__stm32l4xx_veneer_2>:
+ 8030: ecbd 1b08 vpop {d1-d4}
+ 8034: ecbd 5b02 vpop {d5}
+ 8038: f000 b818 b\.w 806c <__stm32l4xx_veneer_2_r>
+ 803c: f7f0 a000 udf\.w #0
+ 8040: f7f0 a000 udf\.w #0
+ 8044: f7f0 a000 udf\.w #0
+
+00008048 <__stm32l4xx_veneer_3>:
+ 8048: ed3c 1b08 vldmdb ip!, {d1-d4}
+ 804c: ed3c 5b08 vldmdb ip!, {d5-d8}
+ 8050: ed3c 9b08 vldmdb ip!, {d9-d12}
+ 8054: ed3c db06 vldmdb ip!, {d13-d15}
+ 8058: f000 b80a b\.w 8070 <__stm32l4xx_veneer_3_r>
+ 805c: f7f0 a000 udf\.w #0
+
+00008060 <_start>:
+ 8060: f7ff bfce b\.w 8000 <__stm32l4xx_veneer_0>
+
+00008064 <__stm32l4xx_veneer_0_r>:
+ 8064: f7ff bfd8 b\.w 8018 <__stm32l4xx_veneer_1>
+
+00008068 <__stm32l4xx_veneer_1_r>:
+ 8068: f7ff bfe2 b\.w 8030 <__stm32l4xx_veneer_2>
+
+0000806c <__stm32l4xx_veneer_2_r>:
+ 806c: f7ff bfec b\.w 8048 <__stm32l4xx_veneer_3>
diff --git a/ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s b/ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s
new file mode 100644
index 0000000..7c7ce01
--- /dev/null
+++ b/ld/testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s
@@ -0,0 +1,27 @@
+ .syntax unified
+ .cpu cortex-m4
+ .fpu fpv4-sp-d16
+ .text
+ .align 1
+ .thumb
+ .thumb_func
+ .global _start
+_start:
+ @ VLDM CASE #1
+ @ vldm rx, {...}
+ @ -> vldm rx!, {8_words_or_less} for each
+ @ -> sub rx, rx, #size (list)
+ vldm r10, {d1-d15}
+
+ @ VLDM CASE #2
+ @ vldm rx!, {...}
+ @ -> vldm rx!, {8_words_or_less} for each needed 8_word
+ @ This also handles vpop instruction (when rx is sp)
+ vldm r7!, {d5-d15}
+ @ Explicit VPOP test
+ vpop {d1-d5}
+
+ @ VLDM CASE #3
+ @ vldmd rx!, {...}
+ @ -> vldmb rx!, {8_words_or_less} for each needed 8_word
+ vldmdb r12!, {d1-d15}
diff --git a/ld/testsuite/ld-arm/stm32l4xx-fix-vldm.s b/ld/testsuite/ld-arm/stm32l4xx-fix-vldm.s
index 94aa66e..b072801 100644
--- a/ld/testsuite/ld-arm/stm32l4xx-fix-vldm.s
+++ b/ld/testsuite/ld-arm/stm32l4xx-fix-vldm.s
@@ -21,6 +21,7 @@ _start:
@ Explicit VPOP test
vpop {s1-s9}
+ @ VLDM CASE #3
@ vldmd rx!, {...}
@ -> vldmb rx!, {8_words_or_less} for each needed 8_word
vldmdb r11!, {s1-s31}
diff --git a/ld/testsuite/ld-elf/compressed1b.d b/ld/testsuite/ld-elf/compressed1b.d
index 83dc60f..34dfe8e 100644
--- a/ld/testsuite/ld-elf/compressed1b.d
+++ b/ld/testsuite/ld-elf/compressed1b.d
@@ -1,7 +1,8 @@
#source: compress1.s
#as: --compress-debug-sections=zlib-gabi
-#ld: -r
+#ld: -r --compress-debug-sections=none
#readelf: -t
+#target: *-*-linux* *-*-gnu*
#failif
#...
diff --git a/ld/testsuite/ld-elf/compressed1c.d b/ld/testsuite/ld-elf/compressed1c.d
index 64f75be..29e91da 100644
--- a/ld/testsuite/ld-elf/compressed1c.d
+++ b/ld/testsuite/ld-elf/compressed1c.d
@@ -1,6 +1,6 @@
#source: compress1.s
#as: --compress-debug-sections=zlib-gabi
-#ld: -shared
+#ld: -shared --compress-debug-sections=none
#readelf: -t
#target: *-*-linux* *-*-gnu*
diff --git a/ld/testsuite/ld-elf/gabiend.rt b/ld/testsuite/ld-elf/gabiend.rt
index 23bc36c..75b5ba7 100644
--- a/ld/testsuite/ld-elf/gabiend.rt
+++ b/ld/testsuite/ld-elf/gabiend.rt
@@ -1,4 +1,4 @@
#...
+\[[0-9a-f]+\]: .*COMPRESSED
- +ZLIB, [0-9a-f]+, 1
+ +ZLIB, [0-9a-f]+, [1-9][0-9]*
#pass
diff --git a/ld/testsuite/ld-elf/gabinormal.rt b/ld/testsuite/ld-elf/gabinormal.rt
index 23bc36c..75b5ba7 100644
--- a/ld/testsuite/ld-elf/gabinormal.rt
+++ b/ld/testsuite/ld-elf/gabinormal.rt
@@ -1,4 +1,4 @@
#...
+\[[0-9a-f]+\]: .*COMPRESSED
- +ZLIB, [0-9a-f]+, 1
+ +ZLIB, [0-9a-f]+, [1-9][0-9]*
#pass
diff --git a/ld/testsuite/ld-elf/indirect.exp b/ld/testsuite/ld-elf/indirect.exp
index e8ac1ae..25845a0 100644
--- a/ld/testsuite/ld-elf/indirect.exp
+++ b/ld/testsuite/ld-elf/indirect.exp
@@ -66,7 +66,11 @@ if { ![ld_compile $CC $srcdir/$subdir/indirect1a.c tmpdir/indirect1a.o]
|| ![ld_compile $CC $srcdir/$subdir/indirect4a.c tmpdir/indirect4a.o]
|| ![ld_compile $CC $srcdir/$subdir/indirect4b.c tmpdir/indirect4b.o]
|| ![ld_compile "$CC -O2 -fPIC -I../bfd" $srcdir/$subdir/pr18720a.c tmpdir/pr18720a.o]
- || ![ld_compile $CC $srcdir/$subdir/pr18720b.c tmpdir/pr18720b.o] } {
+ || ![ld_compile $CC $srcdir/$subdir/pr18720b.c tmpdir/pr18720b.o]
+ || ![ld_compile "$CC -fPIC" $srcdir/$subdir/pr19553d.c tmpdir/pr19553d.o]
+ || ![ld_compile "$CC -fPIC" $srcdir/$subdir/pr19553c.c tmpdir/pr19553c.o]
+ || ![ld_compile "$CC -fPIC" $srcdir/$subdir/pr19553b.c tmpdir/pr19553b.o]
+ || ![ld_compile $CC $srcdir/$subdir/pr19553a.c tmpdir/pr19553a.o] } {
unresolved "Indirect symbol tests"
return
}
@@ -87,6 +91,15 @@ set build_tests {
{"Build pr18720b1.o"
"-r -nostdlib tmpdir/pr18720b.o" ""
{dummy.c} {} "pr18720b1.o"}
+ {"Build libpr19553b.so"
+ "-shared -Wl,--version-script=pr19553.map" "-fPIC"
+ {pr19553b.c} {} "libpr19553b.so"}
+ {"Build libpr19553c.so"
+ "-shared -Wl,--version-script=pr19553.map" "-fPIC"
+ {pr19553c.c} {} "libpr19553c.so"}
+ {"Build libpr19553d.so"
+ "-shared tmpdir/libpr19553c.so" "-fPIC"
+ {pr19553d.c} {} "libpr19553d.so"}
}
run_cc_link_tests $build_tests
@@ -155,6 +168,15 @@ set run_tests {
{"Run with libpr18720c.so 5"
"tmpdir/libpr18720c.so tmpdir/pr18720b1.o tmpdir/pr18720a.o" ""
{check-ptr-eq.c} "pr18720d" "pr18720.out"}
+ {"Run with libpr19553b.so"
+ "tmpdir/libpr19553b.so tmpdir/libpr19553d.so -rpath-link ." ""
+ {pr19553a.c} "pr19553b" "pr19553b.out"}
+ {"Run with libpr19553c.so"
+ "tmpdir/libpr19553c.so tmpdir/libpr19553b.so tmpdir/libpr19553d.so" ""
+ {pr19553a.c} "pr19553c" "pr19553c.out"}
+ {"Run with libpr19553d.so"
+ "tmpdir/libpr19553d.so tmpdir/libpr19553b.so -rpath-link ." ""
+ {pr19553a.c} "pr19553d" "pr19553d.out"}
}
run_ld_link_exec_tests [] $run_tests
diff --git a/ld/testsuite/ld-elf/pr19539.d b/ld/testsuite/ld-elf/pr19539.d
new file mode 100644
index 0000000..87c2b1b
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr19539.d
@@ -0,0 +1,9 @@
+#source: start.s
+#source: pr19539.s
+#ld: -pie -T pr19539.t
+#readelf : --dyn-syms --wide
+#target: *-*-linux* *-*-gnu* *-*-solaris*
+#notarget: cris*-*-*
+
+Symbol table '\.dynsym' contains [0-9]+ entries:
+#pass
diff --git a/ld/testsuite/ld-elf/pr19539.s b/ld/testsuite/ld-elf/pr19539.s
new file mode 100644
index 0000000..0f55d3f
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr19539.s
@@ -0,0 +1,2 @@
+ .section .prefix,"a",%progbits
+ .dc.a foo
diff --git a/ld/testsuite/ld-elf/pr19539.t b/ld/testsuite/ld-elf/pr19539.t
new file mode 100644
index 0000000..b6b48e7
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr19539.t
@@ -0,0 +1 @@
+HIDDEN (foo = .);
diff --git a/ld/testsuite/ld-elf/pr19553.map b/ld/testsuite/ld-elf/pr19553.map
new file mode 100644
index 0000000..f2c03ac
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr19553.map
@@ -0,0 +1,5 @@
+FOO
+{
+global:
+ foo;
+};
diff --git a/ld/testsuite/ld-elf/pr19553a.c b/ld/testsuite/ld-elf/pr19553a.c
new file mode 100644
index 0000000..f1cb6b4
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr19553a.c
@@ -0,0 +1,8 @@
+extern void foo (void);
+
+int
+main (void)
+{
+ foo ();
+ return 0;
+}
diff --git a/ld/testsuite/ld-elf/pr19553b.c b/ld/testsuite/ld-elf/pr19553b.c
new file mode 100644
index 0000000..0c438a2
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr19553b.c
@@ -0,0 +1,8 @@
+#include <stdio.h>
+
+__attribute__ ((weak))
+void
+foo (void)
+{
+ printf ("pr19553b\n");
+}
diff --git a/ld/testsuite/ld-elf/pr19553b.out b/ld/testsuite/ld-elf/pr19553b.out
new file mode 100644
index 0000000..a5575d9
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr19553b.out
@@ -0,0 +1 @@
+pr19553b
diff --git a/ld/testsuite/ld-elf/pr19553c.c b/ld/testsuite/ld-elf/pr19553c.c
new file mode 100644
index 0000000..d80dfc9
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr19553c.c
@@ -0,0 +1,9 @@
+#include <stdio.h>
+
+void
+foo (void)
+{
+ printf ("pr19553c\n");
+}
+
+asm (".symver foo,foo@FOO");
diff --git a/ld/testsuite/ld-elf/pr19553c.out b/ld/testsuite/ld-elf/pr19553c.out
new file mode 100644
index 0000000..9d23215
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr19553c.out
@@ -0,0 +1 @@
+pr19553c
diff --git a/ld/testsuite/ld-elf/pr19553d.c b/ld/testsuite/ld-elf/pr19553d.c
new file mode 100644
index 0000000..d48f8f3
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr19553d.c
@@ -0,0 +1,8 @@
+#include <stdio.h>
+
+__attribute__ ((weak))
+void
+foo (void)
+{
+ printf ("pr19553d\n");
+}
diff --git a/ld/testsuite/ld-elf/pr19553d.out b/ld/testsuite/ld-elf/pr19553d.out
new file mode 100644
index 0000000..2b4cf0b
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr19553d.out
@@ -0,0 +1 @@
+pr19553d
diff --git a/ld/testsuite/ld-elf/pr19579a.c b/ld/testsuite/ld-elf/pr19579a.c
new file mode 100644
index 0000000..e4a6eb1
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr19579a.c
@@ -0,0 +1,15 @@
+#include <stdio.h>
+
+int foo[1];
+int bar[2];
+
+extern int *foo_p (void);
+extern int *bar_p (void);
+
+int
+main ()
+{
+ if (foo[0] == 0 && foo == foo_p () && bar[0] == 0 && bar == bar_p ())
+ printf ("PASS\n");
+ return 0;
+}
diff --git a/ld/testsuite/ld-elf/pr19579b.c b/ld/testsuite/ld-elf/pr19579b.c
new file mode 100644
index 0000000..d906545
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr19579b.c
@@ -0,0 +1,14 @@
+int foo[2];
+int bar[2] = { -1, -1 };
+
+int *
+foo_p (void)
+{
+ return foo;
+}
+
+int *
+bar_p (void)
+{
+ return bar;
+}
diff --git a/ld/testsuite/ld-elf/pr19698.d b/ld/testsuite/ld-elf/pr19698.d
new file mode 100644
index 0000000..a39f67a
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr19698.d
@@ -0,0 +1,10 @@
+#ld: -shared $srcdir/$subdir/pr19698.t
+#readelf : --dyn-syms --wide
+#target: *-*-linux* *-*-gnu* *-*-solaris*
+
+Symbol table '\.dynsym' contains [0-9]+ entries:
+#...
+ +[0-9]+: +[0-9a-f]+ +[0-9a-f]+ +FUNC +GLOBAL +DEFAULT +[0-9]+ +foo@VERS.1
+#...
+ +[0-9]+: +[0-9a-f]+ +[0-9a-f]+ +FUNC +GLOBAL +DEFAULT +[0-9]+ +foo@@VERS.2
+#pass
diff --git a/ld/testsuite/ld-elf/pr19698.s b/ld/testsuite/ld-elf/pr19698.s
new file mode 100644
index 0000000..875dca4
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr19698.s
@@ -0,0 +1,5 @@
+ .text
+ .globl foo
+ .type foo, %function
+foo:
+ .byte 0
diff --git a/ld/testsuite/ld-elf/pr19698.t b/ld/testsuite/ld-elf/pr19698.t
new file mode 100644
index 0000000..09d9125
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr19698.t
@@ -0,0 +1,11 @@
+"foo@VERS.1" = foo;
+
+VERSION {
+VERS.2 {
+ global:
+ foo;
+};
+
+VERS.1 {
+};
+}
diff --git a/ld/testsuite/ld-elf/shared.exp b/ld/testsuite/ld-elf/shared.exp
index 731eef3..b8c12cb 100644
--- a/ld/testsuite/ld-elf/shared.exp
+++ b/ld/testsuite/ld-elf/shared.exp
@@ -524,6 +524,21 @@ if { [istarget *-*-linux*]
{} \
"libpr2404b.a" \
] \
+ [list \
+ "Build pr19579a.o" \
+ "" "-fPIE" \
+ {pr19579a.c} \
+ {} \
+ "libpr19579a.a" \
+ ] \
+ [list \
+ "Build libpr19579.so" \
+ "-shared" \
+ "-fPIC" \
+ {pr19579b.c} \
+ {} \
+ "libpr19579.so" \
+ ] \
]
run_ld_link_exec_tests [] [list \
[list \
@@ -580,5 +595,14 @@ if { [istarget *-*-linux*]
"pass.out" \
"-O2 -fPIC -I../bfd" \
] \
+ [list \
+ "Run pr19579" \
+ "-pie -z text tmpdir/pr19579a.o tmpdir/libpr19579.so" \
+ "" \
+ {dummy.c} \
+ "pr19579" \
+ "pass.out" \
+ "-fPIE" \
+ ] \
]
}
diff --git a/ld/testsuite/ld-elfvsb/elfvsb.exp b/ld/testsuite/ld-elfvsb/elfvsb.exp
index e02d4fa..4766d0e 100644
--- a/ld/testsuite/ld-elfvsb/elfvsb.exp
+++ b/ld/testsuite/ld-elfvsb/elfvsb.exp
@@ -62,6 +62,7 @@ if ![isnative] then {return}
set tmpdir tmpdir
set SHCFLAG ""
set shared_needs_pic "no"
+set COMPRESS_LDFLAG "-Wl,--compress-debug-sections=zlib-gabi"
if { [istarget rs6000*-*-aix*] || [istarget powerpc*-*-aix*] } {
@@ -228,6 +229,7 @@ proc visibility_run {visibility} {
global support_protected
global shared_needs_pic
global PLT_CFLAGS
+ global COMPRESS_LDFLAG
if [ string match $visibility "hidden" ] {
set VSBCFLAG "-DHIDDEN_TEST"
@@ -384,7 +386,7 @@ proc visibility_run {visibility} {
} else { if { [istarget rs6000*-*-aix*] || [istarget powerpc*-*-aix*] } {
visibility_test $visibility vp "visibility ($visibility)" mainnp.o sh1p.o sh2p.o xcoff
} else {
- visibility_test $visibility vp "visibility ($visibility)" mainnp.o sh1p.o sh2p.o elfvsb
+ visibility_test $visibility vp "visibility ($visibility)" mainnp.o sh1p.o sh2p.o elfvsb $COMPRESS_LDFLAG
} }
}
}}
diff --git a/ld/testsuite/ld-i386/branch1.d b/ld/testsuite/ld-i386/branch1.d
index a078f1d..81b069e 100644
--- a/ld/testsuite/ld-i386/branch1.d
+++ b/ld/testsuite/ld-i386/branch1.d
@@ -1,4 +1,4 @@
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -melf_i386
#objdump: -dw
diff --git a/ld/testsuite/ld-i386/call1.d b/ld/testsuite/ld-i386/call1.d
index 69383b2..e3ebedc 100644
--- a/ld/testsuite/ld-i386/call1.d
+++ b/ld/testsuite/ld-i386/call1.d
@@ -1,3 +1,3 @@
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -shared -melf_i386
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
diff --git a/ld/testsuite/ld-i386/call2.d b/ld/testsuite/ld-i386/call2.d
index 69383b2..e3ebedc 100644
--- a/ld/testsuite/ld-i386/call2.d
+++ b/ld/testsuite/ld-i386/call2.d
@@ -1,3 +1,3 @@
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -shared -melf_i386
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
diff --git a/ld/testsuite/ld-i386/call3a.d b/ld/testsuite/ld-i386/call3a.d
index a8ff27f..5a1e1df 100644
--- a/ld/testsuite/ld-i386/call3a.d
+++ b/ld/testsuite/ld-i386/call3a.d
@@ -1,5 +1,5 @@
#source: call3.s
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -melf_i386
#objdump: -dw
diff --git a/ld/testsuite/ld-i386/call3b.d b/ld/testsuite/ld-i386/call3b.d
index 06af6f5..de98ce4 100644
--- a/ld/testsuite/ld-i386/call3b.d
+++ b/ld/testsuite/ld-i386/call3b.d
@@ -1,5 +1,5 @@
#source: call3.s
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -z call-nop=prefix-addr
#objdump: -dw
diff --git a/ld/testsuite/ld-i386/call3c.d b/ld/testsuite/ld-i386/call3c.d
index 64e8372..0fdbee4 100644
--- a/ld/testsuite/ld-i386/call3c.d
+++ b/ld/testsuite/ld-i386/call3c.d
@@ -1,5 +1,5 @@
#source: call3.s
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -z call-nop=prefix-nop
#objdump: -dw
diff --git a/ld/testsuite/ld-i386/call3d.d b/ld/testsuite/ld-i386/call3d.d
index a9274c8..4d965b3 100644
--- a/ld/testsuite/ld-i386/call3d.d
+++ b/ld/testsuite/ld-i386/call3d.d
@@ -1,5 +1,5 @@
#source: call3.s
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -z call-nop=suffix-nop
#objdump: -dw
diff --git a/ld/testsuite/ld-i386/call3e.d b/ld/testsuite/ld-i386/call3e.d
index 2876b49..608682c 100644
--- a/ld/testsuite/ld-i386/call3e.d
+++ b/ld/testsuite/ld-i386/call3e.d
@@ -1,5 +1,5 @@
#source: call3.s
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -z call-nop=prefix-0x67
#objdump: -dw
diff --git a/ld/testsuite/ld-i386/call3f.d b/ld/testsuite/ld-i386/call3f.d
index 5ab0cf1..f3a4869 100644
--- a/ld/testsuite/ld-i386/call3f.d
+++ b/ld/testsuite/ld-i386/call3f.d
@@ -1,5 +1,5 @@
#source: call3.s
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -z call-nop=prefix-0x90
#objdump: -dw
diff --git a/ld/testsuite/ld-i386/call3g.d b/ld/testsuite/ld-i386/call3g.d
index 8287770..f3e3f36 100644
--- a/ld/testsuite/ld-i386/call3g.d
+++ b/ld/testsuite/ld-i386/call3g.d
@@ -1,5 +1,5 @@
#source: call3.s
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -z call-nop=suffix-0x90
#objdump: -dw
diff --git a/ld/testsuite/ld-i386/call3h.d b/ld/testsuite/ld-i386/call3h.d
index 83f371a..afd1ce8 100644
--- a/ld/testsuite/ld-i386/call3h.d
+++ b/ld/testsuite/ld-i386/call3h.d
@@ -1,5 +1,5 @@
#source: call3.s
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -z call-nop=suffix-144
#objdump: -dw
diff --git a/ld/testsuite/ld-i386/got1.dd b/ld/testsuite/ld-i386/got1.dd
index e46153d..e6e82de 100644
--- a/ld/testsuite/ld-i386/got1.dd
+++ b/ld/testsuite/ld-i386/got1.dd
@@ -10,6 +10,8 @@
[ ]*[a-f0-9]+: ff d0 call \*%eax
[ ]*[a-f0-9]+: [ a-f0-9]+ mov *0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: ff d0 call \*%eax
+[ ]*[a-f0-9]+: [ a-f0-9]+ call [a-f0-9]+ <__x86.get_pc_thunk.cx>
+[ ]*[a-f0-9]+: [ a-f0-9]+ add \$0x[a-f0-9]+,%ecx
[ ]*[a-f0-9]+: [ a-f0-9]+ lea *0x[a-f0-9]+,%ecx
[ ]*[a-f0-9]+: ff d1 call \*%ecx
[ ]*[a-f0-9]+: 83 ec 0c sub \$0xc,%esp
diff --git a/ld/testsuite/ld-i386/got1a.S b/ld/testsuite/ld-i386/got1a.S
index f3d5330..7a3f7b5 100644
--- a/ld/testsuite/ld-i386/got1a.S
+++ b/ld/testsuite/ld-i386/got1a.S
@@ -12,10 +12,19 @@ main:
call *%eax
movl plt@GOT, %eax
call *%eax
- movl foo@GOT(%ebx), %ecx
+ call __x86.get_pc_thunk.cx
+ addl $_GLOBAL_OFFSET_TABLE_, %ecx
+ movl foo@GOT(%ecx), %ecx
call *%ecx
subl $12, %esp
pushl $0
pushl $0 # Push a dummy return address onto stack.
jmp *myexit@GOT
.size main, .-main
+ .section .text.__x86.get_pc_thunk.cx,"axG",@progbits,__x86.get_pc_thunk.cx,comdat
+ .globl __x86.get_pc_thunk.cx
+ .hidden __x86.get_pc_thunk.cx
+ .type __x86.get_pc_thunk.cx, @function
+__x86.get_pc_thunk.cx:
+ movl (%esp), %ecx
+ ret
diff --git a/ld/testsuite/ld-i386/got1d.S b/ld/testsuite/ld-i386/got1d.S
index a6d51c6..7e4c9b1 100644
--- a/ld/testsuite/ld-i386/got1d.S
+++ b/ld/testsuite/ld-i386/got1d.S
@@ -19,7 +19,6 @@ plt:
pushl %esi
pushl %ebx
call __x86.get_pc_thunk.bx
-1:
addl $_GLOBAL_OFFSET_TABLE_, %ebx
subl $20, %esp
leal __FUNCTION__.1866@GOTOFF(%ebx), %esi
diff --git a/ld/testsuite/ld-i386/i386.exp b/ld/testsuite/ld-i386/i386.exp
index fb1d3ea..be45649 100644
--- a/ld/testsuite/ld-i386/i386.exp
+++ b/ld/testsuite/ld-i386/i386.exp
@@ -195,6 +195,14 @@ set i386tests {
"--32" {pr17709a.s} {} "libpr17709.so"}
{"PR ld/17709 (2)" "-melf_i386 tmpdir/libpr17709.so" ""
"--32" {pr17709b.s} {{readelf -r pr17709.rd}} "pr17709"}
+ {"Build pr19827a.o" "" ""
+ "--32" { pr19827a.S }}
+ {"Build pr19827b.so" "-melf_i386 -shared" ""
+ "--32" { pr19827b.S } {} "pr19827b.so"}
+ {"Build pr19827" "-melf_i386 -pie tmpdir/pr19827a.o tmpdir/pr19827b.so" ""
+ "--32" { dummy.s } {{readelf {-rW} pr19827.rd}} "pr19827"}
+ {"Build pr19827.so" "-melf_i386 -shared -Bsymbolic" ""
+ "--32" { pr19827a.S } {{readelf {-rW} pr19827.rd}} "pr19827.so"}
}
# So as to avoid rewriting every last test case here in a nacl variant,
@@ -319,6 +327,8 @@ run_dump_test "load5a"
run_dump_test "load5b"
run_dump_test "load6"
run_dump_test "pr19175"
+run_dump_test "pr19615"
+run_dump_test "pr20117"
if { !([istarget "i?86-*-linux*"]
|| [istarget "i?86-*-gnu*"]
@@ -357,7 +367,7 @@ if { [isnative]
[list \
"Build libplt-main1.a" \
"" \
- "-fPIC" \
+ "-fPIC -Wa,-mrelax-relocations=yes" \
{ plt-main1.c } \
{{readelf {-Wr} plt-main1.rd}} \
"libplt-main1.a" \
@@ -365,7 +375,7 @@ if { [isnative]
[list \
"Build libplt-main2.a" \
"" \
- "-fPIC" \
+ "-fPIC -Wa,-mrelax-relocations=yes" \
{ plt-main2.c } \
{{readelf {-Wr} plt-main2.rd}} \
"libplt-main2.a" \
@@ -373,7 +383,7 @@ if { [isnative]
[list \
"Build libplt-main3.a" \
"" \
- "-fPIC $PLT_CFLAGS" \
+ "-fPIC -Wa,-mrelax-relocations=yes $PLT_CFLAGS" \
{ plt-main3.c } \
{{readelf {-Wr} plt-main3.rd}} \
"libplt-main3.a" \
@@ -381,7 +391,7 @@ if { [isnative]
[list \
"Build libplt-main4.a" \
"" \
- "-fPIC $PLT_CFLAGS" \
+ "-fPIC -Wa,-mrelax-relocations=yes $PLT_CFLAGS" \
{ plt-main4.c } \
{{readelf {-Wr} plt-main4.rd}} \
"libplt-main4.a" \
@@ -413,18 +423,26 @@ if { [isnative]
"copyreloc-lib.so" \
] \
[list \
- "Build copyreloc-main with PIE and GOTOFF (1)" \
- "tmpdir/copyreloc-lib.so -pie" \
+ "Build libcopyreloc-main.a" \
+ "" \
"" \
{ copyreloc-main.S } \
+ {} \
+ "libcopyreloc-main.a" \
+ ] \
+ [list \
+ "Build copyreloc-main with PIE and GOTOFF (1)" \
+ "tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \
+ "" \
+ { dummy.s } \
{{readelf {-Wr} copyreloc-main1.rd}} \
"copyreloc-main" \
] \
[list \
"Build copyreloc-main with PIE and GOTOFF (2)" \
- "tmpdir/copyreloc-lib.so -pie" \
+ "tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \
"" \
- { copyreloc-main.S } \
+ { dummy.s } \
{{readelf {-Wr} copyreloc-main2.rd}} \
"copyreloc-main" \
] \
@@ -501,18 +519,26 @@ if { [isnative]
"pr18900.so" \
] \
[list \
- "Build pr18900a" \
- "tmpdir/pr18900.so" \
+ "Build pr18900.o" \
+ "-r -nostdlib" \
"" \
{ pr18900b.c pr18900c.c } \
+ "" \
+ "pr18900.o" \
+ ] \
+ [list \
+ "Build pr18900a" \
+ "tmpdir/pr18900.o tmpdir/pr18900.so" \
+ "" \
+ { dummy.s } \
{{readelf {-Wrd} pr18900a.rd}} \
"pr18900a" \
] \
[list \
"Build pr18900b" \
- "tmpdir/pr18900.so" \
+ "-Wl,--as-needed tmpdir/pr18900.o tmpdir/pr18900.so" \
"" \
- { pr18900b.c pr18900c.c } \
+ { dummy.s } \
{{readelf {-Wrd} pr18900b.rd}} \
"pr18900b" \
] \
@@ -533,10 +559,18 @@ if { [isnative]
"got1d.so" \
] \
[list \
- "Build gotpc1" \
- "tmpdir/got1d.so" \
+ "Build gotpc1.o" \
+ "-r -nostdlib" \
"" \
{ got1a.S got1b.c got1c.c } \
+ "" \
+ "gotpc1.o" \
+ ] \
+ [list \
+ "Build gotpc1" \
+ "-Wl,--as-needed tmpdir/gotpc1.o tmpdir/got1d.so" \
+ "-Wa,-mrelax-relocations=yes" \
+ { dummy.s } \
{{objdump {-dw} got1.dd}} \
"got1" \
] \
@@ -580,9 +614,9 @@ if { [isnative]
] \
[list \
"Run copyreloc-main with PIE and GOTOFF" \
- "tmpdir/copyreloc-lib.so -pie" \
+ "--as-needed tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \
"" \
- { copyreloc-main.S } \
+ { dummy.s } \
"copyreloc-main" \
"copyreloc-main.out" \
] \
@@ -612,9 +646,9 @@ if { [isnative]
] \
[list \
"Run pr18900" \
- "tmpdir/pr18900.so" \
+ "tmpdir/pr18900.o tmpdir/pr18900.so" \
"" \
- { pr18900b.c pr18900c.c } \
+ { dummy.s } \
"pr18900" \
"pr18900.out" \
] \
diff --git a/ld/testsuite/ld-i386/jmp1.d b/ld/testsuite/ld-i386/jmp1.d
index 69383b2..e3ebedc 100644
--- a/ld/testsuite/ld-i386/jmp1.d
+++ b/ld/testsuite/ld-i386/jmp1.d
@@ -1,3 +1,3 @@
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -shared -melf_i386
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
diff --git a/ld/testsuite/ld-i386/jmp2.d b/ld/testsuite/ld-i386/jmp2.d
index 69383b2..e3ebedc 100644
--- a/ld/testsuite/ld-i386/jmp2.d
+++ b/ld/testsuite/ld-i386/jmp2.d
@@ -1,3 +1,3 @@
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -shared -melf_i386
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
diff --git a/ld/testsuite/ld-i386/lea1c.d b/ld/testsuite/ld-i386/lea1c.d
index dd76258..0c3580d 100644
--- a/ld/testsuite/ld-i386/lea1c.d
+++ b/ld/testsuite/ld-i386/lea1c.d
@@ -1,5 +1,5 @@
#source: lea1.s
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -melf_i386
#objdump: -dw
diff --git a/ld/testsuite/ld-i386/load1.d b/ld/testsuite/ld-i386/load1.d
index 062ea18..a252a15 100644
--- a/ld/testsuite/ld-i386/load1.d
+++ b/ld/testsuite/ld-i386/load1.d
@@ -1,4 +1,4 @@
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -melf_i386
#objdump: -dw --sym
#notarget: i?86-*-nacl* x86_64-*-nacl*
diff --git a/ld/testsuite/ld-i386/load2.d b/ld/testsuite/ld-i386/load2.d
index 87c2509..467fee0 100644
--- a/ld/testsuite/ld-i386/load2.d
+++ b/ld/testsuite/ld-i386/load2.d
@@ -1,3 +1,3 @@
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -shared
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
diff --git a/ld/testsuite/ld-i386/load3.d b/ld/testsuite/ld-i386/load3.d
index 87c2509..467fee0 100644
--- a/ld/testsuite/ld-i386/load3.d
+++ b/ld/testsuite/ld-i386/load3.d
@@ -1,3 +1,3 @@
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -melf_i386 -shared
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
diff --git a/ld/testsuite/ld-i386/load4a.d b/ld/testsuite/ld-i386/load4a.d
index 3aa56bd..f3f02ea 100644
--- a/ld/testsuite/ld-i386/load4a.d
+++ b/ld/testsuite/ld-i386/load4a.d
@@ -1,4 +1,4 @@
#source: load4.s
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -Bsymbolic -shared -melf_i386
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
diff --git a/ld/testsuite/ld-i386/load5a.d b/ld/testsuite/ld-i386/load5a.d
index 88c225a..9744316 100644
--- a/ld/testsuite/ld-i386/load5a.d
+++ b/ld/testsuite/ld-i386/load5a.d
@@ -1,4 +1,4 @@
#source: load5.s
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -Bsymbolic -shared -melf_i386
#error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object
diff --git a/ld/testsuite/ld-i386/mov2b.d b/ld/testsuite/ld-i386/mov2b.d
index ea5dd9b..295a7c5 100644
--- a/ld/testsuite/ld-i386/mov2b.d
+++ b/ld/testsuite/ld-i386/mov2b.d
@@ -1,5 +1,5 @@
#source: mov2.s
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -pie -melf_i386
#objdump: -dw
diff --git a/ld/testsuite/ld-i386/mov3.d b/ld/testsuite/ld-i386/mov3.d
index 17da244..4ce5cd8 100644
--- a/ld/testsuite/ld-i386/mov3.d
+++ b/ld/testsuite/ld-i386/mov3.d
@@ -1,4 +1,4 @@
-#as: --32
+#as: --32 -mrelax-relocations=yes
#ld: -melf_i386
#objdump: -dw
diff --git a/ld/testsuite/ld-i386/pr19615.d b/ld/testsuite/ld-i386/pr19615.d
new file mode 100644
index 0000000..86aebd1
--- /dev/null
+++ b/ld/testsuite/ld-i386/pr19615.d
@@ -0,0 +1,13 @@
+#as: --32
+#ld: -pie -Bsymbolic -E -melf_i386
+#readelf: -r --wide --dyn-syms
+
+Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
+ Offset Info Type Sym. Value Symbol's Name
+[0-9a-f]+ +[0-9a-f]+ +R_386_RELATIVE +
+
+Symbol table '.dynsym' contains [0-9]+ entries:
+ Num: Value Size Type Bind Vis Ndx Name
+#...
+[ ]*[a-f0-9]+: [a-f0-9]+ 0 FUNC GLOBAL DEFAULT [a-f0-9]+ xyzzy
+#...
diff --git a/ld/testsuite/ld-i386/pr19615.s b/ld/testsuite/ld-i386/pr19615.s
new file mode 100644
index 0000000..1d85926
--- /dev/null
+++ b/ld/testsuite/ld-i386/pr19615.s
@@ -0,0 +1,13 @@
+ .text
+ .globl _start
+ .type _start, @function
+_start:
+ ret
+
+ .globl xyzzy /* This symbol should be exported */
+ .type xyzzy, @function
+xyzzy:
+ ret
+
+ .section ".xyzzy_ptr","aw",%progbits
+ .dc.a xyzzy
diff --git a/ld/testsuite/ld-i386/pr19827-nacl.rd b/ld/testsuite/ld-i386/pr19827-nacl.rd
new file mode 100644
index 0000000..5d2a885
--- /dev/null
+++ b/ld/testsuite/ld-i386/pr19827-nacl.rd
@@ -0,0 +1,5 @@
+#readelf: -r --wide
+
+Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
+ Offset Info Type Sym. Value Symbol's Name
+[0-9a-f]+ +[0-9a-f]+ +R_386_RELATIVE +
diff --git a/ld/testsuite/ld-i386/pr19827.rd b/ld/testsuite/ld-i386/pr19827.rd
new file mode 100644
index 0000000..5d2a885
--- /dev/null
+++ b/ld/testsuite/ld-i386/pr19827.rd
@@ -0,0 +1,5 @@
+#readelf: -r --wide
+
+Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
+ Offset Info Type Sym. Value Symbol's Name
+[0-9a-f]+ +[0-9a-f]+ +R_386_RELATIVE +
diff --git a/ld/testsuite/ld-i386/pr19827a.S b/ld/testsuite/ld-i386/pr19827a.S
new file mode 100644
index 0000000..cdf1d4b
--- /dev/null
+++ b/ld/testsuite/ld-i386/pr19827a.S
@@ -0,0 +1,8 @@
+ .text
+ .global _start
+_start:
+ .dc.a foo
+ .data
+ .globl foo
+foo:
+ .byte 0
diff --git a/ld/testsuite/ld-i386/pr19827b.S b/ld/testsuite/ld-i386/pr19827b.S
new file mode 100644
index 0000000..bb46e1d
--- /dev/null
+++ b/ld/testsuite/ld-i386/pr19827b.S
@@ -0,0 +1,2 @@
+ .data
+ .dc.a foo
diff --git a/ld/testsuite/ld-i386/pr20117.d b/ld/testsuite/ld-i386/pr20117.d
new file mode 100644
index 0000000..59c77ee
--- /dev/null
+++ b/ld/testsuite/ld-i386/pr20117.d
@@ -0,0 +1,12 @@
+#as: --32
+#ld: -melf_i386
+#objdump: -dw
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+[a-f0-9]+ <_start>:
+[ ]*[a-f0-9]+: eb 8b jmp [a-f0-9]+ <_start\-0x[a-f0-9]+>
+[ ]*[a-f0-9]+: bd ([0-9a-f]{2} ){4} * mov \$0x[a-f0-9]+\,%ebp
diff --git a/ld/testsuite/ld-i386/pr20117.s b/ld/testsuite/ld-i386/pr20117.s
new file mode 100644
index 0000000..de2dd28
--- /dev/null
+++ b/ld/testsuite/ld-i386/pr20117.s
@@ -0,0 +1,7 @@
+ .comm DEBUGLEVEL,4,4
+ .text
+ .globl _start
+ .type _start, @function
+_start:
+ .byte 0xeb, 0x8b
+ movl $DEBUGLEVEL@GOT, %ebp
diff --git a/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d b/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d
index 53ccd5a..ae75487 100644
--- a/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d
+++ b/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d
@@ -1,4 +1,4 @@
-#as: --64
+#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64
#objdump: -dw
#target: x86_64-*-*
diff --git a/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d b/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d
index 53ccd5a..ae75487 100644
--- a/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d
+++ b/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d
@@ -1,4 +1,4 @@
-#as: --64
+#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64
#objdump: -dw
#target: x86_64-*-*
diff --git a/ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d b/ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d
index 18021e7..2ce53a9 100644
--- a/ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d
+++ b/ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d
@@ -1,5 +1,5 @@
#source: ifunc-5-local-x86-64.s
-#as: --64
+#as: --64 -mrelax-relocations=yes
#ld: -r -melf_x86_64
#readelf: -r --wide
#target: x86_64-*-*
diff --git a/ld/testsuite/ld-plugin/lto.exp b/ld/testsuite/ld-plugin/lto.exp
index 81e72b4..982ffee 100644
--- a/ld/testsuite/ld-plugin/lto.exp
+++ b/ld/testsuite/ld-plugin/lto.exp
@@ -400,9 +400,20 @@ if { [at_least_gcc_version 4 7] } {
|| [istarget "x86_64-*-linux*"]
|| [istarget "amd64-*-linux*"]) } {
set testname "PR ld/12365"
- set exec_output [run_host_cmd "$CC" "-O2 -flto -flto-partition=none -fuse-linker-plugin tmpdir/pr12365a.o tmpdir/pr12365b.o tmpdir/pr12365c.o"]
+ set exec_output [run_host_cmd "$CC" "-O2 -flto -flto-partition=none -fuse-linker-plugin -o tmpdir/pr12365 tmpdir/pr12365a.o tmpdir/pr12365b.o tmpdir/pr12365c.o"]
if { [ regexp "undefined reference to `my_bcopy'" $exec_output ] } {
+ # Linker should catch the reference to undefined `my_bcopy'
+ # error caused by a GCC bug.
pass $testname
+ } elseif { [ string match "" $exec_output ] } {
+ global READELF
+ set exec_output [run_host_cmd "$READELF" "-s -W tmpdir/pr12365"]
+ if { [ regexp "my_bcopy" $exec_output ] } {
+ # Verify that there is no `my_bcopy' symbol in executable.
+ fail $testname
+ } {
+ pass $testname
+ }
} {
fail $testname
}
diff --git a/ld/testsuite/ld-powerpc/powerpc.exp b/ld/testsuite/ld-powerpc/powerpc.exp
index efb4026..6f9c8ed 100644
--- a/ld/testsuite/ld-powerpc/powerpc.exp
+++ b/ld/testsuite/ld-powerpc/powerpc.exp
@@ -138,6 +138,11 @@ set ppcelftests {
{"TLS32 opt 4" "-melf32ppc" "" "-a32" {tlsopt4_32.s tlslib32.s}
{{objdump -dr tlsopt4_32.d}}
"tlsopt4_32"}
+ {"TLS32 DLL" "-shared -melf32ppc --version-script tlsdll.ver" "" "-a32" {tlsdll_32.s}
+ {} "tlsdll32.so"}
+ {"TLS32 opt 5" "-melf32ppc --gc-sections --secure-plt tmpdir/tlsdll32.so" "" "-a32" {tlsopt5_32.s}
+ {{objdump -dr tlsopt5_32.d}}
+ "tlsopt5_32"}
{"Shared library with global symbol" "-shared -melf32ppc" "" "-a32" {sdalib.s}
{} "sdalib.so"}
{"Dynamic application with SDA" "-melf32ppc tmpdir/sdalib.so" "" "-a32" {sdadyn.s}
@@ -203,6 +208,11 @@ set ppc64elftests {
{"TLS opt 4" "-melf64ppc" "" "-a64" {tlsopt4.s tlslib.s}
{{objdump -dr tlsopt4.d}}
"tlsopt4"}
+ {"TLS DLL" "-shared -melf64ppc --version-script tlsdll.ver" "" "-a64" {tlsdll.s}
+ {} "tlsdll.so"}
+ {"TLS opt 5" "-melf64ppc --gc-sections tmpdir/tlsdll.so" "" "-a64" {tlsopt5.s}
+ {{objdump -dr tlsopt5.d}}
+ "tlsopt5"}
{"sym@tocbase" "-shared -melf64ppc" "" "-a64" {symtocbase-1.s symtocbase-2.s}
{{objdump -dj.data symtocbase.d}} "symtocbase.so"}
{"TOC opt" "-melf64ppc" "" "-a64" {tocopt.s}
diff --git a/ld/testsuite/ld-powerpc/tlsdll.s b/ld/testsuite/ld-powerpc/tlsdll.s
new file mode 100644
index 0000000..5620080
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/tlsdll.s
@@ -0,0 +1,19 @@
+ .abiversion 2
+ .global __tls_get_addr,__tls_get_addr_opt,gd,ld
+ .type __tls_get_addr,@function
+ .type __tls_get_addr_opt,@function
+
+ .text
+__tls_get_addr:
+__tls_get_addr_opt:
+ blr
+ .size __tls_get_addr,. - __tls_get_addr
+ .size __tls_get_addr_opt,. - __tls_get_addr_opt
+
+ .section ".tbss","awT",@nobits
+ .p2align 3
+gd: .space 8
+
+ .section ".tdata","awT",@progbits
+ .p2align 2
+ld: .long 0xc0ffee
diff --git a/ld/testsuite/ld-powerpc/tlsdll.ver b/ld/testsuite/ld-powerpc/tlsdll.ver
new file mode 100644
index 0000000..d9439f7
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/tlsdll.ver
@@ -0,0 +1,7 @@
+GLIBC_2.3 {
+ __tls_get_addr;
+};
+
+GLIBC_2.22 {
+ __tls_get_addr_opt;
+} GLIBC_2.3;
diff --git a/ld/testsuite/ld-powerpc/tlsdll_32.s b/ld/testsuite/ld-powerpc/tlsdll_32.s
new file mode 100644
index 0000000..0f68c21
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/tlsdll_32.s
@@ -0,0 +1,18 @@
+ .global __tls_get_addr,__tls_get_addr_opt,gd,ld
+ .type __tls_get_addr,@function
+ .type __tls_get_addr_opt,@function
+
+ .text
+__tls_get_addr:
+__tls_get_addr_opt:
+ blr
+ .size __tls_get_addr,. - __tls_get_addr
+ .size __tls_get_addr_opt,. - __tls_get_addr_opt
+
+ .section ".tbss","awT",@nobits
+ .p2align 2
+gd: .space 4
+
+ .section ".tdata","awT",@progbits
+ .p2align 2
+ld: .long 0xc0ffee
diff --git a/ld/testsuite/ld-powerpc/tlsopt5.d b/ld/testsuite/ld-powerpc/tlsopt5.d
new file mode 100644
index 0000000..7b17130
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/tlsopt5.d
@@ -0,0 +1,54 @@
+#source: tlsopt5.s
+#as: -a64
+#ld: --gc-sections tlsdll.so
+#objdump: -dr
+#target: powerpc64*-*-*
+
+.*
+
+Disassembly of section \.text:
+
+0000000010000300 <.*\.plt_call\.__tls_get_addr_opt@@GLIBC_2\.22>:
+.*: (00 00 63 e9|e9 63 00 00) ld r11,0\(r3\)
+.*: (08 00 83 e9|e9 83 00 08) ld r12,8\(r3\)
+.*: (78 1b 60 7c|7c 60 1b 78) mr r0,r3
+.*: (00 00 2b 2c|2c 2b 00 00) cmpdi r11,0
+.*: (14 6a 6c 7c|7c 6c 6a 14) add r3,r12,r13
+.*: (20 00 82 4d|4d 82 00 20) beqlr
+.*: (78 03 03 7c|7c 03 03 78) mr r3,r0
+.*: (a6 02 68 7d|7d 68 02 a6) mflr r11
+.*: (08 00 61 f9|f9 61 00 08) std r11,8\(r1\)
+.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
+.*: (28 80 82 e9|e9 82 80 28) ld r12,-32728\(r2\)
+.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
+.*: (21 04 80 4e|4e 80 04 21) bctrl
+.*: (18 00 41 e8|e8 41 00 18) ld r2,24\(r1\)
+.*: (08 00 61 e9|e9 61 00 08) ld r11,8\(r1\)
+.*: (a6 03 68 7d|7d 68 03 a6) mtlr r11
+.*: (20 00 80 4e|4e 80 00 20) blr
+
+0000000010000344 <_start>:
+.*: (08 80 62 38|38 62 80 08) addi r3,r2,-32760
+.*: (b9 ff ff 4b|4b ff ff b9) bl .*
+.*: (00 00 00 60|60 00 00 00) nop
+.*: (b8 02 01 00|00 00 00 00) .*
+.*: (00 00 00 00|00 01 02 b8) .*
+
+0000000010000358 <__glink_PLTresolve>:
+.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
+.*: (05 00 9f 42|42 9f 00 05) bcl .*
+.*: (a6 02 68 7d|7d 68 02 a6) mflr r11
+.*: (f0 ff 4b e8|e8 4b ff f0) ld r2,-16\(r11\)
+.*: (a6 03 08 7c|7c 08 03 a6) mtlr r0
+.*: (50 60 8b 7d|7d 8b 60 50) subf r12,r11,r12
+.*: (14 5a 62 7d|7d 62 5a 14) add r11,r2,r11
+.*: (d0 ff 0c 38|38 0c ff d0) addi r0,r12,-48
+.*: (00 00 8b e9|e9 8b 00 00) ld r12,0\(r11\)
+.*: (82 f0 00 78|78 00 f0 82) rldicl r0,r0,62,2
+.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
+.*: (08 00 6b e9|e9 6b 00 08) ld r11,8\(r11\)
+.*: (20 04 80 4e|4e 80 04 20) bctr
+.*: (00 00 00 60|60 00 00 00) nop
+
+0000000010000390 <__tls_get_addr_opt@plt>:
+.*: (c8 ff ff 4b|4b ff ff c8) b .*
diff --git a/ld/testsuite/ld-powerpc/tlsopt5.s b/ld/testsuite/ld-powerpc/tlsopt5.s
new file mode 100644
index 0000000..598bbd9
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/tlsopt5.s
@@ -0,0 +1,5 @@
+ .globl _start
+_start:
+ addi 3,2,gd@got@tlsgd
+ bl __tls_get_addr(gd@tlsgd)
+ nop
diff --git a/ld/testsuite/ld-powerpc/tlsopt5_32.d b/ld/testsuite/ld-powerpc/tlsopt5_32.d
new file mode 100644
index 0000000..9749248
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/tlsopt5_32.d
@@ -0,0 +1,52 @@
+#source: tlsopt5_32.s
+#as: -a32
+#ld: --gc-sections --secure-plt tlsdll32.so
+#objdump: -dr
+#target: powerpc*-*-*
+
+.*
+
+Disassembly of section \.text:
+
+01800230 <_start>:
+.*: (f8 ff 6d 38|38 6d ff f8) addi r3,r13,-8
+.*: (0d 00 00 48|48 00 00 0d) bl 1800240 <__tls_get_addr_opt@plt>
+ \.\.\.
+
+01800240 <__tls_get_addr_opt@plt>:
+.*: (00 00 63 81|81 63 00 00) lwz r11,0\(r3\)
+.*: (04 00 83 81|81 83 00 04) lwz r12,4\(r3\)
+.*: (78 1b 60 7c|7c 60 1b 78) mr r0,r3
+.*: (00 00 0b 2c|2c 0b 00 00) cmpwi r11,0
+.*: (14 12 6c 7c|7c 6c 12 14) add r3,r12,r2
+.*: (20 00 82 4d|4d 82 00 20) beqlr
+.*: (78 03 03 7c|7c 03 03 78) mr r3,r0
+.*: (00 00 00 60|60 00 00 00) nop
+.*: (81 01 60 3d|3d 60 01 81) lis r11,385
+.*: (9c 03 6b 81|81 6b 03 9c) lwz r11,924\(r11\)
+.*: (a6 03 69 7d|7d 69 03 a6) mtctr r11
+.*: (20 04 80 4e|4e 80 04 20) bctr
+
+01800270 <__glink>:
+.*: (00 00 00 60|60 00 00 00) nop
+.*: (00 00 00 60|60 00 00 00) nop
+.*: (00 00 00 60|60 00 00 00) nop
+.*: (00 00 00 60|60 00 00 00) nop
+
+01800280 <__glink_PLTresolve>:
+.*: (81 01 80 3d|3d 80 01 81) lis r12,385
+.*: (80 fe 6b 3d|3d 6b fe 80) addis r11,r11,-384
+.*: (94 03 0c 80|80 0c 03 94) lwz r0,916\(r12\)
+.*: (90 fd 6b 39|39 6b fd 90) addi r11,r11,-624
+.*: (a6 03 09 7c|7c 09 03 a6) mtctr r0
+.*: (14 5a 0b 7c|7c 0b 5a 14) add r0,r11,r11
+.*: (98 03 8c 81|81 8c 03 98) lwz r12,920\(r12\)
+.*: (14 5a 60 7d|7d 60 5a 14) add r11,r0,r11
+.*: (20 04 80 4e|4e 80 04 20) bctr
+.*: (00 00 00 60|60 00 00 00) nop
+.*: (00 00 00 60|60 00 00 00) nop
+.*: (00 00 00 60|60 00 00 00) nop
+.*: (00 00 00 60|60 00 00 00) nop
+.*: (00 00 00 60|60 00 00 00) nop
+.*: (00 00 00 60|60 00 00 00) nop
+.*: (00 00 00 60|60 00 00 00) nop
diff --git a/ld/testsuite/ld-powerpc/tlsopt5_32.s b/ld/testsuite/ld-powerpc/tlsopt5_32.s
new file mode 100644
index 0000000..36b4858
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/tlsopt5_32.s
@@ -0,0 +1,4 @@
+ .globl _start
+_start:
+ addi 3,13,gd@got@tlsgd
+ bl __tls_get_addr(gd@tlsgd)
diff --git a/ld/testsuite/ld-x86-64/call1a.d b/ld/testsuite/ld-x86-64/call1a.d
index 2a63b1c..2b131ee 100644
--- a/ld/testsuite/ld-x86-64/call1a.d
+++ b/ld/testsuite/ld-x86-64/call1a.d
@@ -1,5 +1,5 @@
#source: call1.s
-#as: --64
+#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64
#objdump: -dw
diff --git a/ld/testsuite/ld-x86-64/call1b.d b/ld/testsuite/ld-x86-64/call1b.d
index e782fa2..e2fef07 100644
--- a/ld/testsuite/ld-x86-64/call1b.d
+++ b/ld/testsuite/ld-x86-64/call1b.d
@@ -1,5 +1,5 @@
#source: call1.s
-#as: --64
+#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -z call-nop=prefix-addr
#objdump: -dw
diff --git a/ld/testsuite/ld-x86-64/call1c.d b/ld/testsuite/ld-x86-64/call1c.d
index d058fc7..7fe8056 100644
--- a/ld/testsuite/ld-x86-64/call1c.d
+++ b/ld/testsuite/ld-x86-64/call1c.d
@@ -1,5 +1,5 @@
#source: call1.s
-#as: --64
+#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -z call-nop=prefix-nop
#objdump: -dw
diff --git a/ld/testsuite/ld-x86-64/call1d.d b/ld/testsuite/ld-x86-64/call1d.d
index 8871cc6..c93756b 100644
--- a/ld/testsuite/ld-x86-64/call1d.d
+++ b/ld/testsuite/ld-x86-64/call1d.d
@@ -1,5 +1,5 @@
#source: call1.s
-#as: --64
+#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -z call-nop=suffix-nop
#objdump: -dw
diff --git a/ld/testsuite/ld-x86-64/call1e.d b/ld/testsuite/ld-x86-64/call1e.d
index 7127f1a..c7c467c 100644
--- a/ld/testsuite/ld-x86-64/call1e.d
+++ b/ld/testsuite/ld-x86-64/call1e.d
@@ -1,5 +1,5 @@
#source: call1.s
-#as: --64
+#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -z call-nop=prefix-0x67
#objdump: -dw
diff --git a/ld/testsuite/ld-x86-64/call1f.d b/ld/testsuite/ld-x86-64/call1f.d
index 587bade..d0c3f11 100644
--- a/ld/testsuite/ld-x86-64/call1f.d
+++ b/ld/testsuite/ld-x86-64/call1f.d
@@ -1,5 +1,5 @@
#source: call1.s
-#as: --64
+#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -z call-nop=prefix-0x90
#objdump: -dw
diff --git a/ld/testsuite/ld-x86-64/call1g.d b/ld/testsuite/ld-x86-64/call1g.d
index 3bb512e..6a8d790 100644
--- a/ld/testsuite/ld-x86-64/call1g.d
+++ b/ld/testsuite/ld-x86-64/call1g.d
@@ -1,5 +1,5 @@
#source: call1.s
-#as: --64
+#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -z call-nop=suffix-0x90
#objdump: -dw
diff --git a/ld/testsuite/ld-x86-64/call1h.d b/ld/testsuite/ld-x86-64/call1h.d
index c7c8dde..f8e1d07 100644
--- a/ld/testsuite/ld-x86-64/call1h.d
+++ b/ld/testsuite/ld-x86-64/call1h.d
@@ -1,5 +1,5 @@
#source: call1.s
-#as: --64
+#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64 -z call-nop=suffix-144
#objdump: -dw
diff --git a/ld/testsuite/ld-x86-64/call1i.d b/ld/testsuite/ld-x86-64/call1i.d
index b3684ad..d5a157b 100644
--- a/ld/testsuite/ld-x86-64/call1i.d
+++ b/ld/testsuite/ld-x86-64/call1i.d
@@ -1,5 +1,5 @@
#source: call1.s
-#as: --x32
+#as: --x32 -mrelax-relocations=yes
#ld: -melf32_x86_64 -z call-nop=suffix-0x90
#objdump: -dw
diff --git a/ld/testsuite/ld-x86-64/load1a.d b/ld/testsuite/ld-x86-64/load1a.d
index 5c9349e..0eb4880 100644
--- a/ld/testsuite/ld-x86-64/load1a.d
+++ b/ld/testsuite/ld-x86-64/load1a.d
@@ -1,5 +1,5 @@
#source: load1.s
-#as: --64
+#as: --64 -mrelax-relocations=yes
#ld: -melf_x86_64
#objdump: -dw --sym
#notarget: x86_64-*-nacl*
diff --git a/ld/testsuite/ld-x86-64/load1b.d b/ld/testsuite/ld-x86-64/load1b.d
index 70ef274..8827f38 100644
--- a/ld/testsuite/ld-x86-64/load1b.d
+++ b/ld/testsuite/ld-x86-64/load1b.d
@@ -1,5 +1,5 @@
#source: load1.s
-#as: --x32
+#as: --x32 -mrelax-relocations=yes
#ld: -melf32_x86_64
#objdump: -dw --sym
#notarget: x86_64-*-nacl*
diff --git a/ld/testsuite/ld-x86-64/pr18591.d b/ld/testsuite/ld-x86-64/pr18591.d
new file mode 100644
index 0000000..9f60622
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr18591.d
@@ -0,0 +1,12 @@
+#as: --64
+#ld: -melf_x86_64 -shared -z max-page-size=0x200000
+#objdump: -dw
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+[a-f0-9]+ <bar>:
+[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
+#pass
diff --git a/ld/testsuite/ld-x86-64/pr18591.s b/ld/testsuite/ld-x86-64/pr18591.s
new file mode 100644
index 0000000..d726f08
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr18591.s
@@ -0,0 +1,8 @@
+ .hidden foo
+ .comm pad,0x80000000,8
+ .comm foo,8,8
+ .text
+ .globl bar
+ .type bar, @function
+bar:
+ movq foo@GOTPCREL(%rip), %rax
diff --git a/ld/testsuite/ld-x86-64/pr19615.d b/ld/testsuite/ld-x86-64/pr19615.d
new file mode 100644
index 0000000..f09bcf3
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr19615.d
@@ -0,0 +1,13 @@
+#as: --64
+#ld: -pie -Bsymbolic -E -melf_x86_64
+#readelf: -r --wide --dyn-syms
+
+Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
+ Offset Info Type Symbol's Value Symbol's Name \+ Addend
+[0-9a-f]+ +[0-9a-f]+ +R_X86_64_RELATIVE +[0-9]+
+
+Symbol table '.dynsym' contains [0-9]+ entries:
+ Num: Value Size Type Bind Vis Ndx Name
+#...
+[ ]*[a-f0-9]+: [a-f0-9]+ 0 FUNC GLOBAL DEFAULT [a-f0-9]+ xyzzy
+#...
diff --git a/ld/testsuite/ld-x86-64/pr19615.s b/ld/testsuite/ld-x86-64/pr19615.s
new file mode 100644
index 0000000..1d85926
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr19615.s
@@ -0,0 +1,13 @@
+ .text
+ .globl _start
+ .type _start, @function
+_start:
+ ret
+
+ .globl xyzzy /* This symbol should be exported */
+ .type xyzzy, @function
+xyzzy:
+ ret
+
+ .section ".xyzzy_ptr","aw",%progbits
+ .dc.a xyzzy
diff --git a/ld/testsuite/ld-x86-64/pr19827-nacl.rd b/ld/testsuite/ld-x86-64/pr19827-nacl.rd
new file mode 100644
index 0000000..67eaacc
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr19827-nacl.rd
@@ -0,0 +1,5 @@
+#readelf: -r --wide
+
+Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
+ Offset Info Type Symbol's Value Symbol's Name \+ Addend
+[0-9a-f]+ +[0-9a-f]+ +R_X86_64_RELATIVE +[0-9a-f]+
diff --git a/ld/testsuite/ld-x86-64/pr19827.rd b/ld/testsuite/ld-x86-64/pr19827.rd
new file mode 100644
index 0000000..67eaacc
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr19827.rd
@@ -0,0 +1,5 @@
+#readelf: -r --wide
+
+Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
+ Offset Info Type Symbol's Value Symbol's Name \+ Addend
+[0-9a-f]+ +[0-9a-f]+ +R_X86_64_RELATIVE +[0-9a-f]+
diff --git a/ld/testsuite/ld-x86-64/pr19827a.S b/ld/testsuite/ld-x86-64/pr19827a.S
new file mode 100644
index 0000000..cdf1d4b
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr19827a.S
@@ -0,0 +1,8 @@
+ .text
+ .global _start
+_start:
+ .dc.a foo
+ .data
+ .globl foo
+foo:
+ .byte 0
diff --git a/ld/testsuite/ld-x86-64/pr19827b.S b/ld/testsuite/ld-x86-64/pr19827b.S
new file mode 100644
index 0000000..bb46e1d
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr19827b.S
@@ -0,0 +1,2 @@
+ .data
+ .dc.a foo
diff --git a/ld/testsuite/ld-x86-64/pr20093-1.d b/ld/testsuite/ld-x86-64/pr20093-1.d
new file mode 100644
index 0000000..de81443
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr20093-1.d
@@ -0,0 +1,11 @@
+#as: --64
+#ld: -pie -melf_x86_64
+#objdump: -dw
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+[a-f0-9]+ <_start>:
+[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
diff --git a/ld/testsuite/ld-x86-64/pr20093-1.s b/ld/testsuite/ld-x86-64/pr20093-1.s
new file mode 100644
index 0000000..c86a21e
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr20093-1.s
@@ -0,0 +1,11 @@
+ .section .lbss,"aw",@nobits
+foo1:
+ .space 1073741824
+ .space 1073741824
+ .space 1073741824
+ .text
+ .globl _start
+ .type _start, @function
+_start:
+ movq foo1@GOTPCREL(%rip), %rax
+ .size _start, .-_start
diff --git a/ld/testsuite/ld-x86-64/pr20093-2.d b/ld/testsuite/ld-x86-64/pr20093-2.d
new file mode 100644
index 0000000..de81443
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr20093-2.d
@@ -0,0 +1,11 @@
+#as: --64
+#ld: -pie -melf_x86_64
+#objdump: -dw
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+[a-f0-9]+ <_start>:
+[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
diff --git a/ld/testsuite/ld-x86-64/pr20093-2.s b/ld/testsuite/ld-x86-64/pr20093-2.s
new file mode 100644
index 0000000..cfbe9c2
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr20093-2.s
@@ -0,0 +1,9 @@
+ .largecomm foo1,1073741824,32
+ .largecomm foo2,1073741824,32
+ .largecomm foo3,1073741824,32
+ .text
+ .globl _start
+ .type _start, @function
+_start:
+ movq foo1@GOTPCREL(%rip), %rax
+ .size _start, .-_start
diff --git a/ld/testsuite/ld-x86-64/x86-64.exp b/ld/testsuite/ld-x86-64/x86-64.exp
index 45b7f09..484d5e3 100644
--- a/ld/testsuite/ld-x86-64/x86-64.exp
+++ b/ld/testsuite/ld-x86-64/x86-64.exp
@@ -148,6 +148,14 @@ set x86_64tests {
"--64" {pr17709a.s} {} "libpr17709.so"}
{"PR ld/17709 (2)" "-melf_x86_64 tmpdir/libpr17709.so" ""
"--64" {pr17709b.s} {{readelf -rW pr17709.rd}} "pr17709"}
+ {"Build pr19827a.o" "" ""
+ "--64" { pr19827a.S }}
+ {"Build pr19827b.so" "-melf_x86_64 -shared" ""
+ "--64" { pr19827b.S } {} "pr19827b.so"}
+ {"Build pr19827" "-melf_x86_64 -pie tmpdir/pr19827a.o tmpdir/pr19827b.so" ""
+ "--64" { dummy.s } {{readelf {-rW} pr19827.rd}} "pr19827"}
+ {"Build pr19827.so" "-melf_x86_64 -shared -Bsymbolic" ""
+ "--64" { pr19827a.S } {{readelf {-rW} pr19827.rd}} "pr19827.so"}
}
# So as to avoid rewriting every last test case here in a nacl variant,
@@ -239,6 +247,8 @@ run_dump_test "pr14215"
run_dump_test "pr14207"
run_dump_test "gotplt1"
run_dump_test "pie1"
+run_dump_test "pr20093-1"
+run_dump_test "pr20093-2"
if { ![istarget "x86_64-*-linux*"] && ![istarget "x86_64-*-nacl*"]} {
return
@@ -353,6 +363,8 @@ run_dump_test "pr19013-x32"
run_dump_test "pr19013-nacl"
run_dump_test "pr19162"
run_dump_test "pr19175"
+run_dump_test "pr18591"
+run_dump_test "pr19615"
# Add $PLT_CFLAGS if PLT is expected.
global PLT_CFLAGS
@@ -391,7 +403,7 @@ if { [isnative] && [which $CC] != 0 } {
[list \
"Build libplt-main1.a" \
"" \
- "-fPIC" \
+ "-fPIC -Wa,-mrelax-relocations=yes" \
{ plt-main1.c } \
{{readelf {-Wr} plt-main1.rd}} \
"libplt-main1.a" \
@@ -399,7 +411,7 @@ if { [isnative] && [which $CC] != 0 } {
[list \
"Build libplt-main2.a" \
"" \
- "-fPIC" \
+ "-fPIC -Wa,-mrelax-relocations=yes" \
{ plt-main2.c } \
{{readelf {-Wr} plt-main2.rd}} \
"libplt-main2.a" \
@@ -407,7 +419,7 @@ if { [isnative] && [which $CC] != 0 } {
[list \
"Build libplt-main3.a" \
"" \
- "-fPIC $PLT_CFLAGS" \
+ "-fPIC -Wa,-mrelax-relocations=yes $PLT_CFLAGS" \
{ plt-main3.c } \
{{readelf {-Wr} plt-main3.rd}} \
"libplt-main3.a" \
@@ -415,7 +427,7 @@ if { [isnative] && [which $CC] != 0 } {
[list \
"Build libplt-main4.a" \
"" \
- "-fPIC $PLT_CFLAGS" \
+ "-fPIC -Wa,-mrelax-relocations=yes $PLT_CFLAGS" \
{ plt-main4.c } \
{{readelf {-Wr} plt-main4.rd}} \
"libplt-main4.a" \
@@ -447,18 +459,26 @@ if { [isnative] && [which $CC] != 0 } {
"copyreloc-lib.so" \
] \
[list \
- "Build copyreloc-main with PIE without -fPIE (1)" \
- "tmpdir/copyreloc-lib.so -pie" \
+ "Build libcopyreloc-main.a" \
+ "" \
"" \
{ copyreloc-main.S } \
+ {} \
+ "libcopyreloc-main.a" \
+ ] \
+ [list \
+ "Build copyreloc-main with PIE without -fPIE (1)" \
+ "tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \
+ "" \
+ { dummy.s } \
{{readelf {-Wr} copyreloc-main1.rd}} \
"copyreloc-main" \
] \
[list \
"Build copyreloc-main with PIE without -fPIE (2)" \
- "tmpdir/copyreloc-lib.so -pie" \
+ "tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \
"" \
- { copyreloc-main.S } \
+ { dummy.s } \
{{readelf {-Wr} copyreloc-main2.rd}} \
"copyreloc-main" \
] \
@@ -479,26 +499,33 @@ if { [isnative] && [which $CC] != 0 } {
"pr17689now.so" \
] \
[list \
- "Build pr17689 with PIE without -fPIE" \
- "tmpdir/pr17689.so -pie" \
+ "Build pr17689b.o" \
+ "" \
"" \
{ pr17689b.S } \
+ {} \
+ ] \
+ [list \
+ "Build pr17689 with PIE without -fPIE" \
+ "tmpdir/pr17689b.o tmpdir/pr17689.so -pie" \
+ "" \
+ { dummy.s } \
{{readelf {-Wr} pr17689.rd}} \
"pr17689" \
] \
[list \
"Build pr17689 with PIE -z now without -fPIE" \
- "tmpdir/pr17689.so -pie -Wl,-z,now" \
+ "tmpdir/pr17689b.o tmpdir/pr17689.so -pie -Wl,-z,now" \
"" \
- { pr17689b.S } \
+ { dummy.s } \
{{readelf {-Wr} pr17689now.rd}} \
"pr17689now" \
] \
[list \
"Build pr17827 with PIE without -fPIE" \
- "tmpdir/pr17689.so -pie" \
+ "-Wl,--as-needed tmpdir/pr17689b.o tmpdir/pr17689.so -pie" \
"" \
- { pr17689b.S } \
+ { dummy.s } \
{{readelf {-Wr} pr17827.rd}} \
"pr17827" \
] \
@@ -511,18 +538,26 @@ if { [isnative] && [which $CC] != 0 } {
"pr18900.so" \
] \
[list \
- "Build pr18900a" \
- "tmpdir/pr18900.so" \
+ "Build pr18900.o" \
+ "-r -nostdlib" \
"" \
{ pr18900b.c pr18900c.c } \
+ "" \
+ "pr18900.o" \
+ ] \
+ [list \
+ "Build pr18900a" \
+ "tmpdir/pr18900.o tmpdir/pr18900.so" \
+ "" \
+ { dummy.s } \
{{readelf {-Wrd} pr18900a.rd}} \
"pr18900a" \
] \
[list \
"Build pr18900b" \
- "tmpdir/pr18900.so" \
+ "-Wl,--as-needed tmpdir/pr18900.o tmpdir/pr18900.so" \
"" \
- { pr18900b.c pr18900c.c } \
+ { dummy.s } \
{{readelf {-Wrd} pr18900b.rd}} \
"pr18900b" \
] \
@@ -543,10 +578,18 @@ if { [isnative] && [which $CC] != 0 } {
"gotpcrel1d.so" \
] \
[list \
- "Build gotpcrel1" \
- "tmpdir/gotpcrel1d.so" \
+ "Build libgotpcrel1.a" \
+ "" \
"" \
{ gotpcrel1a.S gotpcrel1b.c gotpcrel1c.c } \
+ "" \
+ "libgotpcrel1.a" \
+ ] \
+ [list \
+ "Build gotpcrel1" \
+ "-Wl,--as-needed tmpdir/gotpcrel1a.o tmpdir/gotpcrel1b.o tmpdir/gotpcrel1c.o tmpdir/gotpcrel1d.so" \
+ "-Wa,-mrelax-relocations=yes" \
+ { dummy.s } \
{{objdump {-dw} gotpcrel1.dd}} \
"gotpcrel1" \
] \
@@ -590,33 +633,33 @@ if { [isnative] && [which $CC] != 0 } {
] \
[list \
"Run copyreloc-main with PIE without -fPIE" \
- "tmpdir/copyreloc-lib.so -pie" \
+ "--as-needed tmpdir/copyreloc-main.o tmpdir/copyreloc-lib.so -pie" \
"" \
- { copyreloc-main.S } \
+ { dummy.s } \
"copyreloc-main" \
"copyreloc-main.out" \
] \
[list \
"Run pr17689 with PIE without -fPIE" \
- "tmpdir/pr17689.so -pie" \
+ "tmpdir/pr17689b.o tmpdir/pr17689.so -pie" \
"" \
- { pr17689b.S } \
+ { dummy.s } \
"pr17689" \
"pr17689.out" \
] \
[list \
"Run pr17689 with PIE -z now without -fPIE" \
- "tmpdir/pr17689.so -pie -z now" \
+ "--as-needed tmpdir/pr17689b.o tmpdir/pr17689.so -pie -z now" \
"" \
- { pr17689b.S } \
+ { dummy.s } \
"pr17689now" \
"pr17689.out" \
] \
[list \
"Run pr18900" \
- "tmpdir/pr18900.so" \
+ "tmpdir/pr18900.o tmpdir/pr18900.so" \
"" \
- { pr18900b.c pr18900c.c } \
+ { dummy.s } \
"pr18900" \
"pr18900.out" \
] \
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 726335d..b146bd3 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,41 @@
+2016-06-03 Peter Bergner <bergner@vnet.ibm.com>
+
+ Backport from master
+ 2016-06-03 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR binutils/20196
+ * ppc-opc.c (powerpc_opcodes <lbarx, lharx, stbcx., sthcx.>): Enable
+ opcodes for E6500.
+
+2016-06-01 Peter Bergner <bergner@vnet.ibm.com>
+
+ Backport from master
+ 2016-05-26 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-opc.c (CY): New define. Document it.
+ (powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.
+
+2016-02-26 Alan Modra <amodra@gmail.com>
+
+ Apply from master.
+ 2015-12-12 Alan Modra <amodra@gmail.com>
+ PR 19359
+ * ppc-opc.c (insert_fxm): Remove "ignored" from error message.
+ (powerpc_opcodes): Remove single-operand mfcr.
+
+2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (print_insn): Parenthesize expression to prevent
+ truncated addresses.
+ (OP_J): Likewise.
+
+2016-01-25 Tristan Gingold <gingold@adacore.com>
+
+ * configure: Regenerate.
+
2016-01-25 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
@@ -810,7 +848,7 @@
2015-05-11 H.J. Lu <hongjiu.lu@intel.com>
- * opcodes/i386-opc.tbl (call): Remove Disp16|Disp32 from 64-bit
+ * i386-opc.tbl (call): Remove Disp16|Disp32 from 64-bit
direct branch.
(jmp): Likewise.
* i386-tbl.h: Regenerated.
diff --git a/opcodes/configure b/opcodes/configure
index 3be129b..eedb184 100755
--- a/opcodes/configure
+++ b/opcodes/configure
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated by GNU Autoconf 2.64 for opcodes 2.26.
+# Generated by GNU Autoconf 2.64 for opcodes 2.26.0.
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
@@ -556,8 +556,8 @@ MAKEFLAGS=
# Identity of this package.
PACKAGE_NAME='opcodes'
PACKAGE_TARNAME='opcodes'
-PACKAGE_VERSION='2.26'
-PACKAGE_STRING='opcodes 2.26'
+PACKAGE_VERSION='2.26.0'
+PACKAGE_STRING='opcodes 2.26.0'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@@ -1319,7 +1319,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
-\`configure' configures opcodes 2.26 to adapt to many kinds of systems.
+\`configure' configures opcodes 2.26.0 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1390,7 +1390,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
- short | recursive ) echo "Configuration of opcodes 2.26:";;
+ short | recursive ) echo "Configuration of opcodes 2.26.0:";;
esac
cat <<\_ACEOF
@@ -1497,7 +1497,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
-opcodes configure 2.26
+opcodes configure 2.26.0
generated by GNU Autoconf 2.64
Copyright (C) 2009 Free Software Foundation, Inc.
@@ -1907,7 +1907,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
-It was created by opcodes $as_me 2.26, which was
+It was created by opcodes $as_me 2.26.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
$ $0 $@
@@ -3715,7 +3715,7 @@ fi
# Define the identity of the package.
PACKAGE='opcodes'
- VERSION='2.26'
+ VERSION='2.26.0'
cat >>confdefs.h <<_ACEOF
@@ -13223,7 +13223,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
-This file was extended by opcodes $as_me 2.26, which was
+This file was extended by opcodes $as_me 2.26.0, which was
generated by GNU Autoconf 2.64. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -13287,7 +13287,7 @@ Report bugs to the package provider."
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
-opcodes config.status 2.26
+opcodes config.status 2.26.0
configured by $0, generated by GNU Autoconf 2.64,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 1b4c51a..3712b59 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -13644,7 +13644,7 @@ print_insn (bfd_vma pc, disassemble_info *info)
if (op_index[i] != -1 && op_riprel[i])
{
(*info->fprintf_func) (info->stream, " # ");
- (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
+ (*info->print_address_func) ((bfd_vma) (start_pc + (codep - start_codep)
+ op_address[op_index[i]]), info);
break;
}
@@ -16158,7 +16158,7 @@ OP_J (int bytemode, int sizeflag)
the displacement is added! */
mask = 0xffff;
if ((prefixes & PREFIX_DATA) == 0)
- segment = ((start_pc + codep - start_codep)
+ segment = ((start_pc + (codep - start_codep))
& ~((bfd_vma) 0xffff));
}
if (address_mode != mode_64bit
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index e8c92f6..b6cbbbc 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -807,7 +807,9 @@ const struct powerpc_operand powerpc_operands[] =
#define X_R A_L
{ 0x1, 16, NULL, NULL, PPC_OPERAND_OPTIONAL },
+ /* The RMC or CY field in a Z23 form instruction. */
#define RMC A_L + 1
+#define CY RMC
{ 0x3, 9, NULL, NULL, 0 },
#define R RMC + 1
@@ -1434,7 +1436,7 @@ insert_fxm (unsigned long insn,
/* A value of -1 means we used the one operand form of
mfcr which is valid. */
if (value != -1)
- *errmsg = _("ignoring invalid mfcr mask");
+ *errmsg = _("invalid mfcr mask");
value = 0;
}
@@ -3137,6 +3139,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"vmhaddshs", VXA(4, 32), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
{"vmhraddshs", VXA(4, 33), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
{"vmladduhm", VXA(4, 34), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
+{"vmsumudm", VXA(4, 35), VXA_MASK, PPCVEC3, PPCNONE, {VD, VA, VB, VC}},
{"ps_div", A (4, 18,0), AFRC_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
{"vmsumubm", VXA(4, 36), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
{"ps_div.", A (4, 18,1), AFRC_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
@@ -4742,8 +4745,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"tlbilxva", XTO(31,18,3), XTO_MASK, E500MC|PPCA2, PPCNONE, {RA0, RB}},
{"tlbilx", X(31,18), X_MASK, E500MC|PPCA2, PPCNONE, {T, RA0, RB}},
-{"mfcr", XFXM(31,19,0,0), XFXFXM_MASK, POWER4, PPCNONE, {RT, FXM4}},
-{"mfcr", XFXM(31,19,0,0), XRARB_MASK, COM|PPCVLE, POWER4, {RT}},
+{"mfcr", XFXM(31,19,0,0), XFXFXM_MASK, COM|PPCVLE, PPCNONE, {RT, FXM4}},
{"mfocrf", XFXM(31,19,0,1), XFXFXM_MASK, COM|PPCVLE, PPCNONE, {RT, FXM}},
{"lwarx", X(31,20), XEH_MASK, PPC|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
@@ -4814,7 +4816,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mfvrd", X(31,51)|1, XX1RB_MASK|1, PPCVSX2, PPCNONE, {RA, VS}},
{"eratilx", X(31,51), X_MASK, PPCA2, PPCNONE, {ERAT_T, RA, RB}},
-{"lbarx", X(31,52), XEH_MASK, POWER8|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
+{"lbarx", X(31,52), XEH_MASK, POWER8|E6500|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
{"ldux", X(31,53), X_MASK, PPC64|PPCVLE, PPCNONE, {RT, RAL, RB}},
@@ -4894,7 +4896,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mfvrwz", X(31,115)|1, XX1RB_MASK|1, PPCVSX2, PPCNONE, {RA, VS}},
{"mfvsrwz", X(31,115), XX1RB_MASK, PPCVSX2, PPCNONE, {RA, XS6}},
-{"lharx", X(31,116), XEH_MASK, POWER8|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
+{"lharx", X(31,116), XEH_MASK, POWER8|E6500|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
{"clf", X(31,118), XTO_MASK, POWER, PPCNONE, {RA, RB}},
@@ -4970,6 +4972,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"stvehx", X(31,167), X_MASK, PPCVEC, PPCNONE, {VS, RA0, RB}},
{"sthfcmx", APU(31,167,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
+{"addex", ZRC(31,170,0), Z2_MASK, POWER9, PPCNONE, {RT, RA, RB, CY}},
+{"addex.", ZRC(31,170,1), Z2_MASK, POWER9, PPCNONE, {RT, RA, RB, CY}},
+
{"msgclrp", XRTRA(31,174,0,0), XRTRA_MASK, POWER8, PPCNONE, {RB}},
{"dcbtlse", X(31,174), X_MASK, PPCCHLK, E500MC, {CT, RA0, RB}},
@@ -5497,6 +5502,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mtvsrdd", X(31,435), XX1_MASK, PPCVSX3, PPCNONE, {XT6, RA0, RB}},
+{"lwzmx", X(31,437), X_MASK, POWER9, PPCNONE, {RT, RA0, RB}},
+
{"ecowx", X(31,438), X_MASK, PPC, E500|TITAN, {RT, RA0, RB}},
{"sthux", X(31,439), X_MASK, COM|PPCVLE, PPCNONE, {RS, RAS, RB}},
@@ -5939,7 +5946,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"tendall.", XRC(31,686,1)|(1<<25), XRTRARB_MASK, PPCHTM, PPCNONE, {0}},
{"tend.", XRC(31,686,1), XRTARARB_MASK, PPCHTM, PPCNONE, {HTM_A}},
-{"stbcx.", XRC(31,694,1), X_MASK, POWER8, PPCNONE, {RS, RA0, RB}},
+{"stbcx.", XRC(31,694,1), X_MASK, POWER8|E6500, PPCNONE, {RS, RA0, RB}},
{"stfsux", X(31,695), X_MASK, COM, PPCEFS, {FRS, RAS, RB}},
@@ -5971,7 +5978,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"stswi", X(31,725), X_MASK, PPCCOM|PPCVLE, E500|E500MC, {RS, RA0, NB}},
{"stsi", X(31,725), X_MASK, PWRCOM, PPCNONE, {RS, RA0, NB}},
-{"sthcx.", XRC(31,726,1), X_MASK, POWER8, PPCNONE, {RS, RA0, RB}},
+{"sthcx.", XRC(31,726,1), X_MASK, POWER8|E6500, PPCNONE, {RS, RA0, RB}},
{"stfdx", X(31,727), X_MASK, COM, PPCEFS, {FRS, RA0, RB}},