cpupower: Haswell also supports the C-states introduced with SandyBridge

Signed-off-by: Thomas Renninger <trenn@suse.de>

diff --git a/utils/idle_monitor/snb_idle.c b/utils/idle_monitor/snb_idle.c
index a99b43b..efc8a69 100644
--- a/utils/idle_monitor/snb_idle.c
+++ b/utils/idle_monitor/snb_idle.c
@@ -155,6 +155,10 @@ static struct cpuidle_monitor *snb_register(void)
 	case 0x2D: /* SNB Xeon */
 	case 0x3A: /* IVB */
 	case 0x3E: /* IVB Xeon */
+	case 0x3C: /* HSW */
+	case 0x3F: /* HSW */
+	case 0x45: /* HSW */
+	case 0x46: /* HSW */
 		break;
 	default:
 		return NULL;