- Patches added (swo#27028, swo#27257):
* gdb-testsuite-fix-gdb.arch-i386-pkru.exp-on-linux.patch * gdb-tdep-fix-avx512-m32-support-in-gdbserver.patch OBS-URL: https://build.opensuse.org/package/show/devel:gcc/gdb?expand=0&rev=313
This commit is contained in:
Tom de Vries
Git OBS Bridge
parent
83449fb03e
commit
1b7b29bab9
169
gdb-tdep-fix-avx512-m32-support-in-gdbserver.patch
Normal file
169
gdb-tdep-fix-avx512-m32-support-in-gdbserver.patch
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@ -0,0 +1,169 @@
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[gdb/tdep] Fix avx512 -m32 support in gdbserver
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PR27257 reports a problem that can be reproduced as follows:
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- use x86_64 machine with avx512 support
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- compile a hello world with -m32 to a.out
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- start a gdbserver session with a.out
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- use gdb to connect to the gdbserver session
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This makes us run into:
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...
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Listening on port 2346
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Remote debugging from host ::1, port 34940
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src/gdbserver/regcache.cc:257: \
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A problem internal to GDBserver has been detected.
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Unknown register zmm16h requested
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...
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The problem is that i387_xsave_to_cache in gdbserver/i387-fp.cc can't find a
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register zmm16h in the register cache.
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To understand how this happens, first some background.
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SSE has 16 128-bit wide xmm registers.
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AVX extends the SSE registers set as follows:
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- it extends the 16 existing 128-bit wide xmm registers to 256-bit wide ymm
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registers.
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AVX512 extends the AVX register set as follows:
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- it extends the 16 existing 256-bit wide ymm registers to 512-bit wide zmm
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registers.
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- it adds 16 additional 512-bit wide zmm registers (with corresponding ymm and
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xmm subregisters added as well)
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However, in 32-bit mode, there are only 8 xmm/ymm/zmm registers.
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The problem we're running into is that gdbserver/i387-fp.cc uses these
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constants to describe the size of the register file:
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...
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static const int num_avx512_zmmh_low_registers = 16;
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static const int num_avx512_zmmh_high_registers = 16;
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static const int num_avx512_ymmh_registers = 16;
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static const int num_avx512_xmm_registers = 16;
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...
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which are all incorrect for the 32-bit case.
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Fix this by replacing the constants with variables that have the appropriate
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values in 64-bit and 32-bit mode.
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Tested on x86_64-linux with native and unix/-m32.
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---
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gdbserver/i387-fp.cc | 50 +++++++++++++++++++++++++++++++++++++-------------
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1 file changed, 37 insertions(+), 13 deletions(-)
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diff --git a/gdbserver/i387-fp.cc b/gdbserver/i387-fp.cc
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index 6d9b62ed8ce..9b07ded592d 100644
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--- a/gdbserver/i387-fp.cc
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+++ b/gdbserver/i387-fp.cc
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@@ -23,10 +23,6 @@
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static const int num_mpx_bnd_registers = 4;
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static const int num_mpx_cfg_registers = 2;
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static const int num_avx512_k_registers = 8;
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-static const int num_avx512_zmmh_low_registers = 16;
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-static const int num_avx512_zmmh_high_registers = 16;
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-static const int num_avx512_ymmh_registers = 16;
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-static const int num_avx512_xmm_registers = 16;
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static const int num_pkeys_registers = 1;
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/* Note: These functions preserve the reserved bits in control registers.
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@@ -256,14 +252,22 @@ void
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i387_cache_to_xsave (struct regcache *regcache, void *buf)
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{
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struct i387_xsave *fp = (struct i387_xsave *) buf;
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+ bool amd64 = register_size (regcache->tdesc, 0) == 8;
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int i;
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unsigned long val, val2;
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unsigned long long xstate_bv = 0;
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unsigned long long clear_bv = 0;
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char raw[64];
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char *p;
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+
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/* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
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- int num_xmm_registers = register_size (regcache->tdesc, 0) == 8 ? 16 : 8;
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+ int num_xmm_registers = amd64 ? 16 : 8;
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+ /* AVX512 extends the existing xmm/ymm registers to a wider mode: zmm. */
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+ int num_avx512_zmmh_low_registers = num_xmm_registers;
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+ /* AVX512 adds 16 extra regs in Amd64 mode, but none in I386 mode.*/
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+ int num_avx512_zmmh_high_registers = amd64 ? 16 : 0;
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+ int num_avx512_ymmh_registers = amd64 ? 16 : 0;
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+ int num_avx512_xmm_registers = amd64 ? 16 : 0;
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/* The supported bits in `xstat_bv' are 8 bytes. Clear part in
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vector registers if its bit in xstat_bv is zero. */
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@@ -452,7 +456,9 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
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/* Check if any of ZMM16H-ZMM31H registers are changed. */
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if ((x86_xcr0 & X86_XSTATE_ZMM))
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{
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- int zmm16h_regnum = find_regno (regcache->tdesc, "zmm16h");
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+ int zmm16h_regnum = (num_avx512_zmmh_high_registers == 0
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+ ? -1
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+ : find_regno (regcache->tdesc, "zmm16h"));
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for (i = 0; i < num_avx512_zmmh_high_registers; i++)
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{
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@@ -469,7 +475,9 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
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/* Check if any XMM_AVX512 registers are changed. */
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if ((x86_xcr0 & X86_XSTATE_ZMM))
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{
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- int xmm_avx512_regnum = find_regno (regcache->tdesc, "xmm16");
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+ int xmm_avx512_regnum = (num_avx512_xmm_registers == 0
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+ ? -1
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+ : find_regno (regcache->tdesc, "xmm16"));
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for (i = 0; i < num_avx512_xmm_registers; i++)
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{
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@@ -486,7 +494,9 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
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/* Check if any YMMH_AVX512 registers are changed. */
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if ((x86_xcr0 & X86_XSTATE_ZMM))
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{
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- int ymmh_avx512_regnum = find_regno (regcache->tdesc, "ymm16h");
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+ int ymmh_avx512_regnum = (num_avx512_ymmh_registers == 0
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+ ? -1
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+ : find_regno (regcache->tdesc, "ymm16h"));
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for (i = 0; i < num_avx512_ymmh_registers; i++)
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{
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@@ -710,12 +720,20 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
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{
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struct i387_xsave *fp = (struct i387_xsave *) buf;
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struct i387_fxsave *fxp = (struct i387_fxsave *) buf;
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+ bool amd64 = register_size (regcache->tdesc, 0) == 8;
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int i, top;
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unsigned long val;
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unsigned long long clear_bv;
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gdb_byte *p;
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- /* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
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- int num_xmm_registers = register_size (regcache->tdesc, 0) == 8 ? 16 : 8;
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+
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+ /* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
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+ int num_xmm_registers = amd64 ? 16 : 8;
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+ /* AVX512 extends the existing xmm/ymm registers to a wider mode: zmm. */
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+ int num_avx512_zmmh_low_registers = num_xmm_registers;
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+ /* AVX512 adds 16 extra regs in Amd64 mode, but none in I386 mode.*/
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+ int num_avx512_zmmh_high_registers = amd64 ? 16 : 0;
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+ int num_avx512_ymmh_registers = amd64 ? 16 : 0;
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+ int num_avx512_xmm_registers = amd64 ? 16 : 0;
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/* The supported bits in `xstat_bv' are 8 bytes. Clear part in
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vector registers if its bit in xstat_bv is zero. */
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@@ -845,9 +863,15 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
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if ((x86_xcr0 & X86_XSTATE_ZMM) != 0)
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{
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- int zmm16h_regnum = find_regno (regcache->tdesc, "zmm16h");
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- int ymm16h_regnum = find_regno (regcache->tdesc, "ymm16h");
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- int xmm16_regnum = find_regno (regcache->tdesc, "xmm16");
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+ int zmm16h_regnum = (num_avx512_zmmh_high_registers == 0
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+ ? -1
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+ : find_regno (regcache->tdesc, "zmm16h"));
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+ int ymm16h_regnum = (num_avx512_ymmh_registers == 0
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+ ? -1
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+ : find_regno (regcache->tdesc, "ymm16h"));
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+ int xmm16_regnum = (num_avx512_xmm_registers == 0
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+ ? -1
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+ : find_regno (regcache->tdesc, "xmm16"));
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if ((clear_bv & X86_XSTATE_ZMM) != 0)
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{
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57
gdb-testsuite-fix-gdb.arch-i386-pkru.exp-on-linux.patch
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57
gdb-testsuite-fix-gdb.arch-i386-pkru.exp-on-linux.patch
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@ -0,0 +1,57 @@
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[gdb/testsuite] Fix gdb.arch/i386-pkru.exp on linux
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When running test-case gdb.arch/i386-pkru.exp on a machine with "Memory
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Protection Keys for Userspace" support, we run into:
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...
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(gdb) PASS: gdb.arch/i386-pkru.exp: probe PKRU support
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print $pkru^M
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$2 = 1431655764^M
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(gdb) FAIL: gdb.arch/i386-pkru.exp: pkru register
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...
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The test-case expects the $pkru register to have the default value 0, matching
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the "init state" of 0 defined by the XSAVE hardware.
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Since linux kernel version v4.9 containing commit acd547b29880 ("x86/pkeys:
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Default to a restrictive init PKRU"), the register is set to 0x55555554 by
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default (which matches the printed decimal value above).
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Fix the FAIL by accepting this value for linux.
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Tested on x86_64-linux.
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---
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gdb/testsuite/gdb.arch/i386-pkru.exp | 13 ++++++++++---
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1 file changed, 10 insertions(+), 3 deletions(-)
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diff --git a/gdb/testsuite/gdb.arch/i386-pkru.exp b/gdb/testsuite/gdb.arch/i386-pkru.exp
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index 5732bba6e97..2ee8ee72fa3 100644
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--- a/gdb/testsuite/gdb.arch/i386-pkru.exp
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+++ b/gdb/testsuite/gdb.arch/i386-pkru.exp
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@@ -20,6 +20,15 @@ if { ![istarget i?86-*-*] && ![istarget x86_64-*-* ] } {
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return
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}
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+set default_pkru_re 0x0
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+if { [istarget *-*-linux*] } {
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+ # Starting with v4.9, the linux kernel contains commit acd547b29880
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+ # ("x86/pkeys: Default to a restrictive init PKRU"), which sets the
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+ # pkru register to 0x55555554 by default.
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+ set default_pkru_re (0x0|0x55555554)
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+}
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+
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+
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set comp_flags "-I${srcdir}/../nat/"
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if { [prepare_for_testing "failed to prepare" ${testfile} ${srcfile} \
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@@ -51,9 +60,7 @@ if { !$supports_pkru } {
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}
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# Test pkru register at startup
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-# set test_string "0"
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-
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-gdb_test "print \$pkru" "= 0" "pkru register"
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+gdb_test "print /x \$pkru" "= $default_pkru_re" "pkru register"
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# Read values from pseudo registers.
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gdb_breakpoint [ gdb_get_line_number "break here 1" ]
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@ -1,3 +1,10 @@
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-------------------------------------------------------------------
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Tue Nov 30 10:45:32 UTC 2021 - Tom de Vries <tdevries@suse.com>
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- Patches added (swo#27028, swo#27257):
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* gdb-testsuite-fix-gdb.arch-i386-pkru.exp-on-linux.patch
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* gdb-tdep-fix-avx512-m32-support-in-gdbserver.patch
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-------------------------------------------------------------------
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Fri Nov 26 14:04:38 UTC 2021 - Tom de Vries <tdevries@suse.com>
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6
gdb.spec
6
gdb.spec
@ -385,6 +385,10 @@ Patch2116: gdb-testsuite-fix-fail-in-gdb.tui-basic.exp.patch
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Patch2117: gdb-testsuite-disable-inferior-output-in-gdb.base-foll-vfork.exp.patch
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# https://sourceware.org/pipermail/gdb-patches/2021-November/183363.html
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Patch2118: gdb-symtab-fix-segfault-in-search_one_symtab.patch
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# https://sourceware.org/pipermail/gdb-patches/2021-November/183939.html
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Patch2119: gdb-testsuite-fix-gdb.arch-i386-pkru.exp-on-linux.patch
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# https://sourceware.org/pipermail/gdb-patches/2021-November/183960.html
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Patch2120: gdb-tdep-fix-avx512-m32-support-in-gdbserver.patch
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BuildRequires: bison
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BuildRequires: flex
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@ -809,6 +813,8 @@ find -name "*.info*"|xargs rm -f
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%patch2116 -p1
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%patch2117 -p1
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%patch2118 -p1
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%patch2119 -p1
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%patch2120 -p1
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#unpack libipt
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%if 0%{have_libipt}
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