forked from pool/libclc
Accepting request 641350 from home:boombatower:branches:X11:XOrg
- Update to version 0.2.0+git.20180915: * configure: Rework support for gfx9+ devices that were added post LLVM 3.9 * .travis: Add llvm-7 build * .travis: Use source whitelist alias for llvm-6 repository * amdgcn: Use __constant AS for amdgcn builtins. * atom: Use volatile pointers for cl_khr_{global,local}_int32_{base,extended}_atomics * atom: Consolidate cl_khr_{local,global}_int32_{base,extended}_atomics implementation * atomic: Provide function implementation of atomic_{dec,inc} * atom: Consolidate cl_khr_int64_{base,extended}_atomics declarations * atom: Consolidate cl_khr_{local,global}_int32_{base,extended}_atomics declarations * atomic: Cleanup atomic_cmpxchg header * atomic: Move define cleanup to shared include * Update copyright year to 2018. * r600/fmin: Flush denormals before calling builtin. * r600/fmax: Flush denormals before calling builtin. * math/fma: Add fp32 software implementation * Add initial support for half precision builtins * rootn: Use denormal path only * remquo: Flush denormals if not supported * remquo: Port from amd builtins * math: Add helper function to flush denormals if not supported. * clc_sqrt: Reuse unary_decl.inc * relational/select: Condition types for half are short/ushort, not char/uchar * log10: Use sw implementation from amd builtins * powr: Use denormal path only * pown: Use denormal path only * pow: Use denormal path only * amdgcn/fmin: Fix typos that reduced precision * exp10: Port from amd builtins * hypot: Port from amd builtins OBS-URL: https://build.opensuse.org/request/show/641350 OBS-URL: https://build.opensuse.org/package/show/X11:XOrg/libclc?expand=0&rev=23
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<service name="tar_scm">
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<param name="url">https://github.com/llvm-mirror/libclc.git</param>
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<param name="url">https://github.com/llvm-mirror/libclc.git</param>
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<param name="changesrevision">d6384415ab854c68777dd77451aa2bc0d959da99</param>
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libclc-0.2.0+git.20180915.tar.xz
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version https://git-lfs.github.com/spec/v1
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size 121592
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-------------------------------------------------------------------
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Fri Oct 12 01:55:46 UTC 2018 - jimmy@boombatower.com
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- Update to version 0.2.0+git.20180915:
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* configure: Rework support for gfx9+ devices that were added post LLVM 3.9
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* .travis: Add llvm-7 build
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* .travis: Use source whitelist alias for llvm-6 repository
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* amdgcn: Use __constant AS for amdgcn builtins.
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* atom: Use volatile pointers for cl_khr_{global,local}_int32_{base,extended}_atomics
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* atom: Consolidate cl_khr_{local,global}_int32_{base,extended}_atomics implementation
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* atomic: Provide function implementation of atomic_{dec,inc}
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* atom: Consolidate cl_khr_int64_{base,extended}_atomics declarations
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* atom: Consolidate cl_khr_{local,global}_int32_{base,extended}_atomics declarations
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* atomic: Cleanup atomic_cmpxchg header
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* atomic: Move define cleanup to shared include
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* Update copyright year to 2018.
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* r600/fmin: Flush denormals before calling builtin.
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* r600/fmax: Flush denormals before calling builtin.
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* math/fma: Add fp32 software implementation
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* Add initial support for half precision builtins
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* rootn: Use denormal path only
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* remquo: Flush denormals if not supported
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* remquo: Port from amd builtins
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* math: Add helper function to flush denormals if not supported.
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* clc_sqrt: Reuse unary_decl.inc
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* relational/select: Condition types for half are short/ushort, not char/uchar
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* log10: Use sw implementation from amd builtins
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* powr: Use denormal path only
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* pown: Use denormal path only
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* pow: Use denormal path only
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* amdgcn/fmin: Fix typos that reduced precision
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* exp10: Port from amd builtins
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* hypot: Port from amd builtins
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* select: simplify implementation and fix fp16
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* fmod: Port from amd_builtins
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* r600: Update datalayout after LLVM r328656
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* amdgcn: Update datalayout after LLVM r328656
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* remainder: Port from amd builtins
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* nan: Implement
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* travis: Add build using llvm-6
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* amdgcn/fmax: fcanonicalize operands
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* amdgcn/fmin: fcanonicalize operands
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* amdgcn,popcount: Workaround broken llvm.ctpop intrinsic on some GCN ASICs
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* integer/gentype: Add __CLC_VECSIZE macro
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* popcount: Provide function implementation rather than intrinsic redirect
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* lgamma_r: Move code from .inc to .cl file
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* frexp: Reuse types provided by gentype.inc
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* select: Add vector implementation
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* minmag: Condition variable needs to be the same bitwidth as operands
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* maxmag: Condition variable needs to be the same bitwidth as operands
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* Move cl_khr_fp64 exntension enablement to gentype include lists
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* utils: Adapt to llvm r325155
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* amdgcn: Fix build after GDS/const AS swap in r325030
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* amdgcn: Fix datalayout after addition of 32bit const AS in r324747
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* r600: Fix datalayout after clang r324101
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* amdgcn: Fix datalayout after clang r324101
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* amdgpu/half_recip: Switch implementation to native_recip
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* amdgpu/half_log2: Switch implementation to native_log2
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* amdgpu/half_log10: Switch implementation to native_log10
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* amdgpu/half_log: Switch implementation to native_log
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* amdgpu/half_exp2: Switch implementation to native_exp2
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* amdgpu/half_exp10: Switch implementation to native_exp10
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* amdgpu/half_exp: Switch implementation to native_exp
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* amdgpu/half_sqrt: Switch implementation to native_sqrt
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* amdgpu/half_rsqrt: Switch implementation to native_rsqrt
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* Add vstore_half_rte implementation
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* Add vstore_half_rtp implementation
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* Add vstore_half_rtn implementation
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* Add vstore_half_rtz implementation
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* vstore_half: Consolidate declarations
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* vstore_half: Add support for custom rounding functions
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* vstore_half: Make sure the helper function is always inline
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* half_powr: Implement using powr
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* math.h: Use logical operations instead of bit operations for readability
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* math.h: Set HAVE_HW_FMA32 based on compiler provided macro
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* tanpi: Port from amd_builtins
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* tan: Port from amd_builtins
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* half_divide: Implement using x/y
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* half_tan: Implement using tan
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* half_sin: Implement using sin
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* half_recip: Implement using 1/x
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* half_log2: Implement using log2
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* half_log10: Implement using log10
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* half_log: Implement using log
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* half_exp10: Implement using exp10
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* half_exp2: Implement using exp2
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* half_exp: Implement using exp
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* half_cos: Implement using cos
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* half_sqrt: Cleanup implementation
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* half_rsqrt: Cleanup implementation
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* rootn: Port from amd_builtins
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* powr: Port from amd_builtins
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* pown: Port from amd_builtins
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* pow: Port from amd_builtins
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-------------------------------------------------------------------
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-------------------------------------------------------------------
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Sat Dec 23 08:24:44 UTC 2017 - mpluskal@suse.com
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Sat Dec 23 08:24:44 UTC 2017 - mpluskal@suse.com
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@ -1,7 +1,7 @@
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#
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#
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# spec file for package libclc
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# spec file for package libclc
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#
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#
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# Copyright (c) 2017 SUSE LINUX GmbH, Nuernberg, Germany.
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# Copyright (c) 2018 SUSE LINUX GmbH, Nuernberg, Germany.
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#
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#
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# All modifications and additions to the file contributed by third parties
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# All modifications and additions to the file contributed by third parties
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# remain the property of their copyright owners, unless otherwise agreed
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# remain the property of their copyright owners, unless otherwise agreed
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Name: libclc
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Name: libclc
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Version: 0.2.0+git.20171127
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Version: 0.2.0+git.20180915
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Release: 0
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Release: 0
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Summary: OpenCL C programming language library
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Summary: OpenCL C programming language library
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License: BSD-3-Clause OR MIT
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License: BSD-3-Clause OR MIT
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