SHA256
1
0
forked from pool/libclc

Accepting request 641350 from home:boombatower:branches:X11:XOrg

- Update to version 0.2.0+git.20180915:
  * configure: Rework support for gfx9+ devices that were added post LLVM 3.9
  * .travis: Add llvm-7 build
  * .travis: Use source whitelist alias for llvm-6 repository
  * amdgcn: Use __constant AS for amdgcn builtins.
  * atom: Use volatile pointers for cl_khr_{global,local}_int32_{base,extended}_atomics
  * atom: Consolidate cl_khr_{local,global}_int32_{base,extended}_atomics implementation
  * atomic: Provide function implementation of atomic_{dec,inc}
  * atom: Consolidate cl_khr_int64_{base,extended}_atomics declarations
  * atom: Consolidate cl_khr_{local,global}_int32_{base,extended}_atomics declarations
  * atomic: Cleanup atomic_cmpxchg header
  * atomic: Move define cleanup to shared include
  * Update copyright year to 2018.
  * r600/fmin: Flush denormals before calling builtin.
  * r600/fmax: Flush denormals before calling builtin.
  * math/fma: Add fp32 software implementation
  * Add initial support for half precision builtins
  * rootn: Use denormal path only
  * remquo: Flush denormals if not supported
  * remquo: Port from amd builtins
  * math: Add helper function to flush denormals if not supported.
  * clc_sqrt: Reuse unary_decl.inc
  * relational/select: Condition types for half are short/ushort, not char/uchar
  * log10: Use sw implementation from amd builtins
  * powr: Use denormal path only
  * pown: Use denormal path only
  * pow: Use denormal path only
  * amdgcn/fmin: Fix typos that reduced precision
  * exp10: Port from amd builtins
  * hypot: Port from amd builtins

OBS-URL: https://build.opensuse.org/request/show/641350
OBS-URL: https://build.opensuse.org/package/show/X11:XOrg/libclc?expand=0&rev=23
This commit is contained in:
Jimmy Berry 2018-10-12 02:06:33 +00:00 committed by Git OBS Bridge
parent 40a7402ed0
commit ab80c44871
5 changed files with 102 additions and 7 deletions

View File

@ -1,6 +1,6 @@
<servicedata> <servicedata>
<service name="tar_scm"> <service name="tar_scm">
<param name="url">https://github.com/llvm-mirror/libclc.git</param> <param name="url">https://github.com/llvm-mirror/libclc.git</param>
<param name="changesrevision">d6384415ab854c68777dd77451aa2bc0d959da99</param> <param name="changesrevision">dabae5a2afb78cba0320a86e3f5f0b5dc83e077c</param>
</service> </service>
</servicedata> </servicedata>

View File

@ -1,3 +0,0 @@
version https://git-lfs.github.com/spec/v1
oid sha256:03308dd536eea60be1bd450f280ebb830efd6eeb073589d9b69b625364b61edf
size 100272

View File

@ -0,0 +1,3 @@
version https://git-lfs.github.com/spec/v1
oid sha256:7136e75277d0091bf556c2abf272137306a1eec6a5865b24c42ce804c8af002d
size 121592

View File

@ -1,3 +1,98 @@
-------------------------------------------------------------------
Fri Oct 12 01:55:46 UTC 2018 - jimmy@boombatower.com
- Update to version 0.2.0+git.20180915:
* configure: Rework support for gfx9+ devices that were added post LLVM 3.9
* .travis: Add llvm-7 build
* .travis: Use source whitelist alias for llvm-6 repository
* amdgcn: Use __constant AS for amdgcn builtins.
* atom: Use volatile pointers for cl_khr_{global,local}_int32_{base,extended}_atomics
* atom: Consolidate cl_khr_{local,global}_int32_{base,extended}_atomics implementation
* atomic: Provide function implementation of atomic_{dec,inc}
* atom: Consolidate cl_khr_int64_{base,extended}_atomics declarations
* atom: Consolidate cl_khr_{local,global}_int32_{base,extended}_atomics declarations
* atomic: Cleanup atomic_cmpxchg header
* atomic: Move define cleanup to shared include
* Update copyright year to 2018.
* r600/fmin: Flush denormals before calling builtin.
* r600/fmax: Flush denormals before calling builtin.
* math/fma: Add fp32 software implementation
* Add initial support for half precision builtins
* rootn: Use denormal path only
* remquo: Flush denormals if not supported
* remquo: Port from amd builtins
* math: Add helper function to flush denormals if not supported.
* clc_sqrt: Reuse unary_decl.inc
* relational/select: Condition types for half are short/ushort, not char/uchar
* log10: Use sw implementation from amd builtins
* powr: Use denormal path only
* pown: Use denormal path only
* pow: Use denormal path only
* amdgcn/fmin: Fix typos that reduced precision
* exp10: Port from amd builtins
* hypot: Port from amd builtins
* select: simplify implementation and fix fp16
* fmod: Port from amd_builtins
* r600: Update datalayout after LLVM r328656
* amdgcn: Update datalayout after LLVM r328656
* remainder: Port from amd builtins
* nan: Implement
* travis: Add build using llvm-6
* amdgcn/fmax: fcanonicalize operands
* amdgcn/fmin: fcanonicalize operands
* amdgcn,popcount: Workaround broken llvm.ctpop intrinsic on some GCN ASICs
* integer/gentype: Add __CLC_VECSIZE macro
* popcount: Provide function implementation rather than intrinsic redirect
* lgamma_r: Move code from .inc to .cl file
* frexp: Reuse types provided by gentype.inc
* select: Add vector implementation
* minmag: Condition variable needs to be the same bitwidth as operands
* maxmag: Condition variable needs to be the same bitwidth as operands
* Move cl_khr_fp64 exntension enablement to gentype include lists
* utils: Adapt to llvm r325155
* amdgcn: Fix build after GDS/const AS swap in r325030
* amdgcn: Fix datalayout after addition of 32bit const AS in r324747
* r600: Fix datalayout after clang r324101
* amdgcn: Fix datalayout after clang r324101
* amdgpu/half_recip: Switch implementation to native_recip
* amdgpu/half_log2: Switch implementation to native_log2
* amdgpu/half_log10: Switch implementation to native_log10
* amdgpu/half_log: Switch implementation to native_log
* amdgpu/half_exp2: Switch implementation to native_exp2
* amdgpu/half_exp10: Switch implementation to native_exp10
* amdgpu/half_exp: Switch implementation to native_exp
* amdgpu/half_sqrt: Switch implementation to native_sqrt
* amdgpu/half_rsqrt: Switch implementation to native_rsqrt
* Add vstore_half_rte implementation
* Add vstore_half_rtp implementation
* Add vstore_half_rtn implementation
* Add vstore_half_rtz implementation
* vstore_half: Consolidate declarations
* vstore_half: Add support for custom rounding functions
* vstore_half: Make sure the helper function is always inline
* half_powr: Implement using powr
* math.h: Use logical operations instead of bit operations for readability
* math.h: Set HAVE_HW_FMA32 based on compiler provided macro
* tanpi: Port from amd_builtins
* tan: Port from amd_builtins
* half_divide: Implement using x/y
* half_tan: Implement using tan
* half_sin: Implement using sin
* half_recip: Implement using 1/x
* half_log2: Implement using log2
* half_log10: Implement using log10
* half_log: Implement using log
* half_exp10: Implement using exp10
* half_exp2: Implement using exp2
* half_exp: Implement using exp
* half_cos: Implement using cos
* half_sqrt: Cleanup implementation
* half_rsqrt: Cleanup implementation
* rootn: Port from amd_builtins
* powr: Port from amd_builtins
* pown: Port from amd_builtins
* pow: Port from amd_builtins
------------------------------------------------------------------- -------------------------------------------------------------------
Sat Dec 23 08:24:44 UTC 2017 - mpluskal@suse.com Sat Dec 23 08:24:44 UTC 2017 - mpluskal@suse.com

View File

@ -1,7 +1,7 @@
# #
# spec file for package libclc # spec file for package libclc
# #
# Copyright (c) 2017 SUSE LINUX GmbH, Nuernberg, Germany. # Copyright (c) 2018 SUSE LINUX GmbH, Nuernberg, Germany.
# #
# All modifications and additions to the file contributed by third parties # All modifications and additions to the file contributed by third parties
# remain the property of their copyright owners, unless otherwise agreed # remain the property of their copyright owners, unless otherwise agreed
@ -17,7 +17,7 @@
Name: libclc Name: libclc
Version: 0.2.0+git.20171127 Version: 0.2.0+git.20180915
Release: 0 Release: 0
Summary: OpenCL C programming language library Summary: OpenCL C programming language library
License: BSD-3-Clause OR MIT License: BSD-3-Clause OR MIT