Add F16h decoding support Signed-off-by: Borislav Petkov Index: mcelog-1.0.1/amd.c =================================================================== --- mcelog-1.0.1.orig/amd.c +++ mcelog-1.0.1/amd.c @@ -200,6 +200,8 @@ enum cputype select_amd_cputype(u32 fami return CPU_F14H; case 0x15: return CPU_F15H; + case 0x16: + return CPU_F16H; default: break; } @@ -687,6 +689,47 @@ static bool f15h_mc2_mce(u16 ec, u8 xec) return ret; } +static bool f16h_mc2_mce(u16 ec, u8 xec) +{ + u8 r4 = R4(ec); + + if (!MEM_ERROR(ec)) + return false; + + switch (xec) { + case 0x04 ... 0x05: + Wprintf("%cBUFF parity error.\n", (r4 == R4_RD) ? 'I' : 'O'); + break; + + case 0x09 ... 0x0b: + case 0x0d ... 0x0f: + Wprintf("ECC error in L2 tag (%s).\n", + ((r4 == R4_GEN) ? "BankReq" : + ((r4 == R4_SNOOP) ? "Prb" : "Fill"))); + break; + + case 0x10 ... 0x19: + case 0x1b: + Wprintf("ECC error in L2 data array (%s).\n", + (((r4 == R4_RD) && !(xec & 0x3)) ? "Hit" : + ((r4 == R4_GEN) ? "Attr" : + ((r4 == R4_EVICT) ? "Vict" : "Fill")))); + break; + + case 0x1c ... 0x1d: + case 0x1f: + Wprintf("Parity error in L2 attribute bits (%s).\n", + ((r4 == R4_RD) ? "Hit" : + ((r4 == R4_GEN) ? "Attr" : "Fill"))); + break; + + default: + return false; + } + + return true; +} + static void decode_mc2_mce(struct amd_decoder_ops *ops, struct mce *m) { u16 ec = EC(m->status); @@ -897,6 +940,12 @@ struct amd_decoder_ops fam_ops[] = { .mc1_mce = f15h_mc1_mce, .mc2_mce = f15h_mc2_mce, }, + [AMD_F16H] = { + .cpu = AMD_F16H, + .mc0_mce = cat_mc0_mce, + .mc1_mce = cat_mc1_mce, + .mc2_mce = f16h_mc2_mce, + }, }; static void __decode_amd_mc(enum cputype cpu, struct mce *mce) @@ -920,6 +969,10 @@ static void __decode_amd_mc(enum cputype xec_mask = 0x1f; ops = &fam_ops[AMD_F15H]; break; + case CPU_F16H: + xec_mask = 0x1f; + ops = &fam_ops[AMD_F16H]; + break; default: Eprintf("Huh? What family is it: 0x%x?!\n", cpu); return; Index: mcelog-1.0.1/mcelog.h =================================================================== --- mcelog-1.0.1.orig/mcelog.h +++ mcelog-1.0.1/mcelog.h @@ -112,6 +112,7 @@ enum cputype { CPU_F12H, CPU_F14H, CPU_F15H, + CPU_F16H, CPU_P4, CPU_NEHALEM, CPU_DUNNINGTON, Index: mcelog-1.0.1/amd.h =================================================================== --- mcelog-1.0.1.orig/amd.h +++ mcelog-1.0.1/amd.h @@ -98,4 +98,5 @@ enum rrrr_ids { case CPU_F11H: \ case CPU_F12H: \ case CPU_F14H: \ - case CPU_F15H + case CPU_F15H: \ + case CPU_F16H Index: mcelog-1.0.1/mcelog.c =================================================================== --- mcelog-1.0.1.orig/mcelog.c +++ mcelog-1.0.1/mcelog.c @@ -227,6 +227,7 @@ static char *cputype_name[] = { [CPU_F12H] = "AMD Llano", [CPU_F14H] = "AMD Bobcat", [CPU_F15H] = "AMD Bulldozer", + [CPU_F16H] = "AMD Jaguar", [CPU_P4] = "Intel P4", [CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")", [CPU_DUNNINGTON] = "Intel Xeon 7400 series", @@ -250,6 +251,7 @@ static struct config_choice cpu_choices[ { "f12h", CPU_F12H }, { "f14h", CPU_F14H }, { "f15h", CPU_F15H }, + { "f16h", CPU_F16H }, { "p4", CPU_P4 }, { "dunnington", CPU_DUNNINGTON }, { "xeon74xx", CPU_DUNNINGTON },