diff --git a/_constraints b/_constraints
new file mode 100644
index 0000000..118b09c
--- /dev/null
+++ b/_constraints
@@ -0,0 +1,11 @@
+
+
+ 8
+
+ 10
+
+
+ 16
+
+
+
\ No newline at end of file
diff --git a/mvapich2-2.3.6.tar.gz b/mvapich2-2.3.6.tar.gz
deleted file mode 100644
index 209cfe7..0000000
--- a/mvapich2-2.3.6.tar.gz
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:b3a62f2a05407191b856485f99da05f5e769d6381cd63e2fcb83ee98fc46a249
-size 21016727
diff --git a/mvapich2-2.3.7-1.tar.gz b/mvapich2-2.3.7-1.tar.gz
new file mode 100644
index 0000000..d416b28
--- /dev/null
+++ b/mvapich2-2.3.7-1.tar.gz
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:fdd971cf36d6476d007b5d63d19414546ca8a2937b66886f24a1d9ca154634e4
+size 21139377
diff --git a/mvapich2.changes b/mvapich2.changes
index 0c158c6..11221e5 100644
--- a/mvapich2.changes
+++ b/mvapich2.changes
@@ -1,3 +1,49 @@
+-------------------------------------------------------------------
+Wed Jun 29 12:54:33 UTC 2022 - Klaus Kämpf
+
+- add pass-correct-size-to-snprintf.patch to fix potential buffer
+ overflows (required to make 'sundials' testsuite pass)
+
+- Update to mvapich2 2.3.7
+ * Features and Enhancements (since 2.3.6):
+ - Added support for systems with Rockport's switchless networks
+ * Added automatic architecture detection
+ * Optimized performance for point-to-point operations
+ - Added support for the Cray Slingshot 10 interconnect
+ - Enhanced support for blocking collective offload using
+ Mellanox SHARP
+ * Scatter and Scatterv
+ - Enhanced support for non-blocking collective offload using
+ Mellanox SHARP
+ * Iallreduce, Ibarrier, Ibcast, and Ireduce
+
+ * Bug Fixes (since 2.3.6):
+ - Removed several deprectated functions
+ - Thanks to Honggang Li @RedHat for the report
+ - Fixed a bug where tools like CMake FindMPI would not
+ detect MVAPICH when compiled without Hydra mpiexec
+ - Thanks to Chris Chambreau and Adam Moody @LLNL for the report
+ - Fixed compilation error when building with mpirun and without hydra
+ - Thanks to James Long @University of Illinois for the report
+ - Fixed issue with setting RoCE mode correctly without RDMA_CM.
+ - Thanks to Nicolas Gagnon @Rockport Networks for the report
+ - Fixed an issue on heterogeneous clusters where QP attributes were
+ set incorrectly
+ - Thanks to X-ScaleSolutions for the report and fix
+ - Fixed a memory leak in improbe on the PSM channel
+ - Thanks to Gregory Lee @LLNL Beichuan Yan @University of Colorado
+ for the report
+ - Added retry logic for PSM connection establishment
+ - Thanks to Gregory Lee @LLNL for the report and X-ScaleSolutions
+ for the patch
+ - Fixed an initialization error when using PSM and gcc's -pg option
+ - Thanks to Gregory Lee @LLNL for the report and X-ScaleSolutions for
+ the patch
+ - Fixed a potential integer overflow when transfering large arrays
+ - Thanks to Alexander Melnikov for the report and patch
+
+- Fix Url: link
+
-------------------------------------------------------------------
Wed Feb 16 11:07:12 UTC 2022 - Nicolas Morey-Chaisemartin
diff --git a/mvapich2.spec b/mvapich2.spec
index ac1b0bd..a71c614 100644
--- a/mvapich2.spec
+++ b/mvapich2.spec
@@ -19,8 +19,9 @@
%global flavor @BUILD_FLAVOR@%{nil}
%define pname mvapich2
-%define vers 2.3.6
-%define _vers 2_3_6
+%define vers 2.3.7
+%define _vers 2_3_7
+%define rc_ver -1
%if "%{flavor}" == ""
ExclusiveArch: do_not_build
@@ -241,7 +242,7 @@ License: BSD-3-Clause
Group: Development/Libraries/Parallel
Version: %{vers}
Release: 0
-Source0: http://mvapich.cse.ohio-state.edu/download/mvapich/mv2/mvapich2-%{version}.tar.gz
+Source0: http://mvapich.cse.ohio-state.edu/download/mvapich/mv2/mvapich2-%{version}%{?rc_ver}.tar.gz
Source1: mpivars.sh
Source2: mpivars.csh
Source3: macros.hpc-mvapich2
@@ -252,13 +253,14 @@ Patch2: mvapich2-arm-support.patch
# It's been merged upstream, should be removed with the next release
Patch3: 0001-Drop-GCC-check.patch
Patch4: reproducible.patch
+Patch5: pass-correct-size-to-snprintf.patch
## Armv7 specific patches
# PATCH-FIX-UPSTREAM 0001-Drop-real128.patch (https://github.com/pmodels/mpich/issues/4005)
Patch50: 0001-Drop-real128.patch
Patch51: 0001-Drop-Real-16.patch
-URL: http://mvapich.cse.ohio-state.edu/overview/mvapich2/
+URL: http://mvapich.cse.ohio-state.edu
BuildRoot: %{_tmppath}/%{name}-%{version}-build
%if %{without skip_hpc_build}
@@ -389,6 +391,7 @@ is based on MPICH2 and MVICH. This package contains the static libraries
%patch2
%patch3
%patch4
+%patch5 -p1
# Only apply these patches on Armv7
%ifarch armv7hl
diff --git a/pass-correct-size-to-snprintf.patch b/pass-correct-size-to-snprintf.patch
new file mode 100644
index 0000000..44662bc
--- /dev/null
+++ b/pass-correct-size-to-snprintf.patch
@@ -0,0 +1,103 @@
+diff -wruN -x '*~' -x '*.o' -x '*.a' -x '*.so' -x '*.so.[0-9]' -x autom4te.cache -x .deps -x .libs ../orig-mvapich2-2.3.7-1/src/mpid/ch3/channels/common/src/affinity/hwloc_bind.c ./src/mpid/ch3/channels/common/src/affinity/hwloc_bind.c
+--- ../orig-mvapich2-2.3.7-1/src/mpid/ch3/channels/common/src/affinity/hwloc_bind.c 2022-05-16 18:58:22.000000000 +0200
++++ ./src/mpid/ch3/channels/common/src/affinity/hwloc_bind.c 2022-06-29 15:07:17.700058168 +0200
+@@ -2107,7 +2107,7 @@
+ for (i = 0; i < g_smpi.num_local_nodes; ++i) {
+ hwloc_bitmap_clr(*free_sock_cpuset, local_core_ids[i]);
+ }
+- hwloc_bitmap_snprintf(cpu_str, 128, *free_sock_cpuset);
++ hwloc_bitmap_snprintf(cpu_str, sizeof(cpu_str), *free_sock_cpuset);
+ PRINT_DEBUG(DEBUG_INIT_verbose, "Free sock_cpuset = %s\n", cpu_str);
+ }
+
+@@ -3190,11 +3190,11 @@
+ for (i = 0; i < local_procs; i++) {
+ curr = count;
+ for (k = 0; k < num_app_threads; k++) {
+- j += snprintf (mapping+j, _POSIX2_LINE_MAX, "%d,", mv2_core_map[curr]);
++ j += snprintf (mapping+j, sizeof(mapping)-j, "%d,", mv2_core_map[curr]);
+ curr = (curr + 1) % num_pu;
+ }
+ mapping [--j] = '\0';
+- j += snprintf (mapping+j, _POSIX2_LINE_MAX, ":");
++ j += snprintf (mapping+j, sizeof(mapping)-j, ":");
+ count = (count + hw_threads_per_core) % num_pu;
+ }
+ } else if (mv2_hybrid_binding_policy == HYBRID_LINEAR) {
+@@ -3203,14 +3203,14 @@
+ * resources */
+ for (i = 0; i < local_procs; i++) {
+ for (k = 0; k < num_app_threads; k++) {
+- j += snprintf (mapping+j, _POSIX2_LINE_MAX, "%d,", mv2_core_map[curr]);
++ j += snprintf (mapping+j, sizeof(mapping)-j, "%d,", mv2_core_map[curr]);
+
+ curr = ((curr + hw_threads_per_core) >= num_pu) ?
+ ((curr + hw_threads_per_core+ ++step) % num_pu) :
+ (curr + hw_threads_per_core) % num_pu;
+ }
+ mapping [--j] = '\0';
+- j += snprintf (mapping+j, _POSIX2_LINE_MAX, ":");
++ j += snprintf (mapping+j, sizeof(mapping)-j, ":");
+ }
+ } else if (mv2_hybrid_binding_policy == HYBRID_SPREAD) {
+ #if defined(CHANNEL_MRAIL)
+@@ -3232,12 +3232,12 @@
+ for (i = 0; i < local_procs; i++) {
+ for (k = curr; k < curr+chunk; k++) {
+ for (l = 0; l < hw_threads_per_core; l++) {
+- j += snprintf (mapping+j, _POSIX2_LINE_MAX, "%d,",
++ j += snprintf (mapping+j, sizeof(mapping)-j, "%d,",
+ mv2_core_map[k * hw_threads_per_core + l]);
+ }
+ }
+ mapping [--j] = '\0';
+- j += snprintf (mapping+j, _POSIX2_LINE_MAX, ":");
++ j += snprintf (mapping+j, sizeof(mapping)-j, ":");
+ curr = (curr + chunk) % size;
+ }
+ } else {
+@@ -3252,11 +3252,11 @@
+ for (i = 0; i < num_sockets; i++) {
+ for (k = curr; k < curr+ranks_per_sock; k++) {
+ for (l = 0; l < hw_threads_per_core; l++) {
+- j += snprintf (mapping+j, _POSIX2_LINE_MAX, "%d,",
++ j += snprintf (mapping+j, sizeof(mapping)-j, "%d,",
+ mv2_core_map[k * hw_threads_per_core + l]);
+ }
+ mapping [--j] = '\0';
+- j += snprintf (mapping+j, _POSIX2_LINE_MAX, ":");
++ j += snprintf (mapping+j, sizeof(mapping)-j, ":");
+ }
+ curr = (curr + ((num_pu_per_socket/hw_threads_per_core) * chunk)) % size;
+ }
+@@ -3265,7 +3265,7 @@
+ /* Bunch mapping: Bind each MPI rank to a single phyical core of first
+ * socket followed by second secket */
+ for (i = 0; i < local_procs; i++) {
+- j += snprintf (mapping+j, _POSIX2_LINE_MAX, "%d:", mv2_core_map[k]);
++ j += snprintf (mapping+j, sizeof(mapping)-j, "%d:", mv2_core_map[k]);
+ k = (k + hw_threads_per_core) % size;
+ }
+ } else if (mv2_hybrid_binding_policy == HYBRID_SCATTER) {
+@@ -3283,7 +3283,7 @@
+ return MPI_ERR_OTHER;
+ }
+ for (i = 0; i < local_procs; i++) {
+- j += snprintf (mapping+j, _POSIX2_LINE_MAX, "%d:", mv2_core_map[k]);
++ j += snprintf (mapping+j, sizeof(mapping)-j, "%d:", mv2_core_map[k]);
+ k = (i % num_sockets == 0) ?
+ (k + num_pu_per_socket) % size :
+ (k + num_pu_per_socket + hw_threads_per_core) % size;
+@@ -3315,10 +3315,10 @@
+ /* NUMA mapping: Bind consecutive MPI ranks to different NUMA domains in
+ * round-robin fashion. */
+ for (i = 0; i < local_procs; i++) {
+- j += snprintf (mapping+j, _POSIX2_LINE_MAX, "%d,",
++ j += snprintf (mapping+j, sizeof(mapping)-j, "%d,",
+ mv2_core_map_per_numa[node_base_pu+node_offset]);
+ mapping [--j] = '\0';
+- j += snprintf (mapping+j, _POSIX2_LINE_MAX, ":");
++ j += snprintf (mapping+j, sizeof(mapping)-j, ":");
+ node_base_pu = (node_base_pu + num_pu_per_numanode) % size;
+ node_offset = (node_base_pu == 0) ?
+ (node_offset + ((hw_threads_per_core > 0) ? hw_threads_per_core : 1)) :