2017-10-04 00:19:51 +02:00
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From 25e3e93ab685cabcaf987e493a6adfe5a463ce56 Mon Sep 17 00:00:00 2001
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2017-09-22 04:16:14 +02:00
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From: Brijesh Singh <brijesh.singh@amd.com>
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Date: Tue, 15 Aug 2017 12:00:51 -0500
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Subject: [PATCH] target-i386/cpu: Add new EPYC CPU model
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Add a new base CPU model called 'EPYC' to model processors from AMD EPYC
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family (which includes EPYC 76xx,75xx,74xx, 73xx and 72xx).
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The following features bits have been added/removed compare to Opteron_G5
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Added: monitor, movbe, rdrand, mmxext, ffxsr, rdtscp, cr8legacy, osvw,
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fsgsbase, bmi1, avx2, smep, bmi2, rdseed, adx, smap, clfshopt, sha
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xsaveopt, xsavec, xgetbv1, arat
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Removed: xop, fma4, tbm
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Cc: Paolo Bonzini <pbonzini@redhat.com>
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Cc: Richard Henderson <rth@twiddle.net>
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Cc: Eduardo Habkost <ehabkost@redhat.com>
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Cc: Tom Lendacky <Thomas.Lendacky@amd.com>
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Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
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Message-Id: <20170815170051.127257-1-brijesh.singh@amd.com>
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Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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(cherry picked from commit 2e2efc7dbe2b0adc1200b5aa286cdbed729f6751)
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[BR: BSC#1052825]
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Signed-off-by: Bruce Rogers <brogers@suse.com>
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---
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target/i386/cpu.c | 44 ++++++++++++++++++++++++++++++++++++++++++++
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1 file changed, 44 insertions(+)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index ddc45abd70..6617e01a72 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -1522,6 +1522,50 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.xlevel = 0x8000001A,
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.model_id = "AMD Opteron 63xx class CPU",
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},
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+ {
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+ .name = "EPYC",
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+ .level = 0xd,
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+ .vendor = CPUID_VENDOR_AMD,
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+ .family = 23,
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+ .model = 1,
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+ .stepping = 2,
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+ .features[FEAT_1_EDX] =
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+ CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | CPUID_CLFLUSH |
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+ CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA | CPUID_PGE |
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+ CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | CPUID_MCE |
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+ CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | CPUID_DE |
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+ CPUID_VME | CPUID_FP87,
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+ .features[FEAT_1_ECX] =
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+ CPUID_EXT_RDRAND | CPUID_EXT_F16C | CPUID_EXT_AVX |
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+ CPUID_EXT_XSAVE | CPUID_EXT_AES | CPUID_EXT_POPCNT |
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+ CPUID_EXT_MOVBE | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
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+ CPUID_EXT_CX16 | CPUID_EXT_FMA | CPUID_EXT_SSSE3 |
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+ CPUID_EXT_MONITOR | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3,
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+ .features[FEAT_8000_0001_EDX] =
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+ CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_PDPE1GB |
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+ CPUID_EXT2_FFXSR | CPUID_EXT2_MMXEXT | CPUID_EXT2_NX |
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+ CPUID_EXT2_SYSCALL,
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+ .features[FEAT_8000_0001_ECX] =
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+ CPUID_EXT3_OSVW | CPUID_EXT3_3DNOWPREFETCH |
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+ CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM |
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+ CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM,
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+ .features[FEAT_7_0_EBX] =
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+ CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 |
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+ CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED |
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+ CPUID_7_0_EBX_ADX | CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLFLUSHOPT |
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+ CPUID_7_0_EBX_SHA_NI,
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+ /* Missing: XSAVES (not supported by some Linux versions,
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+ * including v4.1 to v4.12).
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+ * KVM doesn't yet expose any XSAVES state save component.
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+ */
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+ .features[FEAT_XSAVE] =
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+ CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC |
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+ CPUID_XSAVE_XGETBV1,
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+ .features[FEAT_6_EAX] =
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+ CPUID_6_EAX_ARAT,
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+ .xlevel = 0x8000000A,
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+ .model_id = "AMD EPYC Processor",
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+ },
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};
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typedef struct PropValue {
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