36 lines
1.4 KiB
Diff
36 lines
1.4 KiB
Diff
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From: Richard Henderson <richard.henderson@linaro.org>
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Date: Mon, 21 Dec 2020 12:44:26 -0800
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Subject: target/arm: Fix MTE0_ACTIVE
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Git-commit: cc97b0019bb590b9b3c2a623e9ebee48831e0ce3
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In 50244cc76abc we updated mte_check_fail to match the ARM
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pseudocode, using the correct EL to select the TCF field.
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But we failed to update MTE0_ACTIVE the same way, which led
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to g_assert_not_reached().
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Cc: qemu-stable@nongnu.org
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Buglink: https://bugs.launchpad.net/bugs/1907137
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Message-id: 20201221204426.88514-1-richard.henderson@linaro.org
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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Bruce Rogers <brogers@suse.com>
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---
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target/arm/helper.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/target/arm/helper.c b/target/arm/helper.c
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index 38cd35c049292d40df5a35854f4b..194d752763b2a74af2e4e45e0a96 100644
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--- a/target/arm/helper.c
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+++ b/target/arm/helper.c
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@@ -12927,7 +12927,7 @@ static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el,
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if (FIELD_EX32(flags, TBFLAG_A64, UNPRIV)
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&& tbid
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&& !(env->pstate & PSTATE_TCO)
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- && (sctlr & SCTLR_TCF0)
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+ && (sctlr & SCTLR_TCF)
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&& allocation_tag_access_enabled(env, 0, sctlr)) {
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flags = FIELD_DP32(flags, TBFLAG_A64, MTE0_ACTIVE, 1);
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}
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