61 lines
2.0 KiB
Diff
61 lines
2.0 KiB
Diff
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From 28839121aa98b7e126a7770200041203acd077bb Mon Sep 17 00:00:00 2001
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From: Brijesh Singh <brijesh.singh@amd.com>
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Date: Thu, 15 Feb 2018 09:03:25 -0600
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Subject: [PATCH] cpu/i386: populate CPUID 0x8000_001F when SEV is active
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When SEV is enabled, CPUID 0x8000_001F should provide additional
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information regarding the feature (such as which page table bit is used
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to mark the pages as encrypted etc).
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The details for memory encryption CPUID is available in AMD APM
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(https://support.amd.com/TechDocs/24594.pdf) Section E.4.17
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Cc: Paolo Bonzini <pbonzini@redhat.com>
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Cc: Richard Henderson <rth@twiddle.net>
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Cc: Eduardo Habkost <ehabkost@redhat.com>
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Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
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[BR: FATE#322124]
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Signed-off-by: Bruce Rogers <brogers@suse.com>
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---
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target/i386/cpu.c | 13 +++++++++++++
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1 file changed, 13 insertions(+)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index 70c8ae82d5..a7e27f3bbf 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -23,6 +23,7 @@
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#include "exec/exec-all.h"
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#include "sysemu/kvm.h"
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#include "sysemu/cpus.h"
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+#include "sysemu/sev.h"
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#include "kvm_i386.h"
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#include "qemu/error-report.h"
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@@ -3578,6 +3579,13 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
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*ecx = 0;
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*edx = 0;
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break;
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+ case 0x8000001F:
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+ *eax = sev_enabled() ? 0x2 : 0;
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+ *ebx = sev_get_cbit_position();
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+ *ebx |= sev_get_reduced_phys_bits() << 6;
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+ *ecx = 0;
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+ *edx = 0;
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+ break;
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default:
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/* reserved values: zero */
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*eax = 0;
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@@ -4000,6 +4008,11 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
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if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_SVM) {
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x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A);
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}
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+
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+ /* SEV requires CPUID[0x8000001F] */
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+ if (sev_enabled()) {
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+ x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001F);
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+ }
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}
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/* Set cpuid_*level* based on cpuid_min_*level, if not explicitly set */
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