From: Bruce Rogers Date: Fri, 17 May 2013 16:49:58 -0600 Subject: increase x86_64 physical bits to 42 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Allow for guests with higher amounts of ram. The current thought is that 2TB specified on qemu commandline would be an appropriate limit. Note that this requires the next higher bit value since the highest address is actually more than 2TB due to the pci memory hole. Signed-off-by: Bruce Rogers Signed-off-by: Andreas Färber The DSDT needs to be updated as well, or tests will fail. The necessary changes are the following ones: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of /tmp/aml-ML87L1, Thu May 19 16:20:30 2022 + * Disassembly of tests/data/acpi/microvm/DSDT.pcie, Thu May 19 16:20:30 2022 * * Original Table Header: * Signature "DSDT" * Length 0x00000BCF (3023) * Revision 0x02 - * Checksum 0xD1 + * Checksum 0xD8 * OEM ID "BOCHS " * OEM Table ID "BXPC " * OEM Revision 0x00000001 (1) @@ -1256,10 +1256,10 @@ ,, , AddressRangeMemory, TypeStatic) QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x0000000000000000, // Granularity - 0x0000030000000000, // Range Minimum - 0x000003FFFFFFFFFF, // Range Maximum + 0x000000C000000000, // Range Minimum + 0x000000FFFFFFFFFF, // Range Maximum 0x0000000000000000, // Translation Offset - 0x0000010000000000, // Length + 0x0000004000000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Name (SUPP, Zero) We cannot, however, commit the modified binary as part of this patch, will not apply it. The binary is instead put in the package, and copied in place in the spec file, just before 'make check'. Signed-off-by: Dario Faggioli --- target/i386/tcg/helper-tcg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/tcg/helper-tcg.h b/target/i386/tcg/helper-tcg.h index 34167e2e29cacee8dfb05e943fac..8ded299c8f4bf91ba2bea6b88211 100644 --- a/target/i386/tcg/helper-tcg.h +++ b/target/i386/tcg/helper-tcg.h @@ -26,7 +26,7 @@ #define TARGET_MAX_INSN_SIZE 16 #if defined(TARGET_X86_64) -# define TCG_PHYS_ADDR_BITS 40 +# define TCG_PHYS_ADDR_BITS 42 #else # define TCG_PHYS_ADDR_BITS 36 #endif