a8263c0693
- Include upstream patches designated as stable material and reviewed for applicability to include here block-Separate-blk_is_writable-and-blk_s.patch hw-intc-arm_gic-Fix-interrupt-ID-in-GICD.patch hw-net-lan9118-Fix-RX-Status-FIFO-PEEK-v.patch hw-timer-slavio_timer-Allow-64-bit-acces.patch net-Fix-handling-of-id-in-netdev_add-and.patch target-arm-Don-t-decode-insns-in-the-XSc.patch target-arm-Fix-MTE0_ACTIVE.patch target-arm-Introduce-PREDDESC-field-defi.patch target-arm-Update-PFIRST-PNEXT-for-pred_.patch target-arm-Update-REV-PUNPK-for-pred_des.patch target-arm-Update-ZIP-UZP-TRN-for-pred_d.patch tcg-Use-memset-for-large-vector-byte-rep.patch ui-vnc-Add-missing-lock-for-send_color_m.patch virtio-move-use-disabled-flag-property-t.patch - binutils v2.36 has changed the handling of the assembler's -mx86-used-note, resulting in a build failure. To compensate, we now explicitly specify -mx86-used-note=no in the seabios Makefile (boo#1181775) build-be-explicit-about-mx86-used-note-n.patch OBS-URL: https://build.opensuse.org/request/show/869843 OBS-URL: https://build.opensuse.org/package/show/Virtualization/qemu?expand=0&rev=614
66 lines
2.7 KiB
Diff
66 lines
2.7 KiB
Diff
From: Richard Henderson <richard.henderson@linaro.org>
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Date: Tue, 12 Jan 2021 20:26:48 -1000
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Subject: target/arm: Update PFIRST, PNEXT for pred_desc
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Git-commit: 86300b5d044064046395ae8ed605cc19e63f2a7c
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These two were odd, in that do_pfirst_pnext passed the
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count of 64-bit words rather than bytes. Change to pass
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the standard pred_full_reg_size to avoid confusion.
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Cc: qemu-stable@nongnu.org
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Message-id: 20210113062650.593824-3-richard.henderson@linaro.org
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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Bruce Rogers <brogers@suse.com>
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---
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target/arm/sve_helper.c | 7 ++++---
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target/arm/translate-sve.c | 6 +++---
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2 files changed, 7 insertions(+), 6 deletions(-)
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diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
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index 5f037c3a8f8cbc6c093433703153..ff01851bf288009ec3e7585b8e03 100644
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--- a/target/arm/sve_helper.c
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+++ b/target/arm/sve_helper.c
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@@ -889,8 +889,9 @@ static intptr_t last_active_element(uint64_t *g, intptr_t words, intptr_t esz)
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return (intptr_t)-1 << esz;
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}
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-uint32_t HELPER(sve_pfirst)(void *vd, void *vg, uint32_t words)
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+uint32_t HELPER(sve_pfirst)(void *vd, void *vg, uint32_t pred_desc)
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{
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+ intptr_t words = DIV_ROUND_UP(FIELD_EX32(pred_desc, PREDDESC, OPRSZ), 8);
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uint32_t flags = PREDTEST_INIT;
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uint64_t *d = vd, *g = vg;
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intptr_t i = 0;
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@@ -914,8 +915,8 @@ uint32_t HELPER(sve_pfirst)(void *vd, void *vg, uint32_t words)
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uint32_t HELPER(sve_pnext)(void *vd, void *vg, uint32_t pred_desc)
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{
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- intptr_t words = extract32(pred_desc, 0, SIMD_OPRSZ_BITS);
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- intptr_t esz = extract32(pred_desc, SIMD_DATA_SHIFT, 2);
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+ intptr_t words = DIV_ROUND_UP(FIELD_EX32(pred_desc, PREDDESC, OPRSZ), 8);
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+ intptr_t esz = FIELD_EX32(pred_desc, PREDDESC, ESZ);
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uint32_t flags = PREDTEST_INIT;
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uint64_t *d = vd, *g = vg, esz_mask;
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intptr_t i, next;
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diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
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index 0c3a6d21210404a1340e58c9a021..efcb646f729b1dbe4f7989e2fb9d 100644
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--- a/target/arm/translate-sve.c
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+++ b/target/arm/translate-sve.c
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@@ -1494,10 +1494,10 @@ static bool do_pfirst_pnext(DisasContext *s, arg_rr_esz *a,
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TCGv_ptr t_pd = tcg_temp_new_ptr();
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TCGv_ptr t_pg = tcg_temp_new_ptr();
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TCGv_i32 t;
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- unsigned desc;
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+ unsigned desc = 0;
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- desc = DIV_ROUND_UP(pred_full_reg_size(s), 8);
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- desc = deposit32(desc, SIMD_DATA_SHIFT, 2, a->esz);
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+ desc = FIELD_DP32(desc, PREDDESC, OPRSZ, pred_full_reg_size(s));
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+ desc = FIELD_DP32(desc, PREDDESC, ESZ, a->esz);
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tcg_gen_addi_ptr(t_pd, cpu_env, pred_full_reg_offset(s, a->rd));
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tcg_gen_addi_ptr(t_pg, cpu_env, pred_full_reg_offset(s, a->rn));
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