Dario Faggioli
c977c5d4a8
- Fix RiscV firmware (opensbi) cross-build * Patches added: Makefile-fix-build-with-binutils-2.38.patch - qemu,kvm,xen: NULL pointer dereference issue in megasas-gen2 host bus adapter (bsc#1180432, CVE-2020-35503) * Patches added: hw-scsi-megasas-check-for-NULL-frame-in-.patch OBS-URL: https://build.opensuse.org/request/show/960206 OBS-URL: https://build.opensuse.org/package/show/Virtualization/qemu?expand=0&rev=692
58 lines
2.3 KiB
Diff
58 lines
2.3 KiB
Diff
From: Aurelien Jarno <aurelien@aurel32.net>
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Date: Fri, 28 Jan 2022 18:33:46 +0100
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Subject: Makefile: fix build with binutils 2.38
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Git-commit: 5d53b55aa77ffeefd4012445dfa6ad3535e1ff2c
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From version 2.38, binutils default to ISA spec version 20191213. This
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means that the csr read/write (csrr*/csrw*) instructions and fence.i
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instruction has separated from the `I` extension, become two standalone
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extensions: Zicsr and Zifencei. As the kernel uses those instruction,
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this causes the following build failure:
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CC lib/sbi/sbi_tlb.o
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<<BUILDDIR>>/lib/sbi/sbi_tlb.c: Assembler messages:
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<<BUILDDIR>>/lib/sbi/sbi_tlb.c:190: Error: unrecognized opcode `fence.i'
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make: *** [Makefile:431: <<BUILDDIR>>/build/lib/sbi/sbi_tlb.o] Error 1
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The fix is to specify those extensions explicitly in -march. However as
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older binutils version do not support this, we first need to detect
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that.
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
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Reviewed-by: Anup Patel <anup@brainfault.org>
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Signed-off-by: Dario Faggioli <dfaggioli@suse.com>
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---
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Makefile | 9 ++++++++-
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1 file changed, 8 insertions(+), 1 deletion(-)
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diff --git a/roms/opensbi/Makefile b/roms/opensbi/Makefile
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index d6f097d30af78c0fba92eeeec523..a294f46fa8e16caec64d5a88c2a2 100644
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--- a/roms/opensbi/Makefile
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+++ b/roms/opensbi/Makefile
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@@ -106,6 +106,9 @@ ifndef PLATFORM_RISCV_XLEN
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endif
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endif
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+# Check whether the assembler and the compiler support the Zicsr and Zifencei extensions
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+CC_SUPPORT_ZICSR_ZIFENCEI := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -march=rv$(OPENSBI_CC_XLEN)imafd_zicsr_zifencei -x c /dev/null -o /dev/null 2>&1 | grep "zicsr\|zifencei" > /dev/null && echo n || echo y)
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+
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# Setup list of objects.mk files
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ifdef PLATFORM
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platform-object-mks=$(shell if [ -d $(platform_src_dir)/ ]; then find $(platform_src_dir) -iname "objects.mk" | sort -r; fi)
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@@ -157,7 +160,11 @@ ifndef PLATFORM_RISCV_ABI
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endif
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ifndef PLATFORM_RISCV_ISA
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ifneq ($(PLATFORM_RISCV_TOOLCHAIN_DEFAULT), 1)
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- PLATFORM_RISCV_ISA = rv$(PLATFORM_RISCV_XLEN)imafdc
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+ ifeq ($(CC_SUPPORT_ZICSR_ZIFENCEI), y)
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+ PLATFORM_RISCV_ISA = rv$(PLATFORM_RISCV_XLEN)imafdc_zicsr_zifencei
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+ else
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+ PLATFORM_RISCV_ISA = rv$(PLATFORM_RISCV_XLEN)imafdc
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+ endif
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else
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PLATFORM_RISCV_ISA = $(OPENSBI_CC_ISA)
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endif
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