979cfb5342
Include SLE feature requests, misc upstream stable bug fixes, and repair Jira feature references OBS-URL: https://build.opensuse.org/request/show/762845 OBS-URL: https://build.opensuse.org/package/show/Virtualization/qemu?expand=0&rev=521
45 lines
1.6 KiB
Diff
45 lines
1.6 KiB
Diff
From: Simon Veith <sveith@amazon.de>
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Date: Fri, 20 Dec 2019 14:03:00 +0000
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Subject: hw/arm/smmuv3: Correct SMMU_BASE_ADDR_MASK value
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Git-commit: 3293b9f514a413e019b7dbc9d543458075b4849e
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There are two issues with the current value of SMMU_BASE_ADDR_MASK:
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- At the lower end, we are clearing bits [4:0]. Per the SMMUv3 spec,
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we should also be treating bit 5 as zero in the base address.
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- At the upper end, we are clearing bits [63:48]. Per the SMMUv3 spec,
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only bits [63:52] must be explicitly treated as zero.
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Update the SMMU_BASE_ADDR_MASK value to mask out bits [63:52] and [5:0].
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ref. ARM IHI 0070C, section 6.3.23.
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Signed-off-by: Simon Veith <sveith@amazon.de>
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Acked-by: Eric Auger <eric.auger@redhat.com>
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Tested-by: Eric Auger <eric.auger@redhat.com>
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Message-id: 1576509312-13083-3-git-send-email-sveith@amazon.de
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Cc: Eric Auger <eric.auger@redhat.com>
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Cc: qemu-devel@nongnu.org
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Cc: qemu-arm@nongnu.org
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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Bruce Rogers <brogers@suse.com>
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---
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hw/arm/smmuv3-internal.h | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h
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index d190181ef1bf3d116ecc48abc1bc..042b4358084b6b87e8b9e42d5622 100644
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--- a/hw/arm/smmuv3-internal.h
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+++ b/hw/arm/smmuv3-internal.h
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@@ -99,7 +99,7 @@ REG32(GERROR_IRQ_CFG2, 0x74)
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#define A_STRTAB_BASE 0x80 /* 64b */
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-#define SMMU_BASE_ADDR_MASK 0xffffffffffe0
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+#define SMMU_BASE_ADDR_MASK 0xfffffffffffc0
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REG32(STRTAB_BASE_CFG, 0x88)
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FIELD(STRTAB_BASE_CFG, FMT, 16, 2)
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