979cfb5342
Include SLE feature requests, misc upstream stable bug fixes, and repair Jira feature references OBS-URL: https://build.opensuse.org/request/show/762845 OBS-URL: https://build.opensuse.org/package/show/Virtualization/qemu?expand=0&rev=521
76 lines
2.9 KiB
Diff
76 lines
2.9 KiB
Diff
From: Simon Veith <sveith@amazon.de>
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Date: Fri, 20 Dec 2019 14:03:00 +0000
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Subject: hw/arm/smmuv3: Align stream table base address to table size
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Git-commit: 41678c33aac61261522b74f08595ccf2221a430a
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Per the specification, and as observed in hardware, the SMMUv3 aligns
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the SMMU_STRTAB_BASE address to the size of the table by masking out the
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respective least significant bits in the ADDR field.
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Apply this masking logic to our smmu_find_ste() lookup function per the
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specification.
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ref. ARM IHI 0070C, section 6.3.23.
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Signed-off-by: Simon Veith <sveith@amazon.de>
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Acked-by: Eric Auger <eric.auger@redhat.com>
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Tested-by: Eric Auger <eric.auger@redhat.com>
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Message-id: 1576509312-13083-5-git-send-email-sveith@amazon.de
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Cc: Eric Auger <eric.auger@redhat.com>
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Cc: qemu-devel@nongnu.org
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Cc: qemu-arm@nongnu.org
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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Bruce Rogers <brogers@suse.com>
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---
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hw/arm/smmuv3.c | 18 ++++++++++++++----
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1 file changed, 14 insertions(+), 4 deletions(-)
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diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
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index 727558bcfa5e782b8a9225adb302..31ac3ca32ebe3c1073350843c8ab 100644
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--- a/hw/arm/smmuv3.c
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+++ b/hw/arm/smmuv3.c
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@@ -376,8 +376,9 @@ bad_ste:
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static int smmu_find_ste(SMMUv3State *s, uint32_t sid, STE *ste,
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SMMUEventInfo *event)
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{
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- dma_addr_t addr;
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+ dma_addr_t addr, strtab_base;
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uint32_t log2size;
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+ int strtab_size_shift;
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int ret;
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trace_smmuv3_find_ste(sid, s->features, s->sid_split);
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@@ -391,10 +392,16 @@ static int smmu_find_ste(SMMUv3State *s, uint32_t sid, STE *ste,
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}
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if (s->features & SMMU_FEATURE_2LVL_STE) {
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int l1_ste_offset, l2_ste_offset, max_l2_ste, span;
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- dma_addr_t strtab_base, l1ptr, l2ptr;
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+ dma_addr_t l1ptr, l2ptr;
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STEDesc l1std;
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- strtab_base = s->strtab_base & SMMU_BASE_ADDR_MASK;
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+ /*
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+ * Align strtab base address to table size. For this purpose, assume it
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+ * is not bounded by SMMU_IDR1_SIDSIZE.
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+ */
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+ strtab_size_shift = MAX(5, (int)log2size - s->sid_split - 1 + 3);
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+ strtab_base = s->strtab_base & SMMU_BASE_ADDR_MASK &
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+ ~MAKE_64BIT_MASK(0, strtab_size_shift);
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l1_ste_offset = sid >> s->sid_split;
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l2_ste_offset = sid & ((1 << s->sid_split) - 1);
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l1ptr = (dma_addr_t)(strtab_base + l1_ste_offset * sizeof(l1std));
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@@ -433,7 +440,10 @@ static int smmu_find_ste(SMMUv3State *s, uint32_t sid, STE *ste,
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}
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addr = l2ptr + l2_ste_offset * sizeof(*ste);
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} else {
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- addr = (s->strtab_base & SMMU_BASE_ADDR_MASK) + sid * sizeof(*ste);
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+ strtab_size_shift = log2size + 5;
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+ strtab_base = s->strtab_base & SMMU_BASE_ADDR_MASK &
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+ ~MAKE_64BIT_MASK(0, strtab_size_shift);
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+ addr = strtab_base + sid * sizeof(*ste);
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}
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if (smmu_get_ste(s, addr, ste, event)) {
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