a8263c0693
- Include upstream patches designated as stable material and reviewed for applicability to include here block-Separate-blk_is_writable-and-blk_s.patch hw-intc-arm_gic-Fix-interrupt-ID-in-GICD.patch hw-net-lan9118-Fix-RX-Status-FIFO-PEEK-v.patch hw-timer-slavio_timer-Allow-64-bit-acces.patch net-Fix-handling-of-id-in-netdev_add-and.patch target-arm-Don-t-decode-insns-in-the-XSc.patch target-arm-Fix-MTE0_ACTIVE.patch target-arm-Introduce-PREDDESC-field-defi.patch target-arm-Update-PFIRST-PNEXT-for-pred_.patch target-arm-Update-REV-PUNPK-for-pred_des.patch target-arm-Update-ZIP-UZP-TRN-for-pred_d.patch tcg-Use-memset-for-large-vector-byte-rep.patch ui-vnc-Add-missing-lock-for-send_color_m.patch virtio-move-use-disabled-flag-property-t.patch - binutils v2.36 has changed the handling of the assembler's -mx86-used-note, resulting in a build failure. To compensate, we now explicitly specify -mx86-used-note=no in the seabios Makefile (boo#1181775) build-be-explicit-about-mx86-used-note-n.patch OBS-URL: https://build.opensuse.org/request/show/869843 OBS-URL: https://build.opensuse.org/package/show/Virtualization/qemu?expand=0&rev=614
124 lines
4.2 KiB
Diff
124 lines
4.2 KiB
Diff
From: Richard Henderson <richard.henderson@linaro.org>
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Date: Tue, 15 Dec 2020 11:47:59 -0600
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Subject: tcg: Use memset for large vector byte replication
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Git-commit: 6d3ef04893bdea3e7aa08be3cce5141902836a31
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In f47db80cc07, we handled odd-sized tail clearing for
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the case of hosts that have vector operations, but did
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not handle the case of hosts that do not have vector ops.
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This was ok until e2e7168a214b, which changed the encoding
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of simd_desc such that the odd sizes are impossible.
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Add memset as a tcg helper, and use that for all out-of-line
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byte stores to vectors. This includes, but is not limited to,
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the tail clearing operation in question.
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Cc: qemu-stable@nongnu.org
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Buglink: https://bugs.launchpad.net/bugs/1907817
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Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Signed-off-by: Bruce Rogers <brogers@suse.com>
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---
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accel/tcg/tcg-runtime.h | 11 +++++++++++
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include/exec/helper-proto.h | 4 ++++
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tcg/tcg-op-gvec.c | 32 ++++++++++++++++++++++++++++++++
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3 files changed, 47 insertions(+)
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diff --git a/accel/tcg/tcg-runtime.h b/accel/tcg/tcg-runtime.h
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index 4eda24e63af46de4873822cdabf5..2e36d6eb0c66393ffa3656e88401 100644
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--- a/accel/tcg/tcg-runtime.h
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+++ b/accel/tcg/tcg-runtime.h
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@@ -28,6 +28,17 @@ DEF_HELPER_FLAGS_1(lookup_tb_ptr, TCG_CALL_NO_WG_SE, ptr, env)
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DEF_HELPER_FLAGS_1(exit_atomic, TCG_CALL_NO_WG, noreturn, env)
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+#ifndef IN_HELPER_PROTO
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+/*
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+ * Pass calls to memset directly to libc, without a thunk in qemu.
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+ * Do not re-declare memset, especially since we fudge the type here;
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+ * we assume sizeof(void *) == sizeof(size_t), which is true for
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+ * all supported hosts.
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+ */
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+#define helper_memset memset
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+DEF_HELPER_FLAGS_3(memset, TCG_CALL_NO_RWG, ptr, ptr, int, ptr)
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+#endif /* IN_HELPER_PROTO */
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+
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#ifdef CONFIG_SOFTMMU
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DEF_HELPER_FLAGS_5(atomic_cmpxchgb, TCG_CALL_NO_WG,
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diff --git a/include/exec/helper-proto.h b/include/exec/helper-proto.h
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index a0a8d9aa46f02eaeec1ffdd6a547..659f9298e8fe2935cd3ea9931d44 100644
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--- a/include/exec/helper-proto.h
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+++ b/include/exec/helper-proto.h
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@@ -35,11 +35,15 @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
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dh_ctype(t4), dh_ctype(t5), dh_ctype(t6), \
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dh_ctype(t7));
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+#define IN_HELPER_PROTO
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+
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#include "helper.h"
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#include "trace/generated-helpers.h"
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#include "tcg-runtime.h"
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#include "plugin-helpers.h"
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+#undef IN_HELPER_PROTO
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+
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#undef DEF_HELPER_FLAGS_0
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#undef DEF_HELPER_FLAGS_1
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#undef DEF_HELPER_FLAGS_2
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diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c
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index ddbe06b71a81fad997c6348b68d9..1a41dfa90871740669799867f34d 100644
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--- a/tcg/tcg-op-gvec.c
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+++ b/tcg/tcg-op-gvec.c
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@@ -547,6 +547,9 @@ static void do_dup(unsigned vece, uint32_t dofs, uint32_t oprsz,
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in_c = dup_const(vece, in_c);
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if (in_c == 0) {
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oprsz = maxsz;
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+ vece = MO_8;
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+ } else if (in_c == dup_const(MO_8, in_c)) {
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+ vece = MO_8;
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}
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}
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@@ -628,6 +631,35 @@ static void do_dup(unsigned vece, uint32_t dofs, uint32_t oprsz,
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/* Otherwise implement out of line. */
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t_ptr = tcg_temp_new_ptr();
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tcg_gen_addi_ptr(t_ptr, cpu_env, dofs);
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+
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+ /*
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+ * This may be expand_clr for the tail of an operation, e.g.
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+ * oprsz == 8 && maxsz == 64. The size of the clear is misaligned
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+ * wrt simd_desc and will assert. Simply pass all replicated byte
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+ * stores through to memset.
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+ */
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+ if (oprsz == maxsz && vece == MO_8) {
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+ TCGv_ptr t_size = tcg_const_ptr(oprsz);
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+ TCGv_i32 t_val;
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+
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+ if (in_32) {
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+ t_val = in_32;
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+ } else if (in_64) {
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+ t_val = tcg_temp_new_i32();
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+ tcg_gen_extrl_i64_i32(t_val, in_64);
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+ } else {
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+ t_val = tcg_const_i32(in_c);
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+ }
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+ gen_helper_memset(t_ptr, t_ptr, t_val, t_size);
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+
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+ if (!in_32) {
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+ tcg_temp_free_i32(t_val);
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+ }
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+ tcg_temp_free_ptr(t_size);
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+ tcg_temp_free_ptr(t_ptr);
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+ return;
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+ }
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+
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t_desc = tcg_const_i32(simd_desc(oprsz, maxsz, 0));
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if (vece == MO_64) {
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