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Accepting request 792037 from Base:System

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OBS-URL: https://build.opensuse.org/request/show/792037
OBS-URL: https://build.opensuse.org/package/show/openSUSE:Factory/s390-tools?expand=0&rev=31
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Dominique Leuenberger 2020-04-13 10:49:47 +00:00 committed by Git OBS Bridge
commit a804c82051
5 changed files with 989 additions and 431 deletions
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read_values.c
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@ -1,430 +1,535 @@
/********************************************************************************/ /********************************************************************************/
/* */ /* */
/* Copyright (C) 2014-2015, 2019 SUSE LLC */ /* Copyright (C) 2014-2015, 2019-2020 SUSE LLC */
/* */ /* */
/* All rights reserved. /* All rights reserved.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#define _GNU_SOURCE #define _GNU_SOURCE
#include <ctype.h> #include <sys/utsname.h>
#include <stddef.h> #include <ctype.h>
#include <stdio.h> #include <stddef.h>
#include <stdlib.h> #include <stdio.h>
#include <errno.h> #include <stdlib.h>
#include <string.h> #include <errno.h>
#include <unistd.h> #include <string.h>
#include <query_capacity.h> #include <unistd.h>
#include <query_capacity.h>
/*
* Data types /*
*/ * Data types
enum datatypes { */
integer, enum datatypes {
string, integer,
floatingpoint string,
}; floatingpoint
};
#define WITHOUT_KEY 0
#define WITH_KEY 1 #define WITHOUT_KEY 0
#define WITH_KEY 1
static char *versionstring = "Version 1.0 2015-10-12 13:31";
static char *versionstring = "Version 1.0.2 2020-03-30 23:30";
static char *version = "1.0.0";
static char *version = "1.0.2";
void *configuration_handle = NULL;
int layers = -1; void *configuration_handle = NULL;
int layers = -1;
/*
* List of machine types /*
*/ * List of machine types
struct machinetype { */
char *typenumber; struct machinetype {
char *fullname; enum qc_model_families model_families;
} machinetypes[] = { char *typenumber;
{ "2064", "2064 = z900 IBM eServer zSeries 900" }, char *fullname;
{ "2066", "2066 = z800 IBM eServer zSeries 800" }, } machinetypes[] = {
{ "2084", "2084 = z990 IBM eServer zSeries 990" }, { QC_TYPE_FAMILY_IBMZ, "2064", "2064 = z900 IBM eServer zSeries 900" },
{ "2086", "2086 = z890 IBM eServer zSeries 890" }, { QC_TYPE_FAMILY_IBMZ, "2066", "2066 = z800 IBM eServer zSeries 800" },
{ "2094", "2094 = z9-EC IBM System z9 Enterprise Class" }, { QC_TYPE_FAMILY_IBMZ, "2084", "2084 = z990 IBM eServer zSeries 990" },
{ "2096", "2096 = z9-BC IBM System z9 Business Class" }, { QC_TYPE_FAMILY_IBMZ, "2086", "2086 = z890 IBM eServer zSeries 890" },
{ "2097", "2097 = z10-EC IBM System z10 Enterprise Class" }, { QC_TYPE_FAMILY_IBMZ, "2094", "2094 = z9-EC IBM System z9 Enterprise Class" },
{ "2098", "2098 = z10-BC IBM System z10 Business Class" }, { QC_TYPE_FAMILY_IBMZ, "2096", "2096 = z9-BC IBM System z9 Business Class" },
{ "2817", "2817 = z196 IBM zEnterprise 196" }, { QC_TYPE_FAMILY_IBMZ, "2097", "2097 = z10-EC IBM System z10 Enterprise Class" },
{ "2818", "2818 = z114 IBM zEnterprise 114" }, { QC_TYPE_FAMILY_IBMZ, "2098", "2098 = z10-BC IBM System z10 Business Class" },
{ "2827", "2827 = z12-EC IBM zEnterprise EC12" }, { QC_TYPE_FAMILY_IBMZ, "2817", "2817 = z196 IBM zEnterprise 196" },
{ "2828", "2828 = z12-BC IBM zEnterprise BC12" }, { QC_TYPE_FAMILY_IBMZ, "2818", "2818 = z114 IBM zEnterprise 114" },
{ "2964", "2964 = z13 IBM z13" }, { QC_TYPE_FAMILY_IBMZ, "2827", "2827 = z12-EC IBM zEnterprise EC12" },
{ "2965", "2965 = z13s IBM z13s (single frame)" }, { QC_TYPE_FAMILY_IBMZ, "2828", "2828 = z12-BC IBM zEnterprise BC12" },
{ "3906", "3906 = z14 IBM z14" }, { QC_TYPE_FAMILY_IBMZ, "2964", "2964 = z13 IBM z13" },
{ "3907", "3907 = z14 ZR1 IBM z14 ZR1" }, { QC_TYPE_FAMILY_LINUXONE, "2964", "2964 = IBM LinuxONE Emperor" },
{ "8561", "8561 = z15 IBM z15" }, { QC_TYPE_FAMILY_IBMZ, "2965", "2965 = z13s IBM z13s (single frame)" },
}; { QC_TYPE_FAMILY_LINUXONE, "2965", "2965 = IBM LinuxONE Rockhopper" },
{ QC_TYPE_FAMILY_IBMZ, "3906", "3906 = z14 IBM z14" },
int debug = 0; { QC_TYPE_FAMILY_LINUXONE, "3906", "3906 = IBM LinuxONE Emperor II" },
{ QC_TYPE_FAMILY_IBMZ, "3907", "3907 = z14 ZR1 IBM z14 ZR1" },
/******************************************************************************/ { QC_TYPE_FAMILY_LINUXONE, "3907", "3907 = IBM LinuxONE Rockhopper II" },
/* */ { QC_TYPE_FAMILY_IBMZ, "8561", "8561 = z15 IBM z15" },
/* */ { QC_TYPE_FAMILY_LINUXONE, "8561", "8561 = IBM LinuxONE III" },
/* */ };
/******************************************************************************/
void print_version() int debug = 0;
{
printf("Version: %s\n", version); /******************************************************************************/
} /* */
/******************************************************************************/ /* Print the program version */
/* */ /* */
/* Look for one attribute and print it */ /******************************************************************************/
/* */ void print_version()
/******************************************************************************/ {
void print_attribute(char *user_string, int level, enum qc_attr_id attribute, enum datatypes type, int print_key) printf("Version: %s\n", version);
{ }
int erg = 0; /******************************************************************************/
const char *result_string = NULL; /* */
int result_int = 0; /* Look for one attribute and print it */
float result_float = 0.0; /* */
/******************************************************************************/
switch (type) void print_attribute(char *user_string, int level, enum qc_attr_id attribute, enum datatypes type, int print_key)
{ {
case integer: int erg = 0;
erg = qc_get_attribute_int(configuration_handle, attribute, level, &result_int); const char *result_string = NULL;
break; int result_int = 0;
case string: float result_float = 0.0;
erg = qc_get_attribute_string(configuration_handle, attribute, level, &result_string);
break; switch (type)
case floatingpoint: {
erg = qc_get_attribute_float(configuration_handle, attribute, level, &result_float); case integer:
break; erg = qc_get_attribute_int(configuration_handle, attribute, level, &result_int);
default: break;
break; case string:
} erg = qc_get_attribute_string(configuration_handle, attribute, level, &result_string);
if (erg == 1) { break;
if (print_key == WITH_KEY) { case floatingpoint:
printf("%s: ",(user_string == NULL? "NULL": user_string)); erg = qc_get_attribute_float(configuration_handle, attribute, level, &result_float);
} /* endif */ break;
switch (type) default:
{ break;
case integer: }
printf("%d\n",result_int); if (erg == 1) {
break; if (print_key == WITH_KEY) {
case string: printf("%s: ",(user_string == NULL? "NULL": user_string));
printf("%s\n", result_string); } /* endif */
break; switch (type)
case floatingpoint: {
printf("%f\n",result_float); case integer:
break; printf("%d\n",result_int);
default: break;
break; case string:
} printf("%s\n", result_string);
} /* endif */ break;
else { case floatingpoint:
printf("Fehler: erg = %d, result_string = %s \n", erg, (result_string == NULL? "NULL": result_string)); printf("%f\n",result_float);
/* TODO qc_get_attribute_string returned error */ break;
} default:
} /* print_attribute */ break;
}
/********************************************************************************/ } /* endif */
/* */ else {
/* Open the lib and get the handle */ printf("Error: erg = %d, result_string = %s \n", erg, (result_string == NULL? "NULL": result_string));
/* */ /* TODO qc_get_attribute_string returned error */
/********************************************************************************/ }
int read_sysinfo() } /* print_attribute */
{
int return_code; /********************************************************************************/
/* */
configuration_handle = qc_open(&return_code); /* Open the lib and get the handle */
if (return_code < 0) { /* */
printf("Error: Unable to open configuration, return_code =%d\n", return_code); /********************************************************************************/
return -1; int read_sysinfo()
} /* endif */ {
if (return_code > 0) { int return_code;
printf("Warning: Unable to read configuration completely, return_code =%d\n", return_code);
return -2; configuration_handle = qc_open(&return_code);
} /* endif */ if (return_code < 0) {
if (configuration_handle == NULL) { printf("Error: Unable to open configuration, return_code =%d\n", return_code);
printf("Error: Unable to open configuration, return_code =%d\n", return_code); return -1;
return -3; } /* endif */
} /* endif */ if (return_code > 0) {
layers = qc_get_num_layers(configuration_handle, &return_code); printf("Warning: Unable to read configuration completely, return_code =%d\n", return_code);
if (layers < 0) { return -2;
printf("Error: Unable to retrieve number of layers, return_code =%d\n", return_code); } /* endif */
return -4; if (configuration_handle == NULL) {
} /* endif */ printf("Error: Unable to open configuration, return_code =%d\n", return_code);
return 0; return -3;
} /* read_sysinfo */ } /* endif */
layers = qc_get_num_layers(configuration_handle, &return_code);
/********************************************************************************/ if (layers < 0) {
/* */ printf("Error: Unable to retrieve number of layers, return_code =%d\n", return_code);
/* Look at the type of machine we're running on and print out a user */ return -4;
/* friendly string */ } /* endif */
/* */ return 0;
/********************************************************************************/ } /* read_sysinfo */
void print_cputype()
{ /********************************************************************************/
int i, search; /* */
int erg; /* Look at the type of machine we're running on and print out a user */
const char *cpu_type = NULL; /* friendly string */
/* */
erg = qc_get_attribute_string(configuration_handle, qc_type, 0, &cpu_type); /********************************************************************************/
if (erg == 1 && cpu_type != NULL) { void print_cputype()
for (i = 0, search = 1; (i < sizeof(machinetypes) / sizeof(struct machinetype)) && search ; i++) {
{ int i, search;
if (strcmp(cpu_type, machinetypes[i].typenumber) == 0) { int erg;
printf("%s\n", machinetypes[i].fullname); const char *cpu_type = NULL;
search = 0; int family_type = -1;
} /* endif */
} /* endfor */ /*
if (search != 0) { * First find out whether we run on an IBM Z, or a LinuxONE system
printf("An unknown machine type was reported: %s\n\ */
Please file a bug report with this output:\n" , cpu_type); erg = qc_get_attribute_int(configuration_handle, qc_type_family, 0, &family_type);
/* TODO output of /proc/sysinfo */ if (erg <= 0 || family_type == -1) {
} /* endif */ printf("Error reading family type\n");
} /* endif */ return;
return; } /* endif */
} /* print_cputype */ /*
* Now get the machine ID
/********************************************************************************/ */
/* */ erg = qc_get_attribute_string(configuration_handle, qc_type, 0, &cpu_type);
/* Print out the values for SCC */ if (erg == 1 && cpu_type != NULL) {
/* */ for (i = 0, search = 1; (i < sizeof(machinetypes) / sizeof(struct machinetype)) && search ; i++)
/* To uniquely identify a machine the following information is used: */ {
/* */ if ((family_type == machinetypes[i].model_families) && (strcmp(cpu_type, machinetypes[i].typenumber) == 0)) {
/* Type */ printf("%s\n", machinetypes[i].fullname);
/* Sequence code */ search = 0;
/* CPUs total */ } /* endif */
/* CPUs IFL */ } /* endfor */
/* LPAR Number */ if (search != 0) {
/* LPAR Characteristics: */ printf("An unknown machine type was reported: %s\n\
/* LPAR CPUs */ Please file a bug report with this output:\n" , cpu_type);
/* LPAR IFLs */ /* TODO output of /proc/sysinfo */
/* */ } /* endif */
/* Optional: */ } /* endif */
/* */ return;
/* VM00 Name */ } /* print_cputype */
/* VM00 Control Programm */
/* VM00 CPUs */ /********************************************************************************/
/* */ /* */
/********************************************************************************/ /* Print out the values for SCC */
void print_scc() /* */
{ /* To uniquely identify a machine the following information is used: */
print_version(); /* */
print_attribute("Type", 0, qc_type, string, WITH_KEY); /* Type */
print_attribute("Sequence Code", 0, qc_sequence_code, string, WITH_KEY); /* Sequence code */
print_attribute("CPUs Total", 0, qc_num_cpu_total, integer, WITH_KEY); /* CPUs total */
print_attribute("CPUs IFL", 0, qc_num_cpu_total, integer, WITH_KEY); /* CPUs IFL */
print_attribute("LPAR Number", 1, qc_partition_number, integer, WITH_KEY); /* LPAR Number */
print_attribute("LPAR Name", 1, qc_layer_name, string, WITH_KEY); /* LPAR Characteristics: */
print_attribute("LPAR Characteristics", 1, qc_partition_char, string, WITH_KEY); /* LPAR CPUs */
print_attribute("LPAR CPUs Total", 1, qc_num_cpu_total, integer, WITH_KEY); /* LPAR IFLs */
print_attribute("LPAR CPUs IFL", 1, qc_num_cpu_total, integer, WITH_KEY); /* */
if (layers > 2) { /* Optional: */
/* /* */
* This means, that eather zKVM or z/Vm is running /* VM00 Name */
*/ /* VM00 Control Programm */
print_attribute("VM00 Name", 3, qc_layer_name, string, WITH_KEY); /* VM00 CPUs */
print_attribute("VM00 Control Program", 2, qc_control_program_id, string, WITH_KEY); /* */
print_attribute("VM00 CPUs Total", 3, qc_num_cpu_total, integer, WITH_KEY); /********************************************************************************/
print_attribute("VM00 IFLs", 3, qc_num_cpu_total, integer, WITH_KEY); void print_scc()
} /* endif */ {
return; print_version();
} /* print_scc */ print_attribute("Type", 0, qc_type, string, WITH_KEY);
print_attribute("Sequence Code", 0, qc_sequence_code, string, WITH_KEY);
/******************************************************************************/ print_attribute("CPUs Total", 0, qc_num_ifl_total, integer, WITH_KEY);
/* */ print_attribute("CPUs IFL", 0, qc_num_ifl_total, integer, WITH_KEY);
/* print out the uuid for this machine */ print_attribute("LPAR Number", 1, qc_partition_number, integer, WITH_KEY);
/* */ print_attribute("LPAR Name", 1, qc_layer_name, string, WITH_KEY);
/* TODO! */ print_attribute("LPAR Characteristics", 1, qc_partition_char, string, WITH_KEY);
/* */ print_attribute("LPAR CPUs Total", 1, qc_num_ifl_total, integer, WITH_KEY);
/******************************************************************************/ print_attribute("LPAR CPUs IFL", 1, qc_num_ifl_total, integer, WITH_KEY);
void print_uuid() if (layers > 2) {
{ /*
return; * This means, that eather zKVM or z/Vm is running
} /* print_uuid */ */
print_attribute("VM00 Name", 3, qc_layer_name, string, WITH_KEY);
/******************************************************************************/ print_attribute("VM00 Control Program", 2, qc_control_program_id, string, WITH_KEY);
/* */ print_attribute("VM00 CPUs Total", 3, qc_num_cpu_total, integer, WITH_KEY);
/* print out the list of valid / found symbols */ print_attribute("VM00 IFLs", 3, qc_num_cpu_total, integer, WITH_KEY);
/* */ } /* endif */
/******************************************************************************/ return;
void list(char * list_attribute_param) } /* print_scc */
{
return; /******************************************************************************/
} /* list */ /* */
/* print out whether secure boot is enabled */
/******************************************************************************/ /* */
/* */ /******************************************************************************/
/* print out the requested attribute */ void print_secure_mode()
/* */ {
/******************************************************************************/ int erg;
void print_user_attribute(char *key, char *attribute_param, int layer) int release_major;
{ int release_sub;
return; int release_minor;
} /* print_uuid */ const char *cpu_type = NULL;
/*
* First we have to check whether we have the appropriate kernel Level (>= 5.3)
/******************************************************************************/ */
/* */
/* Help Function */ struct utsname uts;
/* */
/******************************************************************************/ erg = uname(&uts);
void help() if (erg != 0) {
{ perror ("Error executing uname(): ");
puts("help:\n\ return;
\n\ } /* endif */
-a <attribute> List the value of the named attribute\n\ #if 0
-c Print the cputype of this machine\n\ printf("sysname: %s\n", uts.sysname);
-d <number> Debug Level\n\ printf("nodename: %s\n", uts.nodename);
-h this help\n\ printf("release: %s\n", uts.release);
-L <keyword> List the requested list (Attribute, Recognised)\n\ #endif
-s create Info for SCC\n\ /*
-u create uuid\n\ * A release number looks like: m.s.mi
-V print version string\n\ * where m, s, mi are numbers with one ore more digits
"); * Minimum kernel version is 5.3
#if 0 */
if (debug != 0) { erg = sscanf(uts.release,"%d.%d.%d-%*s", &release_major, &release_sub, &release_minor);
puts("\n\ if ( release_major < 5 ) {
Valid values for debug:\n\ goto return_does_not_exist;
4 - read sysinfo.zvm from current directory instead of /proc/sysinfo\n\ }
8 - printout lines read in from source (see debug == 4)\n\ if ( release_sub < 3 ) {
16 - printf found keys in store_value\n\ goto return_does_not_exist;
32 - Search expression in show attribute\n\ }
"); #if 0
} /* endif */ printf("Translated successfully: %d\n", erg);
#endif printf("release_major: %d\n", release_major);
} /* help */ printf("release_sub: %d\n", release_sub);
printf("release_minor: %d\n", release_minor);
/******************************************************************************/ printf("version: %s\n", uts.version);
/* */ printf("machine: %s\n", uts.machine);
/* Main */ printf("Print_secure called\n");
/* */ #endif
/******************************************************************************/ /*
int main(int argc, char **argv, char **envp) * Only the following machines support secure boot: z14, z14 ZR1, z15
{ * 3906, 3907, 8561
int opt; */
int read_sysinfo_opt; erg = qc_get_attribute_string(configuration_handle, qc_type, 0, &cpu_type);
int print_attr; if (erg == 1 && cpu_type != NULL) {
int print_cpu; if (strcmp(cpu_type, "3906") != 0) {
int print_help; if (strcmp(cpu_type, "3907") != 0) {
int list_attr; if (strcmp(cpu_type, "8561") != 0) {
int create_scc; goto return_does_not_exist;
int create_uuid; } /* endif */
int erg; } /* endif */
int return_code; } /* endif */
char *print_attribute_param = NULL; } /* endif */
char *list_attribute_param = NULL; print_attribute("Secure mode on", 1, qc_has_secure, integer, WITH_KEY);
void *configuration_handle_tmp = NULL; print_attribute("Secure mode used", 1, qc_secure, integer, WITH_KEY);
return;
read_sysinfo_opt =
print_attr = return_does_not_exist:
print_cpu = /*
print_help = * Software or hardware does not support secure boot.
list_attr = */
create_scc = puts("Secure mode on: 0\nSecure mode used: 0");
create_uuid = return;
return_code = } /* print_secure_mode */
erg = 0;
if (strcmp(argv[0],"cputype") == 0) { /******************************************************************************/
read_sysinfo_opt++; /* */
print_cpu++; /* print out the uuid for this machine */
} /* endif */ /* */
else { /* TODO! */
while ((opt = getopt(argc, argv, "a:cd:hL:suV")) != -1) { /* */
switch (opt) /******************************************************************************/
{ void print_uuid()
case 'a': {
read_sysinfo_opt++; return;
print_attr++; } /* print_uuid */
print_attribute_param = strdup(optarg);
break; /******************************************************************************/
case 'c': /* */
read_sysinfo_opt++; /* print out the list of valid / found symbols */
print_cpu++; /* */
break; /******************************************************************************/
case 'd': void list(char * list_attribute_param)
debug = atoi(optarg); {
if ((debug & 1) == 1) { return;
setenv("QC_DEBUG", "1", 1); } /* list */
} /* endif */
if ((debug & 2) == 2) { /******************************************************************************/
setenv("QC_AUTODUMP", "1", 1); /* */
} /* endif */ /* print out the requested attribute */
debug = debug >> 2; /* */
break; /******************************************************************************/
case 'L': void print_user_attribute(char *key, char *attribute_param, int layer)
read_sysinfo_opt++; {
list_attr++; return;
list_attribute_param = strdup(optarg); } /* print_user_attribute */
break;
case 's': /* create unique string for scc */
read_sysinfo_opt++; /******************************************************************************/
create_scc++; /* */
break; /* Help Function */
case 'u': /* create UUID */ /* */
read_sysinfo_opt++; /******************************************************************************/
create_uuid++; void help()
break; {
case 'V': puts("help:\n\
printf("%s\n",versionstring); \n\
return 0; -a <attribute> List the value of the named attribute\n\
break; -c Print the cputype of this machine\n\
case 'h': -d <number> Debug Level\n\
default: -h this help\n\
print_help++; -L <keyword> List the requested list (Attribute, Recognised)\n\
break; -s create Info for SCC\n\
} /* endswitch */ -S report whether secure boot is switched on\n\
} /* while */ -u create uuid\n\
} /* endlse */ -V print version string\n\
if (print_help != 0) { ");
help(); #if 0
return 0; if (debug != 0) {
} /* endif */ puts("\n\
if (read_sysinfo_opt != 0) { Valid values for debug:\n\
if ((erg = read_sysinfo()) != 0) { 4 - read sysinfo.zvm from current directory instead of /proc/sysinfo\n\
return -erg; 8 - printout lines read in from source (see debug == 4)\n\
} /* endif */ 16 - printf found keys in store_value\n\
} /* endif */ 32 - Search expression in show attribute\n\
if ((print_attr + print_cpu + list_attr + create_scc + create_uuid) > 1) { ");
fputs("Only one of the options a, c, L, s or u can be specified.",stderr); } /* endif */
return 1; #endif
} /* endif */ } /* help */
/* still not im[plemented thatfore set to zero */
create_uuid = list_attr = print_attr = 0; /******************************************************************************/
if (print_attr != 0) { /* */
print_user_attribute(NULL, print_attribute_param, layers); /* Main */
goto main_exit; /* */
} /* endif */ /******************************************************************************/
if (print_cpu != 0) { int main(int argc, char **argv, char **envp)
print_cputype(); {
goto main_exit; int opt;
} /* endif */ int read_sysinfo_opt;
if (list_attr != 0) { int print_attr;
list(list_attribute_param); int print_cpu;
goto main_exit; int print_secure;
} /* endif */ int print_help;
if (create_scc != 0) { int list_attr;
print_scc(); int create_scc;
goto main_exit; int create_uuid;
} /* endif */ int erg;
if (create_uuid != 0) { int return_code;
print_uuid(); char *print_attribute_param = NULL;
goto main_exit; char *list_attribute_param = NULL;
} /* endif */ void *configuration_handle_tmp = NULL;
help();
main_exit: read_sysinfo_opt =
if (configuration_handle != NULL) { print_attr =
configuration_handle_tmp = qc_open(&return_code); print_cpu =
qc_close(configuration_handle); print_secure =
setenv("QC_DEBUG", "0", 1); print_help =
setenv("QC_AUTODUMP", "0", 1); list_attr =
qc_close(configuration_handle_tmp); create_scc =
} /* endif */ create_uuid =
return 0; return_code =
} /* end main */ erg = 0;
if (strcmp(argv[0],"cputype") == 0) {
read_sysinfo_opt++;
print_cpu++;
} /* endif */
else {
while ((opt = getopt(argc, argv, "a:cd:hL:sSuV")) != -1) {
switch (opt)
{
case 'a':
read_sysinfo_opt++;
print_attr++;
print_attribute_param = strdup(optarg);
break;
case 'c':
read_sysinfo_opt++;
print_cpu++;
break;
case 'd':
debug = atoi(optarg);
if ((debug & 1) == 1) {
setenv("QC_DEBUG", "1", 1);
} /* endif */
if ((debug & 2) == 2) {
setenv("QC_AUTODUMP", "1", 1);
} /* endif */
debug = debug >> 2;
break;
case 'L':
read_sysinfo_opt++;
list_attr++;
list_attribute_param = strdup(optarg);
break;
case 's': /* create unique string for scc */
read_sysinfo_opt++;
create_scc++;
break;
case 'S': /* print out whether secure boot is enabled */
read_sysinfo_opt++;
print_secure++;
break;
case 'u': /* create UUID */
read_sysinfo_opt++;
create_uuid++;
break;
case 'V':
printf("%s\n",versionstring);
return 0;
break;
case 'h':
default:
print_help++;
break;
} /* endswitch */
} /* while */
} /* endlse */
if (print_help != 0) {
help();
return 0;
} /* endif */
if (read_sysinfo_opt != 0) {
if ((erg = read_sysinfo()) != 0) {
return -erg;
} /* endif */
} /* endif */
if ((print_attr + print_cpu + print_secure + list_attr + create_scc + create_uuid) > 1) {
fputs("Only one of the options a, c, L, s, S or u can be specified.\n",stderr);
return 1;
} /* endif */
/* still not im[plemented thatfore set to zero */
create_uuid = list_attr = print_attr = 0;
if (print_attr != 0) {
print_user_attribute(NULL, print_attribute_param, layers);
goto main_exit;
} /* endif */
if (print_cpu != 0) {
print_cputype();
goto main_exit;
} /* endif */
if (print_secure != 0) {
print_secure_mode();
goto main_exit;
} /* endif */
if (list_attr != 0) {
list(list_attribute_param);
goto main_exit;
} /* endif */
if (create_scc != 0) {
print_scc();
goto main_exit;
} /* endif */
if (create_uuid != 0) {
print_uuid();
goto main_exit;
} /* endif */
help();
main_exit:
if (configuration_handle != NULL) {
configuration_handle_tmp = qc_open(&return_code);
qc_close(configuration_handle);
setenv("QC_DEBUG", "0", 1);
setenv("QC_AUTODUMP", "0", 1);
qc_close(configuration_handle_tmp);
} /* endif */
return 0;
} /* end main */

1
s390-tools-rpmlintrc
View File

@ -1,4 +1,3 @@
addFilter("/var/log/ts-shell")
addFilter("statically-linked-binary /usr/lib/s390-tools/.*") addFilter("statically-linked-binary /usr/lib/s390-tools/.*")
addFilter("statically-linked-binary /usr/bin/read_values") addFilter("statically-linked-binary /usr/bin/read_values")
addFilter("systemd-service-without-service_.* *@.service") addFilter("systemd-service-without-service_.* *@.service")

442
s390-tools-sles15sp2-01-cpumf-add-new-deflate-counters-for-z15.patch Normal file
View File

@ -0,0 +1,442 @@
Subject: [PATCH] [BZ 184585] cpumf/data: Add new deflate counters for IBM z15
From: Thomas Richter <tmricht@linux.ibm.com>
Description: lscpumf: New z15 CPU-MF counters not available
Symptom: Command lscpumf -c does not show the new
deflate counters on IBM z15.
Problem: The new counter names have not been published
in document SA23-2261-06 by the time te code was
release.
Solution: Add the definition for the new deflate counters.
Reproduction: Run command lscpumf -c and check for counters
rf7, rfc, r107 and r108.
Upstream-ID: 5d2871d626de6c2b3ab6b12783b87a8b3564cb56
Problem-ID: 184585
Upstream-Description:
cpumf/data: Add new deflate counters for IBM z15
Add support for new deflate counters:
- Counter 247: cycles CPU spent obtaining access to Deflate unit
- Counter 252: cycles CPU is using Deflate unit
- Counter 264: Increments by one for every DEFLATE CONVERSION CALL
instruction executed.
- Counter 265: Increments by one for every DEFLATE CONVERSION CALL
instruction executed that ended in Condition Codes
0, 1 or 2.
Signed-off-by: Thomas Richter <tmricht@linux.ibm.com>
Signed-off-by: Jan Hoeppner <hoeppner@linux.ibm.com>
Signed-off-by: Thomas Richter <tmricht@linux.ibm.com>
---
cpumf/Makefile | 3
cpumf/data/cpum-cf-extended-z15.ctr | 376 ++++++++++++++++++++++++++++++++++++
cpumf/data/cpum-cf-hw-counter.map | 5
3 files changed, 380 insertions(+), 4 deletions(-)
--- a/cpumf/Makefile
+++ b/cpumf/Makefile
@@ -9,7 +9,8 @@ DATA_FILES = cpum-cf-hw-counter.map \
cpum-cf-csvn-12345.ctr cpum-cf-csvn-6.ctr \
cpum-cf-extended-z10.ctr cpum-cf-extended-z196.ctr \
cpum-cf-extended-zEC12.ctr cpum-sf-modes.ctr \
- cpum-cf-extended-z13.ctr cpum-cf-extended-z14.ctr
+ cpum-cf-extended-z13.ctr cpum-cf-extended-z14.ctr \
+ cpum-cf-extended-z15.ctr
LIB_FILES = bin/cpumf_helper
USRBIN_SCRIPTS = bin/lscpumf
USRSBIN_SCRIPTS = bin/chcpumf
--- /dev/null
+++ b/cpumf/data/cpum-cf-extended-z15.ctr
@@ -0,0 +1,376 @@
+# Counter decriptions for the
+# IBM z14 extended counter and MT-diagnostic counter set
+#
+# Notes for transactional-execution mode symbolic names:
+# TX .. transactional-execution mode
+# NC .. nonconstrained
+# C .. constrained
+#
+# Undefined counters in the extended counter set:
+# 142
+# 158-161
+# 176-223
+# 227-231
+# 233-242
+# 246-255
+# Undefined counters in the MT-diagnostic counter set:
+# 450-495
+#
+#
+# Extended Counter Set
+# ---------------------------------------------------------------------
+Counter:128 Name:L1D_RO_EXCL_WRITES
+Short-Description:L1D Read-only Exclusive Writes
+Description:
+A directory write to the Level-1 Data cache where the line was
+originally in a Read-Only state in the cache but has been updated
+to be in the Exclusive state that allows stores to the cache line
+.
+Counter:129 Name:DTLB2_WRITES
+Short-Description:DTLB2 Writes
+Description:
+A translation has been written into The Translation Lookaside
+Buffer 2 (TLB2) and the request was made by the data cache
+.
+Counter:130 Name:DTLB2_MISSES
+Short-Description:DTLB2 Misses
+Description:
+A TLB2 miss is in progress for a request made by the data cache.
+Incremented by one for every TLB2 miss in progress for the Level-1
+Data cache on this cycle
+.
+Counter:131 Name:DTLB2_HPAGE_WRITES
+Short-Description:DTLB2 One-Megabyte Page Writes
+Description:
+A translation entry was written into the Combined Region and Segment
+Table Entry array in the Level-2 TLB for a one-megabyte page
+.
+Counter:132 Name:DTLB2_GPAGE_WRITES
+Short-Description:DTLB2 Two-Gigabyte Page Writes
+Description:
+A translation entry for a two-gigabyte page was written into the
+Level-2 TLB
+.
+Counter:133 Name:L1D_L2D_SOURCED_WRITES
+Short-Description:L1D L2D Sourced Writes
+Description:
+A directory write to the Level-1 Data cache directory where the
+returned cache line was sourced from the Level-2 Data cache
+.
+Counter:134 Name:ITLB2_WRITES
+Short-Description:ITLB2 Writes
+Description:
+A translation entry has been written into the Translation Lookaside
+Buffer 2 (TLB2) and the request was made by the instruction cache
+.
+Counter:135 Name:ITLB2_MISSES
+Short-Description:ITLB2 Misses
+Description:
+A TLB2 miss is in progress for a request made by the instruction cache.
+Incremented by one for every TLB2 miss in progress for the Level-1
+Instruction cache in a cycle
+.
+Counter:136 Name:L1I_L2I_SOURCED_WRITES
+Short-Description:L1I L2I Sourced Writes
+Description:
+A directory write to the Level-1 Instruction cache directory where the
+returned cache line was sourced from the Level-2 Instruction cache
+.
+Counter:137 Name:TLB2_PTE_WRITES
+Short-Description:TLB2 PTE Writes
+Description:
+A translation entry was written into the Page Table Entry array in the
+Level-2 TLB
+.
+Counter:138 Name:TLB2_CRSTE_WRITES
+Short-Description:TLB2 CRSTE Writes
+Description:
+Translation entries were written into the Combined Region and Segment
+Table Entry array and the Page Table Entry array in the Level-2 TLB
+.
+Counter:139 Name:TLB2_ENGINES_BUSY
+Short-Description:TLB2 Engines Busy
+Description:
+The number of Level-2 TLB translation engines busy in a cycle
+.
+Counter:140 Name:TX_C_TEND
+Short-Description:Completed TEND instructions in constrained TX mode
+Description:
+A TEND instruction has completed in a constrained transactional-execution
+mode
+.
+Counter:141 Name:TX_NC_TEND
+Short-Description:Completed TEND instructions in non-constrained TX mode
+Description:
+A TEND instruction has completed in a non-constrained
+transactional-execution mode
+.
+Counter:143 Name:L1C_TLB2_MISSES
+Short-Description:L1C TLB2 Misses
+Description:
+Increments by one for any cycle where a level-1 cache or level-2 TLB miss
+is in progress
+.
+Counter:144 Name:L1D_ONCHIP_L3_SOURCED_WRITES
+Short-Description:L1D On-Chip L3 Sourced Writes
+Description:
+A directory write to the Level-1 Data cache directory where the returned
+cache line was sourced from an On-Chip Level-3 cache without intervention
+.
+Counter:145 Name:L1D_ONCHIP_MEMORY_SOURCED_WRITES
+Short-Description:L1D On-Chip Memory Sourced Writes
+Description:
+A directory write to the Level-1 Data cache directory where the returned
+cache line was sourced from On-Chip memory
+.
+Counter:146 Name:L1D_ONCHIP_L3_SOURCED_WRITES_IV
+Short-Description:L1D On-Chip L3 Sourced Writes with Intervention
+Description:
+A directory write to the Level-1 Data cache directory where the returned
+cache line was sourced from an On-Chip Level-3 cache with intervention
+.
+Counter:147 Name:L1D_ONCLUSTER_L3_SOURCED_WRITES
+Short-Description:L1D On-Cluster L3 Sourced Writes
+Description:
+A directory write to the Level-1 Data cache directory where the returned
+cache line was sourced from On-Cluster Level-3 cache withountervention
+.
+Counter:148 Name:L1D_ONCLUSTER_MEMORY_SOURCED_WRITES
+Short-Description:L1D On-Cluster Memory Sourced Writes
+Description:
+A directory write to the Level-1 Data cache directory where the returned
+cache line was sourced from an On-Cluster memory
+.
+Counter:149 Name:L1D_ONCLUSTER_L3_SOURCED_WRITES_IV
+Short-Description:L1D On-Cluster L3 Sourced Writes with Intervention
+Description:
+A directory write to the Level-1 Data cache directory where the returned
+cache line was sourced from an On-Cluster Level-3 cache with intervention
+.
+Counter:150 Name:L1D_OFFCLUSTER_L3_SOURCED_WRITES
+Short-Description:L1D Off-Cluster L3 Sourced Writes
+Description:
+A directory write to the Level-1 Data cache directory where the returned
+cache line was sourced from an Off-Cluster Level-3 cache without
+intervention
+.
+Counter:151 Name:L1D_OFFCLUSTER_MEMORY_SOURCED_WRITES
+Short-Description:L1D Off-Cluster Memory Sourced Writes
+Description:
+A directory write to the Level-1 Data cache directory where the returned
+cache line was sourced from Off-Cluster memory
+.
+Counter:152 Name:L1D_OFFCLUSTER_L3_SOURCED_WRITES_IV
+Short-Description:L1D Off-Cluster L3 Sourced Writes with Intervention
+Description:
+A directory write to the Level-1 Data cache directory where the returned
+cache line was sourced from an Off-Cluster Level-3 cache with intervention
+.
+Counter:153 Name:L1D_OFFDRAWER_L3_SOURCED_WRITES
+Short-Description:L1D Off-Drawer L3 Sourced Writes
+Description:
+A directory write to the Level-1 Data cache directory where the returned
+cache line was sourced from an Off-Drawer Level-3 cache without
+intervention
+.
+Counter:154 Name:L1D_OFFDRAWER_MEMORY_SOURCED_WRITES
+Short-Description:L1D Off-Drawer Memory Sourced Writes
+Description:
+A directory write to the Level-1 Data cache directory where the returned
+cache line was sourced from Off-Drawer memory
+.
+Counter:155 Name:L1D_OFFDRAWER_L3_SOURCED_WRITES_IV
+Short-Description:L1D Off-Drawer L3 Sourced Writes with Intervention
+Description:
+A directory write to the Level-1 Data cache directory where the returned
+cache line was sourced from an Off-Drawer Level-3 cache with intervention
+.
+Counter:156 Name:L1D_ONDRAWER_L4_SOURCED_WRITES
+Short-Description:L1D On-Drawer L4 Sourced Writes
+Description:
+A directory write to the Level-1 Data cache directory where the returned
+cache line was sourced from On-Drawer Level-4 cache
+.
+Counter:157 Name:L1D_OFFDRAWER_L4_SOURCED_WRITES
+Short-Description:L1D Off-Drawer L4 Sourced Writes
+Description:
+A directory write to the Level-1 Data cache directory where the returned
+cache line was sourced from Off-Drawer Level-4 cache
+.
+Counter:158 Name:L1D_ONCHIP_L3_SOURCED_WRITES_RO
+Short-Description:L1D On-Chip L3 Sourced Writes read-only
+Description:
+A directory write to the Level-1 Data cache directory where the returned
+cache line was sourced from On-Chip L3 but a read-only invalidate was
+done to remove other copies of the cache line
+.
+Counter:162 Name:L1I_ONCHIP_L3_SOURCED_WRITES
+Short-Description:L1I On-Chip L3 Sourced Writes
+Description:
+A directory write to the Level-1 Instruction cache directory where the
+returned cache ine was sourced from an On-Chip Level-3 cache without
+intervention
+.
+Counter:163 Name:L1I_ONCHIP_MEMORY_SOURCED_WRITES
+Short-Description:L1I On-Chip Memory Sourced Writes
+Description:
+A directory write to the Level-1 Instruction cache directory where the
+returned cache ine was sourced from On-Chip memory
+.
+Counter:164 Name:L1I_ONCHIP_L3_SOURCED_WRITES_IV
+Short-Description:L1I On-Chip L3 Sourced Writes with Intervention
+Description:
+A directory write to the Level-1 Instruction cache directory where the
+returned cache ine was sourced from an On-Chip Level-3 cache with
+intervention
+.
+Counter:165 Name:L1I_ONCLUSTER_L3_SOURCED_WRITES
+Short-Description:L1I On-Cluster L3 Sourced Writes
+Description:
+A directory write to the Level-1 Instruction cache directory where the
+returned cache line was sourced from an On-Cluster Level-3 cache without
+intervention
+.
+Counter:166 Name:L1I_ONCLUSTER_MEMORY_SOURCED_WRITES
+Short-Description:L1I On-Cluster Memory Sourced Writes
+Description:
+A directory write to the Level-1 Instruction cache directory where the
+returned cache line was sourced from an On-Cluster memory
+.
+Counter:167 Name:L1I_ONCLUSTER_L3_SOURCED_WRITES_IV
+Short-Description:L1I On-Cluster L3 Sourced Writes with Intervention
+Description:
+A directory write to the Level-1 Instruction cache directory where the
+returned cache line was sourced from On-Cluster Level-3 cache with
+intervention
+.
+Counter:168 Name:L1I_OFFCLUSTER_L3_SOURCED_WRITES
+Short-Description:L1I Off-Cluster L3 Sourced Writes
+Description:
+A directory write to the Level-1 Instruction cache directory where the
+returned cache line was sourced from an Off-Cluster Level-3 cache without
+intervention
+.
+Counter:169 Name:L1I_OFFCLUSTER_MEMORY_SOURCED_WRITES
+Short-Description:L1I Off-Cluster Memory Sourced Writes
+Description:
+A directory write to the Level-1 Instruction cache directory where the
+returned cache line was sourced from Off-Cluster memory
+.
+Counter:170 Name:L1I_OFFCLUSTER_L3_SOURCED_WRITES_IV
+Short-Description:L1I Off-Cluster L3 Sourced Writes with Intervention
+Description:
+A directory write to the Level-1 Instruction cache directory where the
+returned cache line was sourced from an Off-Cluster Level-3 cache with
+intervention
+.
+Counter:171 Name:L1I_OFFDRAWER_L3_SOURCED_WRITES
+Short-Description:L1I Off-Drawer L3 Sourced Writes
+Description:
+A directory write to the Level-1 Instruction cache directory where the
+returned cache line was sourced from an Off-Drawer Level-3 cache without
+intervention
+.
+Counter:172 Name:L1I_OFFDRAWER_MEMORY_SOURCED_WRITES
+Short-Description:L1I Off-Drawer Memory Sourced Writes
+Description:
+A directory write to the Level-1 Instruction cache directory where the
+returned cache line was sourced from Off-Drawer memory
+.
+Counter:173 Name:L1I_OFFDRAWER_L3_SOURCED_WRITES_IV
+Short-Description:L1I Off-Drawer L3 Sourced Writes with Intervention
+Description:
+A directory write to the Level-1 Instruction cache directory where the
+returned cache line was sourced from an Off-Drawer Level-3 cache with
+intervention
+.
+Counter:174 Name:L1I_ONDRAWER_L4_SOURCED_WRITES
+Short-Description:L1I On-Drawer L4 Sourced Writes
+Description:
+A directory write to the Level-1 Instruction cache directory where the
+returned cache line was sourced from On-Drawer Level-4 cache
+.
+Counter:175 Name:L1I_OFFDRAWER_L4_SOURCED_WRITES
+Short-Description:L1I Off-Drawer L4 Sourced Writes
+Description:
+A directory write to the Level-1 Instruction cache directory where the
+returned cache line was sourced from Off-Drawer Level-4 cache
+.
+Counter:224 Name:BCD_DFP_EXECUTION_SLOTS
+Short-Description:BCD DFP Execution Slots
+Description:
+Count of floating point execution slots used for finished Binary Coded
+Decimal to Decimal Floating Point conversions. Instructions: CDZT,
+CXZT, CZDT, CZXT
+.
+Counter:225 Name:VX_BCD_EXECUTION_SLOTS
+Short-Description:VX BCD Execution Slots
+Description:
+Count of floating point execution slots used for finished vector arithmetic
+Binary Coded Decimal instructions. Instructions: VAP, VSP, VMPVMSP, VDP,
+VSDP, VRP, VLIP, VSRP, VPSOPVCP, VTP, VPKZ, VUPKZ, VCVB, VCVBG, VCVDVCVDG
+.
+Counter:226 Name:DECIMAL_INSTRUCTIONS
+Short-Description:Decimal Instructions
+Description:
+Decimal instructions dispatched. Instructions: CVB, CVD, AP, CP, DP, ED,
+EDMK, MP, SRP, SP, ZAP
+.
+Counter:232 Name:LAST_HOST_TRANSLATIONS
+Short-Description:Last host translation done
+Description:
+Last Host Translation done
+.
+Counter:243 Name:TX_NC_TABORT
+Short-Description:Aborted transactions in non-constrained TX mode
+Description:
+A transaction abort has occurred in a non-constrained
+transactional-execution mode
+.
+Counter:244 Name:TX_C_TABORT_NO_SPECIAL
+Short-Description:Aborted transactions in constrained TX mode not using special completion logic
+Description:
+A transaction abort has occurred in a constrained transactional-execution
+mode and the CPU is not using any special logic to allow the transaction
+to complete
+.
+Counter:245 Name:TX_C_TABORT_SPECIAL
+Short-Description:Aborted transactions in constrained TX mode using special completion logic
+Description:
+A transaction abort has occurred in a constrained transactional-execution
+mode and the CPU is using special logic to allow the transaction to
+complete
+.
+Counter:247 Name:DFLT_ACCESS
+Short-Description:Cycles CPU spent obtaining access to Deflate unit
+Description:
+Cycles CPU spent obtaining access to Deflate unit
+.
+Counter:252 Name:DFLT_CYCLES
+Short-Description:Cycles CPU is using Deflate unit
+Description:
+Cycles CPU is using Deflate unit
+.
+Counter:264 Name:DFLT_CC
+Short-Description:Increments by one for every DEFLATE CONVERSION CALL instruction executed
+Description:
+Increments by one for every DEFLATE CONVERSION CALL instruction executed
+.
+Counter:265 Name:DFLT_CCERROR
+Short-Description:Increments by one for every DEFLATE CONVERSION CALL instruction executed that ended in Condition Codes 0, 1 or 2
+Description:
+Increments by one for every DEFLATE CONVERSION CALL instruction executed that ended in Condition Codes 0, 1 or 2
+.
+#
+# MT-diagnostic counter set
+# ---------------------------------------------------------------------
+Counter:448 Name:MT_DIAG_CYCLES_ONE_THR_ACTIVE
+Short-Description:Cycle count with one thread active
+Description:
+Cycle count with one thread active
+.
+Counter:449 Name:MT_DIAG_CYCLES_TWO_THR_ACTIVE
+Short-Description:Cycle count with two threads active
+Description:
+Cycle count with two threads active
+.
--- a/cpumf/data/cpum-cf-hw-counter.map
+++ b/cpumf/data/cpum-cf-hw-counter.map
@@ -28,7 +28,6 @@
2965 => 'cpum-cf-extended-z13.ctr',
3906 => 'cpum-cf-extended-z14.ctr',
3907 => 'cpum-cf-extended-z14.ctr',
- # Identical with z14
- 8561 => 'cpum-cf-extended-z14.ctr',
- 8562 => 'cpum-cf-extended-z14.ctr',
+ 8561 => 'cpum-cf-extended-z15.ctr',
+ 8562 => 'cpum-cf-extended-z15.ctr',
};

11
s390-tools.changes
View File

@ -1,3 +1,14 @@
-------------------------------------------------------------------
Tue Apr 7 18:52:02 UTC 2020 - Mark Post <mpost@suse.com>
- Added s390-tools-sles15sp2-01-cpumf-add-new-deflate-counters-for-z15.patch
(bsc#1167853)
lscpumf: New z15 CPU-MF counters not available, so add the
definition for the new deflate counters.
- Updated read_values (bsc#1167815, jsc#SLE-10675)
* Differentiate between IBM Z and IBM LinuxONE machines
* Query and print the status of secure boot for the LPAR.
------------------------------------------------------------------- -------------------------------------------------------------------
Thu Mar 19 19:22:19 UTC 2020 - Mark Post <mpost@suse.com> Thu Mar 19 19:22:19 UTC 2020 - Mark Post <mpost@suse.com>

1
s390-tools.spec
View File

@ -187,6 +187,7 @@ Patch97: s390-tools-sles15sp2-01-zipl-Add-missing-options-to-help-output.
Patch98: s390-tools-sles15sp2-02-zipl-allow-stand-alone-secure-option-on-command-l.patch Patch98: s390-tools-sles15sp2-02-zipl-allow-stand-alone-secure-option-on-command-l.patch
Patch99: s390-tools-sles15sp2-03-zipl-correct-secure-boot-config-handling.patch Patch99: s390-tools-sles15sp2-03-zipl-correct-secure-boot-config-handling.patch
Patch100: s390-tools-sles15sp2-04-zipl-fix-zipl.conf-man-page-example-for-secure-boot.patch Patch100: s390-tools-sles15sp2-04-zipl-fix-zipl.conf-man-page-example-for-secure-boot.patch
Patch101: s390-tools-sles15sp2-01-cpumf-add-new-deflate-counters-for-z15.patch
# SUSE patches # SUSE patches
Patch900: s390-tools-sles12-zipl_boot_msg.patch Patch900: s390-tools-sles12-zipl_boot_msg.patch