u-boot/arndale-apply-cortex-a15-erratas.patch

From 0052a7d99a9182e0ad343a98e77406226ea81740 Mon Sep 17 00:00:00 2001
From: Ian Campbell <ian.campbell@citrix.com>
Date: Tue, 29 Sep 2015 09:54:13 +0100
Subject: [PATCH] arndale: Apply Cortex-A15 errata #773022 and #774769

We run 4 Arndale boards in our automated test framework, they have
been running quite happily for quite some time using a Debian Wheezy
userspace.

However when upgrading to a Debian Jessie we started seeing frequent
segmentation faults from gcc when building the kernel, to the extent
that it is unable to successfully build the kernel twice in a row, and
often fails on the first attempt.

Searching around I found https://bugs.launchpad.net/arndale/+bug/1081417
which pointed towards http://www.spinics.net/lists/kvm-arm/msg03723.html
and CPU Errata 773022 and 774769.

This errata needs to be applied to all processors in an SMP system,
meaning that the usual strategy of applying them in
arch/arm/cpu/armv7/start.S is not appropriate (since that applies to
the boot processor only). Instead we apply these errata in the secure
monitor which is code that is traversed by all processors as they are
brought up.

The net affect on Arndale is that ACTLR changes from 0x40 to
0x2000042. I ran 17 kernel compile iterations overnight with no
segfaults.

Runtime testing was done on our v2014.10 based branch and forward
ported (with only minimal and trivial contextual conflicts) to current
master, where it has been build tested only.

I suppose in theory these errata apply to any Exynos5250 based boards,
but Arndale is the only one I have access to and I have therefore
chosen to be conservative and only apply it there.

Also, reorder CONFIG_ARM_ERRATA_794072 in README to make the list
numerically sorted.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
---
Our v2014.10 based branch:
http://xenbits.xen.org/gitweb/?p=people/ianc/osstest/u-boot.git;a=shortlog;h=refs/heads/arndale
---
 README                           |    4 +++-
 arch/arm/cpu/armv7/nonsec_virt.S |   14 ++++++++++++++
 include/configs/arndale.h        |    4 ++++
 3 files changed, 21 insertions(+), 1 deletions(-)

Index: u-boot-2015.10-rc4/README
===================================================================
--- u-boot-2015.10-rc4.orig/README
+++ u-boot-2015.10-rc4/README
@@ -681,8 +681,10 @@ The following options need to be configu
 		CONFIG_ARM_ERRATA_742230
 		CONFIG_ARM_ERRATA_743622
 		CONFIG_ARM_ERRATA_751472
-		CONFIG_ARM_ERRATA_794072
 		CONFIG_ARM_ERRATA_761320
+		CONFIG_ARM_ERRATA_773022
+		CONFIG_ARM_ERRATA_774769
+		CONFIG_ARM_ERRATA_794072
 
 		If set, the workarounds for these ARM errata are applied early
 		during U-Boot startup. Note that these options force the
Index: u-boot-2015.10-rc4/arch/arm/cpu/armv7/nonsec_virt.S
===================================================================
--- u-boot-2015.10-rc4.orig/arch/arm/cpu/armv7/nonsec_virt.S
+++ u-boot-2015.10-rc4/arch/arm/cpu/armv7/nonsec_virt.S
@@ -53,6 +53,20 @@ _secure_monitor:
 	bl	psci_arch_init
 #endif
 
+#ifdef CONFIG_ARM_ERRATA_773022
+	mrc	p15, 0, r5, c1, c0, 1
+	orr	r5, r5, #(1 << 1)
+	mcr	p15, 0, r5, c1, c0, 1
+	isb
+#endif
+
+#ifdef CONFIG_ARM_ERRATA_774769
+	mrc	p15, 0, r5, c1, c0, 1
+	orr	r5, r5, #(1 << 25)
+	mcr	p15, 0, r5, c1, c0, 1
+	isb
+#endif
+
 	mrc	p15, 0, r5, c1, c1, 0		@ read SCR
 	bic	r5, r5, #0x4a			@ clear IRQ, EA, nET bits
 	orr	r5, r5, #0x31			@ enable NS, AW, FW bits
Index: u-boot-2015.10-rc4/include/configs/arndale.h
===================================================================
--- u-boot-2015.10-rc4.orig/include/configs/arndale.h
+++ u-boot-2015.10-rc4/include/configs/arndale.h
@@ -49,6 +49,10 @@
 /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
 #define CONFIG_ARM_GIC_BASE_ADDRESS	0x10480000
 
+/* CPU Errata */
+#define CONFIG_ARM_ERRATA_773022
+#define CONFIG_ARM_ERRATA_774769
+
 /* Power */
 #define CONFIG_POWER
 #define CONFIG_POWER_I2C