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forked from pool/u-boot

Accepting request 1146923 from hardware👢staging

OBS-URL: https://build.opensuse.org/request/show/1146923
OBS-URL: https://build.opensuse.org/package/show/hardware:boot/u-boot?expand=0&rev=206
This commit is contained in:
Dirk Mueller 2024-02-21 10:21:25 +00:00 committed by Git OBS Bridge
parent 1c42fb23ea
commit 392a357342
27 changed files with 220 additions and 347 deletions

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@ -12,7 +12,7 @@ Subject: [PATCH] XXX openSUSE XXX: Prepend partition 3 (and 4 for chromebook
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index 2a136b96a6..f2d2c76161 100644
index 2a136b96a6d..f2d2c761616 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -166,7 +166,7 @@

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@ -9,7 +9,7 @@ This reverts commit 7fa75d0ac5502db813d109c1df7bd0da34688685.
1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c
index a68b21aeac..c0938810cb 100644
index a68b21aeacc..c0938810cb8 100644
--- a/arch/arm/mach-omap2/boot-common.c
+++ b/arch/arm/mach-omap2/boot-common.c
@@ -126,8 +126,6 @@ void save_omap_boot_params(void)

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@ -28,7 +28,7 @@ Signed-off-by: Guillaume Gardet <guillaume.gardet@free.fr>
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig
index ac3b40c1c1..e6765878d1 100644
index ac3b40c1c10..e6765878d16 100644
--- a/configs/rpi_0_w_defconfig
+++ b/configs/rpi_0_w_defconfig
@@ -24,7 +24,7 @@ CONFIG_CMD_GPIO=y
@ -41,7 +41,7 @@ index ac3b40c1c1..e6765878d1 100644
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
index b6e06cfe20..0650344526 100644
index b6e06cfe20b..06503445267 100644
--- a/configs/rpi_2_defconfig
+++ b/configs/rpi_2_defconfig
@@ -25,7 +25,7 @@ CONFIG_CMD_GPIO=y
@ -54,7 +54,7 @@ index b6e06cfe20..0650344526 100644
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
index eadc418927..7f52b508c4 100644
index eadc4189272..7f52b508c4b 100644
--- a/configs/rpi_3_32b_defconfig
+++ b/configs/rpi_3_32b_defconfig
@@ -24,7 +24,7 @@ CONFIG_CMD_GPIO=y
@ -67,7 +67,7 @@ index eadc418927..7f52b508c4 100644
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
index 6890af4d1d..0767518279 100644
index 6890af4d1d2..07675182797 100644
--- a/configs/rpi_3_defconfig
+++ b/configs/rpi_3_defconfig
@@ -23,7 +23,7 @@ CONFIG_CMD_GPIO=y
@ -80,7 +80,7 @@ index 6890af4d1d..0767518279 100644
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
index 29c10060cf..79b507405d 100644
index 29c10060cf7..79b507405d4 100644
--- a/configs/rpi_defconfig
+++ b/configs/rpi_defconfig
@@ -24,7 +24,7 @@ CONFIG_CMD_GPIO=y

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@ -9,7 +9,7 @@ Subject: [PATCH] Temp workaround for Chromebook snow to avoid the 'unable to
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 400066fa99..0cfbd83462 100644
index 400066fa99a..0cfbd834628 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -613,7 +613,8 @@ void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host,

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@ -34,7 +34,7 @@ Signed-off-by: Alexander Graf <agraf@suse.de>
1 file changed, 15 insertions(+)
diff --git a/tools/zynqmpbif.c b/tools/zynqmpbif.c
index 82ce0ac1a5..b4302fa67e 100644
index 82ce0ac1a52..b4302fa67ee 100644
--- a/tools/zynqmpbif.c
+++ b/tools/zynqmpbif.c
@@ -42,6 +42,7 @@ enum bif_flag {

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@ -13,7 +13,7 @@ Signed-off-by: Matthias Brugger <mbrugger@suse.com>
1 file changed, 1 insertion(+)
diff --git a/boot/Kconfig b/boot/Kconfig
index fbc49c5bca..be576696c4 100644
index fbc49c5bca4..be576696c44 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -815,6 +815,7 @@ config DISTRO_DEFAULTS

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@ -18,7 +18,7 @@ Signed-off-by: Matthias Brugger <mbrugger@suse.com>
5 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index 6c488bac2b..de19fcb0e3 100644
index 6c488bac2b3..de19fcb0e38 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -88,7 +88,6 @@ CONFIG_CMD_REGULATOR=y
@ -30,7 +30,7 @@ index 6c488bac2b..de19fcb0e3 100644
CONFIG_CMD_CRAMFS=y
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index bc5bcb2a62..e0bab6fb6d 100644
index bc5bcb2a623..e0bab6fb6db 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -121,7 +121,6 @@ CONFIG_CMD_REGULATOR=y
@ -42,7 +42,7 @@ index bc5bcb2a62..e0bab6fb6d 100644
CONFIG_CMD_CRAMFS=y
CONFIG_CMD_EROFS=y
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
index c35a360a55..4695e23fd0 100644
index c35a360a557..4695e23fd02 100644
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -69,3 +69,5 @@ CONFIG_DESIGNWARE_APB_TIMER=y
@ -52,7 +52,7 @@ index c35a360a55..4695e23fd0 100644
+# CONFIG_CMD_BTRFS is not set
+# CONFIG_FS_BTRFS is not set
diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig
index c9815b612f..dfc22ee0d2 100644
index c9815b612f0..dfc22ee0d22 100644
--- a/configs/turris_mox_defconfig
+++ b/configs/turris_mox_defconfig
@@ -49,7 +49,6 @@ CONFIG_CMD_CACHE=y
@ -64,7 +64,7 @@ index c9815b612f..dfc22ee0d2 100644
CONFIG_MAC_PARTITION=y
CONFIG_OF_LIST="armada-3720-turris-mox armada-3720-ripe-atlas"
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index 65d4a296e7..9398d022f8 100644
index 65d4a296e72..9398d022f88 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -73,7 +73,6 @@ CONFIG_CMD_CACHE=y

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@ -15,7 +15,7 @@ Signed-off-by: Matthias Brugger <mbrugger@suse.com>
create mode 100644 arch/arm/dts/sunxi-spi-u-boot.dtsi
diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
index 3706216ffb..c3660f72d9 100644
index 3706216ffb4..c3660f72d9e 100644
--- a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -46,6 +46,7 @@
@ -28,7 +28,7 @@ index 3706216ffb..c3660f72d9 100644
#include <dt-bindings/input/input.h>
diff --git a/arch/arm/dts/sunxi-spi-u-boot.dtsi b/arch/arm/dts/sunxi-spi-u-boot.dtsi
new file mode 100644
index 0000000000..df89d02ff2
index 00000000000..df89d02ff2f
--- /dev/null
+++ b/arch/arm/dts/sunxi-spi-u-boot.dtsi
@@ -0,0 +1,8 @@

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@ -13,7 +13,7 @@ Signed-off-by: Matthias Brugger <mbrugger@suse.com>
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
index c3660f72d9..80c1e66b38 100644
index c3660f72d9e..80c1e66b38c 100644
--- a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -164,8 +164,8 @@

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@ -9,7 +9,7 @@ Subject: [PATCH] Disable CONFIG_CMD_BTRFS in xilinx_zynqmp_virt_defconfig to
1 file changed, 1 insertion(+)
diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig
index 239bb1f5cc..61ebb7f5be 100644
index 239bb1f5cce..61ebb7f5be2 100644
--- a/configs/xilinx_zynqmp_virt_defconfig
+++ b/configs/xilinx_zynqmp_virt_defconfig
@@ -95,6 +95,7 @@ CONFIG_CMD_REGULATOR=y

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@ -19,7 +19,7 @@ Series-cc: u-boot@lists.denx.de
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/smbios.c b/lib/smbios.c
index d7f4999e8b..2cdfef7a2c 100644
index d7f4999e8b2..2cdfef7a2c9 100644
--- a/lib/smbios.c
+++ b/lib/smbios.c
@@ -172,7 +172,7 @@ static int smbios_add_prop(struct smbios_ctx *ctx, const char *prop)

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@ -9,7 +9,7 @@ Signed-off-by: Matthias Brugger <mbrugger@suse.com>
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/boot/Kconfig b/boot/Kconfig
index be576696c4..a71a6a7dfc 100644
index be576696c44..a71a6a7dfc1 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -815,7 +815,7 @@ config DISTRO_DEFAULTS

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@ -25,7 +25,7 @@ Signed-off-by: Matthias Brugger <mbrugger@suse.com>
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index f0d76113b0..314af7e202 100644
index f0d76113b00..314af7e2022 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -19,6 +19,7 @@

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@ -10,7 +10,7 @@ Subject: [PATCH] Enable EFI and ISO partitions support on socfpga_de0_nano_soc
1 file changed, 2 deletions(-)
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index 646552cce6..bf0faed705 100644
index 646552cce65..bf0faed7058 100644
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -45,8 +45,6 @@ CONFIG_CMD_EXT4_WRITE=y

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@ -12,7 +12,7 @@ Signed-off-by: Michal Suchanek <msuchanek@suse.de>
2 files changed, 21 insertions(+)
diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h
index 6b2a610cf4..bcdf4420cf 100644
index 6b2a610cf4c..bcdf4420cfc 100644
--- a/arch/arm/include/asm/arch-rockchip/boot_mode.h
+++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -19,6 +19,7 @@
@ -24,7 +24,7 @@ index 6b2a610cf4..bcdf4420cf 100644
#endif
diff --git a/cmd/boot.c b/cmd/boot.c
index 14839c1ced..d7c7db449c 100644
index 14839c1cedc..d7c7db449c5 100644
--- a/cmd/boot.c
+++ b/cmd/boot.c
@@ -44,16 +44,36 @@ static int do_go(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])

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@ -16,7 +16,7 @@ Signed-off-by: Michal Suchanek <msuchanek@suse.de>
4 files changed, 67 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h b/arch/arm/include/asm/arch-sunxi/cpu.h
index 768c6572d6..86f4b1a103 100644
index 768c6572d6b..86f4b1a103c 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu.h
@@ -22,4 +22,15 @@
@ -36,7 +36,7 @@ index 768c6572d6..86f4b1a103 100644
+
#endif /* _SUNXI_CPU_H */
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index a4a8d8e944..acebc4ee33 100644
index a4a8d8e9445..acebc4ee339 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -1099,6 +1099,22 @@ source "board/sunxi/Kconfig"
@ -63,7 +63,7 @@ index a4a8d8e944..acebc4ee33 100644
bool "Enable DIPs detection for CHIP board"
select SUPPORT_EXTENSION_SCAN
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 11a4941822..7a4291f483 100644
index 11a49418225..7a4291f4838 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -315,7 +315,30 @@ uint32_t sunxi_get_boot_device(void)
@ -106,7 +106,7 @@ index 11a4941822..7a4291f483 100644
#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3
diff --git a/cmd/boot.c b/cmd/boot.c
index d7c7db449c..111c9d9409 100644
index d7c7db449c5..111c9d94090 100644
--- a/cmd/boot.c
+++ b/cmd/boot.c
@@ -47,6 +47,7 @@ static int do_go(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])

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@ -1,51 +1,46 @@
From c9b27f8112c5d5fb545f49b5f6040ecdf4f60821 Mon Sep 17 00:00:00 2001
From 30ad57c81e0495c46f7abc7abed2a20a11cd99d3 Mon Sep 17 00:00:00 2001
From: Dmitry Malkin <dmitry@bedrocksystems.com>
Date: Fri, 8 Dec 2023 17:31:10 +0200
Date: Tue, 23 Jan 2024 10:07:53 +0200
Subject: [PATCH] rpi5: add initial memory map for bcm2712
includes:
This includes:
* 1GB of RAM (from 4GB or 8GB total)
* VPU memory interface
* AXI ranges (main peripherals)
When HDMI cable is plugged in at boot time firmware will
insert "simple-framebuffer" device into devicetree and will
shrink first memory region to 0x3f800000UL. Board setup then
will properly reserve framebuffer region.
When no HDMI cable is plugged in the size of the region will
be 0x3fc00000UL.
Signed-off-by: Dmitry Malkin <dmitry@bedrocksystems.com>
Tested-by: Jens Maus <mail@jens-maus.de>
Tested by: Darko Alavanja <darko.alavanja@konsulko.com>
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
---
arch/arm/mach-bcm283x/init.c | 38 +++++++++++++++++++++++++++++++++++-
1 file changed, 37 insertions(+), 1 deletion(-)
arch/arm/mach-bcm283x/init.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
index 7265faf6ce..af23b9711a 100644
index 7265faf6cec..f1a0c8588d4 100644
--- a/arch/arm/mach-bcm283x/init.c
+++ b/arch/arm/mach-bcm283x/init.c
@@ -19,7 +19,7 @@
#ifdef CONFIG_ARM64
#include <asm/armv8/mmu.h>
-#define MEM_MAP_MAX_ENTRIES (4)
+#define MEM_MAP_MAX_ENTRIES (5)
static struct mm_region bcm283x_mem_map[MEM_MAP_MAX_ENTRIES] = {
{
@@ -68,6 +68,41 @@ static struct mm_region bcm2711_mem_map[MEM_MAP_MAX_ENTRIES] = {
@@ -68,6 +68,36 @@ static struct mm_region bcm2711_mem_map[MEM_MAP_MAX_ENTRIES] = {
}
};
+static struct mm_region bcm2712_mem_map[MEM_MAP_MAX_ENTRIES] = {
+ {
+ /* First 1GB of DRAM */
+ .virt = 0x00000000UL,
+ .phys = 0x00000000UL,
+ .size = 0x3f800000UL,
+ .size = 0x40000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+ .virt = 0x3f800000UL,
+ .phys = 0x3f800000UL,
+ .size = 0x00800000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* Beginning of AXI bus where uSD controller lives */
+ .virt = 0x1000000000UL,
+ .phys = 0x1000000000UL,
@ -54,6 +49,7 @@ index 7265faf6ce..af23b9711a 100644
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* SoC bus */
+ .virt = 0x107c000000UL,
+ .phys = 0x107c000000UL,
+ .size = 0x0004000000UL,
@ -69,7 +65,7 @@ index 7265faf6ce..af23b9711a 100644
struct mm_region *mem_map = bcm283x_mem_map;
/*
@@ -78,6 +113,7 @@ static const struct udevice_id board_ids[] = {
@@ -78,6 +108,7 @@ static const struct udevice_id board_ids[] = {
{ .compatible = "brcm,bcm2837", .data = (ulong)&bcm283x_mem_map},
{ .compatible = "brcm,bcm2838", .data = (ulong)&bcm2711_mem_map},
{ .compatible = "brcm,bcm2711", .data = (ulong)&bcm2711_mem_map},

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@ -1,14 +1,18 @@
From 4747a62ae051860501b095f6611da8c4d6577cb1 Mon Sep 17 00:00:00 2001
From 9212ff7ddf41cf2310e493a38f70f439eb11b82f Mon Sep 17 00:00:00 2001
From: Dmitry Malkin <dmitry@bedrocksystems.com>
Date: Wed, 13 Dec 2023 09:27:36 +0100
Date: Tue, 23 Jan 2024 10:07:54 +0200
Subject: [PATCH] rpi5: Use devicetree as alternative way to read IO base
addresses
MBOX and Watchdog on RPi5/bcm2712 has a different base IO offsets.
MBOX and Watchdog on RPi5/bcm2712 have a different base IO offsets.
Find them via devicetree blob passed by bootloader.
Signed-off-by: Dmitry Malkin <dmitry@bedrocksystems.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Tested-by: Jens Maus <mail@jens-maus.de>
Tested by: Darko Alavanja <darko.alavanja@konsulko.com>
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
---
arch/arm/mach-bcm283x/include/mach/base.h | 5 ++-
arch/arm/mach-bcm283x/include/mach/mbox.h | 3 +-
@ -19,7 +23,7 @@ Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
6 files changed, 43 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-bcm283x/include/mach/base.h b/arch/arm/mach-bcm283x/include/mach/base.h
index 4ccaf69693..6de99e7ea1 100644
index 4ccaf69693d..6de99e7ea12 100644
--- a/arch/arm/mach-bcm283x/include/mach/base.h
+++ b/arch/arm/mach-bcm283x/include/mach/base.h
@@ -6,7 +6,10 @@
@ -35,7 +39,7 @@ index 4ccaf69693..6de99e7ea1 100644
#ifdef CONFIG_ARMV7_LPAE
#ifdef CONFIG_TARGET_RPI_4_32B
diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h
index 490664f878..35d4e2f075 100644
index 490664f878f..35d4e2f0754 100644
--- a/arch/arm/mach-bcm283x/include/mach/mbox.h
+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h
@@ -38,8 +38,7 @@
@ -49,7 +53,7 @@ index 490664f878..35d4e2f075 100644
struct bcm2835_mbox_regs {
u32 read;
diff --git a/arch/arm/mach-bcm283x/include/mach/sdhci.h b/arch/arm/mach-bcm283x/include/mach/sdhci.h
index 7323690687..e837c679c4 100644
index 73236906870..e837c679c46 100644
--- a/arch/arm/mach-bcm283x/include/mach/sdhci.h
+++ b/arch/arm/mach-bcm283x/include/mach/sdhci.h
@@ -8,8 +8,7 @@
@ -63,7 +67,7 @@ index 7323690687..e837c679c4 100644
int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq);
diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h
index 5567dbd7f3..60500a256d 100644
index 5567dbd7f3d..60500a256d0 100644
--- a/arch/arm/mach-bcm283x/include/mach/timer.h
+++ b/arch/arm/mach-bcm283x/include/mach/timer.h
@@ -11,8 +11,7 @@
@ -77,7 +81,7 @@ index 5567dbd7f3..60500a256d 100644
#define BCM2835_TIMER_CS_M3 (1 << 3)
#define BCM2835_TIMER_CS_M2 (1 << 2)
diff --git a/arch/arm/mach-bcm283x/include/mach/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h
index 9942666720..b950560674 100644
index 99426667205..b9505606749 100644
--- a/arch/arm/mach-bcm283x/include/mach/wdog.h
+++ b/arch/arm/mach-bcm283x/include/mach/wdog.h
@@ -8,8 +8,7 @@
@ -91,10 +95,10 @@ index 9942666720..b950560674 100644
struct bcm2835_wdog_regs {
u32 unknown0[7];
diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
index af23b9711a..1c5c748484 100644
index f1a0c8588d4..016bc1eb412 100644
--- a/arch/arm/mach-bcm283x/init.c
+++ b/arch/arm/mach-bcm283x/init.c
@@ -151,7 +151,11 @@ static void rpi_update_mem_map(void)
@@ -146,7 +146,11 @@ static void rpi_update_mem_map(void)
static void rpi_update_mem_map(void) {}
#endif
@ -107,7 +111,7 @@ index af23b9711a..1c5c748484 100644
int arch_cpu_init(void)
{
@@ -162,22 +166,45 @@ int arch_cpu_init(void)
@@ -157,22 +161,45 @@ int arch_cpu_init(void)
int mach_cpu_init(void)
{

View File

@ -1,6 +1,6 @@
From b3cc55f71a99a60030ad611685dff7b8ed332791 Mon Sep 17 00:00:00 2001
From d08b7a6b3ce8a6e28199338127999746a7701470 Mon Sep 17 00:00:00 2001
From: "Ivan T. Ivanov" <iivanov@suse.de>
Date: Fri, 15 Dec 2023 10:17:14 +0100
Date: Tue, 23 Jan 2024 10:07:55 +0200
Subject: [PATCH] rpi5: Use devicetree to retrieve board revision
Firmware on RPi5 return error on board revision query
@ -13,13 +13,17 @@ revision.
linux,serial = <0x6cf44e80 0x3c533ede>;
};
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Tested-by: Jens Maus <mail@jens-maus.de>
Tested by: Darko Alavanja <darko.alavanja@konsulko.com>
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
---
board/raspberrypi/rpi/rpi.c | 22 +++++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index cd823ad746..2851ebc985 100644
index cd823ad7465..2851ebc9853 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -171,6 +171,11 @@ static const struct rpi_model rpi_models_new_scheme[] = {

View File

@ -0,0 +1,59 @@
From 480a56048a980b297da6b625af6862d2d6805ca6 Mon Sep 17 00:00:00 2001
From: "Ivan T. Ivanov" <iivanov@suse.de>
Date: Tue, 23 Jan 2024 10:07:56 +0200
Subject: [PATCH] bcm2835: Dynamically calculate bytes per pixel parameter
brcm,bcm2708-fb device provided by firmware on RPi5 uses
16 bits per pixel, so lets calculate framebuffer bytes
per pixel dynamically based on queried information.
Tested to work for RPi2b v1.2, RPi3b v1.3, RPi4b v1.1,
RPi2 Zero W, RPi5b v1.0.
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Tested-by: Jens Maus <mail@jens-maus.de>
Tested by: Darko Alavanja <darko.alavanja@konsulko.com>
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
---
drivers/video/bcm2835.c | 18 ++++++++++++++++--
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c
index 14942526f19..63efa762db1 100644
--- a/drivers/video/bcm2835.c
+++ b/drivers/video/bcm2835.c
@@ -16,7 +16,7 @@ static int bcm2835_video_probe(struct udevice *dev)
struct video_uc_plat *plat = dev_get_uclass_plat(dev);
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
int ret;
- int w, h, pitch;
+ int w, h, pitch, bpp;
ulong fb_base, fb_size, fb_start, fb_end;
debug("bcm2835: Query resolution...\n");
@@ -41,9 +41,23 @@ static int bcm2835_video_probe(struct udevice *dev)
DCACHE_WRITEBACK);
video_set_flush_dcache(dev, true);
+ bpp = pitch / w;
+ switch (bpp) {
+ case 2:
+ uc_priv->bpix = VIDEO_BPP16;
+ break;
+ case 4:
+ uc_priv->bpix = VIDEO_BPP32;
+ break;
+ default:
+ printf("bcm2835: unexpected bpp %d, pitch %d, width %d\n",
+ bpp, pitch, w);
+ uc_priv->bpix = VIDEO_BPP32;
+ break;
+ }
+
uc_priv->xsize = w;
uc_priv->ysize = h;
- uc_priv->bpix = VIDEO_BPP32;
plat->base = fb_base;
plat->size = fb_size;

View File

@ -1,42 +0,0 @@
From 004ecbc32e40e1d041c7696cb948bacce39ad86d Mon Sep 17 00:00:00 2001
From: "Ivan T. Ivanov" <iivanov@suse.de>
Date: Mon, 18 Dec 2023 17:33:10 +0100
Subject: [PATCH] bcm2835: brcm,bcm2708-fb device is using r5g6b5 format
brcm,bcm2708-fb device provided by firmware on RPi5 uses
16 bits per pixel. Update driver to properly handle this.
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
---
drivers/video/bcm2835.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c
index 14942526f1..245c958b6e 100644
--- a/drivers/video/bcm2835.c
+++ b/drivers/video/bcm2835.c
@@ -43,7 +43,7 @@ static int bcm2835_video_probe(struct udevice *dev)
uc_priv->xsize = w;
uc_priv->ysize = h;
- uc_priv->bpix = VIDEO_BPP32;
+ uc_priv->bpix = dev_get_driver_data(dev);
plat->base = fb_base;
plat->size = fb_size;
@@ -51,11 +51,11 @@ static int bcm2835_video_probe(struct udevice *dev)
}
static const struct udevice_id bcm2835_video_ids[] = {
- { .compatible = "brcm,bcm2835-hdmi" },
- { .compatible = "brcm,bcm2711-hdmi0" },
- { .compatible = "brcm,bcm2708-fb" },
+ { .compatible = "brcm,bcm2835-hdmi", .data = VIDEO_BPP32},
+ { .compatible = "brcm,bcm2711-hdmi0", .data = VIDEO_BPP32},
+ { .compatible = "brcm,bcm2708-fb", .data = VIDEO_BPP16 },
#if !IS_ENABLED(CONFIG_VIDEO_DT_SIMPLEFB)
- { .compatible = "simple-framebuffer" },
+ { .compatible = "simple-framebuffer", .data = VIDEO_BPP32},
#endif
{ }
};

View File

@ -1,32 +1,32 @@
From ceab0d2076af0777605701fd9bc8f93641f7accf Mon Sep 17 00:00:00 2001
From 370b4e60fdfd9af54571f5e7aac55f6799f638ff Mon Sep 17 00:00:00 2001
From: "Ivan T. Ivanov" <iivanov@suse.de>
Date: Fri, 15 Dec 2023 09:43:45 +0100
Date: Tue, 23 Jan 2024 10:07:57 +0200
Subject: [PATCH] mmc: bcmstb: Add support for bcm2712 SD controller
Borrow SD quirks from vendor Linux driver.
"BCM2712 unfortunately carries with it a perennial bug with the SD
controller register interface present on previous chips (2711/2709/2708).
Accesses must be dword-sized and a read-modify-write cycle to the 32-bit
registers containing the COMMAND, TRANSFER_MODE, BLOCK_SIZE and
BLOCK_COUNT registers tramples the upper/lower 16 bits of data written.
BCM2712 does not seem to need the extreme delay between each write as on
previous chips, just the serialisation of writes to these registers in a
single 32-bit operation."
Make sure that core SDHCI accessors are used and add
device specific card detection initialization, which
is borrowed from vendor Linux driver code.
Tested-by: Jens Maus <mail@jens-maus.de>
Tested by: Darko Alavanja <darko.alavanja@konsulko.com>
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
---
drivers/mmc/bcmstb_sdhci.c | 173 ++++++++++++++++++++++++++++++++++++-
1 file changed, 172 insertions(+), 1 deletion(-)
drivers/mmc/bcmstb_sdhci.c | 64 +++++++++++++++++++++++++++++++++++---
1 file changed, 60 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/bcmstb_sdhci.c b/drivers/mmc/bcmstb_sdhci.c
index dc96818cff..21489e66c0 100644
index dc96818cff4..49846adcf54 100644
--- a/drivers/mmc/bcmstb_sdhci.c
+++ b/drivers/mmc/bcmstb_sdhci.c
@@ -38,6 +38,16 @@
@@ -38,15 +38,52 @@
*/
#define BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY 400000
-/*
- * This driver has only been tested with eMMC devices; SD devices may
- * not work.
- */
+#define SDIO_CFG_CTRL 0x0
+#define SDIO_CFG_CTRL_SDCD_N_TEST_EN BIT(31)
+#define SDIO_CFG_CTRL_SDCD_N_TEST_LEV BIT(30)
@ -35,33 +35,15 @@ index dc96818cff..21489e66c0 100644
+#define SDIO_CFG_SD_PIN_SEL_MASK 0x3
+#define SDIO_CFG_SD_PIN_SEL_CARD BIT(1)
+
+#define REG_OFFSET_IN_BITS(reg) ((reg) << 3 & 0x18)
+
/*
* This driver has only been tested with eMMC devices; SD devices may
* not work.
@@ -47,6 +57,53 @@ struct sdhci_bcmstb_plat {
struct sdhci_bcmstb_plat {
struct mmc_config cfg;
struct mmc mmc;
};
+struct sdhci_bcmstb_host {
+ struct sdhci_host host;
+ u32 shadow_cmd;
+ u32 shadow_blk;
+ bool is_cmd_shadowed;
+ bool is_blk_shadowed;
+};
+
+struct sdhci_brcmstb_dev_priv {
+ int (*init)(struct udevice *dev);
+ struct sdhci_ops *ops;
+};
+
+static inline struct sdhci_bcmstb_host *to_bcmstb_host(struct sdhci_host *host)
+{
+ return container_of(host, struct sdhci_bcmstb_host, host);
+}
+
+static int sdhci_brcmstb_init_2712(struct udevice *dev)
+{
+ struct sdhci_host *host = dev_get_priv(dev);
@ -94,13 +76,18 @@ index dc96818cff..21489e66c0 100644
static int sdhci_bcmstb_bind(struct udevice *dev)
{
struct sdhci_bcmstb_plat *plat = dev_get_plat(dev);
@@ -58,10 +115,14 @@ static int sdhci_bcmstb_probe(struct udevice *dev)
@@ -54,14 +91,20 @@ static int sdhci_bcmstb_bind(struct udevice *dev)
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
+/* No specific SDHCI operations are required */
+static const struct sdhci_ops bcmstb_sdhci_ops = { 0 };
+
static int sdhci_bcmstb_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct sdhci_bcmstb_plat *plat = dev_get_plat(dev);
- struct sdhci_host *host = dev_get_priv(dev);
+ struct sdhci_bcmstb_host *bcmstb = dev_get_priv(dev);
+ struct sdhci_host *host = &bcmstb->host;
struct sdhci_host *host = dev_get_priv(dev);
+ struct sdhci_brcmstb_dev_priv *dev_priv;
fdt_addr_t base;
int ret;
@ -110,18 +97,16 @@ index dc96818cff..21489e66c0 100644
base = dev_read_addr(dev);
if (base == FDT_ADDR_T_NONE)
return -EINVAL;
@@ -75,6 +136,10 @@ static int sdhci_bcmstb_probe(struct udevice *dev)
@@ -75,6 +118,8 @@ static int sdhci_bcmstb_probe(struct udevice *dev)
host->mmc = &plat->mmc;
host->mmc->dev = dev;
+
+ if (dev_priv && dev_priv->ops)
+ host->ops = dev_priv->ops;
+ host->ops = &bcmstb_sdhci_ops;
+
ret = sdhci_setup_cfg(&plat->cfg, host,
BCMSTB_SDHCI_MAXIMUM_CLOCK_FREQUENCY,
BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY);
@@ -84,10 +149,116 @@ static int sdhci_bcmstb_probe(struct udevice *dev)
@@ -84,10 +129,21 @@ static int sdhci_bcmstb_probe(struct udevice *dev)
upriv->mmc = &plat->mmc;
host->mmc->priv = host;
@ -134,103 +119,8 @@ index dc96818cff..21489e66c0 100644
return sdhci_probe(dev);
}
+static u16 sdhci_brcmstb_32bits_readw(struct sdhci_host *host, int reg)
+{
+ struct sdhci_bcmstb_host *bcmstb = to_bcmstb_host(host);
+ u16 word;
+ u32 val;
+
+ if (reg == SDHCI_TRANSFER_MODE && bcmstb->is_cmd_shadowed) {
+ /* Get the saved transfer mode */
+ val = bcmstb->shadow_cmd;
+ } else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) &&
+ bcmstb->is_blk_shadowed) {
+ /* Get the saved block info */
+ val = bcmstb->shadow_blk;
+ } else {
+ val = readl(host->ioaddr + (reg & ~3));
+ }
+
+ word = val >> REG_OFFSET_IN_BITS(reg) & 0xffff;
+ return word;
+}
+
+static u8 sdhci_brcmstb_32bits_readb(struct sdhci_host *host, int reg)
+{
+ u32 val = readl(host->ioaddr + (reg & ~3));
+ u8 byte = val >> REG_OFFSET_IN_BITS(reg) & 0xff;
+ return byte;
+}
+
+/*
+ * BCM2712 unfortunately carries with it a perennial bug with the SD
+ * controller register interface present on previous chips (2711/2709/2708).
+ * Accesses must be dword-sized and a read-modify-write cycle to the
+ * 32-bit registers containing the COMMAND, TRANSFER_MODE, BLOCK_SIZE and
+ * BLOCK_COUNT registers tramples the upper/lower 16 bits of data written.
+ * BCM2712 does not seem to need the extreme delay between each write as
+ * on previous chips, just the serialisation of writes to these registers
+ * in a single 32-bit operation.
+ */
+static void sdhci_brcmstb_32bits_writew(struct sdhci_host *host, u16 val, int reg)
+{
+ struct sdhci_bcmstb_host *bcmstb = to_bcmstb_host(host);
+ u32 word_shift = REG_OFFSET_IN_BITS(reg);
+ u32 mask = 0xffff << word_shift;
+ u32 oldval, newval;
+
+ if (reg == SDHCI_COMMAND) {
+ /* Write the block now as we are issuing a command */
+ if (bcmstb->is_blk_shadowed) {
+ writel(bcmstb->shadow_blk, host->ioaddr + SDHCI_BLOCK_SIZE);
+ bcmstb->is_blk_shadowed = false;
+ }
+ oldval = bcmstb->shadow_cmd;
+ bcmstb->is_cmd_shadowed = false;
+ } else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) &&
+ bcmstb->is_blk_shadowed) {
+ /* Block size and count are stored in shadow reg */
+ oldval = bcmstb->shadow_blk;
+ } else {
+ /* Read reg, all other registers are not shadowed */
+ oldval = readl(host->ioaddr + (reg & ~3));
+ }
+ newval = (oldval & ~mask) | (val << word_shift);
+
+ if (reg == SDHCI_TRANSFER_MODE) {
+ /* Save the transfer mode until the command is issued */
+ bcmstb->shadow_cmd = newval;
+ bcmstb->is_cmd_shadowed = true;
+ } else if (reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) {
+ /* Save the block info until the command is issued */
+ bcmstb->shadow_blk = newval;
+ bcmstb->is_blk_shadowed = true;
+ } else {
+ /* Command or other regular 32-bit write */
+ writel(newval, host->ioaddr + (reg & ~3));
+ }
+}
+
+static void sdhci_brcmstb_32bits_writeb(struct sdhci_host *host, u8 val, int reg)
+{
+ u32 oldval = readl(host->ioaddr + (reg & ~3));
+ u32 byte_shift = REG_OFFSET_IN_BITS(reg);
+ u32 mask = 0xff << byte_shift;
+ u32 newval = (oldval & ~mask) | (val << byte_shift);
+
+ writel(newval, host->ioaddr + (reg & ~3));
+}
+
+static struct sdhci_ops sdhci_brcmstb_ops_2712 = {
+ .read_b = sdhci_brcmstb_32bits_readb,
+ .read_w = sdhci_brcmstb_32bits_readw,
+ .write_w = sdhci_brcmstb_32bits_writew,
+ .write_b = sdhci_brcmstb_32bits_writeb,
+};
+
+static const struct sdhci_brcmstb_dev_priv match_priv_2712 = {
+ .init = sdhci_brcmstb_init_2712,
+ .ops = &sdhci_brcmstb_ops_2712,
+};
+
static const struct udevice_id sdhci_bcmstb_match[] = {

View File

@ -1,18 +1,21 @@
From 1133dd0e65418bac47257e742de89cf8310b2ec0 Mon Sep 17 00:00:00 2001
From cc2b2c2ccd1e169df71a02179d8e495e9512e2ce Mon Sep 17 00:00:00 2001
From: "Ivan T. Ivanov" <iivanov@suse.de>
Date: Fri, 15 Dec 2023 09:46:30 +0100
Date: Tue, 23 Jan 2024 10:07:58 +0200
Subject: [PATCH] configs: rpi_arm64: enable SDHCI BCMSTB driver
RPi5 have "brcm,bcm2712-sdhci" controller which is
handled by "sdhci-bcmstb" driver, so enable it.
Tested-by: Jens Maus <mail@jens-maus.de>
Tested by: Darko Alavanja <darko.alavanja@konsulko.com>
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
---
configs/rpi_arm64_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
index f9dade18f6..1107fd11de 100644
index f9dade18f6a..1107fd11de8 100644
--- a/configs/rpi_arm64_defconfig
+++ b/configs/rpi_arm64_defconfig
@@ -33,6 +33,7 @@ CONFIG_BCM2835_GPIO=y

View File

@ -0,0 +1,39 @@
From 4dac5b37238d03ac30cb92a8ea40929b45aae93c Mon Sep 17 00:00:00 2001
From: "Ivan T. Ivanov" <iivanov@suse.de>
Date: Tue, 23 Jan 2024 10:07:59 +0200
Subject: [PATCH] configs: rpi_arm64: build position independent code
Latest RPi5 EEPROM firmware versions after "DATE: 2023/10/30", has changed
kernel load address from 0x80000 to 0x200000 which break boot process.
Switch to position independent code to be able to boot the same binary
on top of different EEPROM firmware versions.
Tested on:
Raspberry Pi 5 Model B Rev 1.0
Raspberry Pi 4 Model B Rev 1.1
Raspberry Pi 3 Model B Plus Rev 1.3
Raspberry Pi Zero 2 W Rev 1.0
Raspberry Pi 2 Model B Rev 1.2
Raspberry Pi Compute Module 4 Rev 1.0
Raspberry Pi Compute Module 3 Rev 1.0
Tested-by: Jens Maus <mail@jens-maus.de>
Tested by: Darko Alavanja <darko.alavanja@konsulko.com>
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
---
configs/rpi_arm64_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
index 1107fd11de8..ab0008a3ba6 100644
--- a/configs/rpi_arm64_defconfig
+++ b/configs/rpi_arm64_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_BCM283X=y
-CONFIG_TEXT_BASE=0x00080000
+CONFIG_POSITION_INDEPENDENT=y
CONFIG_TARGET_RPI_ARM64=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe30

View File

@ -1,91 +0,0 @@
From 9a5ce738148019ec53d4d66bfd53a17128fb2ff1 Mon Sep 17 00:00:00 2001
From: "Ivan T. Ivanov" <iivanov@suse.de>
Date: Thu, 14 Dec 2023 09:25:49 +0100
Subject: [PATCH] pci: pcie-brcmstb: Add bcm2712 PCIe controller support
PCIe controller have minor register map difference compared
to bcm2711 variant. Handle this using device specific register
offset.
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
---
drivers/pci/pcie_brcmstb.c | 23 +++++++++++++++++++----
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c
index cd45f0bee9..d63e715b2e 100644
--- a/drivers/pci/pcie_brcmstb.c
+++ b/drivers/pci/pcie_brcmstb.c
@@ -90,7 +90,6 @@
#define PCIE_MEM_WIN0_LIMIT_HI(win) \
PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((win) * 8)
-#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204
#define PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000
#define PCIE_MSI_INTR2_CLR 0x4508
@@ -131,6 +130,10 @@
#define SSC_STATUS_PLL_LOCK_MASK 0x800
#define SSC_STATUS_PLL_LOCK_SHIFT 11
+struct pcie_cfg_data {
+ unsigned long hard_debug_offs;
+};
+
/**
* struct brcm_pcie - the PCIe controller state
* @base: Base address of memory mapped IO registers of the controller
@@ -141,6 +144,7 @@
struct brcm_pcie {
void __iomem *base;
+ struct pcie_cfg_data *cfg;
int gen;
bool ssc;
};
@@ -458,7 +462,7 @@ static int brcm_pcie_probe(struct udevice *dev)
/* Take the bridge out of reset */
clrbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_INIT_MASK);
- clrbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG,
+ clrbits_le32(base + pcie->cfg->hard_debug_offs,
PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
/* Wait for SerDes to be stable */
@@ -599,7 +603,7 @@ static int brcm_pcie_remove(struct udevice *dev)
setbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_PERST_MASK);
/* Turn off SerDes */
- setbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG,
+ setbits_le32(base + pcie->cfg->hard_debug_offs,
PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
/* Shutdown bridge */
@@ -620,6 +624,8 @@ static int brcm_pcie_of_to_plat(struct udevice *dev)
if (!pcie->base)
return -EINVAL;
+ pcie->cfg = (struct pcie_cfg_data *)dev_get_driver_data(dev);
+
pcie->ssc = ofnode_read_bool(dn, "brcm,enable-ssc");
ret = ofnode_read_u32(dn, "max-link-speed", &max_link_speed);
@@ -636,8 +642,17 @@ static const struct dm_pci_ops brcm_pcie_ops = {
.write_config = brcm_pcie_write_config,
};
+static const struct pcie_cfg_data bcm2711_cfg = {
+ .hard_debug_offs = 0x4204
+};
+
+static const struct pcie_cfg_data bcm2712_cfg = {
+ .hard_debug_offs = 0x4304
+};
+
static const struct udevice_id brcm_pcie_ids[] = {
- { .compatible = "brcm,bcm2711-pcie" },
+ { .compatible = "brcm,bcm2711-pcie", .data = (ulong)&bcm2711_cfg },
+ { .compatible = "brcm,bcm2712-pcie", .data = (ulong)&bcm2712_cfg },
{ }
};

View File

@ -1,3 +1,14 @@
-------------------------------------------------------------------
Wed Feb 14 10:09:59 UTC 2024 - Matthias Brugger <mbrugger@suse.com>
Patch queue updated from https://github.com/openSUSE/u-boot.git tumbleweed-2024.01
* Patches dropped:
0020-bcm2835-brcm-bcm2708-fb-device-is-u.patch
0023-pci-pcie-brcmstb-Add-bcm2712-PCIe-c.patch
* Patches added:
0020-bcm2835-Dynamically-calculate-bytes.patch
0023-configs-rpi_arm64-build-position-in.patch
-------------------------------------------------------------------
Fri Jan 12 12:37:19 UTC 2024 - Andreas Schwab <schwab@suse.de>

View File

@ -250,10 +250,10 @@ Patch0016: 0016-cmd-boot-add-brom-cmd-to-reboot-to-.patch
Patch0017: 0017-rpi5-add-initial-memory-map-for-bcm.patch
Patch0018: 0018-rpi5-Use-devicetree-as-alternative-.patch
Patch0019: 0019-rpi5-Use-devicetree-to-retrieve-boa.patch
Patch0020: 0020-bcm2835-brcm-bcm2708-fb-device-is-u.patch
Patch0020: 0020-bcm2835-Dynamically-calculate-bytes.patch
Patch0021: 0021-mmc-bcmstb-Add-support-for-bcm2712-.patch
Patch0022: 0022-configs-rpi_arm64-enable-SDHCI-BCMS.patch
Patch0023: 0023-pci-pcie-brcmstb-Add-bcm2712-PCIe-c.patch
Patch0023: 0023-configs-rpi_arm64-build-position-in.patch
# Patches: end
BuildRequires: bc
BuildRequires: bison