From 7b56261a829ec016c7ea26379d3a3618aab930f88a04e4449c6c725358e74a87 Mon Sep 17 00:00:00 2001 From: Stephan Kulow Date: Sat, 17 May 2014 19:45:20 +0000 Subject: [PATCH] Accepting request 234407 from Base:System - Enhance pre_checkin.sh script to handle arch restrictions - Fix builds : * 'tools' target is now 'tools-only' * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' * Enhanced pre_checkin.sh script to handle uppercases in config name * Renamed config from cubieboard to Cubieboard * Renamed config from cubieboard2 to Cubieboard2 * Renamed config from hyundai_a7hd to Hyundai_A7HD * Renamed config from mele_a1000 to Mele_A1000 - Add vexpress_aemv8a board - Update to v2014.04 * Update mlo-ext2.patch * Update mx53loco-bootscr.patch * Update origen-ext2.patch * Dropped v2014.01-sunxi.patch and created v2014.04-sunxi.patch by diffing u-boot-2014.04 with u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 * Update rpi_b-bootscr.patch * Drop gnuhash.patch (upstreamed) - Enhance pre_checkin.sh script to handle arch restrictions - Fix builds : * 'tools' target is now 'tools-only' * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' * Enhanced pre_checkin.sh script to handle uppercases in config name * Renamed config from cubieboard to Cubieboard OBS-URL: https://build.opensuse.org/request/show/234407 OBS-URL: https://build.opensuse.org/package/show/openSUSE:Factory/u-boot?expand=0&rev=25 --- gnuhash.patch | 24 - mlo-ext2.patch | 130 +- mx53loco-bootscr.patch | 21 +- origen-ext2.patch | 26 +- pre_checkin.sh | 36 +- rpi_b-bootscr.patch | 40 +- u-boot-2014.01.tar.bz2 | 3 - u-boot-2014.04.tar.bz2 | 3 + u-boot-am335xevm.changes | 35 + u-boot-am335xevm.spec | 14 +- u-boot-arndale.changes | 35 + u-boot-arndale.spec | 14 +- u-boot-colibrit20iris.changes | 35 + u-boot-colibrit20iris.spec | 14 +- u-boot-cubieboard.changes | 35 + u-boot-cubieboard.spec | 16 +- u-boot-cubieboard2.changes | 35 + u-boot-cubieboard2.spec | 16 +- u-boot-highbank.changes | 35 + u-boot-highbank.spec | 14 +- u-boot-hyundaia7hd.changes | 35 + u-boot-hyundaia7hd.spec | 16 +- u-boot-melea1000.changes | 35 + u-boot-melea1000.spec | 16 +- u-boot-mx53loco.changes | 35 + u-boot-mx53loco.spec | 14 +- u-boot-mx6qsabrelite.changes | 35 + u-boot-mx6qsabrelite.spec | 14 +- u-boot-omap3beagle.changes | 35 + u-boot-omap3beagle.spec | 14 +- u-boot-omap4panda.changes | 35 + u-boot-omap4panda.spec | 14 +- u-boot-paz00.changes | 35 + u-boot-paz00.spec | 14 +- u-boot-rpib.changes | 35 + u-boot-rpib.spec | 14 +- u-boot-snow.changes | 35 + u-boot-snow.spec | 14 +- u-boot-vexpressaemv8a.changes | 450 ++ u-boot-vexpressaemv8a.spec | 151 + u-boot.changes | 35 + u-boot.spec | 4 +- u-boot.spec.in | 14 +- v2014.01-sunxi.patch => v2014.04-sunxi.patch | 6429 +++++++++++------- 44 files changed, 5184 insertions(+), 2925 deletions(-) delete mode 100644 gnuhash.patch delete mode 100644 u-boot-2014.01.tar.bz2 create mode 100644 u-boot-2014.04.tar.bz2 create mode 100644 u-boot-vexpressaemv8a.changes create mode 100644 u-boot-vexpressaemv8a.spec rename v2014.01-sunxi.patch => v2014.04-sunxi.patch (58%) diff --git a/gnuhash.patch b/gnuhash.patch deleted file mode 100644 index ebf4dc9..0000000 --- a/gnuhash.patch +++ /dev/null @@ -1,24 +0,0 @@ -diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds -index 4da5d24..fb8bfaf 100644 ---- a/arch/arm/cpu/u-boot.lds -+++ b/arch/arm/cpu/u-boot.lds -@@ -97,6 +97,7 @@ SECTIONS - .dynamic : { *(.dynamic*) } - .plt : { *(.plt*) } - .interp : { *(.interp*) } -+ .gnu.hash : { *(.gnu.hash) } - .gnu : { *(.gnu*) } - .ARM.exidx : { *(.ARM.exidx*) } - .gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) } -diff --git a/board/ti/am335x/u-boot.lds b/board/ti/am335x/u-boot.lds -index 6a734b3..fec4ccf 100644 ---- a/board/ti/am335x/u-boot.lds -+++ b/board/ti/am335x/u-boot.lds -@@ -113,6 +113,7 @@ SECTIONS - .dynstr : { *(.dynstr*) } - .dynamic : { *(.dynamic*) } - .hash : { *(.hash*) } -+ .gnu.hash : { *(.gnu.hash) } - .plt : { *(.plt*) } - .interp : { *(.interp*) } - .gnu : { *(.gnu*) } diff --git a/mlo-ext2.patch b/mlo-ext2.patch index d13e7ab..5f48d0f 100644 --- a/mlo-ext2.patch +++ b/mlo-ext2.patch @@ -1,7 +1,7 @@ -diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c +diff --git arch/arm/cpu/armv7/omap3/board.c.orig arch/arm/cpu/armv7/omap3/board.c index 2922816..39a94ad 100644 ---- a/arch/arm/cpu/armv7/omap3/board.c -+++ b/arch/arm/cpu/armv7/omap3/board.c +--- arch/arm/cpu/armv7/omap3/board.c.orig ++++ arch/arm/cpu/armv7/omap3/board.c @@ -61,6 +61,8 @@ u32 omap3_boot_device = BOOT_DEVICE_NAND; /* auto boot mode detection is not possible for OMAP3 - hard code */ u32 spl_boot_mode(void) @@ -11,23 +11,51 @@ index 2922816..39a94ad 100644 switch (spl_boot_device()) { case BOOT_DEVICE_MMC2: return MMCSD_MODE_RAW; -diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c -index fc2f226..fc60e98 100644 ---- a/common/spl/spl_mmc.c -+++ b/common/spl/spl_mmc.c -@@ -11,6 +11,7 @@ +--- ./common/spl/spl_mmc.c.orig 2014-04-14 21:19:24.000000000 +0200 ++++ ./common/spl/spl_mmc.c 2014-04-29 10:54:20.844025492 +0200 +@@ -92,7 +92,9 @@ void spl_mmc_load_image(void) + hang(); + } + +- boot_mode = spl_boot_mode(); ++// boot_mode = spl_boot_mode(); ++ boot_mode = MMCSD_MODE_FAT; /* Fix OMAP4 boot */ ++ + if (boot_mode == MMCSD_MODE_RAW) { + debug("boot mode - RAW\n"); + #ifdef CONFIG_SPL_OS_BOOT +@@ -107,9 +109,12 @@ void spl_mmc_load_image(void) + if (spl_start_uboot() || spl_load_image_fat_os(&mmc->block_dev, + CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION)) + #endif +- err = spl_load_image_fat(&mmc->block_dev, ++// err = spl_load_image_fat(&mmc->block_dev, ++// CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION, ++// CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME); ++ err = spl_load_image_ext2(&mmc->block_dev, + CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION, +- CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME); ++ "u-boot.bin"/*CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME*/); /* We use u-boot.bin file on first partition */ + #endif + #ifdef CONFIG_SUPPORT_EMMC_BOOT + } else if (boot_mode == MMCSD_MODE_EMMCBOOT) { +--- ./common/spl/spl_fat.c.orig 2014-04-29 10:45:48.565021128 +0200 ++++ ./common/spl/spl_fat.c 2014-04-29 10:54:18.660076999 +0200 +@@ -13,6 +13,7 @@ + #include #include - #include #include +#include - #include #include -@@ -70,6 +71,58 @@ static int mmc_load_image_raw_os(struct mmc *mmc) - #endif + static int fat_registered; +@@ -38,6 +39,61 @@ static int spl_register_fat_device(block + return err; + } - #ifdef CONFIG_SPL_FAT_SUPPORT -+static int mmc_load_image_ext2(struct mmc *mmc, const char *filename) ++int spl_load_image_ext2(block_dev_desc_t *block_dev, ++ int partition, ++ const char *filename) +{ + s32 err; + struct image_header *header; @@ -37,13 +65,13 @@ index fc2f226..fc60e98 100644 + header = (struct image_header *)(CONFIG_SYS_TEXT_BASE - + sizeof(struct image_header)); + -+ if (get_partition_info(&mmc->block_dev, -+ CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION, &part_info)) { ++ if (get_partition_info(block_dev, ++ partition, &part_info)) { + printf("spl: no partition table found\n"); + goto end; + } + -+ ext4fs_set_blk_dev(&mmc->block_dev, &part_info); ++ ext4fs_set_blk_dev(block_dev, &part_info); +// err = ext4fs_set_blk_dev(&mmc->block_dev, &part_info); +// if (!err) { +// printf("spl: ext4fs register err - %d\n", err); @@ -79,52 +107,24 @@ index fc2f226..fc60e98 100644 + return (err <= 0); +} + - static int mmc_load_image_fat(struct mmc *mmc, const char *filename) - { - int err; -@@ -141,7 +194,9 @@ void spl_mmc_load_image(void) - hang(); - } - -- boot_mode = spl_boot_mode(); -+// boot_mode = spl_boot_mode(); -+ boot_mode = MMCSD_MODE_FAT; /* Fix OMAP4 boot */ + - if (boot_mode == MMCSD_MODE_RAW) { - debug("boot mode - RAW\n"); - #ifdef CONFIG_SPL_OS_BOOT -@@ -153,19 +208,20 @@ void spl_mmc_load_image(void) - } else if (boot_mode == MMCSD_MODE_FAT) { - debug("boot mode - FAT\n"); + int spl_load_image_fat(block_dev_desc_t *block_dev, + int partition, + const char *filename) +--- include/spl.h.orig 2014-04-29 10:56:22.351156694 +0200 ++++ include/spl.h 2014-04-29 10:56:54.996384973 +0200 +@@ -69,6 +69,7 @@ void spl_usb_load_image(void); + void spl_sata_load_image(void); -- err = fat_register_device(&mmc->block_dev, -- CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION); -- if (err) { -+// err = fat_register_device(&mmc->block_dev, -+// CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION); -+// if (err) { - #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT -- printf("spl: fat register err - %d\n", err); -+// printf("spl: fat register err - %d\n", err); - #endif -- hang(); -- } -+// hang(); -+// } + /* SPL FAT image functions */ ++int spl_load_image_ext2(block_dev_desc_t *block_dev, int partition, const char *filename); + int spl_load_image_fat(block_dev_desc_t *block_dev, int partition, const char *filename); + int spl_load_image_fat_os(block_dev_desc_t *block_dev, int partition); - #ifdef CONFIG_SPL_OS_BOOT - if (spl_start_uboot() || mmc_load_image_fat_os(mmc)) - #endif -- err = mmc_load_image_fat(mmc, CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME); -+// err = mmc_load_image_fat(mmc, CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME); -+ err = mmc_load_image_ext2(mmc, "u-boot.bin"); /* We use u-boot.bin file on first partition */ - #endif - } else { - #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT -diff --git a/fs/Makefile b/fs/Makefile +diff --git fs/Makefile.orig fs/Makefile index 34dc035..a09ada5 100644 ---- a/fs/Makefile -+++ b/fs/Makefile +--- fs/Makefile.orig ++++ fs/Makefile @@ -8,6 +8,7 @@ ifdef CONFIG_SPL_BUILD @@ -133,10 +133,10 @@ index 34dc035..a09ada5 100644 else obj-y += fs.o -diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h +diff --git include/configs/omap3_beagle.h.orig include/configs/omap3_beagle.h index c58bc91..7ecae0c 100644 ---- a/include/configs/omap3_beagle.h -+++ b/include/configs/omap3_beagle.h +--- include/configs/omap3_beagle.h.orig ++++ include/configs/omap3_beagle.h @@ -40,6 +40,7 @@ #define CONFIG_OF_LIBFDT @@ -154,10 +154,10 @@ index c58bc91..7ecae0c 100644 "importbootenv=echo Importing environment from mmc ...; " \ "env import -t $loadaddr $filesize\0" \ "ramargs=setenv bootargs console=${console} " \ -diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h +diff --git include/configs/ti_omap4_common.h.orig include/configs/ti_omap4_common.h index d099bfd..24b2ceb 100644 ---- a/include/configs/omap4_common.h -+++ b/include/configs/omap4_common.h +--- include/configs/ti_omap4_common.h.orig ++++ include/configs/ti_omap4_common.h @@ -104,10 +104,10 @@ "vram=${vram} " \ "root=${mmcroot} " \ diff --git a/mx53loco-bootscr.patch b/mx53loco-bootscr.patch index deefa49..afa8d2f 100644 --- a/mx53loco-bootscr.patch +++ b/mx53loco-bootscr.patch @@ -1,6 +1,6 @@ ---- include/configs/mx53loco.h.orig 2013-11-21 16:01:18.084423858 +0100 -+++ include/configs/mx53loco.h 2013-11-21 16:05:47.301100793 +0100 -@@ -93,6 +93,7 @@ +--- include/configs/mx53loco.h.orig 2014-04-14 21:19:24.000000000 +0200 ++++ include/configs/mx53loco.h 2014-04-29 11:53:24.669579194 +0200 +@@ -92,6 +92,7 @@ /* Command definition */ #include #define CONFIG_CMD_BOOTZ @@ -8,16 +8,7 @@ #undef CONFIG_CMD_IMLS -@@ -104,7 +105,7 @@ - #define CONFIG_SYS_TEXT_BASE 0x77800000 - - #define CONFIG_EXTRA_ENV_SETTINGS \ -- "script=boot.scr\0" \ -+ "script=boot/boot.scr\0" \ - "uimage=uImage\0" \ - "fdt_file=imx53-qsb.dtb\0" \ - "fdt_addr=0x71000000\0" \ -@@ -115,11 +116,11 @@ +@@ -114,11 +115,11 @@ "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \ "loadbootscript=" \ @@ -25,9 +16,9 @@ + "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ -- "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ +- "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ -+ "loaduimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ ++ "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ diff --git a/origen-ext2.patch b/origen-ext2.patch index 3c3e8cb..7baac8c 100644 --- a/origen-ext2.patch +++ b/origen-ext2.patch @@ -1,19 +1,17 @@ ---- include/configs/origen.h.orig 2013-10-16 19:08:12.000000000 +0200 -+++ include/configs/origen.h 2013-11-21 15:57:25.724045492 +0100 -@@ -74,8 +74,11 @@ +--- include/configs/origen.h.orig 2014-04-29 14:10:29.864588285 +0200 ++++ include/configs/origen.h 2014-04-29 14:15:44.511098108 +0200 +@@ -61,6 +61,9 @@ + #undef CONFIG_CMD_PING + #define CONFIG_CMD_ELF #define CONFIG_CMD_DHCP - #define CONFIG_CMD_MMC - #define CONFIG_CMD_FAT -+#define CONFIG_CMD_EXT2 /* EXT2 Support */ - #undef CONFIG_CMD_NET - #undef CONFIG_CMD_NFS ++#define CONFIG_CMD_EXT2 /* EXT2 Support */ +#define CONFIG_CMD_BOOTZ /* bootz zImage support */ +#define CONFIG_SUPPORT_RAW_INITRD /* bootz raw initrd support */ + #undef CONFIG_CMD_NET + #undef CONFIG_CMD_NFS - #define CONFIG_BOOTDELAY 3 - #define CONFIG_ZERO_BOOTDELAY_CHECK -@@ -85,7 +88,35 @@ - +@@ -69,7 +72,35 @@ + #define COPY_BL2_FNPTR_ADDR 0x02020030 #define CONFIG_SPL_TEXT_BASE 0x02021410 -#define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000" @@ -47,5 +45,5 @@ + "fi; " \ + "fi;" - /* Miscellaneous configurable options */ - #define CONFIG_SYS_LONGHELP /* undef to save memory */ + #define CONFIG_IDENT_STRING " for ORIGEN" + diff --git a/pre_checkin.sh b/pre_checkin.sh index 34c2205..d37a305 100644 --- a/pre_checkin.sh +++ b/pre_checkin.sh @@ -2,12 +2,33 @@ BOARDNAME="$1" BOARDCONFIG="$2" +ARCH_RESTRICTIONS="$3 $4" -if [ ! "$1" -o ! "$2" ]; then - for BOARDCONFIG in omap3_beagle omap4_panda am335x_evm arndale highbank mx53loco mx6qsabrelite rpi_b cubieboard cubieboard2 hyundai_a7hd mele_a1000 colibri_t20_iris paz00 snow; do - BOARDNAME="$(echo $BOARDCONFIG | tr -d '_')" +armv6_boards="rpi_b" +armv7_boards="omap3_beagle omap4_panda am335x_evm arndale highbank mx53loco mx6qsabrelite Cubieboard Cubieboard2 Hyundai_A7HD Mele_A1000 colibri_t20_iris paz00 snow" +aarch64_boards="vexpress_aemv8a" + +if [ ! "$1" -o ! "$2" -o ! "$3" ]; then + # armv6 boards + for BOARDCONFIG in $armv6_boards; do + BOARDNAME="$(echo $BOARDCONFIG | tr -d '_' | tr '[:upper:]' '[:lower:]')" BOARDCONFIG=${BOARDCONFIG}_config - bash $0 $BOARDNAME $BOARDCONFIG + ARCH_RESTRICTIONS="armv6l armv6hl" + bash $0 $BOARDNAME $BOARDCONFIG $ARCH_RESTRICTIONS + done + # armv7 boards + for BOARDCONFIG in $armv7_boards; do + BOARDNAME="$(echo $BOARDCONFIG | tr -d '_' | tr '[:upper:]' '[:lower:]')" + BOARDCONFIG=${BOARDCONFIG}_config + ARCH_RESTRICTIONS="armv7l armv7hl" + bash $0 $BOARDNAME $BOARDCONFIG $ARCH_RESTRICTIONS + done + # aarch64 boards + for BOARDCONFIG in $aarch64_boards; do + BOARDNAME="$(echo $BOARDCONFIG | tr -d '_' | tr '[:upper:]' '[:lower:]')" + BOARDCONFIG=${BOARDCONFIG}_config + ARCH_RESTRICTIONS="aarch64" + bash $0 $BOARDNAME $BOARDCONFIG $ARCH_RESTRICTIONS done exit 0 fi @@ -22,11 +43,11 @@ mx*|efika*) BINEND=imx ;; XLOADER=1 ;; *arndale*) BINEND=bin ARNDALE_SPL=1 ;; -*cubieboard*) BINEND=bin +*Cubieboard*) BINEND=bin SUNXI_SPL=1 ;; -*mele_a1000*) BINEND=bin +*Mele_A1000*) BINEND=bin SUNXI_SPL=1 ;; -*hyundai_a7hd*) BINEND=bin +*Hyundai_A7HD*) BINEND=bin SUNXI_SPL=1 ;; *snow*) BINEND=img ;; *) BINEND=bin ;; @@ -34,6 +55,7 @@ esac sed "s/BOARDCONFIG/$BOARDCONFIG/g s/BOARDNAME/$BOARDNAME/g +s/ARCH_RESTRICTIONS/$ARCH_RESTRICTIONS/g s/BINEND/$BINEND/g s/ORIGEN_SPL/$ORIGEN_SPL/g s/ARNDALE_SPL/$ARNDALE_SPL/g diff --git a/rpi_b-bootscr.patch b/rpi_b-bootscr.patch index b6b6fe4..727f1fa 100644 --- a/rpi_b-bootscr.patch +++ b/rpi_b-bootscr.patch @@ -1,24 +1,20 @@ -Index: u-boot-2013.10/include/configs/rpi_b.h -=================================================================== ---- u-boot-2013.10.orig/include/configs/rpi_b.h -+++ u-boot-2013.10/include/configs/rpi_b.h -@@ -130,8 +130,8 @@ - "boot_targets=mmc0\0" \ +--- include/configs/rpi_b.h.orig 2014-04-29 14:35:55.019326981 +0200 ++++ include/configs/rpi_b.h 2014-04-29 14:40:56.671158881 +0200 +@@ -147,7 +147,7 @@ + #define BOOT_TARGETS_MMC "mmc0" + + #define BOOTCMDS_COMMON \ +- "rootpart=1\0" \ ++ "rootpart=2\0" \ \ - "script_boot=" \ -- "if fatload ${devtype} ${devnum}:1 " \ -- "${scriptaddr} boot.scr.uimg; then " \ -+ "if ext2load ${devtype} ${devnum}:2 " \ -+ "${scriptaddr} boot.scr; then " \ - "source ${scriptaddr}; " \ - "fi;\0" \ + "do_script_boot=" \ + "load ${devtype} ${devnum}:${rootpart} " \ +@@ -189,7 +189,7 @@ \ -@@ -167,7 +167,7 @@ - #define CONFIG_CMD_PART - #define CONFIG_CMD_FS_GENERIC - #define CONFIG_CMD_FAT --#define CONFIG_CMD_EXT -+#define CONFIG_CMD_EXT2 - /* Some things don't make sense on this HW or yet */ - #undef CONFIG_CMD_FPGA - #undef CONFIG_CMD_NET + "boot_prefixes=/\0" \ + \ +- "boot_scripts=boot.scr.uimg\0" \ ++ "boot_scripts=boot.scr boot.scr.uimg\0" \ + \ + BOOTCMDS_MMC + diff --git a/u-boot-2014.01.tar.bz2 b/u-boot-2014.01.tar.bz2 deleted file mode 100644 index 0ca0ef5..0000000 --- a/u-boot-2014.01.tar.bz2 +++ /dev/null @@ -1,3 +0,0 @@ -version https://git-lfs.github.com/spec/v1 -oid sha256:cdaf8c81583abfa2e73da46cfcf87b0cbd9741d9aa766f3b905376e3652d543d -size 10180625 diff --git a/u-boot-2014.04.tar.bz2 b/u-boot-2014.04.tar.bz2 new file mode 100644 index 0000000..b96c5d4 --- /dev/null +++ b/u-boot-2014.04.tar.bz2 @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:7b6444bd23eb61068c43bd1d44ec7e7bfdbce5cadeca20c833eee186b4d3fd31 +size 9873025 diff --git a/u-boot-am335xevm.changes b/u-boot-am335xevm.changes index 9bb9d74..9d2bb9b 100644 --- a/u-boot-am335xevm.changes +++ b/u-boot-am335xevm.changes @@ -1,3 +1,38 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + ------------------------------------------------------------------- Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-am335xevm.spec b/u-boot-am335xevm.spec index bb79c4e..8e442b9 100644 --- a/u-boot-am335xevm.spec +++ b/u-boot-am335xevm.spec @@ -24,7 +24,7 @@ %define arndale_spl 0 Name: u-boot-am335xevm -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: The u-boot firmware for the am335xevm arm platform License: GPL-2.0 @@ -40,10 +40,9 @@ Patch4: beagle-bootscr.patch Patch5: mx53loco-bootscr.patch Patch6: origen-ext2.patch Patch7: arndale.patch -Patch8: v2014.01-sunxi.patch +Patch8: v2014.04-sunxi.patch Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch -Patch11: gnuhash.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch Patch20: fix_exynos5_text_base.patch @@ -58,7 +57,7 @@ Conflicts: otherproviders(u-boot-loader) Obsoletes: x-loader-am335xevm Provides: x-loader-am335xevm %endif -ExclusiveArch: %arm +ExclusiveArch: armv7l armv7hl %description Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. @@ -77,7 +76,7 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot -%patch2 -p1 +%patch2 %patch3 %patch4 %patch5 @@ -85,8 +84,7 @@ rm -rf board/Marvell %patch7 %patch8 -p1 %patch9 -p1 -%patch10 -p1 -%patch11 -p1 +%patch10 %patch12 %patch13 %if "%{name}" == "u-boot-snow" @@ -146,7 +144,7 @@ install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb %doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem # Copy some useful kermit scripts as well -%doc tools/scripts/dot.kermrc tools/scripts/flash_param tools/scripts/send_cmd tools/scripts/send_image +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image # Now any h/w dependent Documentation %doc doc/README.ARM-SoC doc/README.ARM-memory-map diff --git a/u-boot-arndale.changes b/u-boot-arndale.changes index 9bb9d74..9d2bb9b 100644 --- a/u-boot-arndale.changes +++ b/u-boot-arndale.changes @@ -1,3 +1,38 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + ------------------------------------------------------------------- Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-arndale.spec b/u-boot-arndale.spec index d4770f4..6121b6e 100644 --- a/u-boot-arndale.spec +++ b/u-boot-arndale.spec @@ -24,7 +24,7 @@ %define arndale_spl 1 Name: u-boot-arndale -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: The u-boot firmware for the arndale arm platform License: GPL-2.0 @@ -40,10 +40,9 @@ Patch4: beagle-bootscr.patch Patch5: mx53loco-bootscr.patch Patch6: origen-ext2.patch Patch7: arndale.patch -Patch8: v2014.01-sunxi.patch +Patch8: v2014.04-sunxi.patch Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch -Patch11: gnuhash.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch Patch20: fix_exynos5_text_base.patch @@ -58,7 +57,7 @@ Conflicts: otherproviders(u-boot-loader) Obsoletes: x-loader-arndale Provides: x-loader-arndale %endif -ExclusiveArch: %arm +ExclusiveArch: armv7l armv7hl %description Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. @@ -77,7 +76,7 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot -%patch2 -p1 +%patch2 %patch3 %patch4 %patch5 @@ -85,8 +84,7 @@ rm -rf board/Marvell %patch7 %patch8 -p1 %patch9 -p1 -%patch10 -p1 -%patch11 -p1 +%patch10 %patch12 %patch13 %if "%{name}" == "u-boot-snow" @@ -146,7 +144,7 @@ install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb %doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem # Copy some useful kermit scripts as well -%doc tools/scripts/dot.kermrc tools/scripts/flash_param tools/scripts/send_cmd tools/scripts/send_image +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image # Now any h/w dependent Documentation %doc doc/README.ARM-SoC doc/README.ARM-memory-map diff --git a/u-boot-colibrit20iris.changes b/u-boot-colibrit20iris.changes index 9bb9d74..9d2bb9b 100644 --- a/u-boot-colibrit20iris.changes +++ b/u-boot-colibrit20iris.changes @@ -1,3 +1,38 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + ------------------------------------------------------------------- Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-colibrit20iris.spec b/u-boot-colibrit20iris.spec index f5c83a7..5ee1a3b 100644 --- a/u-boot-colibrit20iris.spec +++ b/u-boot-colibrit20iris.spec @@ -24,7 +24,7 @@ %define arndale_spl 0 Name: u-boot-colibrit20iris -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: The u-boot firmware for the colibrit20iris arm platform License: GPL-2.0 @@ -40,10 +40,9 @@ Patch4: beagle-bootscr.patch Patch5: mx53loco-bootscr.patch Patch6: origen-ext2.patch Patch7: arndale.patch -Patch8: v2014.01-sunxi.patch +Patch8: v2014.04-sunxi.patch Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch -Patch11: gnuhash.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch Patch20: fix_exynos5_text_base.patch @@ -58,7 +57,7 @@ Conflicts: otherproviders(u-boot-loader) Obsoletes: x-loader-colibrit20iris Provides: x-loader-colibrit20iris %endif -ExclusiveArch: %arm +ExclusiveArch: armv7l armv7hl %description Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. @@ -77,7 +76,7 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot -%patch2 -p1 +%patch2 %patch3 %patch4 %patch5 @@ -85,8 +84,7 @@ rm -rf board/Marvell %patch7 %patch8 -p1 %patch9 -p1 -%patch10 -p1 -%patch11 -p1 +%patch10 %patch12 %patch13 %if "%{name}" == "u-boot-snow" @@ -146,7 +144,7 @@ install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb %doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem # Copy some useful kermit scripts as well -%doc tools/scripts/dot.kermrc tools/scripts/flash_param tools/scripts/send_cmd tools/scripts/send_image +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image # Now any h/w dependent Documentation %doc doc/README.ARM-SoC doc/README.ARM-memory-map diff --git a/u-boot-cubieboard.changes b/u-boot-cubieboard.changes index 9bb9d74..9d2bb9b 100644 --- a/u-boot-cubieboard.changes +++ b/u-boot-cubieboard.changes @@ -1,3 +1,38 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + ------------------------------------------------------------------- Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-cubieboard.spec b/u-boot-cubieboard.spec index cb7b88f..17b115d 100644 --- a/u-boot-cubieboard.spec +++ b/u-boot-cubieboard.spec @@ -24,7 +24,7 @@ %define arndale_spl 0 Name: u-boot-cubieboard -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: The u-boot firmware for the cubieboard arm platform License: GPL-2.0 @@ -40,10 +40,9 @@ Patch4: beagle-bootscr.patch Patch5: mx53loco-bootscr.patch Patch6: origen-ext2.patch Patch7: arndale.patch -Patch8: v2014.01-sunxi.patch +Patch8: v2014.04-sunxi.patch Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch -Patch11: gnuhash.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch Patch20: fix_exynos5_text_base.patch @@ -58,7 +57,7 @@ Conflicts: otherproviders(u-boot-loader) Obsoletes: x-loader-cubieboard Provides: x-loader-cubieboard %endif -ExclusiveArch: %arm +ExclusiveArch: armv7l armv7hl %description Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. @@ -77,7 +76,7 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot -%patch2 -p1 +%patch2 %patch3 %patch4 %patch5 @@ -85,8 +84,7 @@ rm -rf board/Marvell %patch7 %patch8 -p1 %patch9 -p1 -%patch10 -p1 -%patch11 -p1 +%patch10 %patch12 %patch13 %if "%{name}" == "u-boot-snow" @@ -97,7 +95,7 @@ rm -rf board/Marvell %endif %build -make %{?jobs:-j %jobs} CFLAGS="$RPM_OPT_FLAGS" cubieboard_config +make %{?jobs:-j %jobs} CFLAGS="$RPM_OPT_FLAGS" Cubieboard_config # temporary disable of --build-id #make CFLAGS="$RPM_OPT_FLAGS" USE_PRIVATE_LIBGG=yes make %{?jobs:-j %jobs} USE_PRIVATE_LIBGG=yes @@ -146,7 +144,7 @@ install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb %doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem # Copy some useful kermit scripts as well -%doc tools/scripts/dot.kermrc tools/scripts/flash_param tools/scripts/send_cmd tools/scripts/send_image +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image # Now any h/w dependent Documentation %doc doc/README.ARM-SoC doc/README.ARM-memory-map diff --git a/u-boot-cubieboard2.changes b/u-boot-cubieboard2.changes index 9bb9d74..9d2bb9b 100644 --- a/u-boot-cubieboard2.changes +++ b/u-boot-cubieboard2.changes @@ -1,3 +1,38 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + ------------------------------------------------------------------- Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-cubieboard2.spec b/u-boot-cubieboard2.spec index fa845b2..5beabdf 100644 --- a/u-boot-cubieboard2.spec +++ b/u-boot-cubieboard2.spec @@ -24,7 +24,7 @@ %define arndale_spl 0 Name: u-boot-cubieboard2 -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: The u-boot firmware for the cubieboard2 arm platform License: GPL-2.0 @@ -40,10 +40,9 @@ Patch4: beagle-bootscr.patch Patch5: mx53loco-bootscr.patch Patch6: origen-ext2.patch Patch7: arndale.patch -Patch8: v2014.01-sunxi.patch +Patch8: v2014.04-sunxi.patch Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch -Patch11: gnuhash.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch Patch20: fix_exynos5_text_base.patch @@ -58,7 +57,7 @@ Conflicts: otherproviders(u-boot-loader) Obsoletes: x-loader-cubieboard2 Provides: x-loader-cubieboard2 %endif -ExclusiveArch: %arm +ExclusiveArch: armv7l armv7hl %description Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. @@ -77,7 +76,7 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot -%patch2 -p1 +%patch2 %patch3 %patch4 %patch5 @@ -85,8 +84,7 @@ rm -rf board/Marvell %patch7 %patch8 -p1 %patch9 -p1 -%patch10 -p1 -%patch11 -p1 +%patch10 %patch12 %patch13 %if "%{name}" == "u-boot-snow" @@ -97,7 +95,7 @@ rm -rf board/Marvell %endif %build -make %{?jobs:-j %jobs} CFLAGS="$RPM_OPT_FLAGS" cubieboard2_config +make %{?jobs:-j %jobs} CFLAGS="$RPM_OPT_FLAGS" Cubieboard2_config # temporary disable of --build-id #make CFLAGS="$RPM_OPT_FLAGS" USE_PRIVATE_LIBGG=yes make %{?jobs:-j %jobs} USE_PRIVATE_LIBGG=yes @@ -146,7 +144,7 @@ install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb %doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem # Copy some useful kermit scripts as well -%doc tools/scripts/dot.kermrc tools/scripts/flash_param tools/scripts/send_cmd tools/scripts/send_image +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image # Now any h/w dependent Documentation %doc doc/README.ARM-SoC doc/README.ARM-memory-map diff --git a/u-boot-highbank.changes b/u-boot-highbank.changes index 9bb9d74..9d2bb9b 100644 --- a/u-boot-highbank.changes +++ b/u-boot-highbank.changes @@ -1,3 +1,38 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + ------------------------------------------------------------------- Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-highbank.spec b/u-boot-highbank.spec index 7efb9e5..05d83c1 100644 --- a/u-boot-highbank.spec +++ b/u-boot-highbank.spec @@ -24,7 +24,7 @@ %define arndale_spl 0 Name: u-boot-highbank -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: The u-boot firmware for the highbank arm platform License: GPL-2.0 @@ -40,10 +40,9 @@ Patch4: beagle-bootscr.patch Patch5: mx53loco-bootscr.patch Patch6: origen-ext2.patch Patch7: arndale.patch -Patch8: v2014.01-sunxi.patch +Patch8: v2014.04-sunxi.patch Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch -Patch11: gnuhash.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch Patch20: fix_exynos5_text_base.patch @@ -58,7 +57,7 @@ Conflicts: otherproviders(u-boot-loader) Obsoletes: x-loader-highbank Provides: x-loader-highbank %endif -ExclusiveArch: %arm +ExclusiveArch: armv7l armv7hl %description Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. @@ -77,7 +76,7 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot -%patch2 -p1 +%patch2 %patch3 %patch4 %patch5 @@ -85,8 +84,7 @@ rm -rf board/Marvell %patch7 %patch8 -p1 %patch9 -p1 -%patch10 -p1 -%patch11 -p1 +%patch10 %patch12 %patch13 %if "%{name}" == "u-boot-snow" @@ -146,7 +144,7 @@ install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb %doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem # Copy some useful kermit scripts as well -%doc tools/scripts/dot.kermrc tools/scripts/flash_param tools/scripts/send_cmd tools/scripts/send_image +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image # Now any h/w dependent Documentation %doc doc/README.ARM-SoC doc/README.ARM-memory-map diff --git a/u-boot-hyundaia7hd.changes b/u-boot-hyundaia7hd.changes index 9bb9d74..9d2bb9b 100644 --- a/u-boot-hyundaia7hd.changes +++ b/u-boot-hyundaia7hd.changes @@ -1,3 +1,38 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + ------------------------------------------------------------------- Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-hyundaia7hd.spec b/u-boot-hyundaia7hd.spec index 2abc0f1..7e453d1 100644 --- a/u-boot-hyundaia7hd.spec +++ b/u-boot-hyundaia7hd.spec @@ -24,7 +24,7 @@ %define arndale_spl 0 Name: u-boot-hyundaia7hd -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: The u-boot firmware for the hyundaia7hd arm platform License: GPL-2.0 @@ -40,10 +40,9 @@ Patch4: beagle-bootscr.patch Patch5: mx53loco-bootscr.patch Patch6: origen-ext2.patch Patch7: arndale.patch -Patch8: v2014.01-sunxi.patch +Patch8: v2014.04-sunxi.patch Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch -Patch11: gnuhash.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch Patch20: fix_exynos5_text_base.patch @@ -58,7 +57,7 @@ Conflicts: otherproviders(u-boot-loader) Obsoletes: x-loader-hyundaia7hd Provides: x-loader-hyundaia7hd %endif -ExclusiveArch: %arm +ExclusiveArch: armv7l armv7hl %description Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. @@ -77,7 +76,7 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot -%patch2 -p1 +%patch2 %patch3 %patch4 %patch5 @@ -85,8 +84,7 @@ rm -rf board/Marvell %patch7 %patch8 -p1 %patch9 -p1 -%patch10 -p1 -%patch11 -p1 +%patch10 %patch12 %patch13 %if "%{name}" == "u-boot-snow" @@ -97,7 +95,7 @@ rm -rf board/Marvell %endif %build -make %{?jobs:-j %jobs} CFLAGS="$RPM_OPT_FLAGS" hyundai_a7hd_config +make %{?jobs:-j %jobs} CFLAGS="$RPM_OPT_FLAGS" Hyundai_A7HD_config # temporary disable of --build-id #make CFLAGS="$RPM_OPT_FLAGS" USE_PRIVATE_LIBGG=yes make %{?jobs:-j %jobs} USE_PRIVATE_LIBGG=yes @@ -146,7 +144,7 @@ install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb %doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem # Copy some useful kermit scripts as well -%doc tools/scripts/dot.kermrc tools/scripts/flash_param tools/scripts/send_cmd tools/scripts/send_image +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image # Now any h/w dependent Documentation %doc doc/README.ARM-SoC doc/README.ARM-memory-map diff --git a/u-boot-melea1000.changes b/u-boot-melea1000.changes index 9bb9d74..9d2bb9b 100644 --- a/u-boot-melea1000.changes +++ b/u-boot-melea1000.changes @@ -1,3 +1,38 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + ------------------------------------------------------------------- Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-melea1000.spec b/u-boot-melea1000.spec index da7f368..80fd1fc 100644 --- a/u-boot-melea1000.spec +++ b/u-boot-melea1000.spec @@ -24,7 +24,7 @@ %define arndale_spl 0 Name: u-boot-melea1000 -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: The u-boot firmware for the melea1000 arm platform License: GPL-2.0 @@ -40,10 +40,9 @@ Patch4: beagle-bootscr.patch Patch5: mx53loco-bootscr.patch Patch6: origen-ext2.patch Patch7: arndale.patch -Patch8: v2014.01-sunxi.patch +Patch8: v2014.04-sunxi.patch Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch -Patch11: gnuhash.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch Patch20: fix_exynos5_text_base.patch @@ -58,7 +57,7 @@ Conflicts: otherproviders(u-boot-loader) Obsoletes: x-loader-melea1000 Provides: x-loader-melea1000 %endif -ExclusiveArch: %arm +ExclusiveArch: armv7l armv7hl %description Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. @@ -77,7 +76,7 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot -%patch2 -p1 +%patch2 %patch3 %patch4 %patch5 @@ -85,8 +84,7 @@ rm -rf board/Marvell %patch7 %patch8 -p1 %patch9 -p1 -%patch10 -p1 -%patch11 -p1 +%patch10 %patch12 %patch13 %if "%{name}" == "u-boot-snow" @@ -97,7 +95,7 @@ rm -rf board/Marvell %endif %build -make %{?jobs:-j %jobs} CFLAGS="$RPM_OPT_FLAGS" mele_a1000_config +make %{?jobs:-j %jobs} CFLAGS="$RPM_OPT_FLAGS" Mele_A1000_config # temporary disable of --build-id #make CFLAGS="$RPM_OPT_FLAGS" USE_PRIVATE_LIBGG=yes make %{?jobs:-j %jobs} USE_PRIVATE_LIBGG=yes @@ -146,7 +144,7 @@ install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb %doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem # Copy some useful kermit scripts as well -%doc tools/scripts/dot.kermrc tools/scripts/flash_param tools/scripts/send_cmd tools/scripts/send_image +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image # Now any h/w dependent Documentation %doc doc/README.ARM-SoC doc/README.ARM-memory-map diff --git a/u-boot-mx53loco.changes b/u-boot-mx53loco.changes index 9bb9d74..9d2bb9b 100644 --- a/u-boot-mx53loco.changes +++ b/u-boot-mx53loco.changes @@ -1,3 +1,38 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + ------------------------------------------------------------------- Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-mx53loco.spec b/u-boot-mx53loco.spec index f960285..dcfd9c7 100644 --- a/u-boot-mx53loco.spec +++ b/u-boot-mx53loco.spec @@ -24,7 +24,7 @@ %define arndale_spl 0 Name: u-boot-mx53loco -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: The u-boot firmware for the mx53loco arm platform License: GPL-2.0 @@ -40,10 +40,9 @@ Patch4: beagle-bootscr.patch Patch5: mx53loco-bootscr.patch Patch6: origen-ext2.patch Patch7: arndale.patch -Patch8: v2014.01-sunxi.patch +Patch8: v2014.04-sunxi.patch Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch -Patch11: gnuhash.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch Patch20: fix_exynos5_text_base.patch @@ -58,7 +57,7 @@ Conflicts: otherproviders(u-boot-loader) Obsoletes: x-loader-mx53loco Provides: x-loader-mx53loco %endif -ExclusiveArch: %arm +ExclusiveArch: armv7l armv7hl %description Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. @@ -77,7 +76,7 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot -%patch2 -p1 +%patch2 %patch3 %patch4 %patch5 @@ -85,8 +84,7 @@ rm -rf board/Marvell %patch7 %patch8 -p1 %patch9 -p1 -%patch10 -p1 -%patch11 -p1 +%patch10 %patch12 %patch13 %if "%{name}" == "u-boot-snow" @@ -146,7 +144,7 @@ install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb %doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem # Copy some useful kermit scripts as well -%doc tools/scripts/dot.kermrc tools/scripts/flash_param tools/scripts/send_cmd tools/scripts/send_image +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image # Now any h/w dependent Documentation %doc doc/README.ARM-SoC doc/README.ARM-memory-map diff --git a/u-boot-mx6qsabrelite.changes b/u-boot-mx6qsabrelite.changes index 9bb9d74..9d2bb9b 100644 --- a/u-boot-mx6qsabrelite.changes +++ b/u-boot-mx6qsabrelite.changes @@ -1,3 +1,38 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + ------------------------------------------------------------------- Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-mx6qsabrelite.spec b/u-boot-mx6qsabrelite.spec index 18f8c76..0170c49 100644 --- a/u-boot-mx6qsabrelite.spec +++ b/u-boot-mx6qsabrelite.spec @@ -24,7 +24,7 @@ %define arndale_spl 0 Name: u-boot-mx6qsabrelite -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: The u-boot firmware for the mx6qsabrelite arm platform License: GPL-2.0 @@ -40,10 +40,9 @@ Patch4: beagle-bootscr.patch Patch5: mx53loco-bootscr.patch Patch6: origen-ext2.patch Patch7: arndale.patch -Patch8: v2014.01-sunxi.patch +Patch8: v2014.04-sunxi.patch Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch -Patch11: gnuhash.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch Patch20: fix_exynos5_text_base.patch @@ -58,7 +57,7 @@ Conflicts: otherproviders(u-boot-loader) Obsoletes: x-loader-mx6qsabrelite Provides: x-loader-mx6qsabrelite %endif -ExclusiveArch: %arm +ExclusiveArch: armv7l armv7hl %description Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. @@ -77,7 +76,7 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot -%patch2 -p1 +%patch2 %patch3 %patch4 %patch5 @@ -85,8 +84,7 @@ rm -rf board/Marvell %patch7 %patch8 -p1 %patch9 -p1 -%patch10 -p1 -%patch11 -p1 +%patch10 %patch12 %patch13 %if "%{name}" == "u-boot-snow" @@ -146,7 +144,7 @@ install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb %doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem # Copy some useful kermit scripts as well -%doc tools/scripts/dot.kermrc tools/scripts/flash_param tools/scripts/send_cmd tools/scripts/send_image +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image # Now any h/w dependent Documentation %doc doc/README.ARM-SoC doc/README.ARM-memory-map diff --git a/u-boot-omap3beagle.changes b/u-boot-omap3beagle.changes index 9bb9d74..9d2bb9b 100644 --- a/u-boot-omap3beagle.changes +++ b/u-boot-omap3beagle.changes @@ -1,3 +1,38 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + ------------------------------------------------------------------- Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-omap3beagle.spec b/u-boot-omap3beagle.spec index 52661f3..1dede14 100644 --- a/u-boot-omap3beagle.spec +++ b/u-boot-omap3beagle.spec @@ -24,7 +24,7 @@ %define arndale_spl 0 Name: u-boot-omap3beagle -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: The u-boot firmware for the omap3beagle arm platform License: GPL-2.0 @@ -40,10 +40,9 @@ Patch4: beagle-bootscr.patch Patch5: mx53loco-bootscr.patch Patch6: origen-ext2.patch Patch7: arndale.patch -Patch8: v2014.01-sunxi.patch +Patch8: v2014.04-sunxi.patch Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch -Patch11: gnuhash.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch Patch20: fix_exynos5_text_base.patch @@ -58,7 +57,7 @@ Conflicts: otherproviders(u-boot-loader) Obsoletes: x-loader-omap3beagle Provides: x-loader-omap3beagle %endif -ExclusiveArch: %arm +ExclusiveArch: armv7l armv7hl %description Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. @@ -77,7 +76,7 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot -%patch2 -p1 +%patch2 %patch3 %patch4 %patch5 @@ -85,8 +84,7 @@ rm -rf board/Marvell %patch7 %patch8 -p1 %patch9 -p1 -%patch10 -p1 -%patch11 -p1 +%patch10 %patch12 %patch13 %if "%{name}" == "u-boot-snow" @@ -146,7 +144,7 @@ install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb %doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem # Copy some useful kermit scripts as well -%doc tools/scripts/dot.kermrc tools/scripts/flash_param tools/scripts/send_cmd tools/scripts/send_image +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image # Now any h/w dependent Documentation %doc doc/README.ARM-SoC doc/README.ARM-memory-map diff --git a/u-boot-omap4panda.changes b/u-boot-omap4panda.changes index 9bb9d74..9d2bb9b 100644 --- a/u-boot-omap4panda.changes +++ b/u-boot-omap4panda.changes @@ -1,3 +1,38 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + ------------------------------------------------------------------- Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-omap4panda.spec b/u-boot-omap4panda.spec index 0539c46..c17edd9 100644 --- a/u-boot-omap4panda.spec +++ b/u-boot-omap4panda.spec @@ -24,7 +24,7 @@ %define arndale_spl 0 Name: u-boot-omap4panda -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: The u-boot firmware for the omap4panda arm platform License: GPL-2.0 @@ -40,10 +40,9 @@ Patch4: beagle-bootscr.patch Patch5: mx53loco-bootscr.patch Patch6: origen-ext2.patch Patch7: arndale.patch -Patch8: v2014.01-sunxi.patch +Patch8: v2014.04-sunxi.patch Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch -Patch11: gnuhash.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch Patch20: fix_exynos5_text_base.patch @@ -58,7 +57,7 @@ Conflicts: otherproviders(u-boot-loader) Obsoletes: x-loader-omap4panda Provides: x-loader-omap4panda %endif -ExclusiveArch: %arm +ExclusiveArch: armv7l armv7hl %description Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. @@ -77,7 +76,7 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot -%patch2 -p1 +%patch2 %patch3 %patch4 %patch5 @@ -85,8 +84,7 @@ rm -rf board/Marvell %patch7 %patch8 -p1 %patch9 -p1 -%patch10 -p1 -%patch11 -p1 +%patch10 %patch12 %patch13 %if "%{name}" == "u-boot-snow" @@ -146,7 +144,7 @@ install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb %doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem # Copy some useful kermit scripts as well -%doc tools/scripts/dot.kermrc tools/scripts/flash_param tools/scripts/send_cmd tools/scripts/send_image +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image # Now any h/w dependent Documentation %doc doc/README.ARM-SoC doc/README.ARM-memory-map diff --git a/u-boot-paz00.changes b/u-boot-paz00.changes index 9bb9d74..9d2bb9b 100644 --- a/u-boot-paz00.changes +++ b/u-boot-paz00.changes @@ -1,3 +1,38 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + ------------------------------------------------------------------- Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-paz00.spec b/u-boot-paz00.spec index c319f75..80492eb 100644 --- a/u-boot-paz00.spec +++ b/u-boot-paz00.spec @@ -24,7 +24,7 @@ %define arndale_spl 0 Name: u-boot-paz00 -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: The u-boot firmware for the paz00 arm platform License: GPL-2.0 @@ -40,10 +40,9 @@ Patch4: beagle-bootscr.patch Patch5: mx53loco-bootscr.patch Patch6: origen-ext2.patch Patch7: arndale.patch -Patch8: v2014.01-sunxi.patch +Patch8: v2014.04-sunxi.patch Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch -Patch11: gnuhash.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch Patch20: fix_exynos5_text_base.patch @@ -58,7 +57,7 @@ Conflicts: otherproviders(u-boot-loader) Obsoletes: x-loader-paz00 Provides: x-loader-paz00 %endif -ExclusiveArch: %arm +ExclusiveArch: armv7l armv7hl %description Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. @@ -77,7 +76,7 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot -%patch2 -p1 +%patch2 %patch3 %patch4 %patch5 @@ -85,8 +84,7 @@ rm -rf board/Marvell %patch7 %patch8 -p1 %patch9 -p1 -%patch10 -p1 -%patch11 -p1 +%patch10 %patch12 %patch13 %if "%{name}" == "u-boot-snow" @@ -146,7 +144,7 @@ install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb %doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem # Copy some useful kermit scripts as well -%doc tools/scripts/dot.kermrc tools/scripts/flash_param tools/scripts/send_cmd tools/scripts/send_image +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image # Now any h/w dependent Documentation %doc doc/README.ARM-SoC doc/README.ARM-memory-map diff --git a/u-boot-rpib.changes b/u-boot-rpib.changes index 9bb9d74..9d2bb9b 100644 --- a/u-boot-rpib.changes +++ b/u-boot-rpib.changes @@ -1,3 +1,38 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + ------------------------------------------------------------------- Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-rpib.spec b/u-boot-rpib.spec index 44913d0..c72d2ea 100644 --- a/u-boot-rpib.spec +++ b/u-boot-rpib.spec @@ -24,7 +24,7 @@ %define arndale_spl 0 Name: u-boot-rpib -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: The u-boot firmware for the rpib arm platform License: GPL-2.0 @@ -40,10 +40,9 @@ Patch4: beagle-bootscr.patch Patch5: mx53loco-bootscr.patch Patch6: origen-ext2.patch Patch7: arndale.patch -Patch8: v2014.01-sunxi.patch +Patch8: v2014.04-sunxi.patch Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch -Patch11: gnuhash.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch Patch20: fix_exynos5_text_base.patch @@ -58,7 +57,7 @@ Conflicts: otherproviders(u-boot-loader) Obsoletes: x-loader-rpib Provides: x-loader-rpib %endif -ExclusiveArch: %arm +ExclusiveArch: armv6l armv6hl %description Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. @@ -77,7 +76,7 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot -%patch2 -p1 +%patch2 %patch3 %patch4 %patch5 @@ -85,8 +84,7 @@ rm -rf board/Marvell %patch7 %patch8 -p1 %patch9 -p1 -%patch10 -p1 -%patch11 -p1 +%patch10 %patch12 %patch13 %if "%{name}" == "u-boot-snow" @@ -146,7 +144,7 @@ install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb %doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem # Copy some useful kermit scripts as well -%doc tools/scripts/dot.kermrc tools/scripts/flash_param tools/scripts/send_cmd tools/scripts/send_image +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image # Now any h/w dependent Documentation %doc doc/README.ARM-SoC doc/README.ARM-memory-map diff --git a/u-boot-snow.changes b/u-boot-snow.changes index 9bb9d74..9d2bb9b 100644 --- a/u-boot-snow.changes +++ b/u-boot-snow.changes @@ -1,3 +1,38 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + ------------------------------------------------------------------- Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-snow.spec b/u-boot-snow.spec index 7f95e9d..38de306 100644 --- a/u-boot-snow.spec +++ b/u-boot-snow.spec @@ -24,7 +24,7 @@ %define arndale_spl 0 Name: u-boot-snow -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: The u-boot firmware for the snow arm platform License: GPL-2.0 @@ -40,10 +40,9 @@ Patch4: beagle-bootscr.patch Patch5: mx53loco-bootscr.patch Patch6: origen-ext2.patch Patch7: arndale.patch -Patch8: v2014.01-sunxi.patch +Patch8: v2014.04-sunxi.patch Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch -Patch11: gnuhash.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch Patch20: fix_exynos5_text_base.patch @@ -58,7 +57,7 @@ Conflicts: otherproviders(u-boot-loader) Obsoletes: x-loader-snow Provides: x-loader-snow %endif -ExclusiveArch: %arm +ExclusiveArch: armv7l armv7hl %description Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. @@ -77,7 +76,7 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot -%patch2 -p1 +%patch2 %patch3 %patch4 %patch5 @@ -85,8 +84,7 @@ rm -rf board/Marvell %patch7 %patch8 -p1 %patch9 -p1 -%patch10 -p1 -%patch11 -p1 +%patch10 %patch12 %patch13 %if "%{name}" == "u-boot-snow" @@ -146,7 +144,7 @@ install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb %doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem # Copy some useful kermit scripts as well -%doc tools/scripts/dot.kermrc tools/scripts/flash_param tools/scripts/send_cmd tools/scripts/send_image +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image # Now any h/w dependent Documentation %doc doc/README.ARM-SoC doc/README.ARM-memory-map diff --git a/u-boot-vexpressaemv8a.changes b/u-boot-vexpressaemv8a.changes new file mode 100644 index 0000000..9d2bb9b --- /dev/null +++ b/u-boot-vexpressaemv8a.changes @@ -0,0 +1,450 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + +------------------------------------------------------------------- +Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org + +- add u-boot-mx6qsabrelite (for iMX6 Sabre Lite board) + +------------------------------------------------------------------- +Wed Feb 5 15:07:30 UTC 2014 - guillaume@opensuse.org + +- add u-boot-snow (for Chromebook ARM) + +------------------------------------------------------------------- +Wed Feb 5 14:59:29 UTC 2014 - guillaume@opensuse.org + +- Fix boot.scr location for beagle and origen + +------------------------------------------------------------------- +Thu Jan 30 14:28:34 UTC 2014 - dmueller@suse.com + +- add u-boot-cubieboard2 + +------------------------------------------------------------------- +Thu Jan 30 06:46:45 UTC 2014 - afaerber@suse.de + +- Drop 0006-ARMV7-hardfp-build-fix.patch: + v2014.01 checks if -msoft-float compiles okay, and + U-Boot is soft-float according to Tom Rini + +------------------------------------------------------------------- +Tue Jan 28 15:29:14 UTC 2014 - guillaume@opensuse.org + +- Disable CONFIG_SPL_OS_BOOT for ti armv7 configs with +fix_spl_build_for_am335x.patch to reduce size of am335x SPL + +------------------------------------------------------------------- +Sat Jan 26 22:46:44 UTC 2014 - afaerber@suse.de + +- Update to v2014.01 +* Manually updated 0006-ARMV7-hardfp-build-fix.patch +* Dropped v2013.10-sunxi.patch and created + v2014.01-sunxi.patch by merging u-boot.git v2014.01 onto + u-boot-sunxi.git e4a0232e173577893604b94fc3af7c047570970b +* Added gnuhash.patch to fix .gnu.hash section handling in ldscripts +* Rebased mlo-ext2.patch: + omap4_common.h CONFIG_SUPPORT_RAW_INITRD hunk is now covered by + ti_common_initrd_support.patch. + am335xevm build is known breaking due to size constraints not + trivially solvable without dropping our patch. + +------------------------------------------------------------------- +Sun Jan 26 12:14:10 UTC 2014 - afaerber@suse.de + +- Fix regression in packaging u-boot-dtb-tegra.bin: + There is in fact a u-boot-spl.bin SPL being built, + but it is 0xff-padded as u-boot-spl-pad.bin and then + prepended to u-boot.bin and the .dtb. + u-boot-dtb.bin exists independently as just u-boot.bin and .dtb, + so give preference to u-boot-dtb-tegra.bin over u-boot-dtb.bin. + +------------------------------------------------------------------- +Mon Jan 20 14:05:13 UTC 2014 - agraf@suse.com + +- The "Tegra SPL" is not an SPL but a differently named u-boot.bin + file. Fix up the generation scripts. + +------------------------------------------------------------------- +Sun Jan 19 00:09:41 UTC 2014 - afaerber@suse.de + +- Include Tegra SPL for Colibri T20 + +------------------------------------------------------------------- +Wed Jan 8 17:26:10 UTC 2014 - agraf@suse.com + +- switch raspberry to ext2 + +------------------------------------------------------------------- +Wed Jan 8 13:41:32 UTC 2014 - matwey.kornilov@gmail.com + +- am335x_evm-bootscr.patch: Search for files in /boot, not in /boot/boot + +------------------------------------------------------------------- +Wed Jan 8 02:07:44 UTC 2014 - afaerber@suse.de + +- rpi_b-bootscr.patch: Change rpi_b to use boot.scr + +------------------------------------------------------------------- +Tue Jan 7 16:01:13 UTC 2014 - dmueller@suse.com + +- remove origin flavor + +------------------------------------------------------------------- +Mon Jan 6 22:57:05 UTC 2014 - afaerber@suse.de + +- Enable paz00 config (Toshiba AC100) + +------------------------------------------------------------------- +Mon Jan 6 21:34:03 UTC 2014 - afaerber@suse.de + +- Enable colibri_t20_iris config (Toradex Colibri-T20 on Iris) +- Update u-boot.spec.in copyright and fix typo in comment + +------------------------------------------------------------------- +Sat Jan 4 01:47:50 UTC 2014 - agraf@suse.com + +- prefer u-boot-dtb.bin over u-boot.bin +- simplify files section + +------------------------------------------------------------------- +Fri Jan 3 16:54:30 UTC 2014 - dmueller@suse.com + +- mlo-ext2.patch: Search for files in /boot, not in /boot/boot + +------------------------------------------------------------------- +Mon Dec 30 18:37:50 UTC 2013 - matwey.kornilov@gmail.com + +- Add am335x_evm-bootscr.patch: Add bootscr to AM335x + platform based devices + +------------------------------------------------------------------- +Tue Dec 17 14:33:52 UTC 2013 - guillaume@opensuse.org + +- Remove old unused patches: + * v2013.04-sunxi.patch + * loadaddr-defaults.patch + +------------------------------------------------------------------- +Tue Dec 17 14:10:51 UTC 2013 - guillaume@opensuse.org + +- Add ti_common_initrd_support.patch to enable initrd support for + AM335x boards + +------------------------------------------------------------------- +Tue Dec 17 14:03:50 UTC 2013 - guillaume@opensuse.org + +- Add am335x_evm support which includes: Beagle Bone, + Beagle Bone Black, TI AM335x EVM, TI AM335x EVM-SK + +------------------------------------------------------------------- +Tue Nov 26 13:46:22 UTC 2013 - guillaume@opensuse.org + +- Add Arndale support + +------------------------------------------------------------------- +Tue Nov 26 13:05:10 UTC 2013 - guillaume@opensuse.org + +- Update v2013.04-sunxi.patch to v2013.10-sunxi.patch + +------------------------------------------------------------------- +Mon Nov 25 10:05:48 UTC 2013 - guillaume@opensuse.org + +- Remove kerneladdr and ramdiskaddr definition in u-boot patches + (now done in JeOS image with u-boot hooks) +- Update patches to current version: + * 0006-ARMV7-hardfp-build-fix.patch + * beagle-bootscr.patch + * mx53loco-bootscr.patch + * mlo-ext2.patch +- Merge fix_omap4_ext2_boot.patch in mlo-ext2.patch +- Rename exynos-ext2.patch in origen-ext2.patch + +------------------------------------------------------------------- +Mon Nov 25 09:57:12 UTC 2013 - guillaume@opensuse.org + +- Update to 2013.10 + +------------------------------------------------------------------- +Fri Nov 22 16:25:36 UTC 2013 - guillaume@opensuse.org + +- Fix OMAP4 pandaboard EXT2 boot + +------------------------------------------------------------------- +Fri Sep 13 11:31:14 UTC 2013 - guillaume@opensuse.org + +- Fix u-boot.bin and boot.scr place since they are now in boot/ folder. + +------------------------------------------------------------------- +Wed May 1 20:48:30 UTC 2013 - dmueller@suse.com + +- add support for cubieboard, hyundaia7hd, melea1000 + +------------------------------------------------------------------- +Wed May 1 08:18:26 UTC 2013 - dmueller@suse.com + +- update to 2013.04 + * no upstream changelog available +- remove dead u-boot-raspberrypi* (actually called rpib now) +- add rpib variant + +------------------------------------------------------------------- +Thu Apr 11 17:05:58 UTC 2013 - guillaume.gardet@opensuse.org + +- add omap3_beagle to targets + +------------------------------------------------------------------- +Thu Apr 11 16:05:41 UTC 2013 - dmueller@suse.com + +- remove u8500href subpackage, kernel got dropped + +------------------------------------------------------------------- +Sun Apr 7 14:32:20 UTC 2013 - agraf@suse.com + +- update to 2013.04rc2 +- enable bootz support on all boards + +------------------------------------------------------------------- +Wed Mar 20 07:21:06 UTC 2013 - agraf@suse.com + +- fix mlo-ext2.patch to actually use the ext4 infrastructure + +------------------------------------------------------------------- +Sat Jan 26 10:38:07 UTC 2013 - dmueller@suse.com + +- update mlo-ext2.patch: + * use the ext4 driver now since ext2 got removed + +------------------------------------------------------------------- +Wed Oct 24 22:33:13 UTC 2012 - agraf@suse.com + +- add sdhc-1.patch, sdhc-2.patch, sdhc-3.patch: + * backport upstream sdhc fixes + +------------------------------------------------------------------- +Wed Oct 24 01:37:36 CEST 2012 - agraf@suse.de + +- update to 2012.10: + - refresh patches 0006-ARMV7-hardfp-build-fix.patch, mlo-ext2.patch, + loadaddr-defaults.patch, mx53loco-bootscr.patch + +------------------------------------------------------------------- +Mon Oct 22 12:00:22 UTC 2012 - agraf@suse.com + +- fix origen by putting the ramdisk higher + +------------------------------------------------------------------- +Mon Aug 6 09:39:54 UTC 2012 - dmueller@suse.com + +- remove Marvell sources as they are non-free licensed (bnc#773824) + +------------------------------------------------------------------- +Thu Jul 26 18:21:44 UTC 2012 - agraf@suse.com + +- fix ext2 support for origen +- add origen-spl.bin for origen + +------------------------------------------------------------------- +Thu Jul 26 09:47:31 UTC 2012 - dmueller@suse.com + +- merge u-boot-tools + +------------------------------------------------------------------- +Wed Jul 25 21:05:08 UTC 2012 - agraf@suse.com + +- add ext2 support by default in mx53loco + +------------------------------------------------------------------- +Tue Jul 24 21:28:59 UTC 2012 - agraf@suse.com + +- add support for mx53loco + +------------------------------------------------------------------- +Tue Jul 24 11:25:42 UTC 2012 - dmueller@suse.com + +- remove u-boot-omap3beagle + +------------------------------------------------------------------- +Mon Jul 23 22:34:04 UTC 2012 - agraf@suse.com + +- bump to 2012.04.01 + - fixes bug in cmdline parsing + +------------------------------------------------------------------- +Mon Jul 23 22:26:47 UTC 2012 - agraf@suse.com + +- add calxeda highbank support + +------------------------------------------------------------------- +Thu Jul 12 12:51:56 UTC 2012 - agraf@suse.com + +- autoload boot.scr on beagle, so we can boot again + +------------------------------------------------------------------- +Thu Jul 12 08:12:15 UTC 2012 - agraf@suse.com + +- update to upstream u-boot 2012.04 + -> gets rid of linaro fork, only mainline now + -> gets us omap3 MLO support, no more need for x-loader + -> potentially fixes voltage issues on omap4 + +------------------------------------------------------------------- +Thu Jun 14 09:04:53 UTC 2012 - adrian@suse.de + +- add SUSE style conflicts to avoid installation of multiple + boot loaders + +------------------------------------------------------------------- +Tue Apr 17 11:59:55 UTC 2012 - joop.boonen@opensuse.org + +- Included u-boot.spec.in and gen_spec.sh in the spec file + +------------------------------------------------------------------- +Mon Feb 6 13:25:09 UTC 2012 - agraf@suse.com + +- use ext2 on panda + +------------------------------------------------------------------- +Tue Dec 20 02:36:05 UTC 2011 - agraf@suse.com + +- use ttyO2 as default console= on OMAP boards + +------------------------------------------------------------------- +Mon Dec 19 20:21:21 UTC 2011 - agraf@suse.com + +- add u8500_href and origen configs + +------------------------------------------------------------------- +Fri Dec 16 16:03:01 UTC 2011 - agraf@suse.com + +- fix lint failures + +------------------------------------------------------------------- +Fri Dec 16 14:46:53 CET 2011 - agraf@suse.com + +- don't install map + +------------------------------------------------------------------- +Fri Dec 16 02:16:19 UTC 2011 - agraf@suse.com + +- generalize spec file to be able to build for more boards +- add beagle board spec file +- remove boot.scr + +------------------------------------------------------------------- +Fri Dec 16 01:15:47 UTC 2011 - agraf@suse.com + +- rename to u-boot-omap4panda + +------------------------------------------------------------------- +Tue Dec 13 17:24:45 UTC 2011 - dkukawka@suse.de + +- new package based on u-boot-omap4panda but use linaro u-boot git + repo (http://git.linaro.org/git/boot/u-boot-linaro-stable.git) + instead of mainline u-boot. This package also contains the MLO + (this package obsoletes the x-loader package) + +------------------------------------------------------------------- +Tue Nov 29 22:53:44 UTC 2011 - joop.boonen@opensuse.org + +- COPYING CREDITS README are now in the standard package + +------------------------------------------------------------------- +Thu Nov 24 21:08:58 UTC 2011 - joop.boonen@opensuse.org + +- Corrected the links + +------------------------------------------------------------------- +Tue Nov 22 17:47:17 UTC 2011 - joop.boonen@opensuse.org + +- Build without u-boot tools as we have a u-boot-tools packages + +------------------------------------------------------------------- +Sun Nov 20 17:00:43 UTC 2011 - joop.boonen@opensuse.org + +- Cleaned the spec file up the spec file +- The name is the same as the package name + +------------------------------------------------------------------- +Sun Nov 13 13:13:39 UTC 2011 - joop.boonen@opensuse.org + +- Build u-boot according to http://elinux.org/Panda_How_to_MLO_&_u-boot +- Using .txt config file instead of .scr it's gerated via mkimage + +------------------------------------------------------------------- +Wed Nov 09 22:55:09 UTC 2011 - joop.boonen@opensuse.org + +- Used scr file based on http://elinux.org definition +- Build u-boot 20111109 +- Used the Meego panda u-boot as a base + +------------------------------------------------------------------- +Fri Feb 18 00:00:00 UTC 2011 - raghuveer.murthy@ti.com> +- 2010.09-MeeGo +- Fix for u-boot fails to compile on armv7hl, BMC#13140 + +------------------------------------------------------------------- +Thu Nov 18 00:00:00 UTC 2010 - peter.j.zhu@intel.com> +- 2010.09-MeeGo +- Don't build against i586, BMC#10159 + +------------------------------------------------------------------- +Tue Oct 10 00:00:00 UTC 2010 - nm@ti.com> +- 2010.09-MeeGo +- Add Das u-boot package - FEA#9723 + +------------------------------------------------------------------- +Tue Oct 10 00:00:00 UTC 2010 - nm@ti.com> +- 2010.09.rc1-MeeGo +- Added option to enable boot.scr generation and copy + +------------------------------------------------------------------- +Mon Oct 04 00:00:00 UTC 2010 - nm@ti.com> +- 2010.09.rc1-MeeGo +- Update to 2010.09 + +------------------------------------------------------------------- +Wed Sep 14 00:00:00 UTC 2010 - nm@ti.com> +- 2010.09.rc1-MeeGo +- Update to 2010.09.rc1 +- MeeGo customization +- Enabled PandaBoard, Beagleboard build + +------------------------------------------------------------------- +Wed Mar 31 00:00:00 UTC 2010 - silvan.calarco@mambasoft.it> +- 2009.11.1-1mamba +- update to 2009.11.1 + +------------------------------------------------------------------- diff --git a/u-boot-vexpressaemv8a.spec b/u-boot-vexpressaemv8a.spec new file mode 100644 index 0000000..a529241 --- /dev/null +++ b/u-boot-vexpressaemv8a.spec @@ -0,0 +1,151 @@ +# +# spec file for package u-boot-vexpressaemv8a +# +# Copyright (c) 2014 SUSE LINUX Products GmbH, Nuernberg, Germany. +# Copyright (c) 2010 Texas Instruments Inc by Nishanth Menon +# Copyright (c) 2007-2010 by Silvan Calarco +# +# All modifications and additions to the file contributed by third parties +# remain the property of their copyright owners, unless otherwise agreed +# upon. The license for this file, and modifications and additions to the +# file, is the same license as for the pristine package itself (unless the +# license for the pristine package is not an Open Source License, in which +# case the license is the MIT License). An "Open Source License" is a +# license that conforms to the Open Source Definition (Version 1.9) +# published by the Open Source Initiative. + +# Please submit bugfixes or comments via http://bugs.opensuse.org/ +# + + +%define x_loader 0 +%define origen_spl 0 +%define sunxi_spl 0 +%define arndale_spl 0 + +Name: u-boot-vexpressaemv8a +Version: 2014.04 +Release: 0 +Summary: The u-boot firmware for the vexpressaemv8a arm platform +License: GPL-2.0 +Group: System/Boot +Url: http://www.denx.de/wiki/U-Boot +Source: ftp://ftp.denx.de/pub/u-boot/u-boot-%{version}.tar.bz2 +Source1: openSUSE_panda.txt +Source2: arndale-bl1.img +Source300: rpmlintrc +Patch2: mlo-ext2.patch +Patch3: ti_common_initrd_support.patch +Patch4: beagle-bootscr.patch +Patch5: mx53loco-bootscr.patch +Patch6: origen-ext2.patch +Patch7: arndale.patch +Patch8: v2014.04-sunxi.patch +Patch9: am335x_evm-bootscr.patch +Patch10: rpi_b-bootscr.patch +Patch12: fix_spl_build_for_am335x.patch +Patch13: fix_sabrelite_boot.scr.patch +Patch20: fix_exynos5_text_base.patch +Patch21: fix_snow_config.patch +Patch22: exynos5-dt.h.patch +BuildRoot: %{_tmppath}/%{name}-%{version}-build +# Arndale board need DTC >= 1.4 +BuildRequires: dtc >= 1.4.0 +Provides: u-boot-loader +Conflicts: otherproviders(u-boot-loader) +%if %x_loader == 1 +Obsoletes: x-loader-vexpressaemv8a +Provides: x-loader-vexpressaemv8a +%endif +ExclusiveArch: aarch64 + +%description +Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. +This package contains the firmware for the vexpressaemv8a arm platform. + +%package doc +Summary: Documentation for the u-boot Firmware +Group: Documentation/Other + +%description doc +Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. +This package contains documentation for u-boot firmware + +%prep +%setup -q -n u-boot-%{version} +# is non-free licensed, and we don't need it (bnc#773824) +rm -rf board/Marvell +# Any custom patches to be applied on top of mainline u-boot +%patch2 +%patch3 +%patch4 +%patch5 +%patch6 +%patch7 +%patch8 -p1 +%patch9 -p1 +%patch10 +%patch12 +%patch13 +%if "%{name}" == "u-boot-snow" +# Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) +%patch20 +%patch21 +%patch22 +%endif + +%build +make %{?jobs:-j %jobs} CFLAGS="$RPM_OPT_FLAGS" vexpress_aemv8a_config +# temporary disable of --build-id +#make CFLAGS="$RPM_OPT_FLAGS" USE_PRIVATE_LIBGG=yes +make %{?jobs:-j %jobs} USE_PRIVATE_LIBGG=yes +%if "%{name}" == "u-boot-snow" +# Chromebook ARM (snow) need a uImage format +export TEXT_START=$(awk '$NF == "_start" { printf "0x"$1 }' System.map) +./tools/mkimage -A arm -O linux -T kernel -C none -a $TEXT_START -e $TEXT_START -n uboot -d u-boot-dtb.bin u-boot.img +%endif + +%install +install -D -m 0644 u-boot.bin %{buildroot}/boot/u-boot.bin +# Some times u-boot needs a dtb to configure itself appended to the binary. +# In that case prefer the one with a working dtb already appended. +if [ -f u-boot-dtb-tegra.bin ]; then + install -D -m 0644 u-boot-dtb-tegra.bin %{buildroot}/boot/u-boot.bin +elif [ -f u-boot-dtb.bin ]; then + install -D -m 0644 u-boot-dtb.bin %{buildroot}/boot/u-boot.bin +else + install -D -m 0644 u-boot.bin %{buildroot}/boot/u-boot.bin +fi +%if %x_loader == 1 +install -D -m 0755 MLO %{buildroot}/boot/MLO +%endif +%if %origen_spl == 1 +install -D -m 0755 spl/origen-spl.bin %{buildroot}/boot/origen-spl.bin +%endif +%if %arndale_spl == 1 +install -D -m 0755 spl/arndale-spl.bin %{buildroot}/boot/arndale-spl.bin +install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img +%endif +%if %sunxi_spl == 1 +install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin +%endif + +%files +%defattr(-,root,root) +/boot/* +%doc Licenses/gpl-2.0.txt CREDITS README + +%files doc +%defattr(-,root,root) +# Generic documents +%doc doc/README.JFFS2 doc/README.JFFS2_NAND doc/README.commands +%doc doc/README.autoboot doc/README.commands doc/README.console doc/README.dns +%doc doc/README.hwconfig doc/README.nand doc/README.NetConsole doc/README.serial_multi +%doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb +%doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem +# Copy some useful kermit scripts as well +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image +# Now any h/w dependent Documentation +%doc doc/README.ARM-SoC doc/README.ARM-memory-map + +%changelog diff --git a/u-boot.changes b/u-boot.changes index 9bb9d74..9d2bb9b 100644 --- a/u-boot.changes +++ b/u-boot.changes @@ -1,3 +1,38 @@ +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + ------------------------------------------------------------------- Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot.spec b/u-boot.spec index 8658298..1420f0d 100644 --- a/u-boot.spec +++ b/u-boot.spec @@ -19,7 +19,7 @@ Name: u-boot -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: Tools for the u-boot Firmware License: GPL-2.0 @@ -47,7 +47,7 @@ mkimage- a tool that creates kernel bootable images for u-boot. %setup -q -n u-boot-%{version} %build -make USE_PRIVATE_LIBGG=yes tools +make USE_PRIVATE_LIBGG=yes tools-only %install install -D -m 0755 tools/mkimage %{buildroot}%{_bindir}/mkimage diff --git a/u-boot.spec.in b/u-boot.spec.in index b614afb..0ea033d 100644 --- a/u-boot.spec.in +++ b/u-boot.spec.in @@ -24,7 +24,7 @@ %define arndale_spl ARNDALE_SPL Name: u-boot-BOARDNAME -Version: 2014.01 +Version: 2014.04 Release: 0 Summary: The u-boot firmware for the BOARDNAME arm platform License: GPL-2.0 @@ -40,10 +40,9 @@ Patch4: beagle-bootscr.patch Patch5: mx53loco-bootscr.patch Patch6: origen-ext2.patch Patch7: arndale.patch -Patch8: v2014.01-sunxi.patch +Patch8: v2014.04-sunxi.patch Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch -Patch11: gnuhash.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch Patch20: fix_exynos5_text_base.patch @@ -58,7 +57,7 @@ Conflicts: otherproviders(u-boot-loader) Obsoletes: x-loader-BOARDNAME Provides: x-loader-BOARDNAME %endif -ExclusiveArch: %arm +ExclusiveArch: ARCH_RESTRICTIONS %description Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. @@ -77,7 +76,7 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot -%patch2 -p1 +%patch2 %patch3 %patch4 %patch5 @@ -85,8 +84,7 @@ rm -rf board/Marvell %patch7 %patch8 -p1 %patch9 -p1 -%patch10 -p1 -%patch11 -p1 +%patch10 %patch12 %patch13 %if "%{name}" == "u-boot-snow" @@ -146,7 +144,7 @@ install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb %doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem # Copy some useful kermit scripts as well -%doc tools/scripts/dot.kermrc tools/scripts/flash_param tools/scripts/send_cmd tools/scripts/send_image +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image # Now any h/w dependent Documentation %doc doc/README.ARM-SoC doc/README.ARM-memory-map diff --git a/v2014.01-sunxi.patch b/v2014.04-sunxi.patch similarity index 58% rename from v2014.01-sunxi.patch rename to v2014.04-sunxi.patch index b160a87..1f2c406 100644 --- a/v2014.01-sunxi.patch +++ b/v2014.04-sunxi.patch @@ -1,100 +1,11 @@ -diff --git a/Makefile b/Makefile -index 47a03e3..78f09b6 100644 ---- a/Makefile -+++ b/Makefile -@@ -491,6 +491,16 @@ $(obj)u-boot.spr: $(obj)u-boot.img $(obj)spl/u-boot-spl.bin - --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff $@ - cat $(obj)u-boot.img >> $@ - -+# sunxi: Combined object with SPL U-Boot with sunxi header (sunxi-spl.bin) -+# and the full-blown U-Boot attached to it -+$(obj)u-boot-sunxi-with-spl.bin: $(obj)spl/sunxi-spl.bin $(obj)u-boot.img -+ tr "\000" "\377" < /dev/zero | dd ibs=1 count=$(CONFIG_SPL_PAD_TO) \ -+ of=$(obj)spl/sunxi-spl-pad.bin 2>/dev/null -+ dd if=$(obj)spl/sunxi-spl.bin of=$(obj)spl/sunxi-spl-pad.bin \ -+ conv=notrunc 2>/dev/null -+ cat $(obj)spl/sunxi-spl-pad.bin $(obj)u-boot.img > $@ -+ rm $(obj)spl/sunxi-spl-pad.bin -+ - ifneq ($(CONFIG_TEGRA),) - $(obj)u-boot-nodtb-tegra.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin - $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SYS_TEXT_BASE) -O binary $(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin -@@ -578,6 +588,9 @@ $(obj)spl/u-boot-spl.bin: $(SUBDIR_TOOLS) depend - $(obj)tpl/u-boot-tpl.bin: $(SUBDIR_TOOLS) depend - $(MAKE) -C spl all CONFIG_TPL_BUILD=y - -+$(obj)spl/sunxi-spl.bin: $(SUBDIR_TOOLS) depend -+ $(MAKE) -C spl all -+ - # Explicitly make _depend in subdirs containing multiple targets to prevent - # parallel sub-makes creating .depend files simultaneously. - depend dep: $(TIMESTAMP_FILE) $(VERSION_FILE) \ -@@ -777,6 +790,8 @@ unconfig: - sinclude $(obj).boards.depend - $(obj).boards.depend: boards.cfg - @awk '(NF && $$1 !~ /^#/) { print $$7 ": " $$7 "_config; $$(MAKE)" }' $< > $@ -+ @awk '(NF && $$1 !~ /^#/ && tolower($$7) != $$7) { print tolower($$7) ": " $$7 "_config; $$(MAKE)" }' $< >> $@ -+ @awk '(NF && $$1 !~ /^#/ && tolower($$7) != $$7) { print ".PHONY: " tolower($$7) "_config"; print tolower($$7)"_config: " $$7 "_config" }' $< >> $@ - - ######################################################################### - ######################################################################### -@@ -799,6 +814,7 @@ clean: - $(obj)tools/dump{env,}image \ - $(obj)tools/mk{env,}image $(obj)tools/mpc86x_clk \ - $(obj)tools/mk{$(BOARD),}spl \ -+ $(obj)tools/mksunxiboot \ - $(obj)tools/mxsboot \ - $(obj)tools/ncb $(obj)tools/ubsha1 \ - $(obj)tools/kernel-doc/docproc \ -@@ -855,6 +871,7 @@ clobber: tidy - @[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -name "*" -type l -print | xargs rm -f - @rm -f $(obj)dts/*.tmp - @rm -f $(obj)spl/u-boot-spl{,-pad}.ais -+ @rm -f $(obj)spl/sun?i-spl.bin - - mrproper \ - distclean: clobber unconfig -diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile -index 0467d00..28aa4e1 100644 ---- a/arch/arm/cpu/armv7/Makefile -+++ b/arch/arm/cpu/armv7/Makefile -@@ -11,8 +11,9 @@ obj-y += cache_v7.o - - obj-y += cpu.o - obj-y += syslib.o -+obj-y += cmd_boot.o - --ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY),) -+ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI),) - ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y) - obj-y += lowlevel_init.o - endif -diff --git a/arch/arm/cpu/armv7/cmd_boot.c b/arch/arm/cpu/armv7/cmd_boot.c -new file mode 100644 -index 0000000..e5f917e ---- /dev/null -+++ b/arch/arm/cpu/armv7/cmd_boot.c -@@ -0,0 +1,36 @@ +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/cmd_boot.c u-boot-sunxi/arch/arm/cpu/armv7/cmd_boot.c +--- u-boot-2014.04/arch/arm/cpu/armv7/cmd_boot.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/cmd_boot.c 2014-04-29 14:29:40.196228748 +0200 +@@ -0,0 +1,20 @@ +/* + * (C) Copyright 2012 Henrik Nordstrom + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +/* @@ -111,71 +22,24 @@ index 0000000..e5f917e + return entry(argc, argv); +} +#endif -diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile -new file mode 100644 -index 0000000..f71a26d ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/Makefile -@@ -0,0 +1,53 @@ -+# -+# (C) Copyright 2012 Henrik Nordstrom -+# -+# Based on some other Makefile -+# (C) Copyright 2000-2003 -+# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+# -+# See file CREDITS for list of people who contributed to this -+# project. -+# -+# This program is free software; you can redistribute it and/or -+# modify it under the terms of the GNU General Public License as -+# published by the Free Software Foundation; either version 2 of -+# the License, or (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+# MA 02111-1307 USA -+# -+ -+obj-y += timer.o -+obj-y += dram.o -+obj-y += board.o -+obj-y += clock.o -+obj-y += pinmux.o -+obj-y += watchdog.o -+ifdef DEBUG -+obj-y += early_print.o -+endif -+obj-$(CONFIG_BOARD_POSTCLK_INIT) += postclk_init.o -+obj-$(CONFIG_SYS_SECONDARY_ON) += secondary_init.o -+obj-$(CONFIG_SYS_SECONDARY_ON) += smp.o -+ -+ifndef CONFIG_SPL_BUILD -+obj-y += key.o -+obj-y += cpu_info.o -+ifdef CONFIG_CMD_WATCHDOG -+obj-$(CONFIG_CMD_WATCHDOG) += cmd_watchdog.o -+endif -+endif -+ -+ifdef CONFIG_SPL_BUILD -+ifdef CONFIG_SPL_FEL -+obj-y += start.o -+endif -+endif -+ -diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c -new file mode 100644 -index 0000000..f74ee46 ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/board.c -@@ -0,0 +1,154 @@ +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/Makefile u-boot-sunxi/arch/arm/cpu/armv7/Makefile +--- u-boot-2014.04/arch/arm/cpu/armv7/Makefile 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/arch/arm/cpu/armv7/Makefile 2014-04-29 14:29:40.195228772 +0200 +@@ -11,8 +11,9 @@ obj-y += cache_v7.o + + obj-y += cpu.o + obj-y += syslib.o ++obj-y += cmd_boot.o + +-ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY),) ++ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI),) + ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y) + obj-y += lowlevel_init.o + endif +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/board.c u-boot-sunxi/arch/arm/cpu/armv7/sunxi/board.c +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/board.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/board.c 2014-04-29 14:29:40.205228534 +0200 +@@ -0,0 +1,148 @@ +/* + * (C) Copyright 2012 Henrik Nordstrom + * @@ -185,23 +49,7 @@ index 0000000..f74ee46 + * + * Some init for sunxi platform. + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include @@ -225,7 +73,7 @@ index 0000000..f74ee46 +DECLARE_GLOBAL_DATA_PTR; + +/* The sunxi internal brom will try to loader external bootloader -+ * from mmc0, nannd flash, mmc2. ++ * from mmc0, nand flash, mmc2. + * Unfortunately we can't check how SPL was loaded so assume + * it's always the first SD/MMC controller + */ @@ -256,14 +104,22 @@ index 0000000..f74ee46 + sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUN4I_GPB22_UART0_TX); + sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUN4I_GPB23_UART0_RX); + sunxi_gpio_set_pull(SUNXI_GPB(23), 1); ++#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_SUN6I) ++ sunxi_gpio_set_cfgpin(SUNXI_GPH(20), 2); ++ sunxi_gpio_set_cfgpin(SUNXI_GPH(21), 2); ++ sunxi_gpio_set_pull(SUNXI_GPH(21), 1); +#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_SUN5I) + sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN5I_GPB19_UART0_TX); + sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN5I_GPB20_UART0_RX); + sunxi_gpio_set_pull(SUNXI_GPB(20), 1); +#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_SUN5I) -+ sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG3_UART0_TX); -+ sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG4_UART0_RX); ++ sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG3_UART1_TX); ++ sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG4_UART1_RX); + sunxi_gpio_set_pull(SUNXI_GPG(4), 1); ++#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_SUN8I) ++ sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL2_R_UART_TX); ++ sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL3_R_UART_RX); ++ sunxi_gpio_set_pull(SUNXI_GPL(3), 1); +#else +#error Unsupported console port number. Please fix pin mux settings in board.c +#endif @@ -280,11 +136,11 @@ index 0000000..f74ee46 +/* do some early init */ +void s_init(void) +{ -+#if !defined CONFIG_SPL_BUILD && defined CONFIG_SUN7I ++#if !defined CONFIG_SPL_BUILD && (defined CONFIG_SUN7I || defined CONFIG_SUN6I) + /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */ + asm volatile( + "mrc p15, 0, r0, c1, c0, 1\n" -+ "orr r0, r0, #0x40\n" ++ "orr r0, r0, #1 << 6\n" + "mcr p15, 0, r0, c1, c0, 1\n"); +#endif + @@ -301,7 +157,9 @@ index 0000000..f74ee46 + /* Needed early by sunxi_board_init if PMU is enabled */ + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); +#endif -+ ++#endif ++/* No SPL on sun6i, so we do sunxi_board_init() from non spl there */ ++#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_SUN6I) || defined(CONFIG_SUN8I) + sunxi_board_init(); +#endif +} @@ -330,12 +188,10 @@ index 0000000..f74ee46 + return 0; +} +#endif -diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c -new file mode 100644 -index 0000000..54b8753 ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/clock.c -@@ -0,0 +1,194 @@ +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/clock.c u-boot-sunxi/arch/arm/cpu/armv7/sunxi/clock.c +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/clock.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/clock.c 2014-04-29 14:29:40.205228534 +0200 +@@ -0,0 +1,25 @@ +/* + * (C) Copyright 2007-2012 + * Allwinner Technology Co., Ltd. @@ -343,23 +199,38 @@ index 0000000..54b8753 + * + * (C) Copyright 2013 Luke Kenneth Casson Leighton + * -+ * See file CREDITS for list of people who contributed to this -+ * project. ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++int clock_init(void) ++{ ++#ifdef CONFIG_SPL_BUILD ++ clock_init_safe(); ++#endif ++ clock_init_uart(); ++ ++ return 0; ++} +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/clock_sun4i.c u-boot-sunxi/arch/arm/cpu/armv7/sunxi/clock_sun4i.c +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/clock_sun4i.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/clock_sun4i.c 2014-04-29 14:29:40.205228534 +0200 +@@ -0,0 +1,186 @@ ++/* ++ * sun4i, sun5i and sun7i specific clock code + * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. ++ * (C) Copyright 2007-2012 ++ * Allwinner Technology Co., Ltd. ++ * Tom Cubie + * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. ++ * (C) Copyright 2013 Luke Kenneth Casson Leighton + * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include @@ -369,72 +240,46 @@ index 0000000..54b8753 +#include + +#ifdef CONFIG_SPL_BUILD -+static void clock_init_safe(void) ++void clock_init_safe(void) +{ + struct sunxi_ccm_reg * const ccm = + (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + + /* Set safe defaults until PMU is configured */ -+ writel(AXI_DIV_1 << 0 | AHB_DIV_2 << 4 | APB0_DIV_1 << 8 | -+ CPU_CLK_SRC_OSC24M << 16, &ccm->cpu_ahb_apb0_cfg); -+ writel(0xa1005000, &ccm->pll1_cfg); ++ writel(AXI_DIV_1 << AXI_DIV_SHIFT | ++ AHB_DIV_2 << AHB_DIV_SHIFT | ++ APB0_DIV_1 << APB0_DIV_SHIFT | ++ CPU_CLK_SRC_OSC24M << CPU_CLK_SRC_SHIFT, ++ &ccm->cpu_ahb_apb0_cfg); ++ writel(PLL1_CFG_DEFAULT, &ccm->pll1_cfg); + sdelay(200); -+ writel(AXI_DIV_1 << 0 | AHB_DIV_2 << 4 | APB0_DIV_1 << 8 | -+ CPU_CLK_SRC_PLL1 << 16, &ccm->cpu_ahb_apb0_cfg); -+#ifdef CONFIG_SUN5I -+ /* Power on reset default for PLL6 is 2400 MHz, which is faster then -+ * it can reliable do :| Set it to a 600 MHz instead. */ -+ writel(0x21009911, &ccm->pll6_cfg); -+#endif ++ writel(AXI_DIV_1 << AXI_DIV_SHIFT | ++ AHB_DIV_2 << AHB_DIV_SHIFT | ++ APB0_DIV_1 << APB0_DIV_SHIFT | ++ CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT, ++ &ccm->cpu_ahb_apb0_cfg); +#ifdef CONFIG_SUN7I -+ writel(0x1 << 6 | readl(&ccm->ahb_gate0), &ccm->ahb_gate0); -+ writel(0x1 << 31 | readl(&ccm->pll6_cfg), &ccm->pll6_cfg); ++ writel(0x1 << AHB_GATE_OFFSET_DMA | readl(&ccm->ahb_gate0), ++ &ccm->ahb_gate0); +#endif ++ writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg); +} +#endif + -+int clock_init(void) ++void clock_init_uart(void) +{ + struct sunxi_ccm_reg *const ccm = + (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + -+#ifdef CONFIG_SPL_BUILD -+ clock_init_safe(); -+#endif -+ + /* uart clock source is apb1 */ -+ sr32(&ccm->apb1_clk_div_cfg, 24, 2, APB1_CLK_SRC_OSC24M); -+ sr32(&ccm->apb1_clk_div_cfg, 16, 2, APB1_FACTOR_N); -+ sr32(&ccm->apb1_clk_div_cfg, 0, 5, APB1_FACTOR_M); ++ writel(APB1_CLK_SRC_OSC24M| ++ APB1_CLK_RATE_N_1| ++ APB1_CLK_RATE_M(1), ++ &ccm->apb1_clk_div_cfg); + + /* open the clock for uart */ -+ sr32(&ccm->apb1_gate, 16 + CONFIG_CONS_INDEX - 1, 1, CLK_GATE_OPEN); -+ -+#ifdef CONFIG_NAND_SUNXI -+ /* nand clock source is osc24m */ -+ sr32(&ccm->nand_sclk_cfg, 24, 2, NAND_CLK_SRC_OSC24); -+ sr32(&ccm->nand_sclk_cfg, 16, 2, NAND_CLK_DIV_N); -+ sr32(&ccm->nand_sclk_cfg, 0, 4, NAND_CLK_DIV_M); -+ sr32(&ccm->nand_sclk_cfg, 31, 1, CLK_GATE_OPEN); -+ /* open clock for nand */ -+ sr32(&ccm->ahb_gate0, AHB_GATE_OFFSET_NAND, 1, CLK_GATE_OPEN); -+#endif -+ -+ return 0; -+} -+ -+/* Return PLL5 frequency in Hz -+ * Note: Assumes PLL5 reference is 24MHz clock -+ */ -+unsigned int clock_get_pll5(void) -+{ -+ struct sunxi_ccm_reg *const ccm = -+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; -+ uint32_t rval = readl(&ccm->pll5_cfg); -+ int n = (rval >> 8) & 0x1f; -+ int k = ((rval >> 4) & 3) + 1; -+ int p = 1 << ((rval >> 16) & 3); -+ return 24000000 * n * k / p; ++ setbits_le32(&ccm->apb1_gate, ++ CLK_GATE_OPEN << (APB1_GATE_UART_SHIFT+CONFIG_CONS_INDEX-1)); +} + +int clock_twi_onoff(int port, int state) @@ -445,17 +290,30 @@ index 0000000..54b8753 + if (port > 2) + return -1; + -+ /* set the apb1 clock gate for twi */ -+ sr32(&ccm->apb1_gate, 0 + port, 1, state); ++ /* set the apb clock gate for twi */ ++ if (state) ++ setbits_le32(&ccm->apb1_gate, ++ CLK_GATE_OPEN << (APB1_GATE_TWI_SHIFT+port)); ++ else ++ clrbits_le32(&ccm->apb1_gate, ++ CLK_GATE_OPEN << (APB1_GATE_TWI_SHIFT+port)); + + return 0; +} + +#ifdef CONFIG_SPL_BUILD -+#define PLL1_CFG(N, K, M, P) (1 << 31 | 0 << 30 | 8 << 26 | 0 << 25 | \ -+ 16 << 20 | (P) << 16 | 2 << 13 | (N) << 8 | \ -+ (K) << 4 | 0 << 3 | 0 << 2 | (M) << 0) -+#define RDIV(a, b) ((a + (b) - 1) / (b)) ++#define PLL1_CFG(N, K, M, P) ( 1 << CCM_PLL1_CFG_ENABLE_SHIFT | \ ++ 0 << CCM_PLL1_CFG_VCO_RST_SHIFT | \ ++ 8 << CCM_PLL1_CFG_VCO_BIAS_SHIFT | \ ++ 0 << CCM_PLL1_CFG_PLL4_EXCH_SHIFT | \ ++ 16 << CCM_PLL1_CFG_BIAS_CUR_SHIFT | \ ++ (P)<< CCM_PLL1_CFG_DIVP_SHIFT | \ ++ 2 << CCM_PLL1_CFG_LCK_TMR_SHIFT | \ ++ (N)<< CCM_PLL1_CFG_FACTOR_N_SHIFT | \ ++ (K)<< CCM_PLL1_CFG_FACTOR_K_SHIFT | \ ++ 0 << CCM_PLL1_CFG_SIG_DELT_PAT_IN_SHIFT | \ ++ 0 << CCM_PLL1_CFG_SIG_DELT_PAT_EN_SHIFT | \ ++ (M)<< CCM_PLL1_CFG_FACTOR_M_SHIFT) + +struct { + u32 pll1_cfg; @@ -492,8 +350,8 @@ index 0000000..54b8753 + hz = pll1_para[i].freq; + + /* Calculate system clock divisors */ -+ axi = RDIV(hz, 432000000); /* Max 450MHz */ -+ ahb = RDIV(hz/axi, 204000000); /* Max 250MHz */ ++ axi = DIV_ROUND_UP(hz, 432000000); /* Max 450MHz */ ++ ahb = DIV_ROUND_UP(hz/axi, 204000000); /* Max 250MHz */ + apb0 = 2; /* Max 150MHz */ + + printf("CPU: %dHz, AXI/AHB/APB: %d/%d/%d\n", hz, axi, ahb, apb0); @@ -512,12 +370,18 @@ index 0000000..54b8753 + apb0 = apb0 - 1; + + /* Switch to 24MHz clock while changing PLL1 */ -+ writel(AXI_DIV_1 << 0 | AHB_DIV_2 << 4 | APB0_DIV_1 << 8 | -+ CPU_CLK_SRC_OSC24M << 16, &ccm->cpu_ahb_apb0_cfg); ++ writel(AXI_DIV_1 << AXI_DIV_SHIFT | ++ AHB_DIV_2 << AHB_DIV_SHIFT | ++ APB0_DIV_1 << APB0_DIV_SHIFT | ++ CPU_CLK_SRC_OSC24M << CPU_CLK_SRC_SHIFT, ++ &ccm->cpu_ahb_apb0_cfg); + sdelay(20); + + /* Configure sys clock divisors */ -+ writel(axi << 0 | ahb << 4 | apb0 << 8 | CPU_CLK_SRC_OSC24M << 16, ++ writel(axi << AXI_DIV_SHIFT | ++ ahb << AHB_DIV_SHIFT | ++ apb0 << APB0_DIV_SHIFT | ++ CPU_CLK_SRC_OSC24M << CPU_CLK_SRC_SHIFT, + &ccm->cpu_ahb_apb0_cfg); + + /* Configure PLL1 at the desired frequency */ @@ -525,34 +389,146 @@ index 0000000..54b8753 + sdelay(200); + + /* Switch CPU to PLL1 */ -+ writel(axi << 0 | ahb << 4 | apb0 << 8 | CPU_CLK_SRC_PLL1 << 16, ++ writel(axi << AXI_DIV_SHIFT | ++ ahb << AHB_DIV_SHIFT | ++ apb0 << APB0_DIV_SHIFT | ++ CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT, + &ccm->cpu_ahb_apb0_cfg); + sdelay(20); +} +#endif -diff --git a/arch/arm/cpu/armv7/sunxi/cmd_watchdog.c b/arch/arm/cpu/armv7/sunxi/cmd_watchdog.c -new file mode 100644 -index 0000000..ff93743 ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/cmd_watchdog.c -@@ -0,0 +1,42 @@ ++ ++unsigned int clock_get_pll6(void) ++{ ++ struct sunxi_ccm_reg *const ccm = ++ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; ++ uint32_t rval = readl(&ccm->pll6_cfg); ++ int n = ((rval & CCM_PLL6_CTRL_N_MASK) >> CCM_PLL6_CTRL_N_SHIFT); ++ int k = ((rval & CCM_PLL6_CTRL_K_MASK) >> CCM_PLL6_CTRL_K_SHIFT) + 1; ++ return 24000000 * n * k / 2; ++} +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/clock_sun6i.c u-boot-sunxi/arch/arm/cpu/armv7/sunxi/clock_sun6i.c +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/clock_sun6i.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/clock_sun6i.c 2014-04-29 14:29:40.205228534 +0200 +@@ -0,0 +1,110 @@ ++/* ++ * sun6i specific clock code ++ * ++ * (C) Copyright 2007-2012 ++ * Allwinner Technology Co., Ltd. ++ * Tom Cubie ++ * ++ * (C) Copyright 2013 Luke Kenneth Casson Leighton ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_SPL_BUILD ++void clock_init_safe(void) ++{ ++ struct sunxi_ccm_reg * const ccm = ++ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; ++ struct sunxi_prcm_reg * const prcm = ++ (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE; ++ ++ /* Set PLL ldo voltage without this PLL6 does not work properly */ ++ writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN | ++ PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140) | ++ PRCM_PLL_CTRL_LDO_KEY, &prcm->pll_ctrl1); ++ writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN | ++ PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140) | ++ PRCM_PLL_CTRL_LDO_KEY, &prcm->pll_ctrl1); ++ writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN | ++ PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140), ++ &prcm->pll_ctrl1); ++ ++ /* AXI and PLL1 settings from boot0 / boot1, PLL1 set to 486 Mhz */ ++ writel(AXI_DIV_3 << AXI_DIV_SHIFT | ++ ATB_DIV_2 << ATB_DIV_SHIFT | ++ CPU_CLK_SRC_OSC24M << CPU_CLK_SRC_SHIFT, ++ &ccm->cpu_axi_cfg); ++ writel(PLL1_CFG_DEFAULT, &ccm->pll1_cfg); ++ sdelay(200); ++ writel(AXI_DIV_3 << AXI_DIV_SHIFT | ++ ATB_DIV_2 << ATB_DIV_SHIFT | ++ CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT, ++ &ccm->cpu_axi_cfg); ++ ++ writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg); ++} ++#endif ++ ++void clock_init_uart(void) ++{ ++ struct sunxi_ccm_reg *const ccm = ++ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; ++ ++#if CONFIG_CONS_INDEX < 5 ++ /* uart clock source is apb2 */ ++ writel(APB2_CLK_SRC_OSC24M| ++ APB2_CLK_RATE_N_1| ++ APB2_CLK_RATE_M(1), ++ &ccm->apb2_div); ++ ++ /* open the clock for uart */ ++ setbits_le32(&ccm->apb2_gate, ++ CLK_GATE_OPEN << (APB2_GATE_UART_SHIFT+CONFIG_CONS_INDEX-1)); ++ ++ /* deassert uart reset */ ++ setbits_le32(&ccm->apb2_reset_cfg, ++ 1 << (APB2_RESET_UART_SHIFT+CONFIG_CONS_INDEX-1)); ++#else ++ /* enable R_PIO and R_UART clocks, and de-assert resets */ ++ prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_UART); ++#endif ++ ++ /* Dup with clock_init_safe(), drop once sun6i SPL support lands */ ++ writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg); ++} ++ ++int clock_twi_onoff(int port, int state) ++{ ++ struct sunxi_ccm_reg *const ccm = ++ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; ++ ++ if (port > 3) ++ return -1; ++ ++ /* set the apb clock gate for twi */ ++ if (state) ++ setbits_le32(&ccm->apb2_gate, ++ CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port)); ++ else ++ clrbits_le32(&ccm->apb2_gate, ++ CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port)); ++ ++ return 0; ++} ++ ++unsigned int clock_get_pll6(void) ++{ ++ struct sunxi_ccm_reg *const ccm = ++ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; ++ uint32_t rval = readl(&ccm->pll6_cfg); ++ int n = ((rval & CCM_PLL6_CTRL_N_MASK) >> CCM_PLL6_CTRL_N_SHIFT) + 1; ++ int k = ((rval & CCM_PLL6_CTRL_K_MASK) >> CCM_PLL6_CTRL_K_SHIFT) + 1; ++ return 24000000 * n * k / 2; ++} +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/cmd_watchdog.c u-boot-sunxi/arch/arm/cpu/armv7/sunxi/cmd_watchdog.c +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/cmd_watchdog.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/cmd_watchdog.c 2014-04-29 14:29:40.205228534 +0200 +@@ -0,0 +1,29 @@ +/* + * (C) Copyright 2012 Henrik Nordstrom + * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include @@ -578,48 +554,28 @@ index 0000000..ff93743 + "Set watchdog [0 - 16]. [17+} disables", + "" +); -diff --git a/arch/arm/cpu/armv7/sunxi/config.mk b/arch/arm/cpu/armv7/sunxi/config.mk -new file mode 100644 -index 0000000..9ce48b4 ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/config.mk +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/config.mk u-boot-sunxi/arch/arm/cpu/armv7/sunxi/config.mk +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/config.mk 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/config.mk 2014-04-29 14:29:40.205228534 +0200 @@ -0,0 +1,8 @@ +# Build a combined spl + u-boot image +ifdef CONFIG_SPL +ifndef CONFIG_SPL_BUILD +ifndef CONFIG_SPL_FEL -+ALL-y = $(obj)u-boot-sunxi-with-spl.bin ++ALL-y += u-boot-sunxi-with-spl.bin +endif +endif +endif -diff --git a/arch/arm/cpu/armv7/sunxi/cpu_info.c b/arch/arm/cpu/armv7/sunxi/cpu_info.c -new file mode 100644 -index 0000000..4154638 ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/cpu_info.c -@@ -0,0 +1,45 @@ +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/cpu_info.c u-boot-sunxi/arch/arm/cpu/armv7/sunxi/cpu_info.c +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/cpu_info.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/cpu_info.c 2014-04-29 14:29:40.206228511 +0200 +@@ -0,0 +1,33 @@ +/* + * (C) Copyright 2007-2011 + * Allwinner Technology Co., Ltd. + * Tom Cubie + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include @@ -634,8 +590,12 @@ index 0000000..4154638 +#elif defined CONFIG_SUN5I + /* TODO: Distinguish A13/A10s */ + puts("CPU: Allwinner A13/A10s (SUN5I)\n"); ++#elif defined CONFIG_SUN6I ++ puts("CPU: Allwinner A31 (SUN6I)\n"); +#elif defined CONFIG_SUN7I + puts("CPU: Allwinner A20 (SUN7I)\n"); ++#elif defined CONFIG_SUN8I ++ puts("CPU: Allwinner A23 (SUN8I)\n"); +#else +#warning Please update cpu_info.c with correct CPU information + puts("CPU: SUNXI Family\n"); @@ -643,12 +603,10 @@ index 0000000..4154638 + return 0; +} +#endif -diff --git a/arch/arm/cpu/armv7/sunxi/dram.c b/arch/arm/cpu/armv7/sunxi/dram.c -new file mode 100644 -index 0000000..94a3657 ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/dram.c -@@ -0,0 +1,679 @@ +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/dram.c u-boot-sunxi/arch/arm/cpu/armv7/sunxi/dram.c +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/dram.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/dram.c 2014-04-29 14:29:40.206228511 +0200 +@@ -0,0 +1,684 @@ +/* + * sunxi DRAM controller initialization + * (C) Copyright 2012 Henrik Nordstrom @@ -662,23 +620,14 @@ index 0000000..94a3657 + * Berg Xing + * Tom Cubie + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++/* ++ * Unfortunately the only documentation we have on the sun7i DRAM ++ * controller is Allwinner boot0 + boot1 code, and that code uses ++ * magic numbers & shifts with no explanations. Hence this code is ++ * rather undocumented and full of magic. + */ + +#include @@ -782,11 +731,7 @@ index 0000000..94a3657 + n = DRAM_DCR_NR_DLLCR_16BIT; + + for (i = 1; i < n; i++) { -+#ifdef CONFIG_SUN7I + clrsetbits_le32(&dram->dllcr[i], 0xf << 14, -+#else -+ clrsetbits_le32(&dram->dllcr[i], 0x4 << 14, -+#endif + (phase & 0xf) << 14); + clrsetbits_le32(&dram->dllcr[i], DRAM_DLLCR_NRESET, + DRAM_DLLCR_DISABLE); @@ -839,7 +784,7 @@ index 0000000..94a3657 + * 0x1031, 0x0301, 0x0301, 0x0731 + * but boot0 code skips #28 and #30, and sets #29 and #31 to the + * value from #28 entry (0x1031) -+ */ ++ */ +#endif +}; + @@ -860,13 +805,46 @@ index 0000000..94a3657 + /* setup DRAM PLL */ + reg_val = readl(&ccm->pll5_cfg); + reg_val &= ~CCM_PLL5_CTRL_M_MASK; /* set M to 0 (x1) */ -+ reg_val |= CCM_PLL5_CTRL_M(CCM_PLL5_CTRL_M_X(2)); + reg_val &= ~CCM_PLL5_CTRL_K_MASK; /* set K to 0 (x1) */ -+ reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(2)); + reg_val &= ~CCM_PLL5_CTRL_N_MASK; /* set N to 0 (x0) */ -+ reg_val |= CCM_PLL5_CTRL_N(CCM_PLL5_CTRL_N_X(clk / 24)); + reg_val &= ~CCM_PLL5_CTRL_P_MASK; /* set P to 0 (x1) */ -+ reg_val |= CCM_PLL5_CTRL_P(CCM_PLL5_CTRL_P_X(2)); ++ if (clk >= 540 && clk < 552) { ++ /* dram = 540MHz, pll5p = 540MHz */ ++ reg_val |= CCM_PLL5_CTRL_M(CCM_PLL5_CTRL_M_X(2)); ++ reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(3)); ++ reg_val |= CCM_PLL5_CTRL_N(CCM_PLL5_CTRL_N_X(15)); ++ reg_val |= CCM_PLL5_CTRL_P(1); ++ } else if (clk >= 512 && clk < 528) { ++ /* dram = 512MHz, pll5p = 384MHz */ ++ reg_val |= CCM_PLL5_CTRL_M(CCM_PLL5_CTRL_M_X(3)); ++ reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(4)); ++ reg_val |= CCM_PLL5_CTRL_N(CCM_PLL5_CTRL_N_X(16)); ++ reg_val |= CCM_PLL5_CTRL_P(2); ++ } else if (clk >= 496 && clk < 504) { ++ /* dram = 496MHz, pll5p = 372MHz */ ++ reg_val |= CCM_PLL5_CTRL_M(CCM_PLL5_CTRL_M_X(3)); ++ reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(2)); ++ reg_val |= CCM_PLL5_CTRL_N(CCM_PLL5_CTRL_N_X(31)); ++ reg_val |= CCM_PLL5_CTRL_P(2); ++ } else if (clk >= 468 && clk < 480) { ++ /* dram = 468MHz, pll5p = 468MHz */ ++ reg_val |= CCM_PLL5_CTRL_M(CCM_PLL5_CTRL_M_X(2)); ++ reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(3)); ++ reg_val |= CCM_PLL5_CTRL_N(CCM_PLL5_CTRL_N_X(13)); ++ reg_val |= CCM_PLL5_CTRL_P(1); ++ } else if (clk >= 396 && clk < 408) { ++ /* dram = 396MHz, pll5p = 396MHz */ ++ reg_val |= CCM_PLL5_CTRL_M(CCM_PLL5_CTRL_M_X(2)); ++ reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(3)); ++ reg_val |= CCM_PLL5_CTRL_N(CCM_PLL5_CTRL_N_X(11)); ++ reg_val |= CCM_PLL5_CTRL_P(1); ++ } else { ++ /* any other frequency that is a multiple of 24 */ ++ reg_val |= CCM_PLL5_CTRL_M(CCM_PLL5_CTRL_M_X(2)); ++ reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(2)); ++ reg_val |= CCM_PLL5_CTRL_N(CCM_PLL5_CTRL_N_X(clk / 24)); ++ reg_val |= CCM_PLL5_CTRL_P(CCM_PLL5_CTRL_P_X(2)); ++ } + reg_val &= ~CCM_PLL5_CTRL_VCO_GAIN; /* PLL VCO Gain off */ + reg_val |= CCM_PLL5_CTRL_EN; /* PLL On */ + writel(reg_val, &ccm->pll5_cfg); @@ -931,7 +909,8 @@ index 0000000..94a3657 + setbits_le32(&dram->ccr, DRAM_CCR_DATA_TRAINING); + + /* check whether data training process has completed */ -+ while (readl(&dram->ccr) & DRAM_CCR_DATA_TRAINING); ++ while (readl(&dram->ccr) & DRAM_CCR_DATA_TRAINING) ++ ; + + /* check data training result */ + reg_val = readl(&dram->csr); @@ -962,7 +941,7 @@ index 0000000..94a3657 + for (cr_i = 1; cr_i < 5; cr_i++) { + clrsetbits_le32(&dram->dllcr[cr_i], + 0x4f << 14, -+ (dqs_dly[clk_i] & 0x4f) << 14); ++ (dqs_dly[dqs_i] & 0x4f) << 14); + } + udelay(2); + if (dramc_scan_readpipe() == 0) @@ -1071,53 +1050,30 @@ index 0000000..94a3657 +#endif +} + -+#ifdef CONFIG_SUN4I -+static void dramc_set_autorefresh_cycle(u32 clk) ++static const u16 tRFC_table[2][6] = { ++ /* 256Mb 512Mb 1Gb 2Gb 4Gb 8Gb */ ++ /* DDR2 75ns 105ns 127.5ns 195ns 327.5ns invalid */ ++ { 77, 108, 131, 200, 336, 336 }, ++ /* DDR3 invalid 90ns 110ns 160ns 300ns 350ns */ ++ { 93, 93, 113, 164, 308, 359 } ++}; ++ ++static void dramc_set_autorefresh_cycle(u32 clk, u32 type, u32 density) +{ + struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE; -+ u32 reg_val; -+ u32 tmp_val; -+ u32 reg_dcr; ++ u32 tRFC, tREFI; + -+ if (clk < 600) { -+ reg_dcr = readl(&dram->dcr); -+ if ((reg_dcr & DRAM_DCR_CHIP_DENSITY_MASK) <= -+ DRAM_DCR_CHIP_DENSITY(DRAM_DCR_CHIP_DENSITY_1024M)) -+ reg_val = (131 * clk) >> 10; -+ else -+ reg_val = (336 * clk) >> 10; ++ tRFC = (tRFC_table[type][density] * clk + 1023) >> 10; ++ tREFI = (7987 * clk) >> 10; /* <= 7.8us */ + -+ tmp_val = (7987 * clk) >> 10; -+ tmp_val = tmp_val * 9 - 200; -+ reg_val |= tmp_val << 8; -+ reg_val |= 0x8 << 24; -+ writel(reg_val, &dram->drr); -+ } else { -+ writel(0x0, &dram->drr); -+ } ++ writel(DRAM_DRR_TREFI(tREFI) | DRAM_DRR_TRFC(tRFC), &dram->drr); +} -+#endif /* SUN4I */ -+ -+#if defined(CONFIG_SUN5I) || defined(CONFIG_SUN7I) -+static void dramc_set_autorefresh_cycle(u32 clk) -+{ -+ struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE; -+ u32 reg_val; -+ u32 tmp_val; -+ reg_val = 0x83; -+ -+ tmp_val = (7987 * clk) >> 10; -+ tmp_val = tmp_val * 9 - 200; -+ reg_val |= tmp_val << 8; -+ reg_val |= 0x8 << 24; -+ writel(reg_val, &dram->drr); -+} -+#endif /* SUN5I */ + +unsigned long dramc_init(struct dram_para *para) +{ + struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE; + u32 reg_val; ++ u32 density; + int ret_val; + + /* check input dram parameter structure */ @@ -1156,20 +1112,21 @@ index 0000000..94a3657 + reg_val |= DRAM_DCR_IO_WIDTH(para->io_width >> 3); + + if (para->density == 256) -+ reg_val |= DRAM_DCR_CHIP_DENSITY(DRAM_DCR_CHIP_DENSITY_256M); ++ density = DRAM_DCR_CHIP_DENSITY_256M; + else if (para->density == 512) -+ reg_val |= DRAM_DCR_CHIP_DENSITY(DRAM_DCR_CHIP_DENSITY_512M); ++ density = DRAM_DCR_CHIP_DENSITY_512M; + else if (para->density == 1024) -+ reg_val |= DRAM_DCR_CHIP_DENSITY(DRAM_DCR_CHIP_DENSITY_1024M); ++ density = DRAM_DCR_CHIP_DENSITY_1024M; + else if (para->density == 2048) -+ reg_val |= DRAM_DCR_CHIP_DENSITY(DRAM_DCR_CHIP_DENSITY_2048M); ++ density = DRAM_DCR_CHIP_DENSITY_2048M; + else if (para->density == 4096) -+ reg_val |= DRAM_DCR_CHIP_DENSITY(DRAM_DCR_CHIP_DENSITY_4096M); ++ density = DRAM_DCR_CHIP_DENSITY_4096M; + else if (para->density == 8192) -+ reg_val |= DRAM_DCR_CHIP_DENSITY(DRAM_DCR_CHIP_DENSITY_8192M); ++ density = DRAM_DCR_CHIP_DENSITY_8192M; + else -+ reg_val |= DRAM_DCR_CHIP_DENSITY(DRAM_DCR_CHIP_DENSITY_256M); ++ density = DRAM_DCR_CHIP_DENSITY_256M; + ++ reg_val |= DRAM_DCR_CHIP_DENSITY(density); + reg_val |= DRAM_DCR_BUS_WIDTH((para->bus_width >> 3) - 1); + reg_val |= DRAM_DCR_RANK_SEL(para->rank_num - 1); + reg_val |= DRAM_DCR_CMD_RANK_ALL; @@ -1208,7 +1165,8 @@ index 0000000..94a3657 + + udelay(1); + -+ while (readl(&dram->ccr) & DRAM_CCR_INIT); ++ while (readl(&dram->ccr) & DRAM_CCR_INIT) ++ ; + + mctl_enable_dllx(para->tpr3); + @@ -1229,7 +1187,7 @@ index 0000000..94a3657 +#endif + + /* set refresh period */ -+ dramc_set_autorefresh_cycle(para->clock); ++ dramc_set_autorefresh_cycle(para->clock, para->type - 2, density); + + /* set timing parameters */ + writel(para->tpr0, &dram->tpr0); @@ -1264,7 +1222,8 @@ index 0000000..94a3657 +#endif + /* reset external DRAM */ + setbits_le32(&dram->ccr, DRAM_CCR_INIT); -+ while (readl(&dram->ccr) & DRAM_CCR_INIT); ++ while (readl(&dram->ccr) & DRAM_CCR_INIT) ++ ; + +#ifdef CONFIG_SUN7I + /* setup zq calibration manual */ @@ -1280,25 +1239,29 @@ index 0000000..94a3657 + /* exit self-refresh state */ + clrsetbits_le32(&dram->dcr, 0x1f << 27, 0x12 << 27); + /* check whether command has been executed */ -+ while (readl(&dram->dcr) & (0x1 << 31)); ++ while (readl(&dram->dcr) & (0x1 << 31)) ++ ; + + udelay(2); + + /* dram pad hold off */ + setbits_le32(&dram->ppwrsctl, 0x16510000); + -+ while (readl(&dram->ppwrsctl) & 0x1); ++ while (readl(&dram->ppwrsctl) & 0x1) ++ ; + + /* exit self-refresh state */ + clrsetbits_le32(&dram->dcr, 0x1f << 27, 0x12 << 27); + + /* check whether command has been executed */ -+ while (readl(&dram->dcr) & (0x1 << 31)); -+ udelay(2);; ++ while (readl(&dram->dcr) & (0x1 << 31)) ++ ; ++ udelay(2); + + /* issue a refresh command */ + clrsetbits_le32(&dram->dcr, 0x1f << 27, 0x13 << 27); -+ while (readl(&dram->dcr) & (0x1 << 31)); ++ while (readl(&dram->dcr) & (0x1 << 31)) ++ ; + + udelay(2); + } @@ -1328,12 +1291,10 @@ index 0000000..94a3657 + + return get_ram_size((unsigned long *)PHYS_SDRAM_0, PHYS_SDRAM_0_SIZE); +} -diff --git a/arch/arm/cpu/armv7/sunxi/early_print.c b/arch/arm/cpu/armv7/sunxi/early_print.c -new file mode 100644 -index 0000000..fd3a843 ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/early_print.c -@@ -0,0 +1,65 @@ +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/early_print.c u-boot-sunxi/arch/arm/cpu/armv7/sunxi/early_print.c +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/early_print.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/early_print.c 2014-04-29 14:29:40.206228511 +0200 +@@ -0,0 +1,55 @@ +/* + * (C) Copyright 2007-2012 + * Allwinner Technology Co., Ltd. @@ -1341,23 +1302,7 @@ index 0000000..fd3a843 + * + * Early uart print for debugging. + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include @@ -1369,7 +1314,13 @@ index 0000000..fd3a843 + +static int uart_initialized = 0; + ++#if CONFIG_CONS_INDEX < 5 +#define UART CONFIG_CONS_INDEX-1 ++#else ++/* SUNXI_R_UART_BASE */ ++#define UART 2922 ++#endif ++ +void uart_init(void) { + + /* select dll dlh */ @@ -1399,110 +1350,189 @@ index 0000000..fd3a843 +} + + -diff --git a/arch/arm/cpu/armv7/sunxi/key.c b/arch/arm/cpu/armv7/sunxi/key.c -new file mode 100644 -index 0000000..d825c4c ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/key.c -@@ -0,0 +1,70 @@ +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/Makefile u-boot-sunxi/arch/arm/cpu/armv7/sunxi/Makefile +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/Makefile 2014-04-29 14:29:40.205228534 +0200 +@@ -0,0 +1,45 @@ ++# ++# (C) Copyright 2012 Henrik Nordstrom ++# ++# Based on some other Makefile ++# (C) Copyright 2000-2003 ++# Wolfgang Denk, DENX Software Engineering, wd@denx.de. ++# ++# SPDX-License-Identifier: GPL-2.0+ ++# ++obj-y += timer.o ++obj-y += board.o ++obj-y += clock.o ++obj-y += pinmux.o ++obj-y += watchdog.o ++obj-$(CONFIG_SUN6I) += prcm.o ++obj-$(CONFIG_SUN8I) += prcm.o ++obj-$(CONFIG_SUN6I) += p2wi.o ++obj-$(CONFIG_SUN4I) += clock_sun4i.o ++obj-$(CONFIG_SUN5I) += clock_sun4i.o ++obj-$(CONFIG_SUN6I) += clock_sun6i.o ++obj-$(CONFIG_SUN7I) += clock_sun4i.o ++obj-$(CONFIG_SUN8I) += clock_sun6i.o ++ifdef DEBUG ++obj-y += early_print.o ++endif ++obj-$(CONFIG_BOARD_POSTCLK_INIT) += postclk_init.o ++obj-$(CONFIG_SYS_SECONDARY_ON) += secondary_init.o ++obj-$(CONFIG_SYS_SECONDARY_ON) += smp.o ++ ++ifndef CONFIG_SPL_BUILD ++obj-y += cpu_info.o ++ifdef CONFIG_CMD_WATCHDOG ++obj-$(CONFIG_CMD_WATCHDOG) += cmd_watchdog.o ++endif ++endif ++ ++ifdef CONFIG_SPL_BUILD ++obj-$(CONFIG_SUN4I) += dram.o ++obj-$(CONFIG_SUN5I) += dram.o ++obj-$(CONFIG_SUN7I) += dram.o ++ifdef CONFIG_SPL_FEL ++obj-y += start.o ++endif ++endif ++ +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/p2wi.c u-boot-sunxi/arch/arm/cpu/armv7/sunxi/p2wi.c +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/p2wi.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/p2wi.c 2014-04-29 14:29:40.206228511 +0200 +@@ -0,0 +1,120 @@ +/* -+ * (C) Copyright 2007-2011 ++ * Sunxi A31 Power Management Unit ++ * ++ * (C) Copyright 2013 Oliver Schinagl ++ * http://linux-sunxi.org ++ * ++ * Based on sun6i sources and earlier U-Boot Allwiner A10 SPL work ++ * ++ * (C) Copyright 2006-2013 + * Allwinner Technology Co., Ltd. ++ * Berg Xing + * Tom Cubie + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include ++#include +#include +#include -+#include ++#include ++#include ++#include ++#include +#include + -+int sunxi_key_init(void) ++void p2wi_init(void) +{ -+ struct sunxi_lradc *sunxi_key_base = -+ (struct sunxi_lradc *)SUNXI_LRADC_BASE; ++ struct sunxi_p2wi_reg *p2wi = (struct sunxi_p2wi_reg *)SUNXI_P2WI_BASE; + -+ sr32(&sunxi_key_base->ctrl, 0, 1, LRADC_EN); -+ sr32(&sunxi_key_base->ctrl, 2, 2, LRADC_SAMPLE_RATE); -+ sr32(&sunxi_key_base->ctrl, 4, 2, LEVELB_VOL); -+ sr32(&sunxi_key_base->ctrl, 6, 1, LRADC_HOLD_EN); -+ sr32(&sunxi_key_base->ctrl, 12, 2, KEY_MODE_SELECT); ++ /* Enable p2wi and PIO clk, and de-assert their resets */ ++ prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_P2WI); + -+ /* disable all key irq */ -+ writel(0x0, &sunxi_key_base->intc); -+ /* clear all key pending */ -+ writel(0xffffffff, &sunxi_key_base->ints); ++ sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUNXI_GPL0_R_P2WI_SCK); ++ sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUNXI_GPL1_R_P2WI_SDA); ++ ++ /* Reset p2wi controller and set clock to CLKIN(12)/8 = 1.5 MHz */ ++ writel(P2WI_CTRL_RESET, &p2wi->ctrl); ++ sdelay(0x100); ++ writel(P2WI_CC_SDA_OUT_DELAY(1) | P2WI_CC_CLK_DIV(8), ++ &p2wi->cc); ++} ++ ++int p2wi_set_pmu_address(u8 slave_addr, u8 ctrl_reg, u8 init_data) ++{ ++ struct sunxi_p2wi_reg *p2wi = (struct sunxi_p2wi_reg *)SUNXI_P2WI_BASE; ++ int i; ++ ++ writel(P2WI_PM_DEV_ADDR(slave_addr) | ++ P2WI_PM_CTRL_ADDR(ctrl_reg) | ++ P2WI_PM_INIT_DATA(init_data) | ++ P2WI_PM_INIT_SEND, ++ &p2wi->pm); ++ for (i = 0xffffff; i != 0; i--) ++ if (!(readl(&p2wi->pm) & P2WI_PM_INIT_SEND)) ++ break; ++ if (readl(&p2wi->pm) & P2WI_PM_INIT_SEND) ++ return -EFAULT; + + return 0; +} + -+u32 sunxi_read_key(void) ++int p2wi_read(const u8 addr, u8 *data) +{ -+ u32 ints; -+ u32 key = 0; -+ struct sunxi_lradc *sunxi_key_base = -+ (struct sunxi_lradc *)SUNXI_LRADC_BASE; ++ struct sunxi_p2wi_reg *p2wi = (struct sunxi_p2wi_reg *)SUNXI_P2WI_BASE; ++ int i, ret = 0; ++ u8 reg; + -+ ints = readl(&sunxi_key_base->ints); ++ writel(P2WI_DATADDR_BYTE_1(addr), &p2wi->dataddr0); ++ writel(P2WI_DATA_NUM_BYTES(1) | ++ P2WI_DATA_NUM_BYTES_READ, &p2wi->numbytes); ++ writel(P2WI_STAT_TRANS_DONE, &p2wi->status); ++ writel(P2WI_CTRL_TRANS_START, &p2wi->ctrl); + -+ /* if there is already data pending, -+ read it */ -+ if (ints & ADC0_DATA_PENDING) { -+ key = readl(&sunxi_key_base->data0); -+#ifdef DEBUG -+ printf("key pressed, value=0x%x\n", key); -+#endif -+ } -+ /* clear the pending data */ -+ writel(ints, &sunxi_key_base->ints); -+ return key; ++ for (i = 0xffffff; i != 0; i--) { ++ reg = readl(&p2wi->status); ++ if (reg & P2WI_STAT_TRANS_ERR) { ++ ret = -EIO; ++ break; ++ } ++ if (reg & P2WI_STAT_TRANS_DONE) ++ break; ++ } ++ ++ if (i == 0) ++ ret = -ETIME; ++ ++ *data = readl(&p2wi->data0) & P2WI_DATA_BYTE_1_MASK; ++ writel(reg, &p2wi->status); /* Clear status bits */ ++ return ret; +} -diff --git a/arch/arm/cpu/armv7/sunxi/pinmux.c b/arch/arm/cpu/armv7/sunxi/pinmux.c -new file mode 100644 -index 0000000..56671f6 ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/pinmux.c -@@ -0,0 +1,96 @@ ++ ++int p2wi_write(const u8 addr, u8 data) ++{ ++ struct sunxi_p2wi_reg *p2wi = (struct sunxi_p2wi_reg *)SUNXI_P2WI_BASE; ++ int i, ret = 0; ++ u8 reg; ++ ++ writel(P2WI_DATADDR_BYTE_1(addr), &p2wi->dataddr0); ++ writel(P2WI_DATA_BYTE_1(data), &p2wi->data0); ++ writel(P2WI_DATA_NUM_BYTES(1), &p2wi->numbytes); ++ writel(P2WI_STAT_TRANS_DONE, &p2wi->status); ++ writel(P2WI_CTRL_TRANS_START, &p2wi->ctrl); ++ ++ for (i = 0xffffff; i != 0; i--) { ++ reg = readl(&p2wi->status); ++ if (reg & P2WI_STAT_TRANS_ERR) { ++ ret = -EIO; ++ break; ++ } ++ if (reg & P2WI_STAT_TRANS_DONE) ++ break; ++ } ++ ++ if (i == 0) ++ ret = -ETIME; ++ ++ writel(reg, &p2wi->status); /* Clear status bits */ ++ return ret; ++} +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/pinmux.c u-boot-sunxi/arch/arm/cpu/armv7/sunxi/pinmux.c +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/pinmux.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/pinmux.c 2014-04-29 14:29:40.206228511 +0200 +@@ -0,0 +1,61 @@ +/* + * (C) Copyright 2007-2011 + * Allwinner Technology Co., Ltd. + * Tom Cubie + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include @@ -1511,18 +1541,12 @@ index 0000000..56671f6 + +int sunxi_gpio_set_cfgpin(u32 pin, u32 val) +{ -+ u32 cfg; + u32 bank = GPIO_BANK(pin); + u32 index = GPIO_CFG_INDEX(pin); + u32 offset = GPIO_CFG_OFFSET(pin); -+ struct sunxi_gpio *pio = -+ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank]; ++ struct sunxi_gpio *pio = BANK_TO_GPIO(bank); + -+ cfg = readl(&pio->cfg[0] + index); -+ cfg &= ~(0xf << offset); -+ cfg |= val << offset; -+ -+ writel(cfg, &pio->cfg[0] + index); ++ clrsetbits_le32(&pio->cfg[0] + index, 0xf << offset, val << offset); + + return 0; +} @@ -1533,8 +1557,7 @@ index 0000000..56671f6 + u32 bank = GPIO_BANK(pin); + u32 index = GPIO_CFG_INDEX(pin); + u32 offset = GPIO_CFG_OFFSET(pin); -+ struct sunxi_gpio *pio = -+ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank]; ++ struct sunxi_gpio *pio = BANK_TO_GPIO(bank); + + cfg = readl(&pio->cfg[0] + index); + cfg >>= offset; @@ -1544,66 +1567,36 @@ index 0000000..56671f6 + +int sunxi_gpio_set_drv(u32 pin, u32 val) +{ -+ u32 drv; + u32 bank = GPIO_BANK(pin); + u32 index = GPIO_DRV_INDEX(pin); + u32 offset = GPIO_DRV_OFFSET(pin); -+ struct sunxi_gpio *pio = -+ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank]; ++ struct sunxi_gpio *pio = BANK_TO_GPIO(bank); + -+ drv = readl(&pio->drv[0] + index); -+ drv &= ~(0x3 << offset); -+ drv |= val << offset; -+ -+ writel(drv, &pio->drv[0] + index); ++ clrsetbits_le32(&pio->drv[0] + index, 0x3 << offset, val << offset); + + return 0; +} + +int sunxi_gpio_set_pull(u32 pin, u32 val) +{ -+ u32 pull; + u32 bank = GPIO_BANK(pin); + u32 index = GPIO_PULL_INDEX(pin); + u32 offset = GPIO_PULL_OFFSET(pin); -+ struct sunxi_gpio *pio = -+ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank]; ++ struct sunxi_gpio *pio = BANK_TO_GPIO(bank); + -+ pull = readl(&pio->pull[0] + index); -+ pull &= ~(0x3 << offset); -+ pull |= val << offset; -+ -+ writel(pull, &pio->pull[0] + index); ++ clrsetbits_le32(&pio->pull[0] + index, 0x3 << offset, val << offset); + + return 0; +} -diff --git a/arch/arm/cpu/armv7/sunxi/postclk_init.c b/arch/arm/cpu/armv7/sunxi/postclk_init.c -new file mode 100644 -index 0000000..b32ba9a ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/postclk_init.c -@@ -0,0 +1,36 @@ +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/postclk_init.c u-boot-sunxi/arch/arm/cpu/armv7/sunxi/postclk_init.c +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/postclk_init.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/postclk_init.c 2014-04-29 14:29:40.206228511 +0200 +@@ -0,0 +1,20 @@ +/* + * (C) Copyright 2013 + * Carl van Schaik + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include @@ -1619,12 +1612,49 @@ index 0000000..b32ba9a +#endif + return 0; +} -diff --git a/arch/arm/cpu/armv7/sunxi/secondary_init.S b/arch/arm/cpu/armv7/sunxi/secondary_init.S -new file mode 100644 -index 0000000..034acde ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/secondary_init.S -@@ -0,0 +1,48 @@ +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/prcm.c u-boot-sunxi/arch/arm/cpu/armv7/sunxi/prcm.c +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/prcm.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/prcm.c 2014-04-29 14:29:40.206228511 +0200 +@@ -0,0 +1,35 @@ ++/* ++ * Sunxi A31 Power Management Unit ++ * ++ * (C) Copyright 2013 Oliver Schinagl ++ * http://linux-sunxi.org ++ * ++ * Based on sun6i sources and earlier U-Boot Allwiner A10 SPL work ++ * ++ * (C) Copyright 2006-2013 ++ * Allwinner Technology Co., Ltd. ++ * Berg Xing ++ * Tom Cubie ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* APB0 clock gate and reset bit offsets are the same. */ ++void prcm_apb0_enable(u32 flags) ++{ ++ struct sunxi_prcm_reg *prcm = ++ (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE; ++ ++ /* open the clock for module */ ++ setbits_le32(&prcm->apb0_gate, flags); ++ ++ /* deassert reset for module */ ++ setbits_le32(&prcm->apb0_reset, flags); ++} +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/secondary_init.S u-boot-sunxi/arch/arm/cpu/armv7/sunxi/secondary_init.S +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/secondary_init.S 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/secondary_init.S 2014-04-29 14:29:40.206228511 +0200 +@@ -0,0 +1,31 @@ +/* + * A lowlevel_init function that sets up the stack to call a C function to + * perform further init. @@ -1632,25 +1662,8 @@ index 0000000..034acde + * (C) Copyright 2013 + * Carl van Schaik + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ -+ +#include +#include +#include @@ -1673,33 +1686,15 @@ index 0000000..034acde + bl secondary_start +ENDPROC(secondary_init) + -diff --git a/arch/arm/cpu/armv7/sunxi/smp.c b/arch/arm/cpu/armv7/sunxi/smp.c -new file mode 100644 -index 0000000..59717a2 ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/smp.c -@@ -0,0 +1,96 @@ +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/smp.c u-boot-sunxi/arch/arm/cpu/armv7/sunxi/smp.c +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/smp.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/smp.c 2014-04-29 14:29:40.206228511 +0200 +@@ -0,0 +1,80 @@ +/* + * (C) Copyright 2013 + * Carl van Schaik + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include @@ -1775,41 +1770,21 @@ index 0000000..59717a2 + printf("Secondary CPU%d power-on\n", i); + } +} -diff --git a/arch/arm/cpu/armv7/sunxi/start.c b/arch/arm/cpu/armv7/sunxi/start.c -new file mode 100644 -index 0000000..6b392fa ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/start.c +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/start.c u-boot-sunxi/arch/arm/cpu/armv7/sunxi/start.c +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/start.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/start.c 2014-04-29 14:29:40.206228511 +0200 @@ -0,0 +1 @@ +/* Intentionally empty. Only needed to get FEL SPL link line right */ -diff --git a/arch/arm/cpu/armv7/sunxi/timer.c b/arch/arm/cpu/armv7/sunxi/timer.c -new file mode 100644 -index 0000000..c69ed73 ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/timer.c -@@ -0,0 +1,120 @@ +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/timer.c u-boot-sunxi/arch/arm/cpu/armv7/sunxi/timer.c +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/timer.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/timer.c 2014-04-29 14:29:40.206228511 +0200 +@@ -0,0 +1,110 @@ +/* + * (C) Copyright 2007-2011 + * Allwinner Technology Co., Ltd. + * Tom Cubie + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include @@ -1834,18 +1809,26 @@ index 0000000..c69ed73 + +#define TIMER_NUM 0 /* we use timer 0 */ + -+static struct sunxi_timer *timer_base = -+ &((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->timer[TIMER_NUM]; -+ -+/* macro to read the 32 bit timer: since it decrements, we invert read value */ -+#define READ_TIMER() (~readl(&timer_base->val)) ++/* read the 32-bit timer */ ++static ulong read_timer(void) ++{ ++ struct sunxi_timer_reg *timers = ++ (struct sunxi_timer_reg *)SUNXI_TIMER_BASE; ++ struct sunxi_timer *timer = &timers->timer[TIMER_NUM]; ++ /* The hardware timer counts down, therefore we invert to ++ * produce an incrementing timer. */ ++ return ~readl(&timer->val); ++} + +/* init timer register */ +int timer_init(void) +{ -+ writel(TIMER_LOAD_VAL, &timer_base->inter); ++ struct sunxi_timer_reg *timers = ++ (struct sunxi_timer_reg *)SUNXI_TIMER_BASE; ++ struct sunxi_timer *timer = &timers->timer[TIMER_NUM]; ++ writel(TIMER_LOAD_VAL, &timer->inter); + writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, -+ &timer_base->ctl); ++ &timer->ctl); + + return 0; +} @@ -1859,7 +1842,7 @@ index 0000000..c69ed73 +ulong get_timer_masked(void) +{ + /* current tick value */ -+ ulong now = TICKS_TO_HZ(READ_TIMER()); ++ ulong now = TICKS_TO_HZ(read_timer()); + + if (now >= gd->arch.lastinc) /* normal (non rollover) */ + gd->arch.tbl += (now - gd->arch.lastinc); @@ -1877,10 +1860,10 @@ index 0000000..c69ed73 +void __udelay(unsigned long usec) +{ + long tmo = USEC_TO_COUNT(usec); -+ ulong now, last = READ_TIMER(); ++ ulong now, last = read_timer(); + + while (tmo > 0) { -+ now = READ_TIMER(); ++ now = read_timer(); + if (now > last) /* normal (non rollover) */ + tmo -= now - last; + else /* rollover */ @@ -1904,81 +1887,93 @@ index 0000000..c69ed73 + */ +ulong get_tbclk(void) +{ -+ ulong tbclk; -+ tbclk = CONFIG_SYS_HZ; -+ return tbclk; ++ return CONFIG_SYS_HZ; +} -diff --git a/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds b/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds -new file mode 100644 -index 0000000..cf02300 ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds -@@ -0,0 +1,59 @@ +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds u-boot-sunxi/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds 2014-04-29 14:29:40.206228511 +0200 +@@ -0,0 +1,77 @@ ++/* ++ * (C) Copyright 2013 ++ * Henrik Nordstrom ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(s_init) +SECTIONS +{ -+ . = 0x00002000; -+ . = ALIGN(4); -+ .text : -+ { -+ *(.text.s_init) -+ *(.text*) -+ } -+ . = ALIGN(4); -+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -+ . = ALIGN(4); -+ .data : { -+ *(.data*) -+ } -+ . = ALIGN(4); -+ . = .; -+ . = ALIGN(4); -+ .rel.dyn : { -+ __rel_dyn_start = .; -+ *(.rel*) -+ __rel_dyn_end = .; -+ } -+ .dynsym : { -+ __dynsym_start = .; -+ *(.dynsym) -+ } -+ . = ALIGN(4); -+ .note.gnu.build-id : -+ { -+ *(.note.gnu.build-id) -+ } -+ _end = .; -+ . = ALIGN(4096); -+ .mmutable : { -+ *(.mmutable) -+ } -+ .bss_start __rel_dyn_start (OVERLAY) : { -+ KEEP(*(.__bss_start)); -+ __bss_base = .; -+ } -+ .bss __bss_base (OVERLAY) : { -+ *(.bss*) -+ . = ALIGN(4); -+ __bss_limit = .; -+ } -+ .bss_end __bss_limit (OVERLAY) : { -+ KEEP(*(.__bss_end)); -+ } -+ /DISCARD/ : { *(.dynstr*) } -+ /DISCARD/ : { *(.dynamic*) } -+ /DISCARD/ : { *(.plt*) } -+ /DISCARD/ : { *(.interp*) } -+ /DISCARD/ : { *(.gnu*) } -+ /DISCARD/ : { *(.note*) } ++ . = 0x00002000; ++ ++ . = ALIGN(4); ++ .text : ++ { ++ *(.text.s_init) ++ *(.text*) ++ } ++ ++ . = ALIGN(4); ++ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } ++ ++ . = ALIGN(4); ++ .data : { ++ *(.data*) ++ } ++ ++ . = ALIGN(4); ++ . = .; ++ ++ . = ALIGN(4); ++ .rel.dyn : { ++ __rel_dyn_start = .; ++ *(.rel*) ++ __rel_dyn_end = .; ++ } ++ ++ .dynsym : { ++ __dynsym_start = .; ++ *(.dynsym) ++ } ++ ++ . = ALIGN(4); ++ .note.gnu.build-id : ++ { ++ *(.note.gnu.build-id) ++ } ++ _end = .; ++ ++ . = ALIGN(4096); ++ .mmutable : { ++ *(.mmutable) ++ } ++ ++ .bss_start __rel_dyn_start (OVERLAY) : { ++ KEEP(*(.__bss_start)); ++ __bss_base = .; ++ } ++ ++ .bss __bss_base (OVERLAY) : { ++ *(.bss*) ++ . = ALIGN(4); ++ __bss_limit = .; ++ } ++ ++ .bss_end __bss_limit (OVERLAY) : { ++ KEEP(*(.__bss_end)); ++ } ++ ++ /DISCARD/ : { *(.dynstr*) } ++ /DISCARD/ : { *(.dynamic*) } ++ /DISCARD/ : { *(.plt*) } ++ /DISCARD/ : { *(.interp*) } ++ /DISCARD/ : { *(.gnu*) } ++ /DISCARD/ : { *(.note*) } +} -diff --git a/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds -new file mode 100644 -index 0000000..2a3b497 ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds -@@ -0,0 +1,69 @@ +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds u-boot-sunxi/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds 2014-04-29 14:29:40.206228511 +0200 +@@ -0,0 +1,52 @@ +/* + * (C) Copyright 2012 + * Allwinner Technology Co., Ltd. @@ -1993,25 +1988,8 @@ index 0000000..2a3b497 + * Texas Instruments, + * Aneesh V + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ -+ +MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\ + LENGTH = CONFIG_SPL_MAX_SIZE } +MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \ @@ -2048,31 +2026,16 @@ index 0000000..2a3b497 + __bss_end = .; + } > .sdram +} -diff --git a/arch/arm/cpu/armv7/sunxi/watchdog.c b/arch/arm/cpu/armv7/sunxi/watchdog.c -new file mode 100644 -index 0000000..22245f8 ---- /dev/null -+++ b/arch/arm/cpu/armv7/sunxi/watchdog.c -@@ -0,0 +1,96 @@ +diff -purN u-boot-2014.04/arch/arm/cpu/armv7/sunxi/watchdog.c u-boot-sunxi/arch/arm/cpu/armv7/sunxi/watchdog.c +--- u-boot-2014.04/arch/arm/cpu/armv7/sunxi/watchdog.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/cpu/armv7/sunxi/watchdog.c 2014-04-29 14:29:40.206228511 +0200 +@@ -0,0 +1,83 @@ +/* + * Watchdog driver for the Allwinner sunxi platform. + * Copyright (C) 2013 Oliver Schinagl + * http://www.linux-sunxi.org/ + * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version 2 -+ * of the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, -+ * MA 02110-1301, USA. ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include @@ -2150,34 +2113,16 @@ index 0000000..22245f8 + watchdog_set(WDT_OFF); /* no timeout */ +#endif +} -diff --git a/arch/arm/include/asm/arch-sunxi/clock.h b/arch/arm/include/asm/arch-sunxi/clock.h -new file mode 100644 -index 0000000..b39de3a ---- /dev/null -+++ b/arch/arm/include/asm/arch-sunxi/clock.h -@@ -0,0 +1,242 @@ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/clock.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/clock.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/clock.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/clock.h 2014-04-29 14:29:40.236227797 +0200 +@@ -0,0 +1,33 @@ +/* + * (C) Copyright 2007-2011 + * Allwinner Technology Co., Ltd. + * Tom Cubie + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SUNXI_CLOCK_H @@ -2185,7 +2130,42 @@ index 0000000..b39de3a + +#include + ++#define CLK_GATE_OPEN 0x1 ++#define CLK_GATE_CLOSE 0x0 ++ +/* clock control module regs definition */ ++#if defined(CONFIG_SUN6I) || defined(CONFIG_SUN8I) ++#include ++#else ++#include ++#endif ++ ++#ifndef __ASSEMBLY__ ++int clock_init(void); ++int clock_twi_onoff(int port, int state); ++void clock_set_pll1(int hz); ++unsigned int clock_get_pll6(void); ++void clock_init_safe(void); ++void clock_init_uart(void); ++#endif ++ ++#endif /* _SUNXI_CLOCK_H */ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/clock_sun4i.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/clock_sun4i.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/clock_sun4i.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/clock_sun4i.h 2014-04-29 14:29:40.236227797 +0200 +@@ -0,0 +1,260 @@ ++/* ++ * sun4i, sun5i and sun7i clock register definitions ++ * ++ * (C) Copyright 2007-2011 ++ * Allwinner Technology Co., Ltd. ++ * Tom Cubie ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#ifndef _SUNXI_CLOCK_SUN4I_H ++#define _SUNXI_CLOCK_SUN4I_H + +struct sunxi_ccm_reg { + u32 pll1_cfg; /* 0x00 pll1 control */ @@ -2267,33 +2247,65 @@ index 0000000..b39de3a +}; + +/* apb1 bit field */ -+#define APB1_CLK_SRC_OSC24M 0 -+#define APB1_FACTOR_M 0 -+#define APB1_FACTOR_N 0 ++#define APB1_CLK_SRC_OSC24M (0x0 << 24) ++#define APB1_CLK_SRC_PLL6 (0x1 << 24) ++#define APB1_CLK_SRC_LOSC (0x2 << 24) ++#define APB1_CLK_SRC_MASK (0x3 << 24) ++#define APB1_CLK_RATE_N_1 (0x0 << 16) ++#define APB1_CLK_RATE_N_2 (0x1 << 16) ++#define APB1_CLK_RATE_N_4 (0x2 << 16) ++#define APB1_CLK_RATE_N_8 (0x3 << 16) ++#define APB1_CLK_RATE_N_MASK (3 << 16) ++#define APB1_CLK_RATE_M(m) (((m)-1) << 0) ++#define APB1_CLK_RATE_M_MASK (0x1f << 0) ++ ++/* apb1 gate field */ ++#define APB1_GATE_UART_SHIFT (16) ++#define APB1_GATE_UART_MASK (0xff << APB1_GATE_UART_SHIFT) ++#define APB1_GATE_TWI_SHIFT (0) ++#define APB1_GATE_TWI_MASK (0xf << APB1_GATE_TWI_SHIFT) + +/* clock divide */ -+#define CPU_CLK_SRC_OSC24M 1 -+#define CPU_CLK_SRC_PLL1 2 ++#define AXI_DIV_SHIFT (0) +#define AXI_DIV_1 0 +#define AXI_DIV_2 1 +#define AXI_DIV_3 2 +#define AXI_DIV_4 3 ++#define AHB_DIV_SHIFT (4) +#define AHB_DIV_1 0 +#define AHB_DIV_2 1 +#define AHB_DIV_4 2 +#define AHB_DIV_8 3 ++#define APB0_DIV_SHIFT (8) +#define APB0_DIV_1 0 +#define APB0_DIV_2 1 +#define APB0_DIV_4 2 +#define APB0_DIV_8 3 ++#define CPU_CLK_SRC_SHIFT (16) ++#define CPU_CLK_SRC_OSC24M 1 ++#define CPU_CLK_SRC_PLL1 2 ++ ++#define CCM_PLL1_CFG_ENABLE_SHIFT 31 ++#define CCM_PLL1_CFG_VCO_RST_SHIFT 30 ++#define CCM_PLL1_CFG_VCO_BIAS_SHIFT 26 ++#define CCM_PLL1_CFG_PLL4_EXCH_SHIFT 25 ++#define CCM_PLL1_CFG_BIAS_CUR_SHIFT 20 ++#define CCM_PLL1_CFG_DIVP_SHIFT 16 ++#define CCM_PLL1_CFG_LCK_TMR_SHIFT 13 ++#define CCM_PLL1_CFG_FACTOR_N_SHIFT 8 ++#define CCM_PLL1_CFG_FACTOR_K_SHIFT 4 ++#define CCM_PLL1_CFG_SIG_DELT_PAT_IN_SHIFT 3 ++#define CCM_PLL1_CFG_SIG_DELT_PAT_EN_SHIFT 2 ++#define CCM_PLL1_CFG_FACTOR_M_SHIFT 0 ++ ++#define PLL1_CFG_DEFAULT 0xa1005000 ++ ++#define PLL6_CFG_DEFAULT 0xa1009911 + +#ifdef CONFIG_SUN5I +#define AHB_CLK_SRC_AXI 0 +#endif + -+#define CLK_GATE_OPEN 0x1 -+#define CLK_GATE_CLOSE 0x0 -+ +/* nand clock */ +#define NAND_CLK_SRC_OSC24 0 +#define NAND_CLK_DIV_N 0 @@ -2322,6 +2334,7 @@ index 0000000..b39de3a +#define AHB_GATE_OFFSET_MMC2 10 +#define AHB_GATE_OFFSET_MMC1 9 +#define AHB_GATE_OFFSET_MMC0 8 ++#define AHB_GATE_OFFSET_MMC(n) (AHB_GATE_OFFSET_MMC0 + (n)) +#define AHB_GATE_OFFSET_BIST 7 +#define AHB_GATE_OFFSET_DMA 6 +#define AHB_GATE_OFFSET_SS 5 @@ -2365,6 +2378,11 @@ index 0000000..b39de3a +#define CCM_PLL5_CTRL_BYPASS (0x1 << 30) +#define CCM_PLL5_CTRL_EN (0x1 << 31) + ++#define CCM_PLL6_CTRL_N_SHIFT 8 ++#define CCM_PLL6_CTRL_N_MASK (0x1f << CCM_PLL6_CTRL_N_SHIFT) ++#define CCM_PLL6_CTRL_K_SHIFT 4 ++#define CCM_PLL6_CTRL_K_MASK (0x3 << CCM_PLL6_CTRL_K_SHIFT) ++ +#define CCM_GPS_CTRL_RESET (0x1 << 0) +#define CCM_GPS_CTRL_GATE (0x1 << 1) + @@ -2383,49 +2401,297 @@ index 0000000..b39de3a +#define CCM_MBUS_CTRL_CLK_SRC_PLL5 0x2 +#define CCM_MBUS_CTRL_GATE (0x1 << 31) + ++#define CCM_MMC_CTRL_OSCM24 (0x0 << 24) ++#define CCM_MMC_CTRL_PLL6 (0x1 << 24) ++#define CCM_MMC_CTRL_PLL5 (0x2 << 24) ++ ++#define CCM_MMC_CTRL_ENABLE (0x1 << 31) ++ +#define CCM_GMAC_CTRL_TX_CLK_SRC_MII 0x0 +#define CCM_GMAC_CTRL_TX_CLK_SRC_EXT_RGMII 0x1 +#define CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII 0x2 +#define CCM_GMAC_CTRL_GPIT_MII (0x0 << 2) +#define CCM_GMAC_CTRL_GPIT_RGMII (0x1 << 2) + ++#endif /* _SUNXI_CLOCK_SUN4I_H */ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/clock_sun6i.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/clock_sun6i.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/clock_sun6i.h 2014-04-29 14:29:40.236227797 +0200 +@@ -0,0 +1,205 @@ ++/* ++ * sun6i clock register definitions ++ * ++ * (C) Copyright 2007-2011 ++ * Allwinner Technology Co., Ltd. ++ * Tom Cubie ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#ifndef _SUNXI_CLOCK_SUN6I_H ++#define _SUNXI_CLOCK_SUN6I_H ++ ++struct sunxi_ccm_reg { ++ u32 pll1_cfg; /* 0x00 pll1 control */ ++ u32 reserved0; ++ u32 pll2_cfg; /* 0x08 pll2 control */ ++ u32 reserved1; ++ u32 pll3_cfg; /* 0x10 pll3 control */ ++ u32 reserved2; ++ u32 pll4_cfg; /* 0x18 pll4 control */ ++ u32 reserved3; ++ u32 pll5_cfg; /* 0x20 pll5 control */ ++ u32 reserved4; ++ u32 pll6_cfg; /* 0x28 pll6 control */ ++ u32 reserved5; ++ u32 pll7_cfg; /* 0x30 pll7 control */ ++ u32 reserved6; ++ u32 pll8_cfg; /* 0x38 pll8 control */ ++ u32 reserved7; ++ u32 mipi_pll_cfg; /* 0x40 MIPI pll control */ ++ u32 pll9_cfg; /* 0x44 pll9 control */ ++ u32 pll10_cfg; /* 0x48 pll10 control */ ++ u32 reserved8; ++ u32 cpu_axi_cfg; /* 0x50 CPU/AXI divide ratio */ ++ u32 ahb1_apb1_div; /* 0x54 AHB1/APB1 divide ratio */ ++ u32 apb2_div; /* 0x58 APB2 divide ratio */ ++ u32 axi_gate; /* 0x5c axi module clock gating */ ++ u32 ahb_gate0; /* 0x60 ahb module clock gating 0 */ ++ u32 ahb_gate1; /* 0x64 ahb module clock gating 1 */ ++ u32 apb1_gate; /* 0x68 apb1 module clock gating */ ++ u32 apb2_gate; /* 0x6c apb2 module clock gating */ ++ u32 reserved9[4]; ++ u32 nand0_clk_cfg; /* 0x80 nand0 clock control */ ++ u32 nand1_clk_cfg; /* 0x84 nand1 clock control */ ++ u32 sd0_clk_cfg; /* 0x88 sd0 clock control */ ++ u32 sd1_clk_cfg; /* 0x8c sd1 clock control */ ++ u32 sd2_clk_cfg; /* 0x90 sd2 clock control */ ++ u32 sd3_clk_cfg; /* 0x94 sd3 clock control */ ++ u32 ts_clk_cfg; /* 0x98 transport stream clock control */ ++ u32 ss_clk_cfg; /* 0x9c security system clock control */ ++ u32 spi0_clk_cfg; /* 0xa0 spi0 clock control */ ++ u32 spi1_clk_cfg; /* 0xa4 spi1 clock control */ ++ u32 spi2_clk_cfg; /* 0xa8 spi2 clock control */ ++ u32 spi3_clk_cfg; /* 0xac spi3 clock control */ ++ u32 i2s0_clk_cfg; /* 0xb0 I2S0 clock control*/ ++ u32 i2s1_clk_cfg; /* 0xb4 I2S1 clock control */ ++ u32 reserved10[2]; ++ u32 spdif_clk_cfg; /* 0xc0 SPDIF clock control */ ++ u32 reserved11[2]; ++ u32 usb_clk_cfg; /* 0xcc USB clock control */ ++ u32 gmac_clk_cfg; /* 0xd0 GMAC clock control */ ++ u32 reserved12[7]; ++ u32 mdfs_clk_cfg; /* 0xf0 MDFS clock control */ ++ u32 dram_clk_cfg; /* 0xf4 DRAM configuration clock control */ ++ u32 reserved13[2]; ++ u32 dram_clk_gate; /* 0x100 DRAM module gating */ ++ u32 be0_clk_cfg; /* 0x104 BE0 module clock */ ++ u32 be1_clk_cfg; /* 0x108 BE1 module clock */ ++ u32 fe0_clk_cfg; /* 0x10c FE0 module clock */ ++ u32 fe1_clk_cfg; /* 0x110 FE1 module clock */ ++ u32 mp_clk_cfg; /* 0x114 MP module clock */ ++ u32 lcd0_ch0_clk_cfg; /* 0x118 LCD0 CH0 module clock */ ++ u32 lcd1_ch0_clk_cfg; /* 0x11c LCD1 CH0 module clock */ ++ u32 reserved14[3]; ++ u32 lcd0_ch1_clk_cfg; /* 0x12c LCD0 CH1 module clock */ ++ u32 lcd1_ch1_clk_cfg; /* 0x130 LCD1 CH1 module clock */ ++ u32 csi0_clk_cfg; /* 0x134 CSI0 module clock */ ++ u32 csi1_clk_cfg; /* 0x138 CSI1 module clock */ ++ u32 ve_clk_cfg; /* 0x13c VE module clock */ ++ u32 adda_clk_cfg; /* 0x140 ADDA module clock */ ++ u32 avs_clk_cfg; /* 0x144 AVS module clock */ ++ u32 dmic_clk_cfg; /* 0x148 Digital Mic module clock*/ ++ u32 reserved15; ++ u32 hdmi_clk_cfg; /* 0x150 HDMI module clock */ ++ u32 ps_clk_cfg; /* 0x154 PS module clock */ ++ u32 mtc_clk_cfg; /* 0x158 MTC module clock */ ++ u32 mbus0_clk_cfg; /* 0x15c MBUS0 module clock */ ++ u32 mbus1_clk_cfg; /* 0x160 MBUS1 module clock */ ++ u32 reserved16; ++ u32 mipi_dsi_clk_cfg; /* 0x168 MIPI DSI clock control */ ++ u32 mipi_csi_clk_cfg; /* 0x16c MIPI CSI clock control */ ++ u32 reserved17[4]; ++ u32 iep_drc0_clk_cfg; /* 0x180 IEP DRC0 module clock */ ++ u32 iep_drc1_clk_cfg; /* 0x184 IEP DRC1 module clock */ ++ u32 iep_deu0_clk_cfg; /* 0x188 IEP DEU0 module clock */ ++ u32 iep_deu1_clk_cfg; /* 0x18c IEP DEU1 module clock */ ++ u32 reserved18[4]; ++ u32 gpu_core_clk_cfg; /* 0x1a0 GPU core clock config */ ++ u32 gpu_mem_clk_cfg; /* 0x1a4 GPU memory clock config */ ++ u32 gpu_hyd_clk_cfg; /* 0x1a0 GPU HYD clock config */ ++ u32 reserved19[21]; ++ u32 pll_lock; /* 0x200 PLL Lock Time */ ++ u32 pll1_lock; /* 0x204 PLL1 Lock Time */ ++ u32 reserved20[6]; ++ u32 pll1_bias_cfg; /* 0x220 PLL1 Bias config */ ++ u32 pll2_bias_cfg; /* 0x224 PLL2 Bias config */ ++ u32 pll3_bias_cfg; /* 0x228 PLL3 Bias config */ ++ u32 pll4_bias_cfg; /* 0x22c PLL4 Bias config */ ++ u32 pll5_bias_cfg; /* 0x230 PLL5 Bias config */ ++ u32 pll6_bias_cfg; /* 0x234 PLL6 Bias config */ ++ u32 pll7_bias_cfg; /* 0x238 PLL7 Bias config */ ++ u32 pll8_bias_cfg; /* 0x23c PLL8 Bias config */ ++ u32 mipi_bias_cfg; /* 0x240 MIPI Bias config */ ++ u32 pll9_bias_cfg; /* 0x244 PLL9 Bias config */ ++ u32 pll10_bias_cfg; /* 0x248 PLL10 Bias config */ ++ u32 reserved21[13]; ++ u32 pll1_pattern_cfg; /* 0x280 PLL1 Pattern config */ ++ u32 pll2_pattern_cfg; /* 0x284 PLL2 Pattern config */ ++ u32 pll3_pattern_cfg; /* 0x288 PLL3 Pattern config */ ++ u32 pll4_pattern_cfg; /* 0x28c PLL4 Pattern config */ ++ u32 pll5_pattern_cfg; /* 0x290 PLL5 Pattern config */ ++ u32 pll6_pattern_cfg; /* 0x294 PLL6 Pattern config */ ++ u32 pll7_pattern_cfg; /* 0x298 PLL7 Pattern config */ ++ u32 pll8_pattern_cfg; /* 0x29c PLL8 Pattern config */ ++ u32 mipi_pattern_cfg; /* 0x2a0 MIPI Pattern config */ ++ u32 pll9_pattern_cfg; /* 0x2a4 PLL9 Pattern config */ ++ u32 pll10_pattern_cfg; /* 0x2a8 PLL10 Pattern config */ ++ u32 reserved22[5]; ++ u32 ahb_reset0_cfg; /* 0x2c0 AHB1 Reset 0 config */ ++ u32 ahb_reset1_cfg; /* 0x2c4 AHB1 Reset 1 config */ ++ u32 ahb_reset2_cfg; /* 0x2c8 AHB1 Reset 2 config */ ++ u32 reserved23; ++ u32 apb1_reset_cfg; /* 0x2d0 APB1 Reset config */ ++ u32 reserved24; ++ u32 apb2_reset_cfg; /* 0x2d8 APB2 Reset config */ ++}; ++ ++/* apb2 bit field */ ++#define APB2_CLK_SRC_LOSC (0x0 << 24) ++#define APB2_CLK_SRC_OSC24M (0x1 << 24) ++#define APB2_CLK_SRC_PLL6 (0x2 << 24) ++#define APB2_CLK_SRC_MASK (0x3 << 24) ++#define APB2_CLK_RATE_N_1 (0x0 << 16) ++#define APB2_CLK_RATE_N_2 (0x1 << 16) ++#define APB2_CLK_RATE_N_4 (0x2 << 16) ++#define APB2_CLK_RATE_N_8 (0x3 << 16) ++#define APB2_CLK_RATE_N_MASK (3 << 16) ++#define APB2_CLK_RATE_M(m) (((m)-1) << 0) ++#define APB2_CLK_RATE_M_MASK (0x1f << 0) ++ ++/* apb2 gate field */ ++#define APB2_GATE_UART_SHIFT (16) ++#define APB2_GATE_UART_MASK (0xff << APB2_GATE_UART_SHIFT) ++#define APB2_GATE_TWI_SHIFT (0) ++#define APB2_GATE_TWI_MASK (0xf << APB2_GATE_TWI_SHIFT) ++ ++/* cpu_axi_cfg bits */ ++#define AXI_DIV_SHIFT 0 ++#define ATB_DIV_SHIFT 8 ++#define CPU_CLK_SRC_SHIFT 16 ++ ++#define AXI_DIV_1 0 ++#define AXI_DIV_2 1 ++#define AXI_DIV_3 2 ++#define AXI_DIV_4 3 ++#define ATB_DIV_1 0 ++#define ATB_DIV_2 1 ++#define ATB_DIV_4 2 ++#define CPU_CLK_SRC_OSC24M 1 ++#define CPU_CLK_SRC_PLL1 2 ++ ++#define PLL1_CFG_DEFAULT 0x90011b21 ++ ++#define PLL6_CFG_DEFAULT 0x90041811 ++ ++#define CCM_PLL6_CTRL_N_SHIFT 8 ++#define CCM_PLL6_CTRL_N_MASK (0x1f << CCM_PLL6_CTRL_N_SHIFT) ++#define CCM_PLL6_CTRL_K_SHIFT 4 ++#define CCM_PLL6_CTRL_K_MASK (0x3 << CCM_PLL6_CTRL_K_SHIFT) ++ ++#define AHB_GATE_OFFSET_MMC3 11 ++#define AHB_GATE_OFFSET_MMC2 10 ++#define AHB_GATE_OFFSET_MMC1 9 ++#define AHB_GATE_OFFSET_MMC0 8 ++#define AHB_GATE_OFFSET_MMC(n) (AHB_GATE_OFFSET_MMC0 + (n)) ++ ++#define CCM_MMC_CTRL_OSCM24 (0x0 << 24) ++#define CCM_MMC_CTRL_PLL6 (0x1 << 24) ++ ++#define CCM_MMC_CTRL_ENABLE (0x1 << 31) ++ ++#define AHB_RESET_OFFSET_MMC3 11 ++#define AHB_RESET_OFFSET_MMC2 10 ++#define AHB_RESET_OFFSET_MMC1 9 ++#define AHB_RESET_OFFSET_MMC0 8 ++#define AHB_RESET_OFFSET_MMC(n) (AHB_RESET_OFFSET_MMC0 + (n)) ++ ++/* apb2 reset */ ++#define APB2_RESET_UART_SHIFT (16) ++#define APB2_RESET_UART_MASK (0xff << APB2_RESET_UART_SHIFT) ++#define APB2_RESET_TWI_SHIFT (0) ++#define APB2_RESET_TWI_MASK (0xf << APB2_RESET_TWI_SHIFT) ++ ++#endif /* _SUNXI_CLOCK_SUN6I_H */ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/cpucfg.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/cpucfg.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/cpucfg.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/cpucfg.h 2014-04-29 14:29:40.236227797 +0200 +@@ -0,0 +1,55 @@ ++/* ++ * (C) Copyright 2013 ++ * Carl van Schaik ++ * ++ * CPU configuration registers for the sun7i (A20). ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#ifndef _SUNXI_CPUCFG_H_ ++#define _SUNXI_CPUCFG_H_ + +#ifndef __ASSEMBLY__ -+int clock_init(void); -+int clock_twi_onoff(int port, int state); -+void clock_set_pll1(int mhz); -+unsigned int clock_get_pll5(void); -+#endif + -+#endif /* _SUNXI_CLOCK_H */ -diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h b/arch/arm/include/asm/arch-sunxi/cpu.h -new file mode 100644 -index 0000000..17facc3 ---- /dev/null -+++ b/arch/arm/include/asm/arch-sunxi/cpu.h -@@ -0,0 +1,147 @@ ++struct sunxi_cpu_ctrl { ++ u32 reset_ctrl; ++ u32 cpu_ctrl; ++ u32 status; ++ u32 _res[13]; ++}; ++ ++#define CPU_RESET_SET 0 ++#define CPU_RESET_CLEAR 3 ++ ++#define CPU_STATUS_SMP (1 << 0) ++#define CPU_STATUS_WFE (1 << 1) ++#define CPU_STATUS_WFI (1 << 2) ++ ++struct sunxi_cpucfg { ++ u32 _res1[16]; /* 0x000 */ ++ struct sunxi_cpu_ctrl cpu[2]; /* 0x040 */ ++ u32 _res2[48]; /* 0x0c0 */ ++ u32 _res3; /* 0x180 */ ++ u32 general_ctrl; /* 0x184 */ ++ u32 _res4[2]; /* 0x188 */ ++ u32 event_input; /* 0x190 */ ++ u32 _res5[4]; /* 0x194 */ ++ u32 boot_addr; /* 0x1a4 - also known as PRIVATE_REG */ ++ u32 _res6[2]; /* 0x1a8 */ ++ u32 cpu1_power_clamp; /* 0x1b0 */ ++ u32 cpu1_power_off; /* 0x1b4 */ ++ u32 _res7[10]; /* 0x1b8 */ ++ u32 debug0_ctrl; /* 0x1e0 */ ++ u32 debug1_ctrl; /* 0x1e4 */ ++}; ++ ++#define GENERAL_CTRL_NO_L1_RESET_CPU(x) (1UL << (x)) ++#define GENERAL_CTRL_NO_L2_AUTO_RESET (1UL << 4) ++#define GENERAL_CTRL_L2_RESET_SET (0UL << 5) ++#define GENERAL_CTRL_L2_RESET_CLEAR (1UL << 5) ++#define GENERAL_CTRL_CFGSDISABLE (1UL << 8) ++ ++#endif /* __ASSEMBLY__ */ ++ ++#endif /* _SUNXI_CPUCFG_H_ */ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/cpu.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/cpu.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/cpu.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/cpu.h 2014-04-29 14:29:40.236227797 +0200 +@@ -0,0 +1,141 @@ +/* + * (C) Copyright 2007-2011 + * Allwinner Technology Co., Ltd. + * Tom Cubie + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SUNXI_CPU_H @@ -2517,6 +2783,11 @@ index 0000000..17facc3 +#define SUNXI_MALI400_BASE 0x01c40000 +#define SUNXI_GMAC_BASE 0x01c50000 + ++#define SUNXI_DRAM_COM_BASE 0x01c62000 ++#define SUNXI_DRAM_CTL_BASE 0x01c63000 ++#define SUNXI_DRAM_PHY_CH1_BASE 0x01c65000 ++#define SUNXI_DRAM_PHY_CH2_BASE 0x01c66000 ++ +/* module sram */ +#define SUNXI_SRAM_C_BASE 0x01d00000 + @@ -2527,6 +2798,11 @@ index 0000000..17facc3 +#define SUNXI_MP_BASE 0x01e80000 +#define SUNXI_AVG_BASE 0x01ea0000 + ++#define SUNXI_PRCM_BASE 0x01f01400 ++#define SUNXI_R_UART_BASE 0x01f02800 ++#define SUNXI_R_PIO_BASE 0x01f02c00 ++#define SUNXI_P2WI_BASE 0x01f03400 ++ +/* CoreSight Debug Module */ +#define SUNXI_CSDM_BASE 0x3f500000 + @@ -2547,93 +2823,14 @@ index 0000000..17facc3 +}; + +void sunxi_board_init(void); -+extern void sunxi_reset(void); ++void sunxi_reset(void); +#endif /* __ASSEMBLY__ */ + +#endif /* _CPU_H */ -diff --git a/arch/arm/include/asm/arch-sunxi/cpucfg.h b/arch/arm/include/asm/arch-sunxi/cpucfg.h -new file mode 100644 -index 0000000..acc2fcf ---- /dev/null -+++ b/arch/arm/include/asm/arch-sunxi/cpucfg.h -@@ -0,0 +1,71 @@ -+/* -+ * (C) Copyright 2013 -+ * Carl van Schaik -+ * -+ * CPU configuration registers for the sun7i (A20). -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#ifndef _SUNXI_CPUCFG_H_ -+#define _SUNXI_CPUCFG_H_ -+ -+#ifndef __ASSEMBLY__ -+ -+struct sunxi_cpu_ctrl { -+ u32 reset_ctrl; -+ u32 cpu_ctrl; -+ u32 status; -+ u32 _res[13]; -+}; -+ -+#define CPU_RESET_SET 0 -+#define CPU_RESET_CLEAR 3 -+ -+#define CPU_STATUS_SMP (1 << 0) -+#define CPU_STATUS_WFE (1 << 1) -+#define CPU_STATUS_WFI (1 << 2) -+ -+struct sunxi_cpucfg { -+ u32 _res1[16]; /* 0x000 */ -+ struct sunxi_cpu_ctrl cpu[2]; /* 0x040 */ -+ u32 _res2[48]; /* 0x0c0 */ -+ u32 _res3; /* 0x180 */ -+ u32 general_ctrl; /* 0x184 */ -+ u32 _res4[2]; /* 0x188 */ -+ u32 event_input; /* 0x190 */ -+ u32 _res5[4]; /* 0x194 */ -+ u32 boot_addr; /* 0x1a4 - also known as PRIVATE_REG */ -+ u32 _res6[2]; /* 0x1a8 */ -+ u32 cpu1_power_clamp; /* 0x1b0 */ -+ u32 cpu1_power_off; /* 0x1b4 */ -+ u32 _res7[10]; /* 0x1b8 */ -+ u32 debug0_ctrl; /* 0x1e0 */ -+ u32 debug1_ctrl; /* 0x1e4 */ -+}; -+ -+#define GENERAL_CTRL_NO_L1_RESET_CPU(x) (1UL << (x)) -+#define GENERAL_CTRL_NO_L2_AUTO_RESET (1UL << 4) -+#define GENERAL_CTRL_L2_RESET_SET (0UL << 5) -+#define GENERAL_CTRL_L2_RESET_CLEAR (1UL << 5) -+#define GENERAL_CTRL_CFGSDISABLE (1UL << 8) -+ -+#endif /* __ASSEMBLY__ */ -+ -+#endif /* _SUNXI_CPUCFG_H_ */ -diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h -new file mode 100644 -index 0000000..d2d18f0 ---- /dev/null -+++ b/arch/arm/include/asm/arch-sunxi/dram.h -@@ -0,0 +1,191 @@ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/dram.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/dram.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/dram.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/dram.h 2014-04-29 14:29:40.237227773 +0200 +@@ -0,0 +1,179 @@ +/* + * (C) Copyright 2007-2012 + * Allwinner Technology Co., Ltd. @@ -2642,23 +2839,7 @@ index 0000000..d2d18f0 + * + * Sunxi platform dram register definition. + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SUNXI_DRAM_H @@ -2786,6 +2967,10 @@ index 0000000..d2d18f0 + +#define DRAM_CSR_FAILED (0x1 << 20) + ++#define DRAM_DRR_TRFC(n) ((n) & 0xff) ++#define DRAM_DRR_TREFI(n) (((n) & 0xffff) << 8) ++#define DRAM_DRR_BURST(n) ((((n) - 1) & 0xf) << 24) ++ +#define DRAM_MCR_MODE_NORM(n) (((n) & 0x3) << 0) +#define DRAM_MCR_MODE_NORM_MASK DRAM_MCR_MOD_NORM(0x3) +#define DRAM_MCR_MODE_DQ_OUT(n) (((n) & 0x3) << 2) @@ -2825,12 +3010,10 @@ index 0000000..d2d18f0 +unsigned long dramc_init(struct dram_para *para); + +#endif /* _SUNXI_DRAM_H */ -diff --git a/arch/arm/include/asm/arch-sunxi/early_print.h b/arch/arm/include/asm/arch-sunxi/early_print.h -new file mode 100644 -index 0000000..cd89114 ---- /dev/null -+++ b/arch/arm/include/asm/arch-sunxi/early_print.h -@@ -0,0 +1,74 @@ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/early_print.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/early_print.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/early_print.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/early_print.h 2014-04-29 14:29:40.237227773 +0200 +@@ -0,0 +1,58 @@ +/* + * (C) Copyright 2007-2012 + * Allwinner Technology Co., Ltd. @@ -2838,23 +3021,7 @@ index 0000000..cd89114 + * + * Early uart print for debugging. + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SUNXI_EARLY_PRINT_H @@ -2905,40 +3072,23 @@ index 0000000..cd89114 +#endif /* __ASSEMBLY__ */ + +#endif /* _SUNXI_EARLY_PRINT_H */ -diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h -new file mode 100644 -index 0000000..79b4f21 ---- /dev/null -+++ b/arch/arm/include/asm/arch-sunxi/gpio.h -@@ -0,0 +1,179 @@ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/gpio.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/gpio.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/gpio.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/gpio.h 2014-04-29 14:29:40.237227773 +0200 +@@ -0,0 +1,174 @@ +/* + * (C) Copyright 2007-2012 + * Allwinner Technology Co., Ltd. + * Tom Cubie + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SUNXI_GPIO_H +#define _SUNXI_GPIO_H + +#include ++#include + +/* + * sunxi has 9 banks of gpio, they are: @@ -2956,6 +3106,15 @@ index 0000000..79b4f21 +#define SUNXI_GPIO_G 6 +#define SUNXI_GPIO_H 7 +#define SUNXI_GPIO_I 8 ++#define SUNXI_GPIO_BANKS 9 ++ ++/* ++ * sun6i has atleast 1 additional bank, note banks J K don't exist! ++ * PL0 - PL1 at the very least is known. ++ * ++ * Note this bank is at a different register offset! ++ */ ++#define SUNXI_GPIO_L 9 + +struct sunxi_gpio { + u32 cfg[4]; @@ -2973,11 +3132,15 @@ index 0000000..79b4f21 +}; + +struct sunxi_gpio_reg { -+ struct sunxi_gpio gpio_bank[9]; ++ struct sunxi_gpio gpio_bank[SUNXI_GPIO_BANKS]; + u8 res[0xbc]; + struct sunxi_gpio_int gpio_int; +}; + ++#define BANK_TO_GPIO(bank) (((bank) < SUNXI_GPIO_BANKS) ? \ ++ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank] : \ ++ (struct sunxi_gpio *)SUNXI_R_PIO_BASE) ++ +#define GPIO_BANK(pin) ((pin) >> 5) +#define GPIO_NUM(pin) ((pin) & 0x1f) + @@ -3000,6 +3163,7 @@ index 0000000..79b4f21 +#define SUNXI_GPIO_G_NR 32 +#define SUNXI_GPIO_H_NR 32 +#define SUNXI_GPIO_I_NR 32 ++#define SUNXI_GPIO_L_NR 32 + +#define SUNXI_GPIO_NEXT(__gpio) \ + ((__gpio##_START) + (__gpio##_NR) + 0) @@ -3014,6 +3178,7 @@ index 0000000..79b4f21 + SUNXI_GPIO_G_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_F), + SUNXI_GPIO_H_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_G), + SUNXI_GPIO_I_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_H), ++ SUNXI_GPIO_L_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_I), +}; + +/* SUNXI GPIO number definitions */ @@ -3026,25 +3191,16 @@ index 0000000..79b4f21 +#define SUNXI_GPG(_nr) (SUNXI_GPIO_G_START + (_nr)) +#define SUNXI_GPH(_nr) (SUNXI_GPIO_H_START + (_nr)) +#define SUNXI_GPI(_nr) (SUNXI_GPIO_I_START + (_nr)) ++#define SUNXI_GPL(_nr) (SUNXI_GPIO_L_START + (_nr)) + +/* GPIO pin function config */ +#define SUNXI_GPIO_INPUT 0 +#define SUNXI_GPIO_OUTPUT 1 + -+#define SUNXI_GPA0_ERXD3 2 -+#define SUNXI_GPA0_SPI1_CS0 3 -+#define SUNXI_GPA0_UART2_RTS 4 ++#define SUNXI_GPA0_EMAC 2 ++#define SUN7I_GPA0_GMAC 5 + -+#define SUNXI_GPA1_ERXD2 2 -+#define SUNXI_GPA1_SPI1_CLK 3 -+#define SUNXI_GPA1_UART2_CTS 4 -+ -+#define SUNXI_GPA2_ERXD1 2 -+#define SUNXI_GPA2_SPI1_MOSI 3 -+#define SUNXI_GPA2_UART2_TX 4 -+ -+#define SUNXI_GPA10_UART1_TX 4 -+#define SUNXI_GPA11_UART1_RX 4 ++#define SUNXI_GPB0_TWI0 2 + +#define SUN4I_GPB22_UART0_TX 2 +#define SUN4I_GPB23_UART0_RX 2 @@ -3052,50 +3208,52 @@ index 0000000..79b4f21 +#define SUN5I_GPB19_UART0_TX 2 +#define SUN5I_GPB20_UART0_RX 2 + -+#define SUN5I_GPG3_UART0_TX 4 -+#define SUN5I_GPG4_UART0_RX 4 ++#define SUN5I_GPG3_UART1_TX 4 ++#define SUN5I_GPG4_UART1_RX 4 + -+#define SUNXI_GPC2_NCLE 2 -+#define SUNXI_GPC2_SPI0_CLK 3 ++#define SUNXI_GPC6_SDC2 3 + -+#define SUNXI_GPC6_NRB0 2 -+#define SUNXI_GPC6_SDC2_CMD 3 ++#define SUNXI_GPF0_SDC0 2 + -+#define SUNXI_GPC7_NRB1 2 -+#define SUNXI_GPC7_SDC2_CLK 3 ++#define SUNXI_GPF2_SDC0 2 + -+#define SUNXI_GPC8_NDQ0 2 -+#define SUNXI_GPC8_SDC2_D0 3 -+ -+#define SUNXI_GPC9_NDQ1 2 -+#define SUNXI_GPC9_SDC2_D1 3 -+ -+#define SUNXI_GPC10_NDQ2 2 -+#define SUNXI_GPC10_SDC2_D2 3 -+ -+#define SUNXI_GPC11_NDQ3 2 -+#define SUNXI_GPC11_SDC2_D3 3 -+ -+#define SUNXI_GPF2_SDC0_CLK 2 ++#ifdef CONFIG_SUN8I ++#define SUNXI_GPF2_UART0_TX 3 ++#define SUNXI_GPF4_UART0_RX 3 ++#else +#define SUNXI_GPF2_UART0_TX 4 -+ -+#define SUNXI_GPF4_SDC0_D3 2 +#define SUNXI_GPF4_UART0_RX 4 ++#endif ++ ++#define SUN4I_GPG0_SDC1 4 ++ ++#define SUN4I_GPH22_SDC1 5 ++ ++#define SUN4I_GPI4_SDC3 2 ++ ++/* GPIO pin pull-up/down config */ ++#define SUNXI_GPIO_PULL_DISABLE 0 ++#define SUNXI_GPIO_PULL_UP 1 ++#define SUNXI_GPIO_PULL_DOWN 2 ++ ++#define SUNXI_GPL0_R_P2WI_SCK 3 ++#define SUNXI_GPL1_R_P2WI_SDA 3 ++ ++#define SUN8I_GPL2_R_UART_TX 2 ++#define SUN8I_GPL3_R_UART_RX 2 + +int sunxi_gpio_set_cfgpin(u32 pin, u32 val); +int sunxi_gpio_get_cfgpin(u32 pin); +int sunxi_gpio_set_drv(u32 pin, u32 val); +int sunxi_gpio_set_pull(u32 pin, u32 val); -+int name_to_gpio(const char *name); -+#define name_to_gpio name_to_gpio ++int sunxi_name_to_gpio(const char *name); ++#define name_to_gpio(name) sunxi_name_to_gpio(name) + +#endif /* _SUNXI_GPIO_H */ -diff --git a/arch/arm/include/asm/arch-sunxi/i2c.h b/arch/arm/include/asm/arch-sunxi/i2c.h -new file mode 100644 -index 0000000..b1d55f5 ---- /dev/null -+++ b/arch/arm/include/asm/arch-sunxi/i2c.h -@@ -0,0 +1,185 @@ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/i2c.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/i2c.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/i2c.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/i2c.h 2014-04-29 14:29:40.237227773 +0200 +@@ -0,0 +1,169 @@ +/* + * (C) Copyright 2012 Henrik Nordstrom + * @@ -3105,23 +3263,7 @@ index 0000000..b1d55f5 + * Tom Cubie + * Victor Wei + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef _SUNXI_I2C_H_ +#define _SUNXI_I2C_H_ @@ -3281,71 +3423,10 @@ index 0000000..b1d55f5 +#define TWI_STAT_IDLE 0xf8 + +#endif -diff --git a/arch/arm/include/asm/arch-sunxi/key.h b/arch/arm/include/asm/arch-sunxi/key.h -new file mode 100644 -index 0000000..f717787 ---- /dev/null -+++ b/arch/arm/include/asm/arch-sunxi/key.h -@@ -0,0 +1,53 @@ -+/* -+ * (C) Copyright 2007-2011 -+ * Allwinner Technology Co., Ltd. -+ * Tom Cubie -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#ifndef _SUNXI_KEY_H -+#define _SUNXI_KEY_H -+ -+#include -+ -+struct sunxi_lradc { -+ u32 ctrl; /* lradc control */ -+ u32 intc; /* interrupt control */ -+ u32 ints; /* interrupt status */ -+ u32 data0; /* lradc 0 data */ -+ u32 data1; /* lradc 1 data */ -+}; -+ -+#define LRADC_EN 0x1 /* LRADC enable */ -+#define LRADC_SAMPLE_RATE 0x2 /* 32.25 Hz */ -+#define LEVELB_VOL 0x2 /* 0x33(~1.6v) */ -+#define LRADC_HOLD_EN 0x1 /* sample hold enable */ -+#define KEY_MODE_SELECT 0x0 /* normal mode */ -+ -+#define ADC0_DATA_PENDING (0x1 << 0) /* adc0 has data */ -+#define ADC0_KEYDOWN_PENDING (0x1 << 1) /* key down */ -+#define ADC0_HOLDKEY_PENDING (0x1 << 2) /* key hold */ -+#define ADC0_ALRDY_HOLD_PENDING (0x1 << 3) /* key already hold */ -+#define ADC0_KEYUP_PENDING (0x1 << 4) /* key up */ -+ -+int sunxi_key_init(void); -+u32 sunxi_read_key(void); -+ -+#endif -diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h b/arch/arm/include/asm/arch-sunxi/mmc.h -new file mode 100644 -index 0000000..639a7fc ---- /dev/null -+++ b/arch/arm/include/asm/arch-sunxi/mmc.h -@@ -0,0 +1,66 @@ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/mmc.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/mmc.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/mmc.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/mmc.h 2014-04-29 14:29:40.237227773 +0200 +@@ -0,0 +1,124 @@ +/* + * (C) Copyright 2007-2011 + * Allwinner Technology Co., Ltd. @@ -3353,23 +3434,7 @@ index 0000000..639a7fc + * + * MMC register definition for allwinner sunxi platform. + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SUNXI_MMC_H @@ -3378,69 +3443,513 @@ index 0000000..639a7fc +#include + +struct sunxi_mmc { -+ u32 gctrl; /* (0x00) SMC Global Control Register */ -+ u32 clkcr; /* (0x04) SMC Clock Control Register */ -+ u32 timeout; /* (0x08) SMC Time Out Register */ -+ u32 width; /* (0x0c) SMC Bus Width Register */ -+ u32 blksz; /* (0x10) SMC Block Size Register */ -+ u32 bytecnt; /* (0x14) SMC Byte Count Register */ -+ u32 cmd; /* (0x18) SMC Command Register */ -+ u32 arg; /* (0x1c) SMC Argument Register */ -+ u32 resp0; /* (0x20) SMC Response Register 0 */ -+ u32 resp1; /* (0x24) SMC Response Register 1 */ -+ u32 resp2; /* (0x28) SMC Response Register 2 */ -+ u32 resp3; /* (0x2c) SMC Response Register 3 */ -+ u32 imask; /* (0x30) SMC Interrupt Mask Register */ -+ u32 mint; /* (0x34) SMC Masked Interrupt Status Reg */ -+ u32 rint; /* (0x38) SMC Raw Interrupt Status Register */ -+ u32 status; /* (0x3c) SMC Status Register */ -+ u32 ftrglevel; /* (0x40) SMC FIFO Threshold Watermark Reg */ -+ u32 funcsel; /* (0x44) SMC Function Select Register */ -+ u32 cbcr; /* (0x48) SMC CIU Byte Count Register */ -+ u32 bbcr; /* (0x4c) SMC BIU Byte Count Register */ -+ u32 dbgc; /* (0x50) SMC Debug Enable Register */ -+ u32 res0[11]; /* (0x54~0x7c) */ -+ u32 dmac; /* (0x80) SMC IDMAC Control Register */ -+ u32 dlba; /* (0x84) SMC IDMAC Descr List Base Addr Reg */ -+ u32 idst; /* (0x88) SMC IDMAC Status Register */ -+ u32 idie; /* (0x8c) SMC IDMAC Interrupt Enable Register */ -+ u32 chda; /* (0x90) */ -+ u32 cbda; /* (0x94) */ -+ u32 res1[26]; /* (0x98~0xff) */ -+ u32 fifo; /* (0x100) SMC FIFO Access Address */ ++ u32 gctrl; /* 0x00 global control */ ++ u32 clkcr; /* 0x04 clock control */ ++ u32 timeout; /* 0x08 time out */ ++ u32 width; /* 0x0c bus width */ ++ u32 blksz; /* 0x10 block size */ ++ u32 bytecnt; /* 0x14 byte count */ ++ u32 cmd; /* 0x18 command */ ++ u32 arg; /* 0x1c argument */ ++ u32 resp0; /* 0x20 response 0 */ ++ u32 resp1; /* 0x24 response 1 */ ++ u32 resp2; /* 0x28 response 2 */ ++ u32 resp3; /* 0x2c response 3 */ ++ u32 imask; /* 0x30 interrupt mask */ ++ u32 mint; /* 0x34 masked interrupt status */ ++ u32 rint; /* 0x38 raw interrupt status */ ++ u32 status; /* 0x3c status */ ++ u32 ftrglevel; /* 0x40 FIFO threshold watermark*/ ++ u32 funcsel; /* 0x44 function select */ ++ u32 cbcr; /* 0x48 CIU byte count */ ++ u32 bbcr; /* 0x4c BIU byte count */ ++ u32 dbgc; /* 0x50 debug enable */ ++ u32 res0[11]; ++ u32 dmac; /* 0x80 internal DMA control */ ++ u32 dlba; /* 0x84 internal DMA descr list base address */ ++ u32 idst; /* 0x88 internal DMA status */ ++ u32 idie; /* 0x8c internal DMA interrupt enable */ ++ u32 chda; /* 0x90 */ ++ u32 cbda; /* 0x94 */ ++ u32 res1[26]; ++ u32 fifo; /* 0x100 FIFO access address */ +}; + ++#define SUNXI_MMC_CLK_POWERSAVE (0x1 << 17) ++#define SUNXI_MMC_CLK_ENABLE (0x1 << 16) ++#define SUNXI_MMC_CLK_DIVIDER_MASK (0xff) ++ ++#define SUNXI_MMC_GCTRL_SOFT_RESET (0x1 << 0) ++#define SUNXI_MMC_GCTRL_FIFO_RESET (0x1 << 1) ++#define SUNXI_MMC_GCTRL_DMA_RESET (0x1 << 2) ++#define SUNXI_MMC_GCTRL_RESET (SUNXI_MMC_GCTRL_SOFT_RESET|\ ++ SUNXI_MMC_GCTRL_FIFO_RESET|\ ++ SUNXI_MMC_GCTRL_DMA_RESET) ++#define SUNXI_MMC_GCTRL_DMA_ENABLE (0x1 << 5) ++#define SUNXI_MMC_GCTRL_ACCESS_BY_AHB (0x1 << 31) ++ ++#define SUNXI_MMC_CMD_RESP_EXPIRE (0x1 << 6) ++#define SUNXI_MMC_CMD_LONG_RESPONSE (0x1 << 7) ++#define SUNXI_MMC_CMD_CHK_RESPONSE_CRC (0x1 << 8) ++#define SUNXI_MMC_CMD_DATA_EXPIRE (0x1 << 9) ++#define SUNXI_MMC_CMD_WRITE (0x1 << 10) ++#define SUNXI_MMC_CMD_AUTO_STOP (0x1 << 12) ++#define SUNXI_MMC_CMD_WAIT_PRE_OVER (0x1 << 13) ++#define SUNXI_MMC_CMD_SEND_INIT_SEQ (0x1 << 15) ++#define SUNXI_MMC_CMD_UPCLK_ONLY (0x1 << 21) ++#define SUNXI_MMC_CMD_START (0x1 << 31) ++ ++#define SUNXI_MMC_RINT_RESP_ERROR (0x1 << 1) ++#define SUNXI_MMC_RINT_COMMAND_DONE (0x1 << 2) ++#define SUNXI_MMC_RINT_DATA_OVER (0x1 << 3) ++#define SUNXI_MMC_RINT_TX_DATA_REQUEST (0x1 << 4) ++#define SUNXI_MMC_RINT_RX_DATA_REQUEST (0x1 << 5) ++#define SUNXI_MMC_RINT_RESP_CRC_ERROR (0x1 << 6) ++#define SUNXI_MMC_RINT_DATA_CRC_ERROR (0x1 << 7) ++#define SUNXI_MMC_RINT_RESP_TIMEOUT (0x1 << 8) ++#define SUNXI_MMC_RINT_DATA_TIMEOUT (0x1 << 9) ++#define SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE (0x1 << 10) ++#define SUNXI_MMC_RINT_FIFO_RUN_ERROR (0x1 << 11) ++#define SUNXI_MMC_RINT_HARD_WARE_LOCKED (0x1 << 12) ++#define SUNXI_MMC_RINT_START_BIT_ERROR (0x1 << 13) ++#define SUNXI_MMC_RINT_AUTO_COMMAND_DONE (0x1 << 14) ++#define SUNXI_MMC_RINT_END_BIT_ERROR (0x1 << 15) ++#define SUNXI_MMC_RINT_SDIO_INTERRUPT (0x1 << 16) ++#define SUNXI_MMC_RINT_CARD_INSERT (0x1 << 30) ++#define SUNXI_MMC_RINT_CARD_REMOVE (0x1 << 31) ++#define SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT \ ++ (SUNXI_MMC_RINT_RESP_ERROR | \ ++ SUNXI_MMC_RINT_RESP_CRC_ERROR | \ ++ SUNXI_MMC_RINT_DATA_CRC_ERROR | \ ++ SUNXI_MMC_RINT_RESP_TIMEOUT | \ ++ SUNXI_MMC_RINT_DATA_TIMEOUT | \ ++ SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE | \ ++ SUNXI_MMC_RINT_FIFO_RUN_ERROR | \ ++ SUNXI_MMC_RINT_HARD_WARE_LOCKED | \ ++ SUNXI_MMC_RINT_START_BIT_ERROR | \ ++ SUNXI_MMC_RINT_END_BIT_ERROR) /* 0xbfc2 */ ++#define SUNXI_MMC_RINT_INTERRUPT_DONE_BIT \ ++ (SUNXI_MMC_RINT_AUTO_COMMAND_DONE | \ ++ SUNXI_MMC_RINT_DATA_OVER | \ ++ SUNXI_MMC_RINT_COMMAND_DONE | \ ++ SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE) ++ ++#define SUNXI_MMC_STATUS_RXWL_FLAG (0x1 << 0) ++#define SUNXI_MMC_STATUS_TXWL_FLAG (0x1 << 1) ++#define SUNXI_MMC_STATUS_FIFO_EMPTY (0x1 << 2) ++#define SUNXI_MMC_STATUS_FIFO_FULL (0x1 << 3) ++#define SUNXI_MMC_STATUS_CARD_PRESENT (0x1 << 8) ++#define SUNXI_MMC_STATUS_CARD_DATA_BUSY (0x1 << 9) ++#define SUNXI_MMC_STATUS_DATA_FSM_BUSY (0x1 << 10) ++ ++#define SUNXI_MMC_IDMAC_RESET (0x1 << 0) ++#define SUNXI_MMC_IDMAC_FIXBURST (0x1 << 1) ++#define SUNXI_MMC_IDMAC_ENABLE (0x1 << 7) ++ ++#define SUNXI_MMC_IDIE_TXIRQ (0x1 << 0) ++#define SUNXI_MMC_IDIE_RXIRQ (0x1 << 1) ++ +int sunxi_mmc_init(int sdc_no); +#endif /* _SUNXI_MMC_H */ -diff --git a/arch/arm/include/asm/arch-sunxi/smp.h b/arch/arm/include/asm/arch-sunxi/smp.h -new file mode 100644 -index 0000000..b7526e7 ---- /dev/null -+++ b/arch/arm/include/asm/arch-sunxi/smp.h -@@ -0,0 +1,38 @@ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/p2wi.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/p2wi.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/p2wi.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/p2wi.h 2014-04-29 14:29:40.237227773 +0200 +@@ -0,0 +1,142 @@ ++/* ++ * Sunxi platform Push-Push i2c register definition. ++ * ++ * (c) Copyright 2013 Oliver Schinagl ++ * http://linux-sunxi.org ++ * ++ * (c)Copyright 2006-2013 ++ * Allwinner Technology Co., Ltd. ++ * Berg Xing ++ * Tom Cubie ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#ifndef _SUNXI_P2WI_H ++#define _SUNXI_P2WI_H ++ ++#include ++ ++#define P2WI_CTRL_RESET (0x1 << 0) ++#define P2WI_CTRL_IRQ_EN (0x1 << 1) ++#define P2WI_CTRL_TRANS_ABORT (0x1 << 6) ++#define P2WI_CTRL_TRANS_START (0x1 << 7) ++ ++#define __P2WI_CC_CLK(n) (((n) & 0xff) << 0) ++#define P2WI_CC_CLK_MASK __P2WI_CC_CLK_DIV(0xff) ++#define __P2WI_CC_CLK_DIV(n) (((n) >> 1) - 1) ++#define P2WI_CC_CLK_DIV(n) \ ++ __P2WI_CC_CLK(__P2WI_CC_CLK_DIV(n)) ++#define P2WI_CC_SDA_OUT_DELAY(n) (((n) & 0x7) << 8) ++#define P2WI_CC_SDA_OUT_DELAY_MASK P2WI_CC_SDA_OUT_DELAY(0x7) ++ ++#define P2WI_IRQ_TRANS_DONE (0x1 << 0) ++#define P2WI_IRQ_TRANS_ERR (0x1 << 1) ++#define P2WI_IRQ_LOAD_BUSY (0x1 << 2) ++ ++#define P2WI_STAT_TRANS_DONE (0x1 << 0) ++#define P2WI_STAT_TRANS_ERR (0x1 << 1) ++#define P2WI_STAT_LOAD_BUSY (0x1 << 2) ++#define __P2WI_STAT_TRANS_ERR(n) (((n) & 0xff) << 8) ++#define P2WI_STAT_TRANS_ERR_MASK __P2WI_STAT_TRANS_ERR_ID(0xff) ++#define __P2WI_STAT_TRANS_ERR_BYTE_1 0x01 ++#define __P2WI_STAT_TRANS_ERR_BYTE_2 0x02 ++#define __P2WI_STAT_TRANS_ERR_BYTE_3 0x04 ++#define __P2WI_STAT_TRANS_ERR_BYTE_4 0x08 ++#define __P2WI_STAT_TRANS_ERR_BYTE_5 0x10 ++#define __P2WI_STAT_TRANS_ERR_BYTE_6 0x20 ++#define __P2WI_STAT_TRANS_ERR_BYTE_7 0x40 ++#define __P2WI_STAT_TRANS_ERR_BYTE_8 0x80 ++#define P2WI_STAT_TRANS_ERR_BYTE_1 \ ++ __P2WI_STAT_TRANS_ERR(__P2WI_STAT_TRANS_ERR_BYTE_1) ++#define P2WI_STAT_TRANS_ERR_BYTE_2 \ ++ __P2WI_STAT_TRANS_ERR(__P2WI_STAT_TRANS_ERR_BYTE_2) ++#define P2WI_STAT_TRANS_ERR_BYTE_3 \ ++ __P2WI_STAT_TRANS_ERR(__P2WI_STAT_TRANS_ERR_BYTE_3) ++#define P2WI_STAT_TRANS_ERR_BYTE_4 \ ++ __P2WI_STAT_TRANS_ERR(__P2WI_STAT_TRANS_ERR_BYTE_4) ++#define P2WI_STAT_TRANS_ERR_BYTE_5 \ ++ __P2WI_STAT_TRANS_ERR(__P2WI_STAT_TRANS_ERR_BYTE_5) ++#define P2WI_STAT_TRANS_ERR_BYTE_6 \ ++ __P2WI_STAT_TRANS_ERR(__P2WI_STAT_TRANS_ERR_BYTE_6) ++#define P2WI_STAT_TRANS_ERR_BYTE_7 \ ++ __P2WI_STAT_TRANS_ERR(__P2WI_STAT_TRANS_ERR_BYTE_7) ++#define P2WI_STAT_TRANS_ERR_BYTE_8 \ ++ __P2WI_STAT_TRANS_ERR(__P2WI_STAT_TRANS_ERR_BYTE_8) ++ ++#define P2WI_DATADDR_BYTE_1(n) (((n) & 0xff) << 0) ++#define P2WI_DATADDR_BYTE_1_MASK P2WI_DATADDR_BYTE_1(0xff) ++#define P2WI_DATADDR_BYTE_2(n) (((n) & 0xff) << 8) ++#define P2WI_DATADDR_BYTE_2_MASK P2WI_DATADDR_BYTE_2(0xff) ++#define P2WI_DATADDR_BYTE_3(n) (((n) & 0xff) << 16) ++#define P2WI_DATADDR_BYTE_3_MASK P2WI_DATADDR_BYTE_3(0xff) ++#define P2WI_DATADDR_BYTE_4(n) (((n) & 0xff) << 24) ++#define P2WI_DATADDR_BYTE_4_MASK P2WI_DATADDR_BYTE_4(0xff) ++#define P2WI_DATADDR_BYTE_5(n) (((n) & 0xff) << 0) ++#define P2WI_DATADDR_BYTE_5_MASK P2WI_DATADDR_BYTE_5(0xff) ++#define P2WI_DATADDR_BYTE_6(n) (((n) & 0xff) << 8) ++#define P2WI_DATADDR_BYTE_6_MASK P2WI_DATADDR_BYTE_6(0xff) ++#define P2WI_DATADDR_BYTE_7(n) (((n) & 0xff) << 16) ++#define P2WI_DATADDR_BYTE_7_MASK P2WI_DATADDR_BYTE_7(0xff) ++#define P2WI_DATADDR_BYTE_8(n) (((n) & 0xff) << 24) ++#define P2WI_DATADDR_BYTE_8_MASK P2WI_DATADDR_BYTE_8(0xff) ++ ++#define __P2WI_DATA_NUM_BYTES(n) (((n) & 0x7) << 0) ++#define P2WI_DATA_NUM_BYTES_MASK __P2WI_DATA_NUM_BYTES(0x7) ++#define P2WI_DATA_NUM_BYTES(n) __P2WI_DATA_NUM_BYTES((n) - 1) ++#define P2WI_DATA_NUM_BYTES_READ (0x1 << 4) ++ ++#define P2WI_DATA_BYTE_1(n) (((n) & 0xff) << 0) ++#define P2WI_DATA_BYTE_1_MASK P2WI_DATA_BYTE_1(0xff) ++#define P2WI_DATA_BYTE_2(n) (((n) & 0xff) << 8) ++#define P2WI_DATA_BYTE_2_MASK P2WI_DATA_BYTE_2(0xff) ++#define P2WI_DATA_BYTE_3(n) (((n) & 0xff) << 16) ++#define P2WI_DATA_BYTE_3_MASK P2WI_DATA_BYTE_3(0xff) ++#define P2WI_DATA_BYTE_4(n) (((n) & 0xff) << 24) ++#define P2WI_DATA_BYTE_4_MASK P2WI_DATA_BYTE_4(0xff) ++#define P2WI_DATA_BYTE_5(n) (((n) & 0xff) << 0) ++#define P2WI_DATA_BYTE_5_MASK P2WI_DATA_BYTE_5(0xff) ++#define P2WI_DATA_BYTE_6(n) (((n) & 0xff) << 8) ++#define P2WI_DATA_BYTE_6_MASK P2WI_DATA_BYTE_6(0xff) ++#define P2WI_DATA_BYTE_7(n) (((n) & 0xff) << 16) ++#define P2WI_DATA_BYTE_7_MASK P2WI_DATA_BYTE_7(0xff) ++#define P2WI_DATA_BYTE_8(n) (((n) & 0xff) << 24) ++#define P2WI_DATA_BYTE_8_MASK P2WI_DATA_BYTE_8(0xff) ++ ++#define P2WI_LINECTRL_SDA_CTRL_EN (0x1 << 0) ++#define P2WI_LINECTRL_SDA_OUT_HIGH (0x1 << 1) ++#define P2WI_LINECTRL_SCL_CTRL_EN (0x1 << 2) ++#define P2WI_LINECTRL_SCL_OUT_HIGH (0x1 << 3) ++#define P2WI_LINECTRL_SDA_STATE_HIGH (0x1 << 4) ++#define P2WI_LINECTRL_SCL_STATE_HIGH (0x1 << 5) ++ ++#define P2WI_PM_DEV_ADDR(n) (((n) & 0xff) << 0) ++#define P2WI_PM_DEV_ADDR_MASK P2WI_PM_DEV_ADDR(0xff) ++#define P2WI_PM_CTRL_ADDR(n) (((n) & 0xff) << 8) ++#define P2WI_PM_CTRL_ADDR_MASK P2WI_PM_CTRL_ADDR(0xff) ++#define P2WI_PM_INIT_DATA(n) (((n) & 0xff) << 16) ++#define P2WI_PM_INIT_DATA_MASK P2WI_PM_INIT_DATA(0xff) ++#define P2WI_PM_INIT_SEND (0x1 << 31) ++ ++#ifndef __ASSEMBLY__ ++struct sunxi_p2wi_reg { ++ u32 ctrl; /* 0x00 control */ ++ u32 cc; /* 0x04 clock control */ ++ u32 irq; /* 0x08 interrupt */ ++ u32 status; /* 0x0c status */ ++ u32 dataddr0; /* 0x10 data address 0 */ ++ u32 dataddr1; /* 0x14 data address 1 */ ++ u32 numbytes; /* 0x18 num bytes */ ++ u32 data0; /* 0x1c data buffer 0 */ ++ u32 data1; /* 0x20 data buffer 1 */ ++ u32 linectrl; /* 0x24 line control */ ++ u32 pm; /* 0x28 power management */ ++}; ++ ++void p2wi_init(void); ++int p2wi_set_pmu_address(u8 slave_addr, u8 ctrl_reg, u8 init_data); ++int p2wi_read(const u8 addr, u8 *data); ++int p2wi_write(const u8 addr, u8 data); ++ ++#endif /* __ASSEMBLY__ */ ++#endif /* _SUNXI_P2WI_H */ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/prcm.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/prcm.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/prcm.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/prcm.h 2014-04-29 14:29:40.237227773 +0200 +@@ -0,0 +1,238 @@ ++/* ++ * Sunxi A31 Power Management Unit register definition. ++ * ++ * (C) Copyright 2013 Oliver Schinagl ++ * http://linux-sunxi.org ++ * Allwinner Technology Co., Ltd. ++ * Berg Xing ++ * Tom Cubie ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#ifndef _SUNXI_PRCM_H ++#define _SUNXI_PRCM_H ++ ++#define __PRCM_CPUS_CFG_PRE(n) (((n) & 0x3) << 4) ++#define PRCM_CPUS_CFG_PRE_MASK __PRCM_CPUS_CFG_PRE(0x3) ++#define __PRCM_CPUS_CFG_PRE_DIV(n) (((n) >> 1) - 1) ++#define PRCM_CPUS_CFG_PRE_DIV(n) \ ++ __PRCM_CPUS_CFG_PRE(__PRCM_CPUS_CFG_CLK_PRE(n)) ++#define __PRCM_CPUS_CFG_POST(n) (((n) & 0x1f) << 8) ++#define PRCM_CPUS_CFG_POST_MASK __PRCM_CPUS_CFG_POST(0x1f) ++#define __PRCM_CPUS_CFG_POST_DIV(n) ((n) - 1) ++#define PRCM_CPUS_CFG_POST_DIV(n) \ ++ __PRCM_CPUS_CFG_POST_DIV(__PRCM_CPUS_CFG_POST_DIV(n)) ++#define __PRCM_CPUS_CFG_CLK_SRC(n) (((n) & 0x3) << 16) ++#define PRCM_CPUS_CFG_CLK_SRC_MASK __PRCM_CPUS_CFG_CLK_SRC(0x3) ++#define __PRCM_CPUS_CFG_CLK_SRC_LOSC 0x0 ++#define __PRCM_CPUS_CFG_CLK_SRC_HOSC 0x1 ++#define __PRCM_CPUS_CFG_CLK_SRC_PLL6 0x2 ++#define __PRCM_CPUS_CFG_CLK_SRC_PDIV 0x3 ++#define PRCM_CPUS_CFG_CLK_SRC_LOSC \ ++ __PRCM_CPUS_CFG_CLK_SRC(__PRCM_CPUS_CFG_CLK_SRC_LOSC) ++#define PRCM_CPUS_CFG_CLK_SRC_HOSC \ ++ __PRCM_CPUS_CFG_CLK_SRC(__PRCM_CPUS_CFG_CLK_SRC_HOSC) ++#define PRCM_CPUS_CFG_CLK_SRC_PLL6 \ ++ __PRCM_CPUS_CFG_CLK_SRC(__PRCM_CPUS_CFG_CLK_SRC_PLL6) ++#define PRCM_CPUS_CFG_CLK_SRC_PDIV \ ++ __PRCM_CPUS_CFG_CLK_SRC(__PRCM_CPUS_CFG_CLK_SRC_PDIV) ++ ++#define __PRCM_APB0_RATIO(n) (((n) & 0x3) <<0) ++#define PRCM_APB0_RATIO_DIV_MASK __PRCM_APB0_RATIO_DIV(0x3) ++#define __PRCM_APB0_RATIO_DIV(n) (((n) >> 1) - 1) ++#define PRCM_APB0_RATIO_DIV(n) \ ++ __PRCM_APB0_RATIO(__PRCM_APB0_RATIO_DIV(n)) ++ ++#define PRCM_CPU_CFG_NEON_CLK_EN (0x1 << 0) ++#define PRCM_CPU_CFG_CPU_CLK_EN (0x1 << 1) ++ ++#define PRCM_APB0_GATE_PIO (0x1 << 0) ++#define PRCM_APB0_GATE_IR (0x1 << 1) ++#define PRCM_APB0_GATE_TIMER01 (0x1 << 2) ++#define PRCM_APB0_GATE_P2WI (0x1 << 3) ++#define PRCM_APB0_GATE_UART (0x1 << 4) ++#define PRCM_APB0_GATE_1WIRE (0x1 << 5) ++#define PRCM_APB0_GATE_I2C (0x1 << 6) ++ ++#define PRCM_APB0_RESET_PIO (0x1 << 0) ++#define PRCM_APB0_RESET_IR (0x1 << 1) ++#define PRCM_APB0_RESET_TIMER01 (0x1 << 2) ++#define PRCM_APB0_RESET_P2WI (0x1 << 3) ++#define PRCM_APB0_RESET_UART (0x1 << 4) ++#define PRCM_APB0_RESET_1WIRE (0x1 << 5) ++#define PRCM_APB0_RESET_I2C (0x1 << 6) ++ ++#define PRCM_PLL_CTRL_PLL_BIAS (0x1 << 0) ++#define PRCM_PLL_CTRL_HOSC_GAIN_ENH (0x1 << 1) ++#define __PRCM_PLL_CTRL_USB_CLK_SRC(n) (((n) & 0x3) << 4) ++#define PRCM_PLL_CTRL_USB_CLK_SRC_MASK \ ++ __PRCM_PLL_CTRL_USB_CLK_SRC(0x3) ++#define __PRCM_PLL_CTRL_USB_CLK_0 0x0 ++#define __PRCM_PLL_CTRL_USB_CLK_1 0x1 ++#define __PRCM_PLL_CTRL_USB_CLK_2 0x2 ++#define __PRCM_PLL_CTRL_USB_CLK_3 0x3 ++#define PRCM_PLL_CTRL_USB_CLK_0 \ ++ __PRCM_PLL_CTRL_USB_CLK_SRC(__PRCM_PLL_CTRL_USB_CLK_0) ++#define PRCM_PLL_CTRL_USB_CLK_1 \ ++ __PRCM_PLL_CTRL_USB_CLK_SRC(__PRCM_PLL_CTRL_USB_CLK_1) ++#define PRCM_PLL_CTRL_USB_CLK_2 \ ++ __PRCM_PLL_CTRL_USB_CLK_SRC(__PRCM_PLL_CTRL_USB_CLK_2) ++#define PRCM_PLL_CTRL_USB_CLK_3 \ ++ __PRCM_PLL_CTRL_USB_CLK_SRC(__PRCM_PLL_CTRL_USB_CLK_3) ++#define __PRCM_PLL_CTRL_INT_PLL_IN_SEL(n) (((n) & 0x3) << 12) ++#define PRCM_PLL_CTRL_INT_PLL_IN_SEL_MASK \ ++ __PRCM_PLL_CTRL_INT_PLL_IN_SEL(0x3) ++#define PRCM_PLL_CTRL_INT_PLL_IN_SEL(n) \ ++ __PRCM_PLL_CTRL_INT_PLL_IN_SEL(n) ++#define __PRCM_PLL_CTRL_HOSC_CLK_SEL(n) (((n) & 0x3) << 20) ++#define PRCM_PLL_CTRL_HOSC_CLK_SEL_MASK \ ++ __PRCM_PLL_CTRL_HOSC_CLK_SEL(0x3) ++#define __PRCM_PLL_CTRL_HOSC_CLK_0 0x0 ++#define __PRCM_PLL_CTRL_HOSC_CLK_1 0x1 ++#define __PRCM_PLL_CTRL_HOSC_CLK_2 0x2 ++#define __PRCM_PLL_CTRL_HOSC_CLK_3 0x3 ++#define PRCM_PLL_CTRL_HOSC_CLK_0 \ ++ __PRCM_PLL_CTRL_HOSC_CLK_SEL(__PRCM_PLL_CTRL_HOSC_CLK_0) ++#define PRCM_PLL_CTRL_HOSC_CLK_1 \ ++ __PRCM_PLL_CTRL_HOSC_CLK_SEL(__PRCM_PLL_CTRL_HOSC_CLK_1) ++#define PRCM_PLL_CTRL_HOSC_CLK_2 \ ++ __PRCM_PLL_CTRL_HOSC_CLK_SEL(__PRCM_PLL_CTRL_HOSC_CLK_2) ++#define PRCM_PLL_CTRL_HOSC_CLK_3 \ ++ __PRCM_PLL_CTRL_HOSC_CLK_SEL(__PRCM_PLL_CTRL_HOSC_CLK_3) ++#define PRCM_PLL_CTRL_PLL_TST_SRC_EXT (0x1 << 24) ++#define PRCM_PLL_CTRL_LDO_DIGITAL_EN (0x1 << 0) ++#define PRCM_PLL_CTRL_LDO_ANALOG_EN (0x1 << 1) ++#define PRCM_PLL_CTRL_EXT_OSC_EN (0x1 << 2) ++#define PRCM_PLL_CTRL_CLK_TST_EN (0x1 << 3) ++#define PRCM_PLL_CTRL_IN_PWR_HIGH (0x1 << 15) /* 3.3 for hi 2.5 for lo */ ++#define __PRCM_PLL_CTRL_VDD_LDO_OUT(n) (((n) & 0x7) << 16) ++#define PRCM_PLL_CTRL_LDO_OUT_MASK \ ++ __PRCM_PLL_CTRL_LDO_OUT(0x7) ++/* When using the low voltage 20 mV steps, and high voltage 30 mV steps */ ++#define PRCM_PLL_CTRL_LDO_OUT_L(n) \ ++ __PRCM_PLL_CTRL_VDD_LDO_OUT((((n) - 1000) / 20) & 0x7) ++#define PRCM_PLL_CTRL_LDO_OUT_H(n) \ ++ __PRCM_PLL_CTRL_VDD_LDO_OUT((((n) - 1160) / 30) & 0x7) ++#define PRCM_PLL_CTRL_LDO_OUT_LV(n) \ ++ __PRCM_PLL_CTRL_VDD_LDO_OUT((((n) & 0x7) * 20) + 1000) ++#define PRCM_PLL_CTRL_LDO_OUT_HV(n) \ ++ __PRCM_PLL_CTRL_VDD_LDO_OUT((((n) & 0x7) * 30) + 1160) ++#define PRCM_PLL_CTRL_LDO_KEY (0xa7 << 24) ++ ++#define PRCM_CLK_1WIRE_GATE (0x1 << 31) ++ ++#define __PRCM_CLK_MOD0_M(n) (((n) & 0xf) << 0) ++#define PRCM_CLK_MOD0_M_MASK __PRCM_CLK_MOD0_M(0xf) ++#define __PRCM_CLK_MOD0_M_X(n) (n - 1) ++#define PRCM_CLK_MOD0_M(n) __PRCM_CLK_MOD0_M(__PRCM_CLK_MOD0_M_X(n)) ++#define PRCM_CLK_MOD0_OUT_PHASE(n) (((n) & 0x7) << 8) ++#define PRCM_CLK_MOD0_OUT_PHASE_MASK(n) PRCM_CLK_MOD0_OUT_PHASE(0x7) ++#define _PRCM_CLK_MOD0_N(n) (((n) & 0x3) << 16) ++#define PRCM_CLK_MOD0_N_MASK __PRCM_CLK_MOD_N(0x3) ++#define __PRCM_CLK_MOD0_N_X(n) (((n) >> 1) -1) ++#define PRCM_CLK_MOD0_N(n) __PRCM_CLK_MOD0_N(__PRCM_CLK_MOD0_N_X(n)) ++#define PRCM_CLK_MOD0_SMPL_PHASE(n) (((n) & 0x7) << 20) ++#define PRCM_CLK_MOD0_SMPL_PHASE_MASK PRCM_CLK_MOD0_SMPL_PHASE(0x7) ++#define PRCM_CLK_MOD0_SRC_SEL(n) (((n) & 0x7) << 24) ++#define PRCM_CLK_MOD0_SRC_SEL_MASK PRCM_CLK_MOD0_SRC_SEL(0x7) ++#define PRCM_CLK_MOD0_GATE_EN (0x1 << 31) ++ ++#define PRCM_APB0_RESET_PIO (0x1 << 0) ++#define PRCM_APB0_RESET_IR (0x1 << 1) ++#define PRCM_APB0_RESET_TIMER01 (0x1 << 2) ++#define PRCM_APB0_RESET_P2WI (0x1 << 3) ++#define PRCM_APB0_RESET_UART (0x1 << 4) ++#define PRCM_APB0_RESET_1WIRE (0x1 << 5) ++#define PRCM_APB0_RESET_I2C (0x1 << 6) ++ ++#define __PRCM_CLK_OUTD_M(n) (((n) & 0x7) << 8) ++#define PRCM_CLK_OUTD_M_MASK __PRCM_CLK_OUTD_M(0x7) ++#define __PRCM_CLK_OUTD_M_X() ((n) - 1) ++#define PRCM_CLK_OUTD_M(n) __PRCM_CLK_OUTD_M(__PRCM_CLK_OUTD_M_X(n)) ++#define __PRCM_CLK_OUTD_N(n) (((n) & 0x7) << 20) ++#define PRCM_CLK_OUTD_N_MASK __PRCM_CLK_OUTD_N(0x7) ++#define __PRCM_CLK_OUTD_N_X(n) (((n) >> 1) - 1) ++#define PRCM_CLK_OUTD_N(n) __PRCM_CLK_OUTD_N(__PRCM_CLK_OUTD_N_X(n) ++#define __PRCM_CLK_OUTD_SRC_SEL(n) (((n) & 0x3) << 24) ++#define PRCM_CLK_OUTD_SRC_SEL_MASK __PRCM_CLK_OUTD_SRC_SEL(0x3) ++#define __PRCM_CLK_OUTD_SRC_LOSC2 0x0 ++#define __PRCM_CLK_OUTD_SRC_LOSC 0x1 ++#define __PRCM_CLK_OUTD_SRC_HOSC 0x2 ++#define __PRCM_CLK_OUTD_SRC_ERR 0x3 ++#define PRCM_CLK_OUTD_SRC_LOSC2 \ ++#deifne __PRCM_CLK_OUTD_SRC_SEL(__PRCM_CLK_OUTD_SRC_LOSC2) ++#define PRCM_CLK_OUTD_SRC_LOSC \ ++#deifne __PRCM_CLK_OUTD_SRC_SEL(__PRCM_CLK_OUTD_SRC_LOSC) ++#define PRCM_CLK_OUTD_SRC_HOSC \ ++#deifne __PRCM_CLK_OUTD_SRC_SEL(__PRCM_CLK_OUTD_SRC_HOSC) ++#define PRCM_CLK_OUTD_SRC_ERR \ ++#deifne __PRCM_CLK_OUTD_SRC_SEL(__PRCM_CLK_OUTD_SRC_ERR) ++#define PRCM_CLK_OUTD_EN (0x1 << 31) ++ ++#define PRCM_CPU0_PWROFF (0x1 << 0) ++#define PRCM_CPU1_PWROFF (0x1 << 1) ++#define PRCM_CPU2_PWROFF (0x1 << 2) ++#define PRCM_CPU3_PWROFF (0x1 << 3) ++#define PRCM_CPU_ALL_PWROFF (0xf << 0) ++ ++#define PRCM_VDD_SYS_DRAM_CH0_PAD_HOLD_PWROFF (0x1 << 0) ++#define PRCM_VDD_SYS_DRAM_CH1_PAD_HOLD_PWROFF (0x1 << 1) ++#define PRCM_VDD_SYS_AVCC_A_PWROFF (0x1 << 2) ++#define PRCM_VDD_SYS_CPU0_VDD_PWROFF (0x1 << 3) ++ ++#define PRCM_VDD_GPU_PWROFF (0x1 << 0) ++ ++#define PRCM_VDD_SYS_RESET (0x1 << 0) ++ ++#define PRCM_CPU1_PWR_CLAMP(n) (((n) & 0xff) << 0) ++#define PRCM_CPU1_PWR_CLAMP_MASK PRCM_CPU1_PWR_CLAMP(0xff) ++ ++#define PRCM_CPU2_PWR_CLAMP(n) (((n) & 0xff) << 0) ++#define PRCM_CPU2_PWR_CLAMP_MASK PRCM_CPU2_PWR_CLAMP(0xff) ++ ++#define PRCM_CPU3_PWR_CLAMP(n) (((n) & 0xff) << 0) ++#define PRCM_CPU3_PWR_CLAMP_MASK PRCM_CPU3_PWR_CLAMP(0xff) ++ ++#ifndef __ASSEMBLY__ ++struct sunxi_prcm_reg { ++ u32 cpus_cfg; /* 0x000 */ ++ u8 res0[0x8]; /* 0x004 */ ++ u32 apb0_ratio; /* 0x00c */ ++ u32 cpu0_cfg; /* 0x010 */ ++ u32 cpu1_cfg; /* 0x014 */ ++ u32 cpu2_cfg; /* 0x018 */ ++ u32 cpu3_cfg; /* 0x01c */ ++ u8 res1[0x8]; /* 0x020 */ ++ u32 apb0_gate; /* 0x028 */ ++ u8 res2[0x14]; /* 0x02c */ ++ u32 pll_ctrl0; /* 0x040 */ ++ u32 pll_ctrl1; /* 0x044 */ ++ u8 res3[0x8]; /* 0x048 */ ++ u32 clk_1wire; /* 0x050 */ ++ u32 clk_ir; /* 0x054 */ ++ u8 res4[0x58]; /* 0x058 */ ++ u32 apb0_reset; /* 0x0b0 */ ++ u8 res5[0x3c]; /* 0x0b4 */ ++ u32 clk_outd; /* 0x0f0 */ ++ u8 res6[0xc]; /* 0x0f4 */ ++ u32 cpu_pwroff; /* 0x100 */ ++ u8 res7[0xc]; /* 0x104 */ ++ u32 vdd_sys_pwroff; /* 0x110 */ ++ u8 res8[0x4]; /* 0x114 */ ++ u32 gpu_pwroff; /* 0x118 */ ++ u8 res9[0x4]; /* 0x11c */ ++ u32 vdd_pwr_reset; /* 0x120 */ ++ u8 res10[0x20]; /* 0x124 */ ++ u32 cpu1_pwr_clamp; /* 0x144 */ ++ u32 cpu2_pwr_clamp; /* 0x148 */ ++ u32 cpu3_pwr_clamp; /* 0x14c */ ++ u8 res11[0x30]; /* 0x150 */ ++ u32 dram_pwr; /* 0x180 */ ++ u8 res12[0xc]; /* 0x184 */ ++ u32 dram_tst; /* 0x190 */ ++}; ++ ++void prcm_apb0_enable(u32 flags); ++#endif /* __ASSEMBLY__ */ ++#endif /* _PRCM_H */ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/smp.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/smp.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/smp.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/smp.h 2014-04-29 14:29:40.237227773 +0200 +@@ -0,0 +1,22 @@ +/* + * (C) Copyright 2013 + * Carl van Schaik + * + * CPU configuration registers for the sun7i (A20). + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SUNXI_SMP_H_ @@ -3456,35 +3965,17 @@ index 0000000..b7526e7 +#endif /* __ASSEMBLY__ */ + +#endif /* _SUNXI_SMP_H_ */ -diff --git a/arch/arm/include/asm/arch-sunxi/spl.h b/arch/arm/include/asm/arch-sunxi/spl.h -new file mode 100644 -index 0000000..6a47d14 ---- /dev/null -+++ b/arch/arm/include/asm/arch-sunxi/spl.h -@@ -0,0 +1,36 @@ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/spl.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/spl.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/spl.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/spl.h 2014-04-29 14:29:40.237227773 +0200 +@@ -0,0 +1,20 @@ +/* + * This is a copy of omap3/spl.h: + * + * (C) Copyright 2012 + * Texas Instruments, + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef _ASM_ARCH_SPL_H_ +#define _ASM_SPL_H_ @@ -3498,34 +3989,16 @@ index 0000000..6a47d14 +#define BOOT_DEVICE_XIPWAIT 7 +#define BOOT_DEVICE_MMC2_2 0xff +#endif -diff --git a/arch/arm/include/asm/arch-sunxi/sys_proto.h b/arch/arm/include/asm/arch-sunxi/sys_proto.h -new file mode 100644 -index 0000000..78a2b39 ---- /dev/null -+++ b/arch/arm/include/asm/arch-sunxi/sys_proto.h -@@ -0,0 +1,33 @@ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/sys_proto.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/sys_proto.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/sys_proto.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/sys_proto.h 2014-04-29 14:29:40.237227773 +0200 +@@ -0,0 +1,16 @@ +/* + * (C) Copyright 2007-2012 + * Allwinner Technology Co., Ltd. + * Tom Cubie + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SYS_PROTO_H_ @@ -3533,16 +4006,13 @@ index 0000000..78a2b39 + +#include + -+void sr32(u32 *, u32, u32, u32); +void sdelay(unsigned long); + +#endif -diff --git a/arch/arm/include/asm/arch-sunxi/timer.h b/arch/arm/include/asm/arch-sunxi/timer.h -new file mode 100644 -index 0000000..f9d4f4f ---- /dev/null -+++ b/arch/arm/include/asm/arch-sunxi/timer.h -@@ -0,0 +1,104 @@ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/timer.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/timer.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/timer.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/timer.h 2014-04-29 14:29:40.237227773 +0200 +@@ -0,0 +1,88 @@ +/* + * (C) Copyright 2007-2011 + * Allwinner Technology Co., Ltd. @@ -3550,23 +4020,7 @@ index 0000000..f9d4f4f + * + * Configuration settings for the Allwinner A10-evb board. + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SUNXI_TIMER_H_ @@ -3647,31 +4101,16 @@ index 0000000..f9d4f4f +#endif /* __ASSEMBLY__ */ + +#endif -diff --git a/arch/arm/include/asm/arch-sunxi/watchdog.h b/arch/arm/include/asm/arch-sunxi/watchdog.h -new file mode 100644 -index 0000000..e3a8936 ---- /dev/null -+++ b/arch/arm/include/asm/arch-sunxi/watchdog.h -@@ -0,0 +1,35 @@ +diff -purN u-boot-2014.04/arch/arm/include/asm/arch-sunxi/watchdog.h u-boot-sunxi/arch/arm/include/asm/arch-sunxi/watchdog.h +--- u-boot-2014.04/arch/arm/include/asm/arch-sunxi/watchdog.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/arch/arm/include/asm/arch-sunxi/watchdog.h 2014-04-29 14:29:40.237227773 +0200 +@@ -0,0 +1,22 @@ +/* + * Watchdog driver for the Allwinner sunxi platform. + * Copyright (C) 2013 Oliver Schinagl + * http://www.linux-sunxi.org/ + * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version 2 -+ * of the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, -+ * MA 02110-1301, USA. ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SUNXI_WATCHDOG_H_ @@ -3688,102 +4127,10 @@ index 0000000..e3a8936 +#endif /* __ASSEMBLY__ */ + +#endif -diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile -new file mode 100644 -index 0000000..e431653 ---- /dev/null -+++ b/board/sunxi/Makefile -@@ -0,0 +1,84 @@ -+# -+# (C) Copyright 2012 Henrik Nordstrom -+# -+# Based on some other board Makefile -+# -+# (C) Copyright 2000-2003 -+# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+# -+# See file CREDITS for list of people who contributed to this -+# project. -+# -+# This program is free software; you can redistribute it and/or -+# modify it under the terms of the GNU General Public License as -+# published by the Free Software Foundation; either version 2 of -+# the License, or (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+# MA 02111-1307 USA -+# -+ -+obj-y += board.o -+obj-$(CONFIG_A10_MID_1GB) += dram_sun4i_360_1024_iow16.o -+obj-$(CONFIG_A10_OLINUXINO_L) += dram_a10_olinuxino_l.o -+obj-$(CONFIG_A10S_OLINUXINO_M) += dram_a10s_olinuxino_m.o -+obj-$(CONFIG_A13_OLINUXINO) += dram_a13_olinuxino.o -+obj-$(CONFIG_A13_OLINUXINOM) += dram_a13_oli_micro.o -+obj-$(CONFIG_A13_MID) += dram_a13_mid.o -+obj-$(CONFIG_A20_OLINUXINO_M) += dram_a20_olinuxino_m.o -+obj-$(CONFIG_AUXTEK_T003) += dram_auxtek_t003.o -+# This is not a typo, uses the same mem settings as the a10s-olinuxino-m -+obj-$(CONFIG_AUXTEK_T004) += dram_a10s_olinuxino_m.o -+obj-$(CONFIG_BA10_TV_BOX) += dram_sun4i_384_1024_iow8.o -+obj-$(CONFIG_COBY_MID7042) += dram_sun4i_408_1024_iow16.o -+obj-$(CONFIG_COBY_MID8042) += dram_sun4i_360_1024_iow16.o -+obj-$(CONFIG_COBY_MID9742) += dram_sun4i_408_1024_iow16.o -+obj-$(CONFIG_MARSBOARD_A10) += dram_sun4i_360_1024_iow16.o -+obj-$(CONFIG_MARSBOARD_A20) += dram_sun4i_360_1024_iow16.o -+obj-$(CONFIG_CUBIEBOARD) += dram_cubieboard.o -+obj-$(CONFIG_CUBIEBOARD_512) += dram_cubieboard_512.o -+obj-$(CONFIG_CUBIEBOARD2) += dram_cubieboard2.o -+obj-$(CONFIG_CUBIETRUCK) += dram_cubietruck.o -+obj-$(CONFIG_DNS_M82) += dram_sun4i_360_1024_iow16.o -+obj-$(CONFIG_EOMA68_A10) += dram_sun4i_360_1024_iow8.o -+obj-$(CONFIG_EOMA68_A20) += dram_eoma68_a20.o -+obj-$(CONFIG_EU3000) += dram_eu3000.o -+obj-$(CONFIG_GOOSEBERRY_A721) += dram_gooseberry_a721.o -+obj-$(CONFIG_H6) += dram_h6.o -+obj-$(CONFIG_HACKBERRY) += dram_hackberry.o -+obj-$(CONFIG_A7HD) += dram_sun4i_360_1024_iow8.o -+obj-$(CONFIG_INTERRA3) += dram_mk802ii_a20.o -+obj-$(CONFIG_INET_86VZ) += dram_a10s_olinuxino_m.o -+obj-$(CONFIG_INET97F_II) += dram_sun4i_408_512.o -+obj-$(CONFIG_INET_K70HC) += dram_inet_k70hc.o -+obj-$(CONFIG_JESURUN_Q5) += dram_sun4i_312_1024_iow8.o -+obj-$(CONFIG_K1001L1C) += dram_a20_olinuxino_m.o -+obj-$(CONFIG_MEFAFEIS_A08) += dram_megafeis_a08.o -+obj-$(CONFIG_MELE_A1000) += dram_sun4i_360_512.o -+obj-$(CONFIG_MELE_A1000G) += dram_sun4i_360_1024_iow8.o -+obj-$(CONFIG_MELE_A3700) += dram_sun4i_360_1024_iow8.o -+obj-$(CONFIG_MINI_X) += dram_sun4i_360_512.o -+obj-$(CONFIG_MINI_X_1GB) += dram_sun4i_360_1024_iow16.o -+obj-$(CONFIG_MINI_X_A10S) += dram_mini_x_a10s.o -+obj-$(CONFIG_MK802) += dram_sun4i_360_512.o -+obj-$(CONFIG_MK802_1GB) += dram_sun4i_360_1024_iow16.o -+obj-$(CONFIG_MK802_A10S) += dram_mk802_a10s.o -+obj-$(CONFIG_MK802II) += dram_sun4i_408_1024_iow8.o -+obj-$(CONFIG_MK802II_A20) += dram_mk802ii_a20.o -+obj-$(CONFIG_PCDUINO) += dram_sun4i_408_1024_iow8.o -+obj-$(CONFIG_PENGPOD700) += dram_sun4i_384_1024_iow8.o -+obj-$(CONFIG_PENGPOD1000) += dram_sun4i_408_1024_iow16.o -+obj-$(CONFIG_POV_PROTAB2) += dram_pov_protab2.o -+obj-$(CONFIG_POV_PROTAB2_XXL) += dram_pov_protab2_xxl.o -+obj-$(CONFIG_R7DONGLE) += dram_r7dongle.o -+obj-$(CONFIG_SANEI_N90) += dram_sanei_n90.o -+obj-$(CONFIG_UHOST_U1A) += dram_sun4i_360_1024_iow8.o -+obj-$(CONFIG_WOBO_I5) += dram_wobo_i5.o -+obj-$(CONFIG_XZPAD700) += dram_xzpad700.o -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -new file mode 100644 -index 0000000..0b048df ---- /dev/null -+++ b/board/sunxi/board.c -@@ -0,0 +1,165 @@ +diff -purN u-boot-2014.04/board/sunxi/board.c u-boot-sunxi/board/sunxi/board.c +--- u-boot-2014.04/board/sunxi/board.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/board.c 2014-04-29 14:29:40.551220315 +0200 +@@ -0,0 +1,158 @@ +/* + * (C) Copyright 2012-2013 Henrik Nordstrom + * (C) Copyright 2013 Luke Kenneth Casson Leighton @@ -3794,23 +4141,7 @@ index 0000000..0b048df + * + * Some board init for the Allwinner A10-evb board. + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include @@ -3820,6 +4151,9 @@ index 0000000..0b048df +#ifdef CONFIG_AXP209_POWER +#include +#endif ++#ifdef CONFIG_AXP221_POWER ++#include ++#endif +#include +#include +#include @@ -3876,25 +4210,19 @@ index 0000000..0b048df +} +#endif + -+#ifdef CONFIG_SPL_BUILD ++#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_SUN6I) || defined(CONFIG_SUN8I) +void sunxi_board_init(void) +{ + int power_failed = 0; ++#if !defined(CONFIG_SUN6I) && !defined(CONFIG_SUN8I) + unsigned long ramsize; + + printf("DRAM:"); + ramsize = sunxi_dram_init(); -+ if (!ramsize) { -+ printf(" ?"); -+ ramsize = sunxi_dram_init(); -+ } -+ if (!ramsize) { -+ printf(" ?"); -+ ramsize = sunxi_dram_init(); -+ } + printf(" %lu MiB\n", ramsize >> 20); + if (!ramsize) + hang(); ++#endif + +#ifdef CONFIG_AXP152_POWER + power_failed = axp152_init(); @@ -3915,7 +4243,19 @@ index 0000000..0b048df + power_failed |= axp209_set_ldo3(2800); + power_failed |= axp209_set_ldo4(2800); +#endif ++#ifdef CONFIG_AXP221_POWER ++ power_failed = axp221_init(); ++ power_failed |= axp221_set_dcdc1(3300); ++ power_failed |= axp221_set_dcdc2(1200); ++ power_failed |= axp221_set_dcdc3(1260); ++ power_failed |= axp221_set_dcdc4(1200); ++ power_failed |= axp221_set_dcdc5(1500); ++#ifdef CONFIG_ENABLE_DLDO1_POWER ++ power_failed |= axp221_set_dldo1(3300); ++#endif ++#endif + ++#if !defined(CONFIG_SUN6I) && !defined(CONFIG_SUN8I) + /* + * Only clock up the CPU to full speed if we are reasonably + * assured it's being powered with suitable core voltage @@ -3928,7 +4268,9 @@ index 0000000..0b048df +#endif + else + printf("Failed to set core voltage! Can't set CPU frequency\n"); ++#endif +} ++#endif + +#if defined(CONFIG_SPL_OS_BOOT) && defined(CONFIG_AXP209_POWER) +int spl_start_uboot(void) @@ -3947,13 +4289,9 @@ index 0000000..0b048df + printf("Board: %s\n", CONFIG_SYS_BOARD_NAME); +} +#endif -+ -+#endif -diff --git a/board/sunxi/dram_a10_olinuxino_l.c b/board/sunxi/dram_a10_olinuxino_l.c -new file mode 100644 -index 0000000..24a1bd9 ---- /dev/null -+++ b/board/sunxi/dram_a10_olinuxino_l.c +diff -purN u-boot-2014.04/board/sunxi/dram_a10_olinuxino_l.c u-boot-sunxi/board/sunxi/dram_a10_olinuxino_l.c +--- u-boot-2014.04/board/sunxi/dram_a10_olinuxino_l.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_a10_olinuxino_l.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -3986,11 +4324,9 @@ index 0000000..24a1bd9 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_a10s_olinuxino_m.c b/board/sunxi/dram_a10s_olinuxino_m.c -new file mode 100644 -index 0000000..8900539 ---- /dev/null -+++ b/board/sunxi/dram_a10s_olinuxino_m.c +diff -purN u-boot-2014.04/board/sunxi/dram_a10s_olinuxino_m.c u-boot-sunxi/board/sunxi/dram_a10s_olinuxino_m.c +--- u-boot-2014.04/board/sunxi/dram_a10s_olinuxino_m.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_a10s_olinuxino_m.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4023,11 +4359,9 @@ index 0000000..8900539 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_a13_mid.c b/board/sunxi/dram_a13_mid.c -new file mode 100644 -index 0000000..bc5cf75 ---- /dev/null -+++ b/board/sunxi/dram_a13_mid.c +diff -purN u-boot-2014.04/board/sunxi/dram_a13_mid.c u-boot-sunxi/board/sunxi/dram_a13_mid.c +--- u-boot-2014.04/board/sunxi/dram_a13_mid.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_a13_mid.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4060,11 +4394,9 @@ index 0000000..bc5cf75 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_a13_oli_micro.c b/board/sunxi/dram_a13_oli_micro.c -new file mode 100644 -index 0000000..8154ea2 ---- /dev/null -+++ b/board/sunxi/dram_a13_oli_micro.c +diff -purN u-boot-2014.04/board/sunxi/dram_a13_oli_micro.c u-boot-sunxi/board/sunxi/dram_a13_oli_micro.c +--- u-boot-2014.04/board/sunxi/dram_a13_oli_micro.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_a13_oli_micro.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,32 @@ +/* this file is generated, don't edit it yourself */ + @@ -4098,11 +4430,9 @@ index 0000000..8154ea2 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_a13_olinuxino.c b/board/sunxi/dram_a13_olinuxino.c -new file mode 100644 -index 0000000..ca96260 ---- /dev/null -+++ b/board/sunxi/dram_a13_olinuxino.c +diff -purN u-boot-2014.04/board/sunxi/dram_a13_olinuxino.c u-boot-sunxi/board/sunxi/dram_a13_olinuxino.c +--- u-boot-2014.04/board/sunxi/dram_a13_olinuxino.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_a13_olinuxino.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4135,48 +4465,9 @@ index 0000000..ca96260 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_a20_olinuxino_m.c b/board/sunxi/dram_a20_olinuxino_m.c -new file mode 100644 -index 0000000..04e4b1e ---- /dev/null -+++ b/board/sunxi/dram_a20_olinuxino_m.c -@@ -0,0 +1,31 @@ -+/* this file is generated, don't edit it yourself */ -+ -+#include "common.h" -+#include -+ -+static struct dram_para dram_para = { -+ .clock = 384, -+ .type = 3, -+ .rank_num = 1, -+ .density = 4096, -+ .io_width = 16, -+ .bus_width = 32, -+ .cas = 9, -+ .zq = 0x7f, -+ .odt_en = 0, -+ .size = 1024, -+ .tpr0 = 0x42d899b7, -+ .tpr1 = 0xa090, -+ .tpr2 = 0x22a00, -+ .tpr3 = 0, -+ .tpr4 = 0, -+ .tpr5 = 0, -+ .emr1 = 0x4, -+ .emr2 = 0x10, -+ .emr3 = 0, -+}; -+ -+unsigned long sunxi_dram_init(void) -+{ -+ return dramc_init(&dram_para); -+} -diff --git a/board/sunxi/dram_auxtek_t003.c b/board/sunxi/dram_auxtek_t003.c -new file mode 100644 -index 0000000..7dc55d2 ---- /dev/null -+++ b/board/sunxi/dram_auxtek_t003.c +diff -purN u-boot-2014.04/board/sunxi/dram_auxtek_t003.c u-boot-sunxi/board/sunxi/dram_auxtek_t003.c +--- u-boot-2014.04/board/sunxi/dram_auxtek_t003.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_auxtek_t003.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4209,48 +4500,9 @@ index 0000000..7dc55d2 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_cubieboard.c b/board/sunxi/dram_cubieboard.c -new file mode 100644 -index 0000000..399028c ---- /dev/null -+++ b/board/sunxi/dram_cubieboard.c -@@ -0,0 +1,31 @@ -+/* this file is generated, don't edit it yourself */ -+ -+#include -+#include -+ -+static struct dram_para dram_para = { -+ .clock = 480, -+ .type = 3, -+ .rank_num = 1, -+ .density = 4096, -+ .io_width = 16, -+ .bus_width = 32, -+ .cas = 6, -+ .zq = 123, -+ .odt_en = 0, -+ .size = 1024, -+ .tpr0 = 0x30926692, -+ .tpr1 = 0x1090, -+ .tpr2 = 0x1a0c8, -+ .tpr3 = 0, -+ .tpr4 = 0, -+ .tpr5 = 0, -+ .emr1 = 0, -+ .emr2 = 0, -+ .emr3 = 0, -+}; -+ -+unsigned long sunxi_dram_init(void) -+{ -+ return dramc_init(&dram_para); -+} -diff --git a/board/sunxi/dram_cubieboard2.c b/board/sunxi/dram_cubieboard2.c -new file mode 100644 -index 0000000..9e75367 ---- /dev/null -+++ b/board/sunxi/dram_cubieboard2.c +diff -purN u-boot-2014.04/board/sunxi/dram_cubieboard2.c u-boot-sunxi/board/sunxi/dram_cubieboard2.c +--- u-boot-2014.04/board/sunxi/dram_cubieboard2.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_cubieboard2.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4283,11 +4535,9 @@ index 0000000..9e75367 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_cubieboard_512.c b/board/sunxi/dram_cubieboard_512.c -new file mode 100644 -index 0000000..9752b83 ---- /dev/null -+++ b/board/sunxi/dram_cubieboard_512.c +diff -purN u-boot-2014.04/board/sunxi/dram_cubieboard_512.c u-boot-sunxi/board/sunxi/dram_cubieboard_512.c +--- u-boot-2014.04/board/sunxi/dram_cubieboard_512.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_cubieboard_512.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4320,11 +4570,44 @@ index 0000000..9752b83 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_cubietruck.c b/board/sunxi/dram_cubietruck.c -new file mode 100644 -index 0000000..1e7c94a ---- /dev/null -+++ b/board/sunxi/dram_cubietruck.c +diff -purN u-boot-2014.04/board/sunxi/dram_cubieboard.c u-boot-sunxi/board/sunxi/dram_cubieboard.c +--- u-boot-2014.04/board/sunxi/dram_cubieboard.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_cubieboard.c 2014-04-29 14:29:40.551220315 +0200 +@@ -0,0 +1,31 @@ ++/* this file is generated, don't edit it yourself */ ++ ++#include ++#include ++ ++static struct dram_para dram_para = { ++ .clock = 480, ++ .type = 3, ++ .rank_num = 1, ++ .density = 4096, ++ .io_width = 16, ++ .bus_width = 32, ++ .cas = 6, ++ .zq = 123, ++ .odt_en = 0, ++ .size = 1024, ++ .tpr0 = 0x30926692, ++ .tpr1 = 0x1090, ++ .tpr2 = 0x1a0c8, ++ .tpr3 = 0, ++ .tpr4 = 0, ++ .tpr5 = 0, ++ .emr1 = 0, ++ .emr2 = 0, ++ .emr3 = 0, ++}; ++ ++unsigned long sunxi_dram_init(void) ++{ ++ return dramc_init(&dram_para); ++} +diff -purN u-boot-2014.04/board/sunxi/dram_cubietruck.c u-boot-sunxi/board/sunxi/dram_cubietruck.c +--- u-boot-2014.04/board/sunxi/dram_cubietruck.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_cubietruck.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4335,8 +4618,8 @@ index 0000000..1e7c94a + .clock = 432, + .type = 3, + .rank_num = 1, -+ .density = 8192, -+ .io_width = 16, ++ .density = 4096, ++ .io_width = 8, + .bus_width = 32, + .cas = 9, + .zq = 0x7f, @@ -4357,48 +4640,9 @@ index 0000000..1e7c94a +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_eoma68_a20.c b/board/sunxi/dram_eoma68_a20.c -new file mode 100644 -index 0000000..04e4b1e ---- /dev/null -+++ b/board/sunxi/dram_eoma68_a20.c -@@ -0,0 +1,31 @@ -+/* this file is generated, don't edit it yourself */ -+ -+#include "common.h" -+#include -+ -+static struct dram_para dram_para = { -+ .clock = 384, -+ .type = 3, -+ .rank_num = 1, -+ .density = 4096, -+ .io_width = 16, -+ .bus_width = 32, -+ .cas = 9, -+ .zq = 0x7f, -+ .odt_en = 0, -+ .size = 1024, -+ .tpr0 = 0x42d899b7, -+ .tpr1 = 0xa090, -+ .tpr2 = 0x22a00, -+ .tpr3 = 0, -+ .tpr4 = 0, -+ .tpr5 = 0, -+ .emr1 = 0x4, -+ .emr2 = 0x10, -+ .emr3 = 0, -+}; -+ -+unsigned long sunxi_dram_init(void) -+{ -+ return dramc_init(&dram_para); -+} -diff --git a/board/sunxi/dram_eu3000.c b/board/sunxi/dram_eu3000.c -new file mode 100644 -index 0000000..80f6439 ---- /dev/null -+++ b/board/sunxi/dram_eu3000.c +diff -purN u-boot-2014.04/board/sunxi/dram_eu3000.c u-boot-sunxi/board/sunxi/dram_eu3000.c +--- u-boot-2014.04/board/sunxi/dram_eu3000.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_eu3000.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4431,11 +4675,9 @@ index 0000000..80f6439 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_gooseberry_a721.c b/board/sunxi/dram_gooseberry_a721.c -new file mode 100644 -index 0000000..a21ba55 ---- /dev/null -+++ b/board/sunxi/dram_gooseberry_a721.c +diff -purN u-boot-2014.04/board/sunxi/dram_gooseberry_a721.c u-boot-sunxi/board/sunxi/dram_gooseberry_a721.c +--- u-boot-2014.04/board/sunxi/dram_gooseberry_a721.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_gooseberry_a721.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4468,11 +4710,9 @@ index 0000000..a21ba55 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_h6.c b/board/sunxi/dram_h6.c -new file mode 100644 -index 0000000..148c185 ---- /dev/null -+++ b/board/sunxi/dram_h6.c +diff -purN u-boot-2014.04/board/sunxi/dram_h6.c u-boot-sunxi/board/sunxi/dram_h6.c +--- u-boot-2014.04/board/sunxi/dram_h6.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_h6.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4505,11 +4745,9 @@ index 0000000..148c185 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_hackberry.c b/board/sunxi/dram_hackberry.c -new file mode 100644 -index 0000000..19b07b8 ---- /dev/null -+++ b/board/sunxi/dram_hackberry.c +diff -purN u-boot-2014.04/board/sunxi/dram_hackberry.c u-boot-sunxi/board/sunxi/dram_hackberry.c +--- u-boot-2014.04/board/sunxi/dram_hackberry.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_hackberry.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4542,11 +4780,9 @@ index 0000000..19b07b8 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_inet_k70hc.c b/board/sunxi/dram_inet_k70hc.c -new file mode 100644 -index 0000000..d5ddc13 ---- /dev/null -+++ b/board/sunxi/dram_inet_k70hc.c +diff -purN u-boot-2014.04/board/sunxi/dram_inet_k70hc.c u-boot-sunxi/board/sunxi/dram_inet_k70hc.c +--- u-boot-2014.04/board/sunxi/dram_inet_k70hc.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_inet_k70hc.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4579,11 +4815,9 @@ index 0000000..d5ddc13 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_megafeis_a08.c b/board/sunxi/dram_megafeis_a08.c -new file mode 100644 -index 0000000..4e7cf81 ---- /dev/null -+++ b/board/sunxi/dram_megafeis_a08.c +diff -purN u-boot-2014.04/board/sunxi/dram_megafeis_a08.c u-boot-sunxi/board/sunxi/dram_megafeis_a08.c +--- u-boot-2014.04/board/sunxi/dram_megafeis_a08.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_megafeis_a08.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4612,15 +4846,13 @@ index 0000000..4e7cf81 + .emr3 = 0, +}; + -+int sunxi_dram_init(void) ++unsigned long sunxi_dram_init(void) +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_mini_x_a10s.c b/board/sunxi/dram_mini_x_a10s.c -new file mode 100644 -index 0000000..172eab3 ---- /dev/null -+++ b/board/sunxi/dram_mini_x_a10s.c +diff -purN u-boot-2014.04/board/sunxi/dram_mini_x_a10s.c u-boot-sunxi/board/sunxi/dram_mini_x_a10s.c +--- u-boot-2014.04/board/sunxi/dram_mini_x_a10s.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_mini_x_a10s.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4649,15 +4881,13 @@ index 0000000..172eab3 + .emr3 = 0, +}; + -+int sunxi_dram_init(void) ++unsigned long sunxi_dram_init(void) +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_mk802_a10s.c b/board/sunxi/dram_mk802_a10s.c -new file mode 100644 -index 0000000..9fe0965 ---- /dev/null -+++ b/board/sunxi/dram_mk802_a10s.c +diff -purN u-boot-2014.04/board/sunxi/dram_mk802_a10s.c u-boot-sunxi/board/sunxi/dram_mk802_a10s.c +--- u-boot-2014.04/board/sunxi/dram_mk802_a10s.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_mk802_a10s.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4690,11 +4920,9 @@ index 0000000..9fe0965 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_mk802ii_a20.c b/board/sunxi/dram_mk802ii_a20.c -new file mode 100644 -index 0000000..dc0323e ---- /dev/null -+++ b/board/sunxi/dram_mk802ii_a20.c +diff -purN u-boot-2014.04/board/sunxi/dram_mk802ii_a20.c u-boot-sunxi/board/sunxi/dram_mk802ii_a20.c +--- u-boot-2014.04/board/sunxi/dram_mk802ii_a20.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_mk802ii_a20.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4727,11 +4955,9 @@ index 0000000..dc0323e +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_pov_protab2.c b/board/sunxi/dram_pov_protab2.c -new file mode 100644 -index 0000000..3774ff8 ---- /dev/null -+++ b/board/sunxi/dram_pov_protab2.c +diff -purN u-boot-2014.04/board/sunxi/dram_pov_protab2.c u-boot-sunxi/board/sunxi/dram_pov_protab2.c +--- u-boot-2014.04/board/sunxi/dram_pov_protab2.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_pov_protab2.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4764,11 +4990,9 @@ index 0000000..3774ff8 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_pov_protab2_xxl.c b/board/sunxi/dram_pov_protab2_xxl.c -new file mode 100644 -index 0000000..1b65cd1 ---- /dev/null -+++ b/board/sunxi/dram_pov_protab2_xxl.c +diff -purN u-boot-2014.04/board/sunxi/dram_pov_protab2_xxl.c u-boot-sunxi/board/sunxi/dram_pov_protab2_xxl.c +--- u-boot-2014.04/board/sunxi/dram_pov_protab2_xxl.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_pov_protab2_xxl.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4801,11 +5025,9 @@ index 0000000..1b65cd1 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_r7dongle.c b/board/sunxi/dram_r7dongle.c -new file mode 100644 -index 0000000..59343cb ---- /dev/null -+++ b/board/sunxi/dram_r7dongle.c +diff -purN u-boot-2014.04/board/sunxi/dram_r7dongle.c u-boot-sunxi/board/sunxi/dram_r7dongle.c +--- u-boot-2014.04/board/sunxi/dram_r7dongle.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_r7dongle.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4838,11 +5060,9 @@ index 0000000..59343cb +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_sanei_n90.c b/board/sunxi/dram_sanei_n90.c -new file mode 100644 -index 0000000..43c39f2 ---- /dev/null -+++ b/board/sunxi/dram_sanei_n90.c +diff -purN u-boot-2014.04/board/sunxi/dram_sanei_n90.c u-boot-sunxi/board/sunxi/dram_sanei_n90.c +--- u-boot-2014.04/board/sunxi/dram_sanei_n90.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_sanei_n90.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,30 @@ +/* this file is generated, don't edit it yourself */ + @@ -4874,11 +5094,9 @@ index 0000000..43c39f2 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_sun4i_312_1024_iow8.c b/board/sunxi/dram_sun4i_312_1024_iow8.c -new file mode 100644 -index 0000000..d5e4f1f ---- /dev/null -+++ b/board/sunxi/dram_sun4i_312_1024_iow8.c +diff -purN u-boot-2014.04/board/sunxi/dram_sun4i_312_1024_iow8.c u-boot-sunxi/board/sunxi/dram_sun4i_312_1024_iow8.c +--- u-boot-2014.04/board/sunxi/dram_sun4i_312_1024_iow8.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_sun4i_312_1024_iow8.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4911,11 +5129,9 @@ index 0000000..d5e4f1f +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_sun4i_360_1024_iow16.c b/board/sunxi/dram_sun4i_360_1024_iow16.c -new file mode 100644 -index 0000000..3763713 ---- /dev/null -+++ b/board/sunxi/dram_sun4i_360_1024_iow16.c +diff -purN u-boot-2014.04/board/sunxi/dram_sun4i_360_1024_iow16.c u-boot-sunxi/board/sunxi/dram_sun4i_360_1024_iow16.c +--- u-boot-2014.04/board/sunxi/dram_sun4i_360_1024_iow16.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_sun4i_360_1024_iow16.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4948,11 +5164,9 @@ index 0000000..3763713 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_sun4i_360_1024_iow8.c b/board/sunxi/dram_sun4i_360_1024_iow8.c -new file mode 100644 -index 0000000..2a5c9ed ---- /dev/null -+++ b/board/sunxi/dram_sun4i_360_1024_iow8.c +diff -purN u-boot-2014.04/board/sunxi/dram_sun4i_360_1024_iow8.c u-boot-sunxi/board/sunxi/dram_sun4i_360_1024_iow8.c +--- u-boot-2014.04/board/sunxi/dram_sun4i_360_1024_iow8.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_sun4i_360_1024_iow8.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -4985,11 +5199,9 @@ index 0000000..2a5c9ed +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_sun4i_360_512.c b/board/sunxi/dram_sun4i_360_512.c -new file mode 100644 -index 0000000..48aa6e2 ---- /dev/null -+++ b/board/sunxi/dram_sun4i_360_512.c +diff -purN u-boot-2014.04/board/sunxi/dram_sun4i_360_512.c u-boot-sunxi/board/sunxi/dram_sun4i_360_512.c +--- u-boot-2014.04/board/sunxi/dram_sun4i_360_512.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_sun4i_360_512.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -5022,11 +5234,44 @@ index 0000000..48aa6e2 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_sun4i_384_1024_iow8.c b/board/sunxi/dram_sun4i_384_1024_iow8.c -new file mode 100644 -index 0000000..b0fcc55 ---- /dev/null -+++ b/board/sunxi/dram_sun4i_384_1024_iow8.c +diff -purN u-boot-2014.04/board/sunxi/dram_sun4i_384_1024_iow16.c u-boot-sunxi/board/sunxi/dram_sun4i_384_1024_iow16.c +--- u-boot-2014.04/board/sunxi/dram_sun4i_384_1024_iow16.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_sun4i_384_1024_iow16.c 2014-04-29 14:29:40.551220315 +0200 +@@ -0,0 +1,31 @@ ++/* this file is generated, don't edit it yourself */ ++ ++#include ++#include ++ ++static struct dram_para dram_para = { ++ .clock = 384, ++ .type = 3, ++ .rank_num = 1, ++ .density = 4096, ++ .io_width = 16, ++ .bus_width = 32, ++ .cas = 6, ++ .zq = 123, ++ .odt_en = 0, ++ .size = 1024, ++ .tpr0 = 0x30926692, ++ .tpr1 = 0x1090, ++ .tpr2 = 0x1a0c8, ++ .tpr3 = 0, ++ .tpr4 = 0, ++ .tpr5 = 0, ++ .emr1 = 0x4, ++ .emr2 = 0, ++ .emr3 = 0, ++}; ++ ++unsigned long sunxi_dram_init(void) ++{ ++ return dramc_init(&dram_para); ++} +diff -purN u-boot-2014.04/board/sunxi/dram_sun4i_384_1024_iow8.c u-boot-sunxi/board/sunxi/dram_sun4i_384_1024_iow8.c +--- u-boot-2014.04/board/sunxi/dram_sun4i_384_1024_iow8.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_sun4i_384_1024_iow8.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -5059,11 +5304,9 @@ index 0000000..b0fcc55 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_sun4i_408_1024_iow16.c b/board/sunxi/dram_sun4i_408_1024_iow16.c -new file mode 100644 -index 0000000..1bc9f73 ---- /dev/null -+++ b/board/sunxi/dram_sun4i_408_1024_iow16.c +diff -purN u-boot-2014.04/board/sunxi/dram_sun4i_408_1024_iow16.c u-boot-sunxi/board/sunxi/dram_sun4i_408_1024_iow16.c +--- u-boot-2014.04/board/sunxi/dram_sun4i_408_1024_iow16.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_sun4i_408_1024_iow16.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -5096,11 +5339,9 @@ index 0000000..1bc9f73 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_sun4i_408_1024_iow8.c b/board/sunxi/dram_sun4i_408_1024_iow8.c -new file mode 100644 -index 0000000..e9ae84f ---- /dev/null -+++ b/board/sunxi/dram_sun4i_408_1024_iow8.c +diff -purN u-boot-2014.04/board/sunxi/dram_sun4i_408_1024_iow8.c u-boot-sunxi/board/sunxi/dram_sun4i_408_1024_iow8.c +--- u-boot-2014.04/board/sunxi/dram_sun4i_408_1024_iow8.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_sun4i_408_1024_iow8.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -5133,11 +5374,9 @@ index 0000000..e9ae84f +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_sun4i_408_512.c b/board/sunxi/dram_sun4i_408_512.c -new file mode 100644 -index 0000000..ec0ac15 ---- /dev/null -+++ b/board/sunxi/dram_sun4i_408_512.c +diff -purN u-boot-2014.04/board/sunxi/dram_sun4i_408_512.c u-boot-sunxi/board/sunxi/dram_sun4i_408_512.c +--- u-boot-2014.04/board/sunxi/dram_sun4i_408_512.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_sun4i_408_512.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -5170,11 +5409,79 @@ index 0000000..ec0ac15 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_wobo_i5.c b/board/sunxi/dram_wobo_i5.c -new file mode 100644 -index 0000000..6717303 ---- /dev/null -+++ b/board/sunxi/dram_wobo_i5.c +diff -purN u-boot-2014.04/board/sunxi/dram_sun7i_384_1024_iow16.c u-boot-sunxi/board/sunxi/dram_sun7i_384_1024_iow16.c +--- u-boot-2014.04/board/sunxi/dram_sun7i_384_1024_iow16.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_sun7i_384_1024_iow16.c 2014-04-29 14:29:40.551220315 +0200 +@@ -0,0 +1,31 @@ ++/* this file is generated, don't edit it yourself */ ++ ++#include "common.h" ++#include ++ ++static struct dram_para dram_para = { ++ .clock = 384, ++ .type = 3, ++ .rank_num = 1, ++ .density = 4096, ++ .io_width = 16, ++ .bus_width = 32, ++ .cas = 9, ++ .zq = 0x7f, ++ .odt_en = 0, ++ .size = 1024, ++ .tpr0 = 0x42d899b7, ++ .tpr1 = 0xa090, ++ .tpr2 = 0x22a00, ++ .tpr3 = 0, ++ .tpr4 = 0, ++ .tpr5 = 0, ++ .emr1 = 0x4, ++ .emr2 = 0x10, ++ .emr3 = 0, ++}; ++ ++unsigned long sunxi_dram_init(void) ++{ ++ return dramc_init(&dram_para); ++} +diff -purN u-boot-2014.04/board/sunxi/dram_wexler_tab_7200.c u-boot-sunxi/board/sunxi/dram_wexler_tab_7200.c +--- u-boot-2014.04/board/sunxi/dram_wexler_tab_7200.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_wexler_tab_7200.c 2014-04-29 14:29:40.551220315 +0200 +@@ -0,0 +1,31 @@ ++/* this file is generated, don't edit it yourself */ ++ ++#include "common.h" ++#include ++ ++static struct dram_para dram_para = { ++ .clock = 384, ++ .type = 3, ++ .rank_num = 1, ++ .density = 4096, ++ .io_width = 16, ++ .bus_width = 32, ++ .cas = 9, ++ .zq = 0x7f, ++ .odt_en = 1, ++ .size = 1024, ++ .tpr0 = 0x42d899b7, ++ .tpr1 = 0xa090, ++ .tpr2 = 0x22a00, ++ .tpr3 = 0, ++ .tpr4 = 1, ++ .tpr5 = 0, ++ .emr1 = 0x4, ++ .emr2 = 0x10, ++ .emr3 = 0, ++}; ++ ++unsigned long sunxi_dram_init(void) ++{ ++ return dramc_init(&dram_para); ++} +diff -purN u-boot-2014.04/board/sunxi/dram_wobo_i5.c u-boot-sunxi/board/sunxi/dram_wobo_i5.c +--- u-boot-2014.04/board/sunxi/dram_wobo_i5.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_wobo_i5.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -5207,11 +5514,9 @@ index 0000000..6717303 +{ + return dramc_init(&dram_para); +} -diff --git a/board/sunxi/dram_xzpad700.c b/board/sunxi/dram_xzpad700.c -new file mode 100644 -index 0000000..b04ea9a ---- /dev/null -+++ b/board/sunxi/dram_xzpad700.c +diff -purN u-boot-2014.04/board/sunxi/dram_xzpad700.c u-boot-sunxi/board/sunxi/dram_xzpad700.c +--- u-boot-2014.04/board/sunxi/dram_xzpad700.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_xzpad700.c 2014-04-29 14:29:40.551220315 +0200 @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + @@ -5244,11 +5549,122 @@ index 0000000..b04ea9a +{ + return dramc_init(&dram_para); +} -diff --git a/boards.cfg b/boards.cfg -index a8336cc..7eaefe9 100644 ---- a/boards.cfg -+++ b/boards.cfg -@@ -353,6 +353,80 @@ Active arm armv7 rmobile renesas koelsch +diff -purN u-boot-2014.04/board/sunxi/dram_zatab.c u-boot-sunxi/board/sunxi/dram_zatab.c +--- u-boot-2014.04/board/sunxi/dram_zatab.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/dram_zatab.c 2014-04-29 14:29:40.551220315 +0200 +@@ -0,0 +1,31 @@ ++/* this file is generated, don't edit it yourself */ ++ ++#include ++#include ++ ++static struct dram_para dram_para = { ++ .clock = 432, ++ .type = 3, ++ .rank_num = 1, ++ .density = 2048, ++ .io_width = 8, ++ .bus_width = 32, ++ .cas = 6, ++ .zq = 123, ++ .odt_en = 0, ++ .size = 1024, ++ .tpr0 = 0x30926692, ++ .tpr1 = 0x1090, ++ .tpr2 = 0x1a0c8, ++ .tpr3 = 0, ++ .tpr4 = 0, ++ .tpr5 = 0, ++ .emr1 = 0x4, ++ .emr2 = 0, ++ .emr3 = 0, ++}; ++ ++unsigned long sunxi_dram_init(void) ++{ ++ return dramc_init(&dram_para); ++} +diff -purN u-boot-2014.04/board/sunxi/Makefile u-boot-sunxi/board/sunxi/Makefile +--- u-boot-2014.04/board/sunxi/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/board/sunxi/Makefile 2014-04-29 14:29:40.550220339 +0200 +@@ -0,0 +1,73 @@ ++# ++# (C) Copyright 2012 Henrik Nordstrom ++# ++# Based on some other board Makefile ++# ++# (C) Copyright 2000-2003 ++# Wolfgang Denk, DENX Software Engineering, wd@denx.de. ++# ++# SPDX-License-Identifier: GPL-2.0+ ++# ++obj-y += board.o ++obj-$(CONFIG_A10_MID_1GB) += dram_sun4i_360_1024_iow16.o ++obj-$(CONFIG_A10_OLINUXINO_L) += dram_a10_olinuxino_l.o ++obj-$(CONFIG_A10S_OLINUXINO_M) += dram_a10s_olinuxino_m.o ++obj-$(CONFIG_A13_OLINUXINO) += dram_a13_olinuxino.o ++obj-$(CONFIG_A13_OLINUXINOM) += dram_a13_oli_micro.o ++obj-$(CONFIG_A13_MID) += dram_a13_mid.o ++obj-$(CONFIG_A20_OLINUXINO_M) += dram_sun7i_384_1024_iow16.o ++obj-$(CONFIG_AUXTEK_T003) += dram_auxtek_t003.o ++# This is not a typo, uses the same mem settings as the a10s-olinuxino-m ++obj-$(CONFIG_AUXTEK_T004) += dram_a10s_olinuxino_m.o ++obj-$(CONFIG_BA10_TV_BOX) += dram_sun4i_384_1024_iow8.o ++obj-$(CONFIG_COBY_MID7042) += dram_sun4i_408_1024_iow16.o ++obj-$(CONFIG_COBY_MID8042) += dram_sun4i_360_1024_iow16.o ++obj-$(CONFIG_COBY_MID9742) += dram_sun4i_408_1024_iow16.o ++obj-$(CONFIG_MARSBOARD_A10) += dram_sun4i_360_1024_iow16.o ++obj-$(CONFIG_MARSBOARD_A20) += dram_sun4i_360_1024_iow16.o ++obj-$(CONFIG_CUBIEBOARD) += dram_cubieboard.o ++obj-$(CONFIG_CUBIEBOARD_512) += dram_cubieboard_512.o ++obj-$(CONFIG_CUBIEBOARD2) += dram_cubieboard2.o ++obj-$(CONFIG_CUBIETRUCK) += dram_cubietruck.o ++obj-$(CONFIG_DNS_M82) += dram_sun4i_360_1024_iow16.o ++obj-$(CONFIG_EOMA68_A10) += dram_sun4i_360_1024_iow8.o ++obj-$(CONFIG_EOMA68_A20) += dram_sun7i_384_1024_iow16.o ++obj-$(CONFIG_EU3000) += dram_eu3000.o ++obj-$(CONFIG_GOOSEBERRY_A721) += dram_gooseberry_a721.o ++obj-$(CONFIG_H6) += dram_h6.o ++obj-$(CONFIG_HACKBERRY) += dram_hackberry.o ++obj-$(CONFIG_HCORE_HC860) += dram_sun4i_384_1024_iow16.o ++obj-$(CONFIG_A7HD) += dram_sun4i_360_1024_iow8.o ++obj-$(CONFIG_INTERRA3) += dram_mk802ii_a20.o ++obj-$(CONFIG_INET_86VZ) += dram_a10s_olinuxino_m.o ++obj-$(CONFIG_INET97F_II) += dram_sun4i_408_512.o ++obj-$(CONFIG_INET_K70HC) += dram_inet_k70hc.o ++obj-$(CONFIG_ITEADA10) += dram_cubieboard.o ++obj-$(CONFIG_ITEADA20) += dram_cubieboard2.o ++obj-$(CONFIG_JESURUN_Q5) += dram_sun4i_312_1024_iow8.o ++obj-$(CONFIG_K1001L1C) += dram_a20_olinuxino_m.o ++obj-$(CONFIG_MEFAFEIS_A08) += dram_megafeis_a08.o ++obj-$(CONFIG_MELE_A1000) += dram_sun4i_360_512.o ++obj-$(CONFIG_MELE_A1000G) += dram_sun4i_360_1024_iow8.o ++obj-$(CONFIG_MELE_A3700) += dram_sun4i_360_1024_iow8.o ++obj-$(CONFIG_MINI_X) += dram_sun4i_360_512.o ++obj-$(CONFIG_MINI_X_1GB) += dram_sun4i_360_1024_iow16.o ++obj-$(CONFIG_MINI_X_A10S) += dram_mini_x_a10s.o ++obj-$(CONFIG_MK802) += dram_sun4i_360_512.o ++obj-$(CONFIG_MK802_1GB) += dram_sun4i_360_1024_iow16.o ++obj-$(CONFIG_MK802_A10S) += dram_mk802_a10s.o ++obj-$(CONFIG_MK802II) += dram_sun4i_408_1024_iow8.o ++obj-$(CONFIG_MK802II_A20) += dram_mk802ii_a20.o ++obj-$(CONFIG_MK808C_A20) += dram_sun7i_384_1024_iow16.o ++obj-$(CONFIG_PCDUINO) += dram_sun4i_408_1024_iow8.o ++obj-$(CONFIG_PENGPOD700) += dram_sun4i_384_1024_iow8.o ++obj-$(CONFIG_PENGPOD1000) += dram_sun4i_408_1024_iow16.o ++obj-$(CONFIG_POV_PROTAB2) += dram_pov_protab2.o ++obj-$(CONFIG_POV_PROTAB2_XXL) += dram_pov_protab2_xxl.o ++obj-$(CONFIG_R7DONGLE) += dram_r7dongle.o ++obj-$(CONFIG_SANEI_N90) += dram_sanei_n90.o ++obj-$(CONFIG_UHOST_U1A) += dram_sun4i_360_1024_iow8.o ++obj-$(CONFIG_WEXLER_TAB_7200) += dram_wexler_tab_7200.o ++obj-$(CONFIG_WOBO_I5) += dram_wobo_i5.o ++obj-$(CONFIG_XZPAD700) += dram_xzpad700.o ++obj-$(CONFIG_ZATAB) += dram_zatab.o +diff -purN u-boot-2014.04/boards.cfg u-boot-sunxi/boards.cfg +--- u-boot-2014.04/boards.cfg 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/boards.cfg 2014-04-29 14:29:40.567219934 +0200 +@@ -371,6 +371,88 @@ Active arm armv7 rmobi Active arm armv7 s5pc1xx samsung goni s5p_goni - Mateusz Zalega Active arm armv7 s5pc1xx samsung smdkc100 smdkc100 - Minkyu Kang Active arm armv7 socfpga altera socfpga socfpga_cyclone5 - - @@ -5270,6 +5686,10 @@ index a8336cc..7eaefe9 100644 +Active arm armv7 sunxi - sunxi Coby_MID7042 sun4i:COBY_MID7042,SPL - +Active arm armv7 sunxi - sunxi Coby_MID8042 sun4i:COBY_MID8042,SPL - +Active arm armv7 sunxi - sunxi Coby_MID9742 sun4i:COBY_MID9742,SPL - ++Active arm armv7 sunxi - sunxi Iteaduino_Plus_A10 sun4i:ITEADA10,SPL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245 - ++Active arm armv7 sunxi - sunxi Iteaduino_Plus_A20 sun7i:ITEADA20,SPL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245 - ++Active arm armv7 sunxi - sunxi Colombus sun6i:COLOMBUS,AXP221_POWER,ENABLE_DLDO1_POWER - ++Active arm armv7 sunxi - sunxi Ippo_q8h sun8i:IPPO_Q8H,NO_AXP,CONS_INDEX=5 - +Active arm armv7 sunxi - sunxi Cubieboard sun4i:CUBIEBOARD,SPL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245 - +Active arm armv7 sunxi - sunxi Cubieboard2 sun7i:CUBIEBOARD2,SPL,SUNXI_GMAC,STATUSLED=244,STATUSLED1=245,FAST_MBUS - +Active arm armv7 sunxi - sunxi Cubieboard2_FEL sun7i:CUBIEBOARD2,SPL_FEL,SUNXI_GMAC,STATUSLED=244,STATUSLED1=245,FAST_MBUS - @@ -5286,6 +5706,7 @@ index a8336cc..7eaefe9 100644 +Active arm armv7 sunxi - sunxi Gooseberry_A721 sun4i:GOOSEBERRY_A721,SPL - +Active arm armv7 sunxi - sunxi H6 sun4i:H6,SPL - +Active arm armv7 sunxi - sunxi Hackberry sun4i:HACKBERRY,SPL - ++Active arm armv7 sunxi - sunxi HCore_HC860 sun4i:HCORE_HC860,SPL - +Active arm armv7 sunxi - sunxi Hyundai_A7HD sun4i:A7HD,SPL - +Active arm armv7 sunxi - sunxi Interra-3 sun7i:INTERRA3,SPL,SUNXI_GMAC,FAST_MBUS,MMC_SUNXI_SLOT=2 - +Active arm armv7 sunxi - sunxi INet_86VZ sun5i:INET_86VZ,SPL - @@ -5308,8 +5729,9 @@ index a8336cc..7eaefe9 100644 +Active arm armv7 sunxi - sunxi mk802 sun4i:MK802,SPL,NO_AXP - +Active arm armv7 sunxi - sunxi mk802-1gb sun4i:MK802_1GB,SPL,NO_AXP - +Active arm armv7 sunxi - sunxi mk802_a10s sun5i:MK802_A10S,SPL,AXP152_POWER,STATUSLED=34 - -+Active arm armv7 sunxi - sunxi mk802ii_A20 sun7i:MK802II_A20,SPL - ++Active arm armv7 sunxi - sunxi mk802ii_A20 sun7i:MK802II_A20,SPL - +Active arm armv7 sunxi - sunxi mk802ii sun4i:MK802II,SPL - ++Active arm armv7 sunxi - sunxi mk808c_A20 sun7i:MK808C_A20,SPL - +Active arm armv7 sunxi - sunxi pcDuino sun4i:PCDUINO,SPL,SUNXI_EMAC - +Active arm armv7 sunxi - sunxi pengpod1000 sun4i:PENGPOD1000,SPL - +Active arm armv7 sunxi - sunxi pengpod700 sun4i:PENGPOD700,SPL - @@ -5324,15 +5746,43 @@ index a8336cc..7eaefe9 100644 +Active arm armv7 sunxi - sunxi sun5i_sdcon sun5i:UART0_PORT_F,SUNXI_EMAC - +Active arm armv7 sunxi - sunxi sun5i_uart1 sun5i:CONS_INDEX=2,SUNXI_EMAC - +Active arm armv7 sunxi - sunxi uhost_u1a sun4i:UHOST_U1A,SPL,STATUSLED=34 - ++Active arm armv7 sunxi - sunxi Wexler_TAB_7200 sun7i:WEXLER_TAB_7200,SPL - +Active arm armv7 sunxi - sunxi wobo-i5 sun5i:WOBO_I5,SPL,STATUSLED=34 - +Active arm armv7 sunxi - sunxi xzpad700 sun5i:XZPAD700,SPL - ++Active arm armv7 sunxi - sunxi zatab sun4i:ZATAB,SPL - Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier Active arm armv7 u8500 st-ericsson u8500 u8500_href - - Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang -diff --git a/common/cmd_gpio.c b/common/cmd_gpio.c -index 47eee89..d551415 100644 ---- a/common/cmd_gpio.c -+++ b/common/cmd_gpio.c +diff -purN u-boot-2014.04/.checkpatch.conf u-boot-sunxi/.checkpatch.conf +--- u-boot-2014.04/.checkpatch.conf 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/.checkpatch.conf 1970-01-01 01:00:00.000000000 +0100 +@@ -1,23 +0,0 @@ +-# Not Linux, so don't expect a Linux tree. +---no-tree +- +-# Temporary for false positive in checkpatch +---ignore COMPLEX_MACRO +- +-# For CONFIG_SYS_I2C_NOPROBES +---ignore MULTISTATEMENT_MACRO_USE_DO_WHILE +- +-# For simple_strtoul +---ignore CONSIDER_KSTRTO +- +-# For min/max +---ignore MINMAX +- +-# enable more tests +---strict +- +-# Not Linux, so we don't recommend usleep_range() over udelay() +---ignore USLEEP_RANGE +- +-# Ignore networking block comment style +---ignore NETWORKING_BLOCK_COMMENT_STYLE +diff -purN u-boot-2014.04/common/cmd_gpio.c u-boot-sunxi/common/cmd_gpio.c +--- u-boot-2014.04/common/cmd_gpio.c 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/common/cmd_gpio.c 2014-04-29 14:29:40.571219838 +0200 @@ -20,6 +20,7 @@ enum gpio_cmd { GPIO_SET, GPIO_CLEAR, @@ -5340,8 +5790,8 @@ index 47eee89..d551415 100644 + GPIO_OSCILLATE, }; - static int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -@@ -48,6 +49,7 @@ static int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) + #if defined(CONFIG_DM_GPIO) && !defined(gpio_status) +@@ -138,6 +139,7 @@ static int do_gpio(cmd_tbl_t *cmdtp, int case 's': sub_cmd = GPIO_SET; break; case 'c': sub_cmd = GPIO_CLEAR; break; case 't': sub_cmd = GPIO_TOGGLE; break; @@ -5349,7 +5799,7 @@ index 47eee89..d551415 100644 default: goto show_usage; } -@@ -66,6 +68,13 @@ static int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +@@ -168,6 +170,14 @@ static int do_gpio(cmd_tbl_t *cmdtp, int if (sub_cmd == GPIO_INPUT) { gpio_direction_input(gpio); value = gpio_get_value(gpio); @@ -5360,14 +5810,14 @@ index 47eee89..d551415 100644 + gpio_set_value(gpio, i&1); + } + gpio_direction_input(gpio); ++ value = 0; } else { switch (sub_cmd) { case GPIO_SET: value = 1; break; -diff --git a/common/memsize.c b/common/memsize.c -index 73b92c8..617907d 100644 ---- a/common/memsize.c -+++ b/common/memsize.c -@@ -21,16 +21,16 @@ +diff -purN u-boot-2014.04/common/memsize.c u-boot-sunxi/common/memsize.c +--- u-boot-2014.04/common/memsize.c 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/common/memsize.c 2014-04-29 14:29:40.585219506 +0200 +@@ -24,16 +24,16 @@ DECLARE_GLOBAL_DATA_PTR; * the actually available RAM size between addresses `base' and * `base + maxsize'. */ @@ -5392,7 +5842,7 @@ index 73b92c8..617907d 100644 addr = base + cnt; /* pointer arith! */ sync (); save[i++] = *addr; -@@ -50,7 +50,7 @@ long get_ram_size(long *base, long maxsize) +@@ -53,7 +53,7 @@ long get_ram_size(long *base, long maxsi */ sync (); *addr = save[i]; @@ -5401,7 +5851,7 @@ index 73b92c8..617907d 100644 addr = base + cnt; sync (); *addr = save[--i]; -@@ -58,15 +58,15 @@ long get_ram_size(long *base, long maxsize) +@@ -61,15 +61,15 @@ long get_ram_size(long *base, long maxsi return (0); } @@ -5420,11 +5870,10 @@ index 73b92c8..617907d 100644 addr = base + cnt; *addr = save[--i]; } -diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c -index fc2f226..e20b19e 100644 ---- a/common/spl/spl_mmc.c -+++ b/common/spl/spl_mmc.c -@@ -30,8 +30,10 @@ static int mmc_load_image_raw(struct mmc *mmc, unsigned long sector) +diff -purN u-boot-2014.04/common/spl/spl_mmc.c u-boot-sunxi/common/spl/spl_mmc.c +--- u-boot-2014.04/common/spl/spl_mmc.c 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/common/spl/spl_mmc.c 2014-04-29 14:29:40.586219483 +0200 +@@ -29,8 +29,10 @@ static int mmc_load_image_raw(struct mmc if (err == 0) goto end; @@ -5436,21 +5885,18 @@ index fc2f226..e20b19e 100644 spl_parse_image_header(header); -diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile -index b903c45..ba6b98e 100644 ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -31,3 +31,4 @@ obj-$(CONFIG_XILINX_GPIO) += xilinx_gpio.o +diff -purN u-boot-2014.04/drivers/gpio/Makefile u-boot-sunxi/drivers/gpio/Makefile +--- u-boot-2014.04/drivers/gpio/Makefile 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/drivers/gpio/Makefile 2014-04-29 14:29:40.609218935 +0200 +@@ -34,3 +34,4 @@ obj-$(CONFIG_XILINX_GPIO) += xilinx_gpio obj-$(CONFIG_ADI_GPIO2) += adi_gpio2.o obj-$(CONFIG_TCA642X) += tca642x.o oby-$(CONFIG_SX151X) += sx151x.o +obj-$(CONFIG_SUNXI_GPIO) += sunxi_gpio.o -diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c -new file mode 100644 -index 0000000..b3686f4 ---- /dev/null -+++ b/drivers/gpio/sunxi_gpio.c -@@ -0,0 +1,120 @@ +diff -purN u-boot-2014.04/drivers/gpio/sunxi_gpio.c u-boot-sunxi/drivers/gpio/sunxi_gpio.c +--- u-boot-2014.04/drivers/gpio/sunxi_gpio.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/drivers/gpio/sunxi_gpio.c 2014-04-29 14:29:40.611218889 +0200 +@@ -0,0 +1,102 @@ +/* + * (C) Copyright 2012 Henrik Nordstrom + * @@ -5460,23 +5906,7 @@ index 0000000..b3686f4 + * Allwinner Technology Co., Ltd. + * Tom Cubie + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include @@ -5488,8 +5918,7 @@ index 0000000..b3686f4 + u32 dat; + u32 bank = GPIO_BANK(pin); + u32 num = GPIO_NUM(pin); -+ struct sunxi_gpio *pio = -+ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank]; ++ struct sunxi_gpio *pio = BANK_TO_GPIO(bank); + + dat = readl(&pio->dat); + if (val) @@ -5507,8 +5936,7 @@ index 0000000..b3686f4 + u32 dat; + u32 bank = GPIO_BANK(pin); + u32 num = GPIO_NUM(pin); -+ struct sunxi_gpio *pio = -+ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank]; ++ struct sunxi_gpio *pio = BANK_TO_GPIO(bank); + + dat = readl(&pio->dat); + dat >>= num; @@ -5550,7 +5978,7 @@ index 0000000..b3686f4 + return sunxi_gpio_output(gpio, value); +} + -+int name_to_gpio(const char *name) ++int sunxi_name_to_gpio(const char *name) +{ + int group = 0; + int groupsize = 9 * 32; @@ -5571,11 +5999,10 @@ index 0000000..b3686f4 + return -1; + return group * 32 + pin; +} -diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile -index fa3a875..2a44db4 100644 ---- a/drivers/i2c/Makefile -+++ b/drivers/i2c/Makefile -@@ -15,6 +15,7 @@ obj-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o +diff -purN u-boot-2014.04/drivers/i2c/Makefile u-boot-sunxi/drivers/i2c/Makefile +--- u-boot-2014.04/drivers/i2c/Makefile 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/drivers/i2c/Makefile 2014-04-29 14:29:40.611218889 +0200 +@@ -15,6 +15,7 @@ obj-$(CONFIG_PCA9564_I2C) += pca9564_i2c obj-$(CONFIG_TSI108_I2C) += tsi108_i2c.o obj-$(CONFIG_U8500_I2C) += u8500_i2c.o obj-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o @@ -5583,32 +6010,14 @@ index fa3a875..2a44db4 100644 obj-$(CONFIG_SYS_I2C) += i2c_core.o obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o -diff --git a/drivers/i2c/sunxi_i2c.c b/drivers/i2c/sunxi_i2c.c -new file mode 100644 -index 0000000..2d690ec ---- /dev/null -+++ b/drivers/i2c/sunxi_i2c.c -@@ -0,0 +1,276 @@ +diff -purN u-boot-2014.04/drivers/i2c/sunxi_i2c.c u-boot-sunxi/drivers/i2c/sunxi_i2c.c +--- u-boot-2014.04/drivers/i2c/sunxi_i2c.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/drivers/i2c/sunxi_i2c.c 2014-04-29 14:29:40.614218818 +0200 +@@ -0,0 +1,260 @@ +/* + * (C) Copyright 2012 Henrik Nordstrom + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include @@ -5620,14 +6029,14 @@ index 0000000..2d690ec +#include + +static struct i2c __attribute__ ((section(".data"))) *i2c_base = -+ (struct i2c *)0x1c2ac00; ++ (struct i2c *)SUNXI_TWI0_BASE; + +void i2c_init(int speed, int slaveaddr) +{ + int timeout = 0x2ff; + -+ sunxi_gpio_set_cfgpin(SUNXI_GPB(0), 2); -+ sunxi_gpio_set_cfgpin(SUNXI_GPB(1), 2); ++ sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUNXI_GPB0_TWI0); ++ sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUNXI_GPB0_TWI0); + clock_twi_onoff(0, 1); + + /* Enable the i2c bus */ @@ -5865,11 +6274,10 @@ index 0000000..2d690ec + + return rc; +} -diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile -index e793ed9..c695841 100644 ---- a/drivers/mmc/Makefile -+++ b/drivers/mmc/Makefile -@@ -27,6 +27,7 @@ obj-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o +diff -purN u-boot-2014.04/drivers/mmc/Makefile u-boot-sunxi/drivers/mmc/Makefile +--- u-boot-2014.04/drivers/mmc/Makefile 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/drivers/mmc/Makefile 2014-04-29 14:29:40.616218770 +0200 +@@ -28,6 +28,7 @@ obj-$(CONFIG_SPEAR_SDHCI) += spear_sdhci obj-$(CONFIG_TEGRA_MMC) += tegra_mmc.o obj-$(CONFIG_DWMMC) += dw_mmc.o obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o @@ -5877,12 +6285,10 @@ index e793ed9..c695841 100644 obj-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o obj-$(CONFIG_SOCFPGA_DWMMC) += socfpga_dw_mmc.o ifdef CONFIG_SPL_BUILD -diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c -new file mode 100755 -index 0000000..be5f301 ---- /dev/null -+++ b/drivers/mmc/sunxi_mmc.c -@@ -0,0 +1,660 @@ +diff -purN u-boot-2014.04/drivers/mmc/sunxi_mmc.c u-boot-sunxi/drivers/mmc/sunxi_mmc.c +--- u-boot-2014.04/drivers/mmc/sunxi_mmc.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/drivers/mmc/sunxi_mmc.c 2014-04-29 14:29:40.619218698 +0200 +@@ -0,0 +1,624 @@ +/* + * (C) Copyright 2007-2011 + * Allwinner Technology Co., Ltd. @@ -5890,23 +6296,7 @@ index 0000000..be5f301 + * + * MMC driver for allwinner sunxi platform. + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include @@ -5978,7 +6368,8 @@ index 0000000..be5f301 + u32 data_buf1_sz:13; + u32 data_buf2_sz:13; + u32 reserverd2_1:6; -+#elif defined(CONFIG_SUN5I) || defined(CONFIG_SUN7I) ++#elif defined(CONFIG_SUN5I) || defined(CONFIG_SUN6I) || \ ++ defined(CONFIG_SUN7I) || defined(CONFIG_SUN8I) +#define SDXC_DES_NUM_SHIFT 16 +#define SDXC_DES_BUFFER_MAX_LEN (1 << SDXC_DES_NUM_SHIFT) + u32 data_buf1_sz:16; @@ -5997,10 +6388,10 @@ index 0000000..be5f301 + unsigned fatal_err; + unsigned mod_clk; + struct sunxi_mmc *reg; ++ struct mmc_config cfg; +}; + +/* support 4 mmc hosts */ -+struct mmc mmc_dev[4]; +struct sunxi_mmc_host mmc_host[4]; + +static int mmc_resource_init(int sdc_no) @@ -6039,22 +6430,10 @@ index 0000000..be5f301 + +static int mmc_clk_io_on(int sdc_no) +{ -+ unsigned int rval; -+ unsigned int pll5_clk; ++ unsigned int pin; ++ unsigned int pll_clk; + unsigned int divider; + struct sunxi_mmc_host *mmchost = &mmc_host[sdc_no]; -+ static struct sunxi_gpio *gpio_c = -+ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[SUNXI_GPIO_C]; -+ static struct sunxi_gpio *gpio_f = -+ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[SUNXI_GPIO_F]; -+#if CONFIG_MMC1_PG -+ static struct sunxi_gpio *gpio_g = -+ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[SUNXI_GPIO_G]; -+#endif -+ static struct sunxi_gpio *gpio_h = -+ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[SUNXI_GPIO_H]; -+ static struct sunxi_gpio *gpio_i = -+ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[SUNXI_GPIO_I]; + struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + + debug("init mmc %d clock and io\n", sdc_no); @@ -6063,40 +6442,47 @@ index 0000000..be5f301 + switch (sdc_no) { + case 0: + /* D1-PF0, D0-PF1, CLK-PF2, CMD-PF3, D3-PF4, D4-PF5 */ -+ writel(0x222222, &gpio_f->cfg[0]); -+ writel(0x555, &gpio_f->pull[0]); -+ writel(0xaaa, &gpio_f->drv[0]); ++ for (pin = SUNXI_GPF(0); pin <= SUNXI_GPF(5); pin++) { ++ sunxi_gpio_set_cfgpin(pin, SUNXI_GPF0_SDC0); ++ sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); ++ sunxi_gpio_set_drv(pin, 2); ++ } + break; + + case 1: +#if CONFIG_MMC1_PG + /* PG0-CMD, PG1-CLK, PG2~5-D0~3 : 4 */ -+ writel(0x444444, &gpio_g->cfg[0]); -+ writel(0x555, &gpio_g->pull[0]); -+ writel(0xaaa, &gpio_g->drv[0]); ++ for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) { ++ sunxi_gpio_set_cfgpin(pin, SUN4I_GPG0_SDC1); ++ sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); ++ sunxi_gpio_set_drv(pin, 2); ++ } +#else + /* PH22-CMD, PH23-CLK, PH24~27-D0~D3 : 5 */ -+ writel(0x55 << 24, &gpio_h->cfg[2]); -+ writel(0x5555, &gpio_h->cfg[3]); -+ writel(0x555 << 12, &gpio_h->pull[1]); -+ writel(0xaaa << 12, &gpio_h->drv[1]); ++ for (pin = SUNXI_GPH(22); pin <= SUNXI_GPH(27); pin++) { ++ sunxi_gpio_set_cfgpin(pin, SUN4I_GPH22_SDC1); ++ sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); ++ sunxi_gpio_set_drv(pin, 2); ++ } +#endif + break; + + case 2: + /* CMD-PC6, CLK-PC7, D0-PC8, D1-PC9, D2-PC10, D3-PC11 */ -+ writel(0x33 << 24, &gpio_c->cfg[0]); -+ writel(0x3333, &gpio_c->cfg[1]); -+ writel(0x555 << 12, &gpio_c->pull[0]); -+ writel(0xaaa << 12, &gpio_c->drv[0]); ++ for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) { ++ sunxi_gpio_set_cfgpin(pin, SUNXI_GPC6_SDC2); ++ sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); ++ sunxi_gpio_set_drv(pin, 2); ++ } + break; + + case 3: + /* PI4-CMD, PI5-CLK, PI6~9-D0~D3 : 2 */ -+ writel(0x2222 << 16, &gpio_i->cfg[0]); -+ writel(0x22, &gpio_i->cfg[1]); -+ writel(0x555 << 8, &gpio_i->pull[0]); -+ writel(0x555 << 8, &gpio_i->drv[0]); ++ for (pin = SUNXI_GPI(4); pin <= SUNXI_GPI(9); pin++) { ++ sunxi_gpio_set_cfgpin(pin, SUN4I_GPI4_SDC3); ++ sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); ++ sunxi_gpio_set_drv(pin, 2); ++ } + break; + + default: @@ -6104,18 +6490,20 @@ index 0000000..be5f301 + } + + /* config ahb clock */ -+ rval = readl(&ccm->ahb_gate0); -+ rval |= (1 << (8 + sdc_no)); -+ writel(rval, &ccm->ahb_gate0); ++ setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_MMC(sdc_no)); ++ ++#if defined(CONFIG_SUN6I) || defined(CONFIG_SUN8I) ++ /* unassert reset */ ++ setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MMC(sdc_no)); ++#endif + + /* config mod clock */ -+ pll5_clk = clock_get_pll5(); -+ if (pll5_clk > 400000000) -+ divider = 4; -+ else -+ divider = 3; -+ writel((0x1 << 31) | (0x2 << 24) | divider, mmchost->mclkreg); -+ mmchost->mod_clk = pll5_clk / (divider + 1); ++ pll_clk = clock_get_pll6(); ++ /* should be close to 100 MHz but no more, so round up */ ++ divider = ((pll_clk + 99999999) / 100000000) - 1; ++ writel(CCM_MMC_CTRL_ENABLE | CCM_MMC_CTRL_PLL6 | divider, ++ mmchost->mclkreg); ++ mmchost->mod_clk = pll_clk / (divider + 1); + + dumphex32("ccmu", (char *)SUNXI_CCM_BASE, 0x100); + dumphex32("gpio", (char *)SUNXI_PIO_BASE, 0x100); @@ -6127,16 +6515,21 @@ index 0000000..be5f301 + +static int mmc_update_clk(struct mmc *mmc) +{ -+ struct sunxi_mmc_host *mmchost = (struct sunxi_mmc_host *)mmc->priv; ++ struct sunxi_mmc_host *mmchost = mmc->priv; + unsigned int cmd; -+ unsigned timeout = 0xfffff; ++ unsigned timeout_msecs = 2000; + -+ cmd = (0x1 << 31) | (0x1 << 21) | (0x1 << 13); ++ cmd = SUNXI_MMC_CMD_START | ++ SUNXI_MMC_CMD_UPCLK_ONLY | ++ SUNXI_MMC_CMD_WAIT_PRE_OVER; + writel(cmd, &mmchost->reg->cmd); -+ while ((readl(&mmchost->reg->cmd) & (0x1 << 31)) && timeout--); -+ if (!timeout) -+ return -1; ++ while (readl(&mmchost->reg->cmd) & SUNXI_MMC_CMD_START) { ++ if (!timeout_msecs--) ++ return -1; ++ udelay(1000); ++ } + ++ /* clock update sets various irq status bits, clear these */ + writel(readl(&mmchost->reg->rint), &mmchost->reg->rint); + + return 0; @@ -6144,28 +6537,23 @@ index 0000000..be5f301 + +static int mmc_config_clock(struct mmc *mmc, unsigned div) +{ -+ struct sunxi_mmc_host *mmchost = (struct sunxi_mmc_host *)mmc->priv; ++ struct sunxi_mmc_host *mmchost = mmc->priv; + unsigned rval = readl(&mmchost->reg->clkcr); + -+ /* -+ * CLKCREG[7:0]: divider -+ * CLKCREG[16]: on/off -+ * CLKCREG[17]: power save -+ */ + /* Disable Clock */ -+ rval &= ~(0x1 << 16); ++ rval &= ~SUNXI_MMC_CLK_ENABLE; + writel(rval, &mmchost->reg->clkcr); + if (mmc_update_clk(mmc)) + return -1; + + /* Change Divider Factor */ -+ rval &= ~(0xff); ++ rval &= ~SUNXI_MMC_CLK_DIVIDER_MASK; + rval |= div; + writel(rval, &mmchost->reg->clkcr); + if (mmc_update_clk(mmc)) + return -1; + /* Re-enable Clock */ -+ rval |= (0x1 << 16); ++ rval |= SUNXI_MMC_CLK_ENABLE; + writel(rval, &mmchost->reg->clkcr); + + if (mmc_update_clk(mmc)) @@ -6176,7 +6564,7 @@ index 0000000..be5f301 + +static void mmc_set_ios(struct mmc *mmc) +{ -+ struct sunxi_mmc_host *mmchost = (struct sunxi_mmc_host *)mmc->priv; ++ struct sunxi_mmc_host *mmchost = mmc->priv; + unsigned int clkdiv = 0; + + debug("set ios: bus_width: %x, clock: %d, mod_clk: %d\n", @@ -6184,11 +6572,12 @@ index 0000000..be5f301 + + /* Change clock first */ + clkdiv = (mmchost->mod_clk + (mmc->clock >> 1)) / mmc->clock / 2; -+ if (mmc->clock) ++ if (mmc->clock) { + if (mmc_config_clock(mmc, clkdiv)) { + mmchost->fatal_err = 1; + return; + } ++ } + + /* Change bus width */ + if (mmc->bus_width == 8) @@ -6201,54 +6590,44 @@ index 0000000..be5f301 + +static int mmc_core_init(struct mmc *mmc) +{ -+ struct sunxi_mmc_host *mmchost = (struct sunxi_mmc_host *)mmc->priv; ++ struct sunxi_mmc_host *mmchost = mmc->priv; + + /* Reset controller */ -+ writel(0x7, &mmchost->reg->gctrl); ++ writel(SUNXI_MMC_GCTRL_RESET, &mmchost->reg->gctrl); + + return 0; +} + +static int mmc_trans_data_by_cpu(struct mmc *mmc, struct mmc_data *data) +{ -+ struct sunxi_mmc_host *mmchost = (struct sunxi_mmc_host *)mmc->priv; ++ struct sunxi_mmc_host *mmchost = mmc->priv; ++ const int reading = !!(data->flags & MMC_DATA_READ); ++ const uint32_t status_bit = reading ? SUNXI_MMC_STATUS_FIFO_EMPTY : ++ SUNXI_MMC_STATUS_FIFO_FULL; + unsigned i; + unsigned byte_cnt = data->blocksize * data->blocks; -+ unsigned *buff; -+ unsigned timeout = 0xfffff; ++ unsigned timeout_msecs = 2000; ++ unsigned *buff = (unsigned int *)(reading ? data->dest : data->src); + -+ if (data->flags & MMC_DATA_READ) { -+ buff = (unsigned int *)data->dest; -+ for (i = 0; i < (byte_cnt >> 2); i++) { -+ while (--timeout && -+ (readl(&mmchost->reg->status) & (0x1 << 2))); -+ if (timeout <= 0) -+ goto out; ++ for (i = 0; i < (byte_cnt >> 2); i++) { ++ while (readl(&mmchost->reg->status) & status_bit) { ++ if (!timeout_msecs--) ++ return -1; ++ udelay(1000); ++ } ++ ++ if (reading) + buff[i] = readl(mmchost->database); -+ timeout = 0xfffff; -+ } -+ } else { -+ buff = (unsigned int *)data->src; -+ for (i = 0; i < (byte_cnt >> 2); i++) { -+ while (--timeout && -+ (readl(&mmchost->reg->status) & (0x1 << 3))); -+ if (timeout <= 0) -+ goto out; ++ else + writel(buff[i], mmchost->database); -+ timeout = 0xfffff; -+ } + } + -+out: -+ if (timeout <= 0) -+ return -1; -+ + return 0; +} + +static int mmc_trans_data_by_dma(struct mmc *mmc, struct mmc_data *data) +{ -+ struct sunxi_mmc_host *mmchost = (struct sunxi_mmc_host *)mmc->priv; ++ struct sunxi_mmc_host *mmchost = mmc->priv; + unsigned byte_cnt = data->blocksize * data->blocks; + unsigned char *buff; + unsigned des_idx = 0; @@ -6261,8 +6640,6 @@ index 0000000..be5f301 + buff = data->flags & MMC_DATA_READ ? + (unsigned char *)data->dest : (unsigned char *)data->src; + remain = byte_cnt & (SDXC_DES_BUFFER_MAX_LEN - 1); -+ if (!remain) -+ remain = SDXC_DES_BUFFER_MAX_LEN; + + flush_cache((unsigned long)buff, (unsigned long)byte_cnt); + for (i = 0; i < buff_frag_num; i++, des_idx++) { @@ -6271,9 +6648,7 @@ index 0000000..be5f301 + pdes[des_idx].own = 1; + pdes[des_idx].dic = 1; + if (buff_frag_num > 1 && i != buff_frag_num - 1) -+ pdes[des_idx].data_buf1_sz = -+ (SDXC_DES_BUFFER_MAX_LEN - -+ 1) & SDXC_DES_BUFFER_MAX_LEN; ++ pdes[des_idx].data_buf1_sz = 0; /* 0 == max_len */ + else + pdes[des_idx].data_buf1_sz = remain; + @@ -6301,32 +6676,21 @@ index 0000000..be5f301 + flush_cache((unsigned long)pdes, + sizeof(struct sunxi_mmc_des) * (des_idx + 1)); + -+ /* -+ * GCTRLREG -+ * GCTRL[2] : DMA reset -+ * GCTRL[5] : DMA enable -+ * -+ * IDMACREG -+ * IDMAC[0] : IDMA soft reset -+ * IDMAC[1] : IDMA fix burst flag -+ * IDMAC[7] : IDMA on -+ * -+ * IDIECREG -+ * IDIE[0] : IDMA transmit interrupt flag -+ * IDIE[1] : IDMA receive interrupt flag -+ */ + rval = readl(&mmchost->reg->gctrl); + /* Enable DMA */ -+ writel(rval | (0x1 << 5) | (0x1 << 2), &mmchost->reg->gctrl); ++ writel(rval | SUNXI_MMC_GCTRL_DMA_RESET | SUNXI_MMC_GCTRL_DMA_ENABLE, ++ &mmchost->reg->gctrl); + /* Reset iDMA */ -+ writel((0x1 << 0), &mmchost->reg->dmac); ++ writel(SUNXI_MMC_IDMAC_RESET, &mmchost->reg->dmac); + /* Enable iDMA */ -+ writel((0x1 << 1) | (1 << 7), &mmchost->reg->dmac); -+ rval = readl(&mmchost->reg->idie) & (~3); ++ writel(SUNXI_MMC_IDMAC_FIXBURST | SUNXI_MMC_IDMAC_ENABLE, ++ &mmchost->reg->dmac); ++ rval = readl(&mmchost->reg->idie) & ++ ~(SUNXI_MMC_IDIE_TXIRQ|SUNXI_MMC_IDIE_RXIRQ); + if (data->flags & MMC_DATA_WRITE) -+ rval |= (0x1 << 0); ++ rval |= SUNXI_MMC_IDIE_TXIRQ; + else -+ rval |= (0x1 << 1); ++ rval |= SUNXI_MMC_IDIE_RXIRQ; + writel(rval, &mmchost->reg->idie); + writel((u32) pdes, &mmchost->reg->dlba); + writel((0x2 << 28) | (0x7 << 16) | (0x01 << 3), @@ -6335,12 +6699,44 @@ index 0000000..be5f301 + return 0; +} + ++static void mmc_enable_dma_accesses(struct mmc *mmc, int dma) ++{ ++ struct sunxi_mmc_host *mmchost = mmc->priv; ++ ++ unsigned int gctrl = readl(&mmchost->reg->gctrl); ++ if (dma) ++ gctrl &= ~SUNXI_MMC_GCTRL_ACCESS_BY_AHB; ++ else ++ gctrl |= SUNXI_MMC_GCTRL_ACCESS_BY_AHB; ++ writel(gctrl, &mmchost->reg->gctrl); ++} ++ ++static int mmc_rint_wait(struct mmc *mmc, unsigned int timeout_msecs, ++ unsigned int done_bit, const char *what) ++{ ++ struct sunxi_mmc_host *mmchost = mmc->priv; ++ unsigned int status; ++ ++ do { ++ status = readl(&mmchost->reg->rint); ++ if (!timeout_msecs-- || ++ (status & SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT)) { ++ debug("%s timeout %x\n", what, ++ status & SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT); ++ return TIMEOUT; ++ } ++ udelay(1000); ++ } while (!(status & done_bit)); ++ ++ return 0; ++} ++ +static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + struct mmc_data *data) +{ -+ struct sunxi_mmc_host *mmchost = (struct sunxi_mmc_host *)mmc->priv; -+ unsigned int cmdval = 0x80000000; -+ signed int timeout = 0; ++ struct sunxi_mmc_host *mmchost = mmc->priv; ++ unsigned int cmdval = SUNXI_MMC_CMD_START; ++ unsigned int timeout_msecs; + int error = 0; + unsigned int status = 0; + unsigned int usedma = 0; @@ -6353,30 +6749,14 @@ index 0000000..be5f301 + if (cmd->cmdidx == 12) + return 0; + -+ /* -+ * CMDREG -+ * CMD[5:0] : Command index -+ * CMD[6] : Has response -+ * CMD[7] : Long response -+ * CMD[8] : Check response CRC -+ * CMD[9] : Has data -+ * CMD[10] : Write -+ * CMD[11] : Steam mode -+ * CMD[12] : Auto stop -+ * CMD[13] : Wait previous over -+ * CMD[14] : About cmd -+ * CMD[15] : Send initialization -+ * CMD[21] : Update clock -+ * CMD[31] : Load cmd -+ */ + if (!cmd->cmdidx) -+ cmdval |= (0x1 << 15); ++ cmdval |= SUNXI_MMC_CMD_SEND_INIT_SEQ; + if (cmd->resp_type & MMC_RSP_PRESENT) -+ cmdval |= (0x1 << 6); ++ cmdval |= SUNXI_MMC_CMD_RESP_EXPIRE; + if (cmd->resp_type & MMC_RSP_136) -+ cmdval |= (0x1 << 7); ++ cmdval |= SUNXI_MMC_CMD_LONG_RESPONSE; + if (cmd->resp_type & MMC_RSP_CRC) -+ cmdval |= (0x1 << 8); ++ cmdval |= SUNXI_MMC_CMD_CHK_RESPONSE_CRC; + + if (data) { + if ((u32) data->dest & 0x3) { @@ -6384,11 +6764,11 @@ index 0000000..be5f301 + goto out; + } + -+ cmdval |= (0x1 << 9) | (0x1 << 13); ++ cmdval |= SUNXI_MMC_CMD_DATA_EXPIRE|SUNXI_MMC_CMD_WAIT_PRE_OVER; + if (data->flags & MMC_DATA_WRITE) -+ cmdval |= (0x1 << 10); ++ cmdval |= SUNXI_MMC_CMD_WRITE; + if (data->blocks > 1) -+ cmdval |= (0x1 << 12); ++ cmdval |= SUNXI_MMC_CMD_AUTO_STOP; + writel(data->blocksize, &mmchost->reg->blksz); + writel(data->blocks * data->blocksize, &mmchost->reg->bytecnt); + } @@ -6416,63 +6796,49 @@ index 0000000..be5f301 + if (0) { +#endif + usedma = 1; -+ writel(readl(&mmchost->reg->gctrl) & ~(0x1 << 31), -+ &mmchost->reg->gctrl); ++ mmc_enable_dma_accesses(mmc, 1); + ret = mmc_trans_data_by_dma(mmc, data); + writel(cmdval | cmd->cmdidx, &mmchost->reg->cmd); + } else { -+ writel(readl(&mmchost->reg->gctrl) | 0x1 << 31, -+ &mmchost->reg->gctrl); ++ mmc_enable_dma_accesses(mmc, 0); + writel(cmdval | cmd->cmdidx, &mmchost->reg->cmd); + ret = mmc_trans_data_by_cpu(mmc, data); + } + if (ret) { -+ error = readl(&mmchost->reg->rint) & 0xbfc2; ++ error = readl(&mmchost->reg->rint) & \ ++ SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT; + error = TIMEOUT; + goto out; + } + } + -+ timeout = 0xfffff; -+ do { -+ status = readl(&mmchost->reg->rint); -+ if (!timeout-- || (status & 0xbfc2)) { -+ error = status & 0xbfc2; -+ debug("cmd timeout %x\n", error); -+ error = TIMEOUT; -+ goto out; -+ } -+ } while (!(status & 0x4)); ++ error = mmc_rint_wait(mmc, 0xfffff, SUNXI_MMC_RINT_COMMAND_DONE, "cmd"); ++ if (error) ++ goto out; + + if (data) { -+ unsigned done = 0; -+ timeout = usedma ? 0xffff * bytecnt : 0xffff; -+ debug("cacl timeout %x\n", timeout); -+ do { -+ status = readl(&mmchost->reg->rint); -+ if (!timeout-- || (status & 0xbfc2)) { -+ error = status & 0xbfc2; -+ debug("data timeout %x\n", error); -+ error = TIMEOUT; -+ goto out; -+ } -+ if (data->blocks > 1) -+ done = status & (0x1 << 14); -+ else -+ done = status & (0x1 << 3); -+ } while (!done); ++ timeout_msecs = usedma ? 120 * bytecnt : 120; ++ debug("cacl timeout %x msec\n", timeout_msecs); ++ error = mmc_rint_wait(mmc, timeout_msecs, ++ data->blocks > 1 ? ++ SUNXI_MMC_RINT_AUTO_COMMAND_DONE : ++ SUNXI_MMC_RINT_DATA_OVER, ++ "data"); ++ if (error) ++ goto out; + } + + if (cmd->resp_type & MMC_RSP_BUSY) { -+ timeout = 0xfffff; ++ timeout_msecs = 2000; + do { + status = readl(&mmchost->reg->status); -+ if (!timeout--) { ++ if (!timeout_msecs--) { + debug("busy timeout\n"); + error = TIMEOUT; + goto out; + } -+ } while (status & (1 << 9)); ++ udelay(1000); ++ } while (status & SUNXI_MMC_STATUS_CARD_DATA_BUSY); + } + + if (cmd->resp_type & MMC_RSP_136) { @@ -6502,51 +6868,71 @@ index 0000000..be5f301 + writel(status, &mmchost->reg->idst); + writel(0, &mmchost->reg->idie); + writel(0, &mmchost->reg->dmac); -+ writel(readl(&mmchost->reg->gctrl) & ~(0x1 << 5), ++ writel(readl(&mmchost->reg->gctrl) & ~SUNXI_MMC_GCTRL_DMA_ENABLE, + &mmchost->reg->gctrl); + } + if (error < 0) { -+ writel(0x7, &mmchost->reg->gctrl); ++ writel(SUNXI_MMC_GCTRL_RESET, &mmchost->reg->gctrl); + mmc_update_clk(mmc); + } + writel(0xffffffff, &mmchost->reg->rint); -+ writel(readl(&mmchost->reg->gctrl) | (1 << 1), &mmchost->reg->gctrl); ++ writel(readl(&mmchost->reg->gctrl) | SUNXI_MMC_GCTRL_FIFO_RESET, ++ &mmchost->reg->gctrl); + + return error; +} + ++static const struct mmc_ops sunxi_mmc_ops = { ++ .send_cmd = mmc_send_cmd, ++ .set_ios = mmc_set_ios, ++ .init = mmc_core_init, ++}; ++ +int sunxi_mmc_init(int sdc_no) +{ -+ struct mmc *mmc; ++ struct mmc_config *cfg = &mmc_host[sdc_no].cfg; + -+ memset(&mmc_dev[sdc_no], 0, sizeof(struct mmc)); + memset(&mmc_host[sdc_no], 0, sizeof(struct sunxi_mmc_host)); -+ mmc = &mmc_dev[sdc_no]; + -+ sprintf(mmc->name, "SUNXI SD/MMC"); -+ mmc->priv = &mmc_host[sdc_no]; -+ mmc->send_cmd = mmc_send_cmd; -+ mmc->set_ios = mmc_set_ios; -+ mmc->init = mmc_core_init; ++ cfg->name = "SUNXI SD/MMC"; ++ cfg->ops = &sunxi_mmc_ops; + -+ mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; -+ mmc->host_caps = MMC_MODE_4BIT; -+ mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; ++ cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; ++ cfg->host_caps = MMC_MODE_4BIT; ++ cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; ++ cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; + -+ mmc->f_min = 400000; -+ mmc->f_max = 52000000; ++ cfg->f_min = 400000; ++ cfg->f_max = 52000000; + + mmc_resource_init(sdc_no); + mmc_clk_io_on(sdc_no); + -+ mmc_register(mmc); ++ if (mmc_create(cfg, &mmc_host[sdc_no]) == NULL) ++ return -1; + + return 0; +} -diff --git a/drivers/net/Makefile b/drivers/net/Makefile -index 7f9ce90..136479d 100644 ---- a/drivers/net/Makefile -+++ b/drivers/net/Makefile +diff -purN u-boot-2014.04/drivers/net/designware.c u-boot-sunxi/drivers/net/designware.c +--- u-boot-2014.04/drivers/net/designware.c 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/drivers/net/designware.c 2014-04-29 14:29:40.633218365 +0200 +@@ -249,10 +249,10 @@ static int dw_eth_init(struct eth_device + rx_descs_init(dev); + tx_descs_init(dev); + +- writel(FIXEDBURST | PRIORXTX_41 | BURST_16, &dma_p->busmode); ++ writel(FIXEDBURST | PRIORXTX_41 | BURST_8, &dma_p->busmode); + +- writel(readl(&dma_p->opmode) | FLUSHTXFIFO | STOREFORWARD, +- &dma_p->opmode); ++ writel(readl(&dma_p->opmode) | FLUSHTXFIFO | STOREFORWARD | ++ TXSECONDFRAME, &dma_p->opmode); + + writel(readl(&dma_p->opmode) | RXSTART | TXSTART, &dma_p->opmode); + +diff -purN u-boot-2014.04/drivers/net/Makefile u-boot-sunxi/drivers/net/Makefile +--- u-boot-2014.04/drivers/net/Makefile 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/drivers/net/Makefile 2014-04-29 14:29:40.631218413 +0200 @@ -50,7 +50,8 @@ obj-$(CONFIG_RTL8169) += rtl8169.o obj-$(CONFIG_SH_ETHER) += sh_eth.o obj-$(CONFIG_SMC91111) += smc91111.o @@ -6557,407 +6943,534 @@ index 7f9ce90..136479d 100644 obj-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o obj-$(CONFIG_TSEC_ENET) += tsec.o fsl_mdio.o obj-$(CONFIG_DRIVER_TI_CPSW) += cpsw.o -diff --git a/drivers/net/designware.c b/drivers/net/designware.c -index 22155b4..865abe1 100644 ---- a/drivers/net/designware.c -+++ b/drivers/net/designware.c -@@ -154,7 +154,7 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis) - /* Resore the HW MAC address as it has been lost during MAC reset */ - dw_write_hwaddr(dev); - -- writel(FIXEDBURST | PRIORXTX_41 | BURST_16, -+ writel(FIXEDBURST | PRIORXTX_41 | BURST_8, - &dma_p->busmode); - - writel(readl(&dma_p->opmode) | FLUSHTXFIFO | STOREFORWARD | -diff --git a/drivers/net/sunxi_wemac.c b/drivers/net/sunxi_emac.c -similarity index 78% -rename from drivers/net/sunxi_wemac.c -rename to drivers/net/sunxi_emac.c -index 699a381..0cadf89 100644 ---- a/drivers/net/sunxi_wemac.c -+++ b/drivers/net/sunxi_emac.c -@@ -1,5 +1,5 @@ - /* -- * sunxi_wemac.c -- Allwinner A10 ethernet driver +diff -purN u-boot-2014.04/drivers/net/sunxi_emac.c u-boot-sunxi/drivers/net/sunxi_emac.c +--- u-boot-2014.04/drivers/net/sunxi_emac.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/drivers/net/sunxi_emac.c 2014-04-29 14:29:40.645218080 +0200 +@@ -0,0 +1,521 @@ ++/* + * sunxi_emac.c -- Allwinner A10 ethernet driver - * - * (C) Copyright 2012, Stefan Roese - * -@@ -7,16 +7,16 @@ - */ - - #include ++ * ++ * (C) Copyright 2012, Stefan Roese ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include +#include - #include --#include - #include --#include ++#include ++#include +#include - #include - #include - #include - - /* EMAC register */ --struct wemac_regs { ++#include ++#include ++#include ++ ++/* EMAC register */ +struct emac_regs { - u32 ctl; /* 0x00 */ - u32 tx_mode; /* 0x04 */ - u32 tx_flow; /* 0x08 */ -@@ -27,7 +27,7 @@ struct wemac_regs { - u32 tx_pl1; /* 0x1c */ - u32 tx_sta; /* 0x20 */ - u32 tx_io_data; /* 0x24 */ -- u32 tx_io_data1; /* 0x28 */ ++ u32 ctl; /* 0x00 */ ++ u32 tx_mode; /* 0x04 */ ++ u32 tx_flow; /* 0x08 */ ++ u32 tx_ctl0; /* 0x0c */ ++ u32 tx_ctl1; /* 0x10 */ ++ u32 tx_ins; /* 0x14 */ ++ u32 tx_pl0; /* 0x18 */ ++ u32 tx_pl1; /* 0x1c */ ++ u32 tx_sta; /* 0x20 */ ++ u32 tx_io_data; /* 0x24 */ + u32 tx_io_data1;/* 0x28 */ - u32 tx_tsvl0; /* 0x2c */ - u32 tx_tsvh0; /* 0x30 */ - u32 tx_tsvl1; /* 0x34 */ -@@ -141,33 +141,33 @@ struct sunxi_sramc_regs { - - #define EMAC_MAC_IPGT 0x15 - --#define EMAC_MAC_NBTB_IPG1 0xC ++ u32 tx_tsvl0; /* 0x2c */ ++ u32 tx_tsvh0; /* 0x30 */ ++ u32 tx_tsvl1; /* 0x34 */ ++ u32 tx_tsvh1; /* 0x38 */ ++ u32 rx_ctl; /* 0x3c */ ++ u32 rx_hash0; /* 0x40 */ ++ u32 rx_hash1; /* 0x44 */ ++ u32 rx_sta; /* 0x48 */ ++ u32 rx_io_data; /* 0x4c */ ++ u32 rx_fbc; /* 0x50 */ ++ u32 int_ctl; /* 0x54 */ ++ u32 int_sta; /* 0x58 */ ++ u32 mac_ctl0; /* 0x5c */ ++ u32 mac_ctl1; /* 0x60 */ ++ u32 mac_ipgt; /* 0x64 */ ++ u32 mac_ipgr; /* 0x68 */ ++ u32 mac_clrt; /* 0x6c */ ++ u32 mac_maxf; /* 0x70 */ ++ u32 mac_supp; /* 0x74 */ ++ u32 mac_test; /* 0x78 */ ++ u32 mac_mcfg; /* 0x7c */ ++ u32 mac_mcmd; /* 0x80 */ ++ u32 mac_madr; /* 0x84 */ ++ u32 mac_mwtd; /* 0x88 */ ++ u32 mac_mrdd; /* 0x8c */ ++ u32 mac_mind; /* 0x90 */ ++ u32 mac_ssrr; /* 0x94 */ ++ u32 mac_a0; /* 0x98 */ ++ u32 mac_a1; /* 0x9c */ ++}; ++ ++/* SRAMC register */ ++struct sunxi_sramc_regs { ++ u32 ctrl0; ++ u32 ctrl1; ++}; ++ ++/* 0: Disable 1: Aborted frame enable(default) */ ++#define EMAC_TX_AB_M (0x1 << 0) ++/* 0: CPU 1: DMA(default) */ ++#define EMAC_TX_TM (0x1 << 1) ++ ++#define EMAC_TX_SETUP (0) ++ ++/* 0: DRQ asserted 1: DRQ automatically(default) */ ++#define EMAC_RX_DRQ_MODE (0x1 << 1) ++/* 0: CPU 1: DMA(default) */ ++#define EMAC_RX_TM (0x1 << 2) ++/* 0: Normal(default) 1: Pass all Frames */ ++#define EMAC_RX_PA (0x1 << 4) ++/* 0: Normal(default) 1: Pass Control Frames */ ++#define EMAC_RX_PCF (0x1 << 5) ++/* 0: Normal(default) 1: Pass Frames with CRC Error */ ++#define EMAC_RX_PCRCE (0x1 << 6) ++/* 0: Normal(default) 1: Pass Frames with Length Error */ ++#define EMAC_RX_PLE (0x1 << 7) ++/* 0: Normal 1: Pass Frames length out of range(default) */ ++#define EMAC_RX_POR (0x1 << 8) ++/* 0: Not accept 1: Accept unicast Packets(default) */ ++#define EMAC_RX_UCAD (0x1 << 16) ++/* 0: Normal(default) 1: DA Filtering */ ++#define EMAC_RX_DAF (0x1 << 17) ++/* 0: Not accept 1: Accept multicast Packets(default) */ ++#define EMAC_RX_MCO (0x1 << 20) ++/* 0: Disable(default) 1: Enable Hash filter */ ++#define EMAC_RX_MHF (0x1 << 21) ++/* 0: Not accept 1: Accept Broadcast Packets(default) */ ++#define EMAC_RX_BCO (0x1 << 22) ++/* 0: Disable(default) 1: Enable SA Filtering */ ++#define EMAC_RX_SAF (0x1 << 24) ++/* 0: Normal(default) 1: Inverse Filtering */ ++#define EMAC_RX_SAIF (0x1 << 25) ++ ++#define EMAC_RX_SETUP (EMAC_RX_POR | EMAC_RX_UCAD | EMAC_RX_DAF | \ ++ EMAC_RX_MCO | EMAC_RX_BCO) ++ ++/* 0: Disable 1: Enable Receive Flow Control(default) */ ++#define EMAC_MAC_CTL0_RFC (0x1 << 2) ++/* 0: Disable 1: Enable Transmit Flow Control(default) */ ++#define EMAC_MAC_CTL0_TFC (0x1 << 3) ++ ++#define EMAC_MAC_CTL0_SETUP (EMAC_MAC_CTL0_RFC | EMAC_MAC_CTL0_TFC) ++ ++/* 0: Disable 1: Enable MAC Frame Length Checking(default) */ ++#define EMAC_MAC_CTL1_FLC (0x1 << 1) ++/* 0: Disable(default) 1: Enable Huge Frame */ ++#define EMAC_MAC_CTL1_HF (0x1 << 2) ++/* 0: Disable(default) 1: Enable MAC Delayed CRC */ ++#define EMAC_MAC_CTL1_DCRC (0x1 << 3) ++/* 0: Disable 1: Enable MAC CRC(default) */ ++#define EMAC_MAC_CTL1_CRC (0x1 << 4) ++/* 0: Disable 1: Enable MAC PAD Short frames(default) */ ++#define EMAC_MAC_CTL1_PC (0x1 << 5) ++/* 0: Disable(default) 1: Enable MAC PAD Short frames and append CRC */ ++#define EMAC_MAC_CTL1_VC (0x1 << 6) ++/* 0: Disable(default) 1: Enable MAC auto detect Short frames */ ++#define EMAC_MAC_CTL1_ADP (0x1 << 7) ++/* 0: Disable(default) 1: Enable */ ++#define EMAC_MAC_CTL1_PRE (0x1 << 8) ++/* 0: Disable(default) 1: Enable */ ++#define EMAC_MAC_CTL1_LPE (0x1 << 9) ++/* 0: Disable(default) 1: Enable no back off */ ++#define EMAC_MAC_CTL1_NB (0x1 << 12) ++/* 0: Disable(default) 1: Enable */ ++#define EMAC_MAC_CTL1_BNB (0x1 << 13) ++/* 0: Disable(default) 1: Enable */ ++#define EMAC_MAC_CTL1_ED (0x1 << 14) ++ ++#define EMAC_MAC_CTL1_SETUP (EMAC_MAC_CTL1_FLC | EMAC_MAC_CTL1_CRC | \ ++ EMAC_MAC_CTL1_PC) ++ ++#define EMAC_MAC_IPGT 0x15 ++ +#define EMAC_MAC_NBTB_IPG1 0xc - #define EMAC_MAC_NBTB_IPG2 0x12 - - #define EMAC_MAC_CW 0x37 --#define EMAC_MAC_RM 0xF ++#define EMAC_MAC_NBTB_IPG2 0x12 ++ ++#define EMAC_MAC_CW 0x37 +#define EMAC_MAC_RM 0xf - - #define EMAC_MAC_MFL 0x0600 - - /* Receive status */ --#define EMAC_CRCERR (1 << 4) --#define EMAC_LENERR (3 << 5) ++ ++#define EMAC_MAC_MFL 0x0600 ++ ++/* Receive status */ +#define EMAC_CRCERR (0x1 << 4) +#define EMAC_LENERR (0x3 << 5) - - #define DMA_CPU_TRRESHOLD 2000 - --struct wemac_eth_dev { ++ ++#define DMA_CPU_TRRESHOLD 2000 ++ +struct emac_eth_dev { - u32 speed; - u32 duplex; - u32 phy_configured; - int link_printed; - }; - --struct wemac_rxhdr { ++ u32 speed; ++ u32 duplex; ++ u32 phy_configured; ++ int link_printed; ++}; ++ +struct emac_rxhdr { - s16 rx_len; - u16 rx_status; - }; - --static void wemac_inblk_32bit(void *reg, void *data, int count) ++ s16 rx_len; ++ u16 rx_status; ++}; ++ +static void emac_inblk_32bit(void *reg, void *data, int count) - { - int cnt = (count + 3) >> 2; - -@@ -181,7 +181,7 @@ static void wemac_inblk_32bit(void *reg, void *data, int count) - } - } - --static void wemac_outblk_32bit(void *reg, void *data, int count) ++{ ++ int cnt = (count + 3) >> 2; ++ ++ if (cnt) { ++ u32 *buf = data; ++ ++ do { ++ u32 x = readl(reg); ++ *buf++ = x; ++ } while (--cnt); ++ } ++} ++ +static void emac_outblk_32bit(void *reg, void *data, int count) - { - int cnt = (count + 3) >> 2; - -@@ -194,14 +194,12 @@ static void wemac_outblk_32bit(void *reg, void *data, int count) - } - } - --/* -- * Read a word from phyxcer -- */ --static int wemac_phy_read(const char *devname, unsigned char addr, ++{ ++ int cnt = (count + 3) >> 2; ++ ++ if (cnt) { ++ const u32 *buf = data; ++ ++ do { ++ writel(*buf++, reg); ++ } while (--cnt); ++ } ++} ++ +/* Read a word from phyxcer */ +static int emac_phy_read(const char *devname, unsigned char addr, - unsigned char reg, unsigned short *value) - { - struct eth_device *dev = eth_get_dev_by_name(devname); -- struct wemac_regs *regs = (struct wemac_regs *)dev->iobase; ++ unsigned char reg, unsigned short *value) ++{ ++ struct eth_device *dev = eth_get_dev_by_name(devname); + struct emac_regs *regs = (struct emac_regs *)dev->iobase; - - /* issue the phy address and reg */ - writel(addr << 8 | reg, ®s->mac_madr); -@@ -221,14 +219,12 @@ static int wemac_phy_read(const char *devname, unsigned char addr, - return 0; - } - --/* -- * Write a word to phyxcer -- */ --static int wemac_phy_write(const char *devname, unsigned char addr, ++ ++ /* issue the phy address and reg */ ++ writel(addr << 8 | reg, ®s->mac_madr); ++ ++ /* pull up the phy io line */ ++ writel(0x1, ®s->mac_mcmd); ++ ++ /* Wait read complete */ ++ mdelay(1); ++ ++ /* push down the phy io line */ ++ writel(0x0, ®s->mac_mcmd); ++ ++ /* and write data */ ++ *value = readl(®s->mac_mrdd); ++ ++ return 0; ++} ++ +/* Write a word to phyxcer */ +static int emac_phy_write(const char *devname, unsigned char addr, - unsigned char reg, unsigned short value) - { - struct eth_device *dev = eth_get_dev_by_name(devname); -- struct wemac_regs *regs = (struct wemac_regs *)dev->iobase; ++ unsigned char reg, unsigned short value) ++{ ++ struct eth_device *dev = eth_get_dev_by_name(devname); + struct emac_regs *regs = (struct emac_regs *)dev->iobase; - - /* issue the phy address and reg */ - writel(addr << 8 | reg, ®s->mac_madr); -@@ -250,7 +246,7 @@ static int wemac_phy_write(const char *devname, unsigned char addr, - - static void emac_setup(struct eth_device *dev) - { -- struct wemac_regs *regs = (struct wemac_regs *)dev->iobase; ++ ++ /* issue the phy address and reg */ ++ writel(addr << 8 | reg, ®s->mac_madr); ++ ++ /* pull up the phy io line */ ++ writel(0x1, ®s->mac_mcmd); ++ ++ /* Wait write complete */ ++ mdelay(1); ++ ++ /* push down the phy io line */ ++ writel(0x0, ®s->mac_mcmd); ++ ++ /* and write data */ ++ writel(value, ®s->mac_mwtd); ++ ++ return 0; ++} ++ ++static void emac_setup(struct eth_device *dev) ++{ + struct emac_regs *regs = (struct emac_regs *)dev->iobase; - u32 reg_val; - u16 phy_val; - u32 duplex_flag; -@@ -266,7 +262,7 @@ static void emac_setup(struct eth_device *dev) - writel(EMAC_MAC_CTL0_SETUP, ®s->mac_ctl0); - - /* Set MAC CTL1 */ -- wemac_phy_read(dev->name, 1, 0, &phy_val); ++ u32 reg_val; ++ u16 phy_val; ++ u32 duplex_flag; ++ ++ /* Set up TX */ ++ writel(EMAC_TX_SETUP, ®s->tx_mode); ++ ++ /* Set up RX */ ++ writel(EMAC_RX_SETUP, ®s->rx_ctl); ++ ++ /* Set MAC */ ++ /* Set MAC CTL0 */ ++ writel(EMAC_MAC_CTL0_SETUP, ®s->mac_ctl0); ++ ++ /* Set MAC CTL1 */ + emac_phy_read(dev->name, 1, 0, &phy_val); - debug("PHY SETUP, reg 0 value: %x\n", phy_val); - duplex_flag = !!(phy_val & (1 << 8)); - -@@ -288,9 +284,9 @@ static void emac_setup(struct eth_device *dev) - writel(EMAC_MAC_MFL, ®s->mac_maxf); - } - --static void wemac_reset(struct eth_device *dev) ++ debug("PHY SETUP, reg 0 value: %x\n", phy_val); ++ duplex_flag = !!(phy_val & (1 << 8)); ++ ++ reg_val = 0; ++ if (duplex_flag) ++ reg_val = (0x1 << 0); ++ writel(EMAC_MAC_CTL1_SETUP | reg_val, ®s->mac_ctl1); ++ ++ /* Set up IPGT */ ++ writel(EMAC_MAC_IPGT, ®s->mac_ipgt); ++ ++ /* Set up IPGR */ ++ writel(EMAC_MAC_NBTB_IPG2 | (EMAC_MAC_NBTB_IPG1 << 8), ®s->mac_ipgr); ++ ++ /* Set up Collison window */ ++ writel(EMAC_MAC_RM | (EMAC_MAC_CW << 8), ®s->mac_clrt); ++ ++ /* Set up Max Frame Length */ ++ writel(EMAC_MAC_MFL, ®s->mac_maxf); ++} ++ +static void emac_reset(struct eth_device *dev) - { -- struct wemac_regs *regs = (struct wemac_regs *)dev->iobase; ++{ + struct emac_regs *regs = (struct emac_regs *)dev->iobase; - - debug("resetting device\n"); - -@@ -302,10 +298,10 @@ static void wemac_reset(struct eth_device *dev) - udelay(200); - } - --static int sunxi_wemac_eth_init(struct eth_device *dev, bd_t *bd) ++ ++ debug("resetting device\n"); ++ ++ /* RESET device */ ++ writel(0, ®s->ctl); ++ udelay(200); ++ ++ writel(1, ®s->ctl); ++ udelay(200); ++} ++ +static int sunxi_emac_eth_init(struct eth_device *dev, bd_t *bd) - { -- struct wemac_regs *regs = (struct wemac_regs *)dev->iobase; -- struct wemac_eth_dev *priv = dev->priv; ++{ + struct emac_regs *regs = (struct emac_regs *)dev->iobase; + struct emac_eth_dev *priv = dev->priv; - u16 phy_reg; - - /* Init EMAC */ -@@ -317,10 +313,7 @@ static int sunxi_wemac_eth_init(struct eth_device *dev, bd_t *bd) - /* Init MAC */ - - /* Soft reset MAC */ -- clrbits_le32(®s->mac_ctl0, 1 << 15); -- -- /* Set MII clock */ -- clrsetbits_le32(®s->mac_mcfg, 0xf << 2, 0xd << 2); ++ u16 phy_reg; ++ ++ /* Init EMAC */ ++ ++ /* Flush RX FIFO */ ++ setbits_le32(®s->rx_ctl, 0x8); ++ udelay(1); ++ ++ /* Init MAC */ ++ ++ /* Soft reset MAC */ + clrbits_le32(®s->mac_ctl0, 0x1 << 15); - - /* Clear RX counter */ - writel(0x0, ®s->rx_fbc); -@@ -336,14 +329,14 @@ static int sunxi_wemac_eth_init(struct eth_device *dev, bd_t *bd) - - mdelay(1); - -- wemac_reset(dev); ++ ++ /* Clear RX counter */ ++ writel(0x0, ®s->rx_fbc); ++ udelay(1); ++ ++ /* Set up EMAC */ ++ emac_setup(dev); ++ ++ writel(dev->enetaddr[0] << 16 | dev->enetaddr[1] << 8 | ++ dev->enetaddr[2], ®s->mac_a1); ++ writel(dev->enetaddr[3] << 16 | dev->enetaddr[4] << 8 | ++ dev->enetaddr[5], ®s->mac_a0); ++ ++ mdelay(1); ++ + emac_reset(dev); - - /* PHY POWER UP */ -- wemac_phy_read(dev->name, 1, 0, &phy_reg); -- wemac_phy_write(dev->name, 1, 0, phy_reg & (~(1 << 11))); ++ ++ /* PHY POWER UP */ + emac_phy_read(dev->name, 1, 0, &phy_reg); + emac_phy_write(dev->name, 1, 0, phy_reg & (~(0x1 << 11))); - mdelay(1); - -- wemac_phy_read(dev->name, 1, 0, &phy_reg); ++ mdelay(1); ++ + emac_phy_read(dev->name, 1, 0, &phy_reg); - - priv->speed = miiphy_speed(dev->name, 0); - priv->duplex = miiphy_duplex(dev->name, 0); -@@ -357,11 +350,11 @@ static int sunxi_wemac_eth_init(struct eth_device *dev, bd_t *bd) - - /* Set EMAC SPEED depend on PHY */ - clrsetbits_le32(®s->mac_supp, 1 << 8, -- ((phy_reg & (1 << 13)) >> 13) << 8); ++ ++ priv->speed = miiphy_speed(dev->name, 0); ++ priv->duplex = miiphy_duplex(dev->name, 0); ++ ++ /* Print link status only once */ ++ if (!priv->link_printed) { ++ printf("ENET Speed is %d Mbps - %s duplex connection\n", ++ priv->speed, (priv->duplex == HALF) ? "HALF" : "FULL"); ++ priv->link_printed = 1; ++ } ++ ++ /* Set EMAC SPEED depend on PHY */ ++ clrsetbits_le32(®s->mac_supp, 1 << 8, + ((phy_reg & (0x1 << 13)) >> 13) << 8); - - /* Set duplex depend on phy */ - clrsetbits_le32(®s->mac_ctl1, 1 << 0, -- ((phy_reg & (1 << 8)) >> 8) << 0); ++ ++ /* Set duplex depend on phy */ ++ clrsetbits_le32(®s->mac_ctl1, 1 << 0, + ((phy_reg & (0x1 << 8)) >> 8) << 0); - - /* Enable RX/TX */ - setbits_le32(®s->ctl, 0x7); -@@ -369,15 +362,15 @@ static int sunxi_wemac_eth_init(struct eth_device *dev, bd_t *bd) - return 0; - } - --static void sunxi_wemac_eth_halt(struct eth_device *dev) ++ ++ /* Enable RX/TX */ ++ setbits_le32(®s->ctl, 0x7); ++ ++ return 0; ++} ++ +static void sunxi_emac_eth_halt(struct eth_device *dev) - { - /* Nothing to do here */ - } - --static int sunxi_wemac_eth_recv(struct eth_device *dev) ++{ ++ /* Nothing to do here */ ++} ++ +static int sunxi_emac_eth_recv(struct eth_device *dev) - { -- struct wemac_regs *regs = (struct wemac_regs *)dev->iobase; -- struct wemac_rxhdr rxhdr; ++{ + struct emac_regs *regs = (struct emac_regs *)dev->iobase; + struct emac_rxhdr rxhdr; - u32 rxcount; - u32 reg_val; - int rx_len; -@@ -386,8 +379,7 @@ static int sunxi_wemac_eth_recv(struct eth_device *dev) - - /* Check packet ready or not */ - -- /* -- * Race warning: The first packet might arrive with ++ u32 rxcount; ++ u32 reg_val; ++ int rx_len; ++ int rx_status; ++ int good_packet; ++ ++ /* Check packet ready or not */ ++ + /* Race warning: The first packet might arrive with - * the interrupts disabled, but the second will fix - */ - rxcount = readl(®s->rx_fbc); -@@ -401,26 +393,25 @@ static int sunxi_wemac_eth_recv(struct eth_device *dev) - reg_val = readl(®s->rx_io_data); - if (reg_val != 0x0143414d) { - /* Disable RX */ -- clrbits_le32(®s->ctl, 1 << 2); ++ * the interrupts disabled, but the second will fix ++ */ ++ rxcount = readl(®s->rx_fbc); ++ if (!rxcount) { ++ /* Had one stuck? */ ++ rxcount = readl(®s->rx_fbc); ++ if (!rxcount) ++ return 0; ++ } ++ ++ reg_val = readl(®s->rx_io_data); ++ if (reg_val != 0x0143414d) { ++ /* Disable RX */ + clrbits_le32(®s->ctl, 0x1 << 2); - - /* Flush RX FIFO */ -- setbits_le32(®s->rx_ctl, 1 << 3); -- while (readl(®s->rx_ctl) & (1 << 3)) ++ ++ /* Flush RX FIFO */ + setbits_le32(®s->rx_ctl, 0x1 << 3); + while (readl(®s->rx_ctl) & (0x1 << 3)) - ; - - /* Enable RX */ -- setbits_le32(®s->ctl, 1 << 2); ++ ; ++ ++ /* Enable RX */ + setbits_le32(®s->ctl, 0x1 << 2); - - return 0; - } - -- /* -- * A packet ready now ++ ++ return 0; ++ } ++ + /* A packet ready now - * Get status/length - */ - good_packet = 1; - -- wemac_inblk_32bit(®s->rx_io_data, &rxhdr, sizeof(rxhdr)); ++ * Get status/length ++ */ ++ good_packet = 1; ++ + emac_inblk_32bit(®s->rx_io_data, &rxhdr, sizeof(rxhdr)); - - rx_len = rxhdr.rx_len; - rx_status = rxhdr.rx_status; -@@ -440,13 +431,13 @@ static int sunxi_wemac_eth_recv(struct eth_device *dev) - printf("length error\n"); - } - -- /* Move data from WEMAC */ ++ ++ rx_len = rxhdr.rx_len; ++ rx_status = rxhdr.rx_status; ++ ++ /* Packet Status check */ ++ if (rx_len < 0x40) { ++ good_packet = 0; ++ debug("RX: Bad Packet (runt)\n"); ++ } ++ ++ /* rx_status is identical to RSR register. */ ++ if (0 & rx_status & (EMAC_CRCERR | EMAC_LENERR)) { ++ good_packet = 0; ++ if (rx_status & EMAC_CRCERR) ++ printf("crc error\n"); ++ if (rx_status & EMAC_LENERR) ++ printf("length error\n"); ++ } ++ + /* Move data from EMAC */ - if (good_packet) { - if (rx_len > DMA_CPU_TRRESHOLD) { - printf("Received packet is too big (len=%d)\n", rx_len); - } else { -- wemac_inblk_32bit((void *)®s->rx_io_data, -- NetRxPackets[0], rx_len); ++ if (good_packet) { ++ if (rx_len > DMA_CPU_TRRESHOLD) { ++ printf("Received packet is too big (len=%d)\n", rx_len); ++ } else { + emac_inblk_32bit((void *)®s->rx_io_data, + NetRxPackets[0], rx_len); - - /* Pass to upper layer */ - NetReceive(NetRxPackets[0], rx_len); -@@ -457,15 +448,15 @@ static int sunxi_wemac_eth_recv(struct eth_device *dev) - return 0; - } - --static int sunxi_wemac_eth_send(struct eth_device *dev, void *packet, int len) ++ ++ /* Pass to upper layer */ ++ NetReceive(NetRxPackets[0], rx_len); ++ return rx_len; ++ } ++ } ++ ++ return 0; ++} ++ +static int sunxi_emac_eth_send(struct eth_device *dev, void *packet, int len) - { -- struct wemac_regs *regs = (struct wemac_regs *)dev->iobase; ++{ + struct emac_regs *regs = (struct emac_regs *)dev->iobase; - - /* Select channel 0 */ - writel(0, ®s->tx_ins); - - /* Write packet */ -- wemac_outblk_32bit((void *)®s->tx_io_data, packet, len); ++ ++ /* Select channel 0 */ ++ writel(0, ®s->tx_ins); ++ ++ /* Write packet */ + emac_outblk_32bit((void *)®s->tx_io_data, packet, len); - - /* Set TX len */ - writel(len, ®s->tx_pl0); -@@ -476,28 +467,30 @@ static int sunxi_wemac_eth_send(struct eth_device *dev, void *packet, int len) - return 0; - } - --int sunxi_wemac_initialize(void) ++ ++ /* Set TX len */ ++ writel(len, ®s->tx_pl0); ++ ++ /* Start translate from fifo to phy */ ++ setbits_le32(®s->tx_ctl0, 1); ++ ++ return 0; ++} ++ +int sunxi_emac_initialize(void) - { - struct sunxi_ccm_reg *const ccm = - (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - struct sunxi_sramc_regs *sram = - (struct sunxi_sramc_regs *)SUNXI_SRAMC_BASE; ++{ ++ struct sunxi_ccm_reg *const ccm = ++ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; ++ struct sunxi_sramc_regs *sram = ++ (struct sunxi_sramc_regs *)SUNXI_SRAMC_BASE; + struct emac_regs *regs = + (struct emac_regs *)SUNXI_EMAC_BASE; - struct eth_device *dev; -- struct wemac_eth_dev *priv; ++ struct eth_device *dev; + struct emac_eth_dev *priv; - int pin; - - dev = malloc(sizeof(*dev)); - if (dev == NULL) - return -ENOMEM; - -- priv = (struct wemac_eth_dev *)malloc(sizeof(struct wemac_eth_dev)); ++ int pin; ++ ++ dev = malloc(sizeof(*dev)); ++ if (dev == NULL) ++ return -ENOMEM; ++ + priv = (struct emac_eth_dev *)malloc(sizeof(struct emac_eth_dev)); - if (!priv) { - free(dev); - return -ENOMEM; - } - - memset(dev, 0, sizeof(*dev)); -- memset(priv, 0, sizeof(struct wemac_eth_dev)); ++ if (!priv) { ++ free(dev); ++ return -ENOMEM; ++ } ++ ++ memset(dev, 0, sizeof(*dev)); + memset(priv, 0, sizeof(struct emac_eth_dev)); - - /* Map SRAM to EMAC */ - setbits_le32(&sram->ctrl1, 0x5 << 2); -@@ -507,19 +500,22 @@ int sunxi_wemac_initialize(void) - sunxi_gpio_set_cfgpin(pin, 2); - - /* Set up clock gating */ -- setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_EMAC); ++ ++ /* Map SRAM to EMAC */ ++ setbits_le32(&sram->ctrl1, 0x5 << 2); ++ ++ /* Configure pin mux settings for MII Ethernet */ ++ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++) ++ sunxi_gpio_set_cfgpin(pin, SUNXI_GPA0_EMAC); ++ ++ /* Set up clock gating */ + setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_EMAC); + + /* Set MII clock */ + clrsetbits_le32(®s->mac_mcfg, 0xf << 2, 0xd << 2); - -- dev->iobase = SUNXI_EMAC_BASE; ++ + dev->iobase = (int)regs; - dev->priv = priv; -- dev->init = sunxi_wemac_eth_init; -- dev->halt = sunxi_wemac_eth_halt; -- dev->send = sunxi_wemac_eth_send; -- dev->recv = sunxi_wemac_eth_recv; -- strcpy(dev->name, "wemac"); ++ dev->priv = priv; + dev->init = sunxi_emac_eth_init; + dev->halt = sunxi_emac_eth_halt; + dev->send = sunxi_emac_eth_send; + dev->recv = sunxi_emac_eth_recv; + strcpy(dev->name, "emac"); - - eth_register(dev); - -- miiphy_register(dev->name, wemac_phy_read, wemac_phy_write); ++ ++ eth_register(dev); ++ + miiphy_register(dev->name, emac_phy_read, emac_phy_write); - - return 0; - } -diff --git a/drivers/net/sunxi_gmac.c b/drivers/net/sunxi_gmac.c -new file mode 100644 -index 0000000..b8b9016 ---- /dev/null -+++ b/drivers/net/sunxi_gmac.c ++ ++ return 0; ++} +diff -purN u-boot-2014.04/drivers/net/sunxi_gmac.c u-boot-sunxi/drivers/net/sunxi_gmac.c +--- u-boot-2014.04/drivers/net/sunxi_gmac.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/drivers/net/sunxi_gmac.c 2014-04-29 14:29:40.645218080 +0200 @@ -0,0 +1,45 @@ +#include +#include @@ -6990,60 +7503,558 @@ index 0000000..b8b9016 +#ifdef CONFIG_RGMII + /* skip unused pins in RGMII mode */ + if (pin == SUNXI_GPA(9) || pin == SUNXI_GPA(14)) -+ continue; ++ continue; +#endif -+ sunxi_gpio_set_cfgpin(pin, 5); ++ sunxi_gpio_set_cfgpin(pin, SUN7I_GPA0_GMAC); + sunxi_gpio_set_drv(pin, 3); + } + +#ifdef CONFIG_RGMII -+ designware_initialize(0, SUNXI_GMAC_BASE, 0x1, PHY_INTERFACE_MODE_RGMII); ++ designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII); +#else -+ designware_initialize(0, SUNXI_GMAC_BASE, 0x1, PHY_INTERFACE_MODE_MII); ++ designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_MII); +#endif + + return 0; +} -diff --git a/drivers/power/Makefile b/drivers/power/Makefile -index 53ff97d..dc64e4d 100644 ---- a/drivers/power/Makefile -+++ b/drivers/power/Makefile -@@ -5,6 +5,8 @@ - # SPDX-License-Identifier: GPL-2.0+ - # - -+obj-$(CONFIG_AXP152_POWER) += axp152.o -+obj-$(CONFIG_AXP209_POWER) += axp209.o - obj-$(CONFIG_EXYNOS_TMU) += exynos-tmu.o - obj-$(CONFIG_FTPMU010_POWER) += ftpmu010.o - obj-$(CONFIG_TPS6586X_POWER) += tps6586x.o -diff --git a/drivers/power/axp152.c b/drivers/power/axp152.c -new file mode 100644 -index 0000000..0e3653b ---- /dev/null -+++ b/drivers/power/axp152.c -@@ -0,0 +1,138 @@ +diff -purN u-boot-2014.04/drivers/net/sunxi_wemac.c u-boot-sunxi/drivers/net/sunxi_wemac.c +--- u-boot-2014.04/drivers/net/sunxi_wemac.c 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/drivers/net/sunxi_wemac.c 1970-01-01 01:00:00.000000000 +0100 +@@ -1,525 +0,0 @@ +-/* +- * sunxi_wemac.c -- Allwinner A10 ethernet driver +- * +- * (C) Copyright 2012, Stefan Roese +- * +- * SPDX-License-Identifier: GPL-2.0+ +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- +-/* EMAC register */ +-struct wemac_regs { +- u32 ctl; /* 0x00 */ +- u32 tx_mode; /* 0x04 */ +- u32 tx_flow; /* 0x08 */ +- u32 tx_ctl0; /* 0x0c */ +- u32 tx_ctl1; /* 0x10 */ +- u32 tx_ins; /* 0x14 */ +- u32 tx_pl0; /* 0x18 */ +- u32 tx_pl1; /* 0x1c */ +- u32 tx_sta; /* 0x20 */ +- u32 tx_io_data; /* 0x24 */ +- u32 tx_io_data1; /* 0x28 */ +- u32 tx_tsvl0; /* 0x2c */ +- u32 tx_tsvh0; /* 0x30 */ +- u32 tx_tsvl1; /* 0x34 */ +- u32 tx_tsvh1; /* 0x38 */ +- u32 rx_ctl; /* 0x3c */ +- u32 rx_hash0; /* 0x40 */ +- u32 rx_hash1; /* 0x44 */ +- u32 rx_sta; /* 0x48 */ +- u32 rx_io_data; /* 0x4c */ +- u32 rx_fbc; /* 0x50 */ +- u32 int_ctl; /* 0x54 */ +- u32 int_sta; /* 0x58 */ +- u32 mac_ctl0; /* 0x5c */ +- u32 mac_ctl1; /* 0x60 */ +- u32 mac_ipgt; /* 0x64 */ +- u32 mac_ipgr; /* 0x68 */ +- u32 mac_clrt; /* 0x6c */ +- u32 mac_maxf; /* 0x70 */ +- u32 mac_supp; /* 0x74 */ +- u32 mac_test; /* 0x78 */ +- u32 mac_mcfg; /* 0x7c */ +- u32 mac_mcmd; /* 0x80 */ +- u32 mac_madr; /* 0x84 */ +- u32 mac_mwtd; /* 0x88 */ +- u32 mac_mrdd; /* 0x8c */ +- u32 mac_mind; /* 0x90 */ +- u32 mac_ssrr; /* 0x94 */ +- u32 mac_a0; /* 0x98 */ +- u32 mac_a1; /* 0x9c */ +-}; +- +-/* SRAMC register */ +-struct sunxi_sramc_regs { +- u32 ctrl0; +- u32 ctrl1; +-}; +- +-/* 0: Disable 1: Aborted frame enable(default) */ +-#define EMAC_TX_AB_M (0x1 << 0) +-/* 0: CPU 1: DMA(default) */ +-#define EMAC_TX_TM (0x1 << 1) +- +-#define EMAC_TX_SETUP (0) +- +-/* 0: DRQ asserted 1: DRQ automatically(default) */ +-#define EMAC_RX_DRQ_MODE (0x1 << 1) +-/* 0: CPU 1: DMA(default) */ +-#define EMAC_RX_TM (0x1 << 2) +-/* 0: Normal(default) 1: Pass all Frames */ +-#define EMAC_RX_PA (0x1 << 4) +-/* 0: Normal(default) 1: Pass Control Frames */ +-#define EMAC_RX_PCF (0x1 << 5) +-/* 0: Normal(default) 1: Pass Frames with CRC Error */ +-#define EMAC_RX_PCRCE (0x1 << 6) +-/* 0: Normal(default) 1: Pass Frames with Length Error */ +-#define EMAC_RX_PLE (0x1 << 7) +-/* 0: Normal 1: Pass Frames length out of range(default) */ +-#define EMAC_RX_POR (0x1 << 8) +-/* 0: Not accept 1: Accept unicast Packets(default) */ +-#define EMAC_RX_UCAD (0x1 << 16) +-/* 0: Normal(default) 1: DA Filtering */ +-#define EMAC_RX_DAF (0x1 << 17) +-/* 0: Not accept 1: Accept multicast Packets(default) */ +-#define EMAC_RX_MCO (0x1 << 20) +-/* 0: Disable(default) 1: Enable Hash filter */ +-#define EMAC_RX_MHF (0x1 << 21) +-/* 0: Not accept 1: Accept Broadcast Packets(default) */ +-#define EMAC_RX_BCO (0x1 << 22) +-/* 0: Disable(default) 1: Enable SA Filtering */ +-#define EMAC_RX_SAF (0x1 << 24) +-/* 0: Normal(default) 1: Inverse Filtering */ +-#define EMAC_RX_SAIF (0x1 << 25) +- +-#define EMAC_RX_SETUP (EMAC_RX_POR | EMAC_RX_UCAD | EMAC_RX_DAF | \ +- EMAC_RX_MCO | EMAC_RX_BCO) +- +-/* 0: Disable 1: Enable Receive Flow Control(default) */ +-#define EMAC_MAC_CTL0_RFC (0x1 << 2) +-/* 0: Disable 1: Enable Transmit Flow Control(default) */ +-#define EMAC_MAC_CTL0_TFC (0x1 << 3) +- +-#define EMAC_MAC_CTL0_SETUP (EMAC_MAC_CTL0_RFC | EMAC_MAC_CTL0_TFC) +- +-/* 0: Disable 1: Enable MAC Frame Length Checking(default) */ +-#define EMAC_MAC_CTL1_FLC (0x1 << 1) +-/* 0: Disable(default) 1: Enable Huge Frame */ +-#define EMAC_MAC_CTL1_HF (0x1 << 2) +-/* 0: Disable(default) 1: Enable MAC Delayed CRC */ +-#define EMAC_MAC_CTL1_DCRC (0x1 << 3) +-/* 0: Disable 1: Enable MAC CRC(default) */ +-#define EMAC_MAC_CTL1_CRC (0x1 << 4) +-/* 0: Disable 1: Enable MAC PAD Short frames(default) */ +-#define EMAC_MAC_CTL1_PC (0x1 << 5) +-/* 0: Disable(default) 1: Enable MAC PAD Short frames and append CRC */ +-#define EMAC_MAC_CTL1_VC (0x1 << 6) +-/* 0: Disable(default) 1: Enable MAC auto detect Short frames */ +-#define EMAC_MAC_CTL1_ADP (0x1 << 7) +-/* 0: Disable(default) 1: Enable */ +-#define EMAC_MAC_CTL1_PRE (0x1 << 8) +-/* 0: Disable(default) 1: Enable */ +-#define EMAC_MAC_CTL1_LPE (0x1 << 9) +-/* 0: Disable(default) 1: Enable no back off */ +-#define EMAC_MAC_CTL1_NB (0x1 << 12) +-/* 0: Disable(default) 1: Enable */ +-#define EMAC_MAC_CTL1_BNB (0x1 << 13) +-/* 0: Disable(default) 1: Enable */ +-#define EMAC_MAC_CTL1_ED (0x1 << 14) +- +-#define EMAC_MAC_CTL1_SETUP (EMAC_MAC_CTL1_FLC | EMAC_MAC_CTL1_CRC | \ +- EMAC_MAC_CTL1_PC) +- +-#define EMAC_MAC_IPGT 0x15 +- +-#define EMAC_MAC_NBTB_IPG1 0xC +-#define EMAC_MAC_NBTB_IPG2 0x12 +- +-#define EMAC_MAC_CW 0x37 +-#define EMAC_MAC_RM 0xF +- +-#define EMAC_MAC_MFL 0x0600 +- +-/* Receive status */ +-#define EMAC_CRCERR (1 << 4) +-#define EMAC_LENERR (3 << 5) +- +-#define DMA_CPU_TRRESHOLD 2000 +- +-struct wemac_eth_dev { +- u32 speed; +- u32 duplex; +- u32 phy_configured; +- int link_printed; +-}; +- +-struct wemac_rxhdr { +- s16 rx_len; +- u16 rx_status; +-}; +- +-static void wemac_inblk_32bit(void *reg, void *data, int count) +-{ +- int cnt = (count + 3) >> 2; +- +- if (cnt) { +- u32 *buf = data; +- +- do { +- u32 x = readl(reg); +- *buf++ = x; +- } while (--cnt); +- } +-} +- +-static void wemac_outblk_32bit(void *reg, void *data, int count) +-{ +- int cnt = (count + 3) >> 2; +- +- if (cnt) { +- const u32 *buf = data; +- +- do { +- writel(*buf++, reg); +- } while (--cnt); +- } +-} +- +-/* +- * Read a word from phyxcer +- */ +-static int wemac_phy_read(const char *devname, unsigned char addr, +- unsigned char reg, unsigned short *value) +-{ +- struct eth_device *dev = eth_get_dev_by_name(devname); +- struct wemac_regs *regs = (struct wemac_regs *)dev->iobase; +- +- /* issue the phy address and reg */ +- writel(addr << 8 | reg, ®s->mac_madr); +- +- /* pull up the phy io line */ +- writel(0x1, ®s->mac_mcmd); +- +- /* Wait read complete */ +- mdelay(1); +- +- /* push down the phy io line */ +- writel(0x0, ®s->mac_mcmd); +- +- /* and write data */ +- *value = readl(®s->mac_mrdd); +- +- return 0; +-} +- +-/* +- * Write a word to phyxcer +- */ +-static int wemac_phy_write(const char *devname, unsigned char addr, +- unsigned char reg, unsigned short value) +-{ +- struct eth_device *dev = eth_get_dev_by_name(devname); +- struct wemac_regs *regs = (struct wemac_regs *)dev->iobase; +- +- /* issue the phy address and reg */ +- writel(addr << 8 | reg, ®s->mac_madr); +- +- /* pull up the phy io line */ +- writel(0x1, ®s->mac_mcmd); +- +- /* Wait write complete */ +- mdelay(1); +- +- /* push down the phy io line */ +- writel(0x0, ®s->mac_mcmd); +- +- /* and write data */ +- writel(value, ®s->mac_mwtd); +- +- return 0; +-} +- +-static void emac_setup(struct eth_device *dev) +-{ +- struct wemac_regs *regs = (struct wemac_regs *)dev->iobase; +- u32 reg_val; +- u16 phy_val; +- u32 duplex_flag; +- +- /* Set up TX */ +- writel(EMAC_TX_SETUP, ®s->tx_mode); +- +- /* Set up RX */ +- writel(EMAC_RX_SETUP, ®s->rx_ctl); +- +- /* Set MAC */ +- /* Set MAC CTL0 */ +- writel(EMAC_MAC_CTL0_SETUP, ®s->mac_ctl0); +- +- /* Set MAC CTL1 */ +- wemac_phy_read(dev->name, 1, 0, &phy_val); +- debug("PHY SETUP, reg 0 value: %x\n", phy_val); +- duplex_flag = !!(phy_val & (1 << 8)); +- +- reg_val = 0; +- if (duplex_flag) +- reg_val = (0x1 << 0); +- writel(EMAC_MAC_CTL1_SETUP | reg_val, ®s->mac_ctl1); +- +- /* Set up IPGT */ +- writel(EMAC_MAC_IPGT, ®s->mac_ipgt); +- +- /* Set up IPGR */ +- writel(EMAC_MAC_NBTB_IPG2 | (EMAC_MAC_NBTB_IPG1 << 8), ®s->mac_ipgr); +- +- /* Set up Collison window */ +- writel(EMAC_MAC_RM | (EMAC_MAC_CW << 8), ®s->mac_clrt); +- +- /* Set up Max Frame Length */ +- writel(EMAC_MAC_MFL, ®s->mac_maxf); +-} +- +-static void wemac_reset(struct eth_device *dev) +-{ +- struct wemac_regs *regs = (struct wemac_regs *)dev->iobase; +- +- debug("resetting device\n"); +- +- /* RESET device */ +- writel(0, ®s->ctl); +- udelay(200); +- +- writel(1, ®s->ctl); +- udelay(200); +-} +- +-static int sunxi_wemac_eth_init(struct eth_device *dev, bd_t *bd) +-{ +- struct wemac_regs *regs = (struct wemac_regs *)dev->iobase; +- struct wemac_eth_dev *priv = dev->priv; +- u16 phy_reg; +- +- /* Init EMAC */ +- +- /* Flush RX FIFO */ +- setbits_le32(®s->rx_ctl, 0x8); +- udelay(1); +- +- /* Init MAC */ +- +- /* Soft reset MAC */ +- clrbits_le32(®s->mac_ctl0, 1 << 15); +- +- /* Set MII clock */ +- clrsetbits_le32(®s->mac_mcfg, 0xf << 2, 0xd << 2); +- +- /* Clear RX counter */ +- writel(0x0, ®s->rx_fbc); +- udelay(1); +- +- /* Set up EMAC */ +- emac_setup(dev); +- +- writel(dev->enetaddr[0] << 16 | dev->enetaddr[1] << 8 | +- dev->enetaddr[2], ®s->mac_a1); +- writel(dev->enetaddr[3] << 16 | dev->enetaddr[4] << 8 | +- dev->enetaddr[5], ®s->mac_a0); +- +- mdelay(1); +- +- wemac_reset(dev); +- +- /* PHY POWER UP */ +- wemac_phy_read(dev->name, 1, 0, &phy_reg); +- wemac_phy_write(dev->name, 1, 0, phy_reg & (~(1 << 11))); +- mdelay(1); +- +- wemac_phy_read(dev->name, 1, 0, &phy_reg); +- +- priv->speed = miiphy_speed(dev->name, 0); +- priv->duplex = miiphy_duplex(dev->name, 0); +- +- /* Print link status only once */ +- if (!priv->link_printed) { +- printf("ENET Speed is %d Mbps - %s duplex connection\n", +- priv->speed, (priv->duplex == HALF) ? "HALF" : "FULL"); +- priv->link_printed = 1; +- } +- +- /* Set EMAC SPEED depend on PHY */ +- clrsetbits_le32(®s->mac_supp, 1 << 8, +- ((phy_reg & (1 << 13)) >> 13) << 8); +- +- /* Set duplex depend on phy */ +- clrsetbits_le32(®s->mac_ctl1, 1 << 0, +- ((phy_reg & (1 << 8)) >> 8) << 0); +- +- /* Enable RX/TX */ +- setbits_le32(®s->ctl, 0x7); +- +- return 0; +-} +- +-static void sunxi_wemac_eth_halt(struct eth_device *dev) +-{ +- /* Nothing to do here */ +-} +- +-static int sunxi_wemac_eth_recv(struct eth_device *dev) +-{ +- struct wemac_regs *regs = (struct wemac_regs *)dev->iobase; +- struct wemac_rxhdr rxhdr; +- u32 rxcount; +- u32 reg_val; +- int rx_len; +- int rx_status; +- int good_packet; +- +- /* Check packet ready or not */ +- +- /* +- * Race warning: The first packet might arrive with +- * the interrupts disabled, but the second will fix +- */ +- rxcount = readl(®s->rx_fbc); +- if (!rxcount) { +- /* Had one stuck? */ +- rxcount = readl(®s->rx_fbc); +- if (!rxcount) +- return 0; +- } +- +- reg_val = readl(®s->rx_io_data); +- if (reg_val != 0x0143414d) { +- /* Disable RX */ +- clrbits_le32(®s->ctl, 1 << 2); +- +- /* Flush RX FIFO */ +- setbits_le32(®s->rx_ctl, 1 << 3); +- while (readl(®s->rx_ctl) & (1 << 3)) +- ; +- +- /* Enable RX */ +- setbits_le32(®s->ctl, 1 << 2); +- +- return 0; +- } +- +- /* +- * A packet ready now +- * Get status/length +- */ +- good_packet = 1; +- +- wemac_inblk_32bit(®s->rx_io_data, &rxhdr, sizeof(rxhdr)); +- +- rx_len = rxhdr.rx_len; +- rx_status = rxhdr.rx_status; +- +- /* Packet Status check */ +- if (rx_len < 0x40) { +- good_packet = 0; +- debug("RX: Bad Packet (runt)\n"); +- } +- +- /* rx_status is identical to RSR register. */ +- if (0 & rx_status & (EMAC_CRCERR | EMAC_LENERR)) { +- good_packet = 0; +- if (rx_status & EMAC_CRCERR) +- printf("crc error\n"); +- if (rx_status & EMAC_LENERR) +- printf("length error\n"); +- } +- +- /* Move data from WEMAC */ +- if (good_packet) { +- if (rx_len > DMA_CPU_TRRESHOLD) { +- printf("Received packet is too big (len=%d)\n", rx_len); +- } else { +- wemac_inblk_32bit((void *)®s->rx_io_data, +- NetRxPackets[0], rx_len); +- +- /* Pass to upper layer */ +- NetReceive(NetRxPackets[0], rx_len); +- return rx_len; +- } +- } +- +- return 0; +-} +- +-static int sunxi_wemac_eth_send(struct eth_device *dev, void *packet, int len) +-{ +- struct wemac_regs *regs = (struct wemac_regs *)dev->iobase; +- +- /* Select channel 0 */ +- writel(0, ®s->tx_ins); +- +- /* Write packet */ +- wemac_outblk_32bit((void *)®s->tx_io_data, packet, len); +- +- /* Set TX len */ +- writel(len, ®s->tx_pl0); +- +- /* Start translate from fifo to phy */ +- setbits_le32(®s->tx_ctl0, 1); +- +- return 0; +-} +- +-int sunxi_wemac_initialize(void) +-{ +- struct sunxi_ccm_reg *const ccm = +- (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; +- struct sunxi_sramc_regs *sram = +- (struct sunxi_sramc_regs *)SUNXI_SRAMC_BASE; +- struct eth_device *dev; +- struct wemac_eth_dev *priv; +- int pin; +- +- dev = malloc(sizeof(*dev)); +- if (dev == NULL) +- return -ENOMEM; +- +- priv = (struct wemac_eth_dev *)malloc(sizeof(struct wemac_eth_dev)); +- if (!priv) { +- free(dev); +- return -ENOMEM; +- } +- +- memset(dev, 0, sizeof(*dev)); +- memset(priv, 0, sizeof(struct wemac_eth_dev)); +- +- /* Map SRAM to EMAC */ +- setbits_le32(&sram->ctrl1, 0x5 << 2); +- +- /* Configure pin mux settings for MII Ethernet */ +- for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++) +- sunxi_gpio_set_cfgpin(pin, 2); +- +- /* Set up clock gating */ +- setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_EMAC); +- +- dev->iobase = SUNXI_EMAC_BASE; +- dev->priv = priv; +- dev->init = sunxi_wemac_eth_init; +- dev->halt = sunxi_wemac_eth_halt; +- dev->send = sunxi_wemac_eth_send; +- dev->recv = sunxi_wemac_eth_recv; +- strcpy(dev->name, "wemac"); +- +- eth_register(dev); +- +- miiphy_register(dev->name, wemac_phy_read, wemac_phy_write); +- +- return 0; +-} +diff -purN u-boot-2014.04/drivers/power/axp152.c u-boot-sunxi/drivers/power/axp152.c +--- u-boot-2014.04/drivers/power/axp152.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/drivers/power/axp152.c 2014-04-29 14:29:40.649217987 +0200 +@@ -0,0 +1,122 @@ +/* + * (C) Copyright 2012 + * Henrik Nordstrom + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ +#include +#include @@ -7161,33 +8172,15 @@ index 0000000..0e3653b + return -1; + return 0; +} -diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c -new file mode 100644 -index 0000000..87cbb78 ---- /dev/null -+++ b/drivers/power/axp209.c -@@ -0,0 +1,215 @@ +diff -purN u-boot-2014.04/drivers/power/axp209.c u-boot-sunxi/drivers/power/axp209.c +--- u-boot-2014.04/drivers/power/axp209.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/drivers/power/axp209.c 2014-04-29 14:29:40.649217987 +0200 +@@ -0,0 +1,199 @@ +/* + * (C) Copyright 2012 + * Henrik Nordstrom + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#include @@ -7382,10 +8375,99 @@ index 0000000..87cbb78 + axp209_write(AXP209_IRQ_STATUS5, AXP209_IRQ5_PEK_DOWN); + return v & AXP209_IRQ5_PEK_DOWN; +} -diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c -index 5dfb02f..b0f8b41 100644 ---- a/drivers/serial/arm_dcc.c -+++ b/drivers/serial/arm_dcc.c +diff -purN u-boot-2014.04/drivers/power/axp221.c u-boot-sunxi/drivers/power/axp221.c +--- u-boot-2014.04/drivers/power/axp221.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/drivers/power/axp221.c 2014-04-29 14:29:40.649217987 +0200 +@@ -0,0 +1,73 @@ ++/* ++ * (C) Copyright 2013 Oliver Schinagl ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++ ++int axp221_set_dcdc1(unsigned int mvolt) ++{ ++ return p2wi_write(AXP221_DCDC1_CTRL, (mvolt - 1600) / 100); ++} ++ ++int axp221_set_dcdc2(unsigned int mvolt) ++{ ++ return p2wi_write(AXP221_DCDC2_CTRL, (mvolt - 600) / 20); ++} ++ ++int axp221_set_dcdc3(unsigned int mvolt) ++{ ++ return p2wi_write(AXP221_DCDC3_CTRL, (mvolt - 600) / 20); ++} ++ ++int axp221_set_dcdc4(unsigned int mvolt) ++{ ++ return p2wi_write(AXP221_DCDC4_CTRL, (mvolt - 600) / 20); ++} ++ ++int axp221_set_dcdc5(unsigned int mvolt) ++{ ++ return p2wi_write(AXP221_DCDC5_CTRL, (mvolt - 600) / 20); ++} ++ ++int axp221_set_dldo1(unsigned int mvolt) ++{ ++ int ret; ++ u8 val; ++ ++ ret = p2wi_write(AXP221_DLDO1_CTRL, (mvolt - 700) / 100); ++ if (ret) ++ return ret; ++ ++ ret = p2wi_read(AXP221_OUTPUT_CTRL2, &val); ++ if (ret) ++ return ret; ++ ++ val |= 1 << 3; ++ return p2wi_write(AXP221_OUTPUT_CTRL2, val); ++} ++ ++int axp221_init(void) ++{ ++ u8 axp_chip_id; ++ int ret; ++ ++ p2wi_init(); ++ ret = p2wi_set_pmu_address(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR, ++ AXP221_INIT_DATA); ++ if (ret) ++ return ret; ++ ++ ret = p2wi_read(AXP221_CHIP_ID, &axp_chip_id); ++ if (ret) ++ return ret; ++ ++ if (!(axp_chip_id == 0x6 || axp_chip_id == 0x7 || axp_chip_id == 0x17)) ++ return -ENODEV; ++ ++ return 0; ++} +diff -purN u-boot-2014.04/drivers/power/Makefile u-boot-sunxi/drivers/power/Makefile +--- u-boot-2014.04/drivers/power/Makefile 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/drivers/power/Makefile 2014-04-29 14:29:40.649217987 +0200 +@@ -5,6 +5,9 @@ + # SPDX-License-Identifier: GPL-2.0+ + # + ++obj-$(CONFIG_AXP152_POWER) += axp152.o ++obj-$(CONFIG_AXP209_POWER) += axp209.o ++obj-$(CONFIG_AXP221_POWER) += axp221.o + obj-$(CONFIG_EXYNOS_TMU) += exynos-tmu.o + obj-$(CONFIG_FTPMU010_POWER) += ftpmu010.o + obj-$(CONFIG_TPS6586X_POWER) += tps6586x.o +diff -purN u-boot-2014.04/drivers/serial/arm_dcc.c u-boot-sunxi/drivers/serial/arm_dcc.c +--- u-boot-2014.04/drivers/serial/arm_dcc.c 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/drivers/serial/arm_dcc.c 2014-04-29 14:29:40.654217867 +0200 @@ -29,7 +29,7 @@ #include #include @@ -7395,32 +8477,107 @@ index 5dfb02f..b0f8b41 100644 /* * ARMV6 */ -diff --git a/include/axp152.h b/include/axp152.h -new file mode 100644 -index 0000000..a6ddf54 ---- /dev/null -+++ b/include/axp152.h -@@ -0,0 +1,27 @@ +diff -purN u-boot-2014.04/.gitignore u-boot-sunxi/.gitignore +--- u-boot-2014.04/.gitignore 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/.gitignore 1970-01-01 01:00:00.000000000 +0100 +@@ -1,89 +0,0 @@ +-# +-# NOTE! Don't add files that are generated in specific +-# subdirectories here. Add them in the ".gitignore" file +-# in that subdirectory instead. +-# +-# Normal rules +-# +-.* +-*.o +-*.o.* +-*.a +-*.s +-*.su +-*.mod.c +-*.i +-*.lst +-*.order +-*.elf +-*.swp +-*.bin +-*.patch +-*.cfgtmp +-*.dts.tmp +- +-# Build tree +-/build-* +- +-# +-# Top-level generic files +-# +-/MLO* +-/SPL +-/System.map +-/u-boot* +- +-# +-# git files that we don't want to ignore even it they are dot-files +-# +-!.gitignore +-!.mailmap +- +-# +-# Generated files +-# +- +-/LOG +-/errlog +-/reloc_off +- +-!/spl/Makefile +-/spl/* +-/tpl/ +- +-# +-# Generated include files +-# +-/include/config/ +-/include/generated/ +-/include/spl-autoconf.mk +-/include/tpl-autoconf.mk +- +-# stgit generated dirs +-patches-* +-.stgit-edit.txt +- +-# quilt's files +-patches +-series +- +-# gdb files +-.gdb_history +- +-# cscope files +-cscope.* +- +-# tags files +-/tags +-/ctags +-/etags +- +-# gnu global files +-GPATH +-GRTAGS +-GSYMS +-GTAGS +- +-*.orig +-*~ +-\#*# +diff -purN u-boot-2014.04/include/axp152.h u-boot-sunxi/include/axp152.h +--- u-boot-2014.04/include/axp152.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/include/axp152.h 2014-04-29 14:29:40.718216347 +0200 +@@ -0,0 +1,11 @@ +/* + * (C) Copyright 2012 Henrik Nordstrom + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ +int axp152_set_dcdc2(int mvolt); +int axp152_set_dcdc3(int mvolt); @@ -7428,32 +8585,14 @@ index 0000000..a6ddf54 +int axp152_set_ldo2(int mvolt); +void axp152_poweroff(void); +int axp152_init(void); -diff --git a/include/axp209.h b/include/axp209.h -new file mode 100644 -index 0000000..3fffad9 ---- /dev/null -+++ b/include/axp209.h -@@ -0,0 +1,31 @@ +diff -purN u-boot-2014.04/include/axp209.h u-boot-sunxi/include/axp209.h +--- u-boot-2014.04/include/axp209.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/include/axp209.h 2014-04-29 14:29:40.718216347 +0200 +@@ -0,0 +1,15 @@ +/* + * (C) Copyright 2012 Henrik Nordstrom + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +extern int axp209_set_dcdc2(int mvolt); @@ -7465,23 +8604,55 @@ index 0000000..3fffad9 +extern int axp209_init(void); +extern int axp209_poweron_by_dc(void); +extern int axp209_power_button(void); -diff --git a/include/common.h b/include/common.h -index d49c514..58b68b6 100644 ---- a/include/common.h -+++ b/include/common.h -@@ -453,7 +453,7 @@ const char *symbol_lookup(unsigned long addr, unsigned long *caddr); +diff -purN u-boot-2014.04/include/axp221.h u-boot-sunxi/include/axp221.h +--- u-boot-2014.04/include/axp221.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/include/axp221.h 2014-04-29 14:29:40.718216347 +0200 +@@ -0,0 +1,30 @@ ++/* ++ * (C) Copyright 2013 Oliver Schinagl ++ * ++ * X-Powers AXP221 Power Management IC driver ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#define AXP221_CHIP_ADDR 0x68 ++#define AXP221_CTRL_ADDR 0x3e ++#define AXP221_INIT_DATA 0x3e ++ ++#define AXP221_CHIP_ID 0x03 ++#define AXP221_OUTPUT_CTRL1 0x10 ++#define AXP221_OUTPUT_CTRL2 0x12 ++#define AXP221_OUTPUT_CTRL3 0x13 ++#define AXP221_DLDO1_CTRL 0x15 ++#define AXP221_DCDC1_CTRL 0x21 ++#define AXP221_DCDC2_CTRL 0x22 ++#define AXP221_DCDC3_CTRL 0x23 ++#define AXP221_DCDC4_CTRL 0x24 ++#define AXP221_DCDC5_CTRL 0x25 ++ ++int axp221_set_dcdc1(unsigned int mvolt); ++int axp221_set_dcdc2(unsigned int mvolt); ++int axp221_set_dcdc3(unsigned int mvolt); ++int axp221_set_dcdc4(unsigned int mvolt); ++int axp221_set_dcdc5(unsigned int mvolt); ++int axp221_set_dldo1(unsigned int mvolt); ++int axp221_init(void); +diff -purN u-boot-2014.04/include/common.h u-boot-sunxi/include/common.h +--- u-boot-2014.04/include/common.h 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/include/common.h 2014-04-29 14:29:40.721216275 +0200 +@@ -467,7 +467,7 @@ const char *symbol_lookup(unsigned long void api_init (void); /* common/memsize.c */ -long get_ram_size (long *, long); +unsigned long get_ram_size (unsigned long *, unsigned long); + phys_size_t get_effective_memsize(void); /* $(BOARD)/$(BOARD).c */ - void reset_phy (void); -diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h -index d8339b2..5f9f8bc 100644 ---- a/include/config_fallbacks.h -+++ b/include/config_fallbacks.h +diff -purN u-boot-2014.04/include/config_fallbacks.h u-boot-sunxi/include/config_fallbacks.h +--- u-boot-2014.04/include/config_fallbacks.h 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/include/config_fallbacks.h 2014-04-29 14:29:40.723216227 +0200 @@ -55,6 +55,10 @@ #define HAVE_BLOCK_DEVICE #endif @@ -7490,39 +8661,20 @@ index d8339b2..5f9f8bc 100644 +#define CONFIG_SYS_BOARD_NAME CONFIG_SYS_TARGET +#endif + - #ifndef CONFIG_SYS_PROMPT - #define CONFIG_SYS_PROMPT "=> " - #endif -diff --git a/include/configs/sun4i.h b/include/configs/sun4i.h -new file mode 100644 -index 0000000..025e138 ---- /dev/null -+++ b/include/configs/sun4i.h -@@ -0,0 +1,41 @@ + #if (defined(CONFIG_PARTITION_UUIDS) || \ + defined(CONFIG_EFI_PARTITION) || \ + defined(CONFIG_RANDOM_UUID) || \ +diff -purN u-boot-2014.04/include/configs/sun4i.h u-boot-sunxi/include/configs/sun4i.h +--- u-boot-2014.04/include/configs/sun4i.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/include/configs/sun4i.h 2014-04-29 14:29:40.785214754 +0200 +@@ -0,0 +1,24 @@ +/* + * (C) Copyright 2012-2013 Henrik Nordstrom + * + * Configuration settings for the Allwinner A10 (sun4i) CPU + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ -+ +#ifndef __CONFIG_H +#define __CONFIG_H + @@ -7540,17 +8692,45 @@ index 0000000..025e138 +#include + +#endif /* __CONFIG_H */ -diff --git a/include/configs/sun5i.h b/include/configs/sun5i.h -new file mode 100644 -index 0000000..87e2349 ---- /dev/null -+++ b/include/configs/sun5i.h -@@ -0,0 +1,41 @@ +diff -purN u-boot-2014.04/include/configs/sun5i.h u-boot-sunxi/include/configs/sun5i.h +--- u-boot-2014.04/include/configs/sun5i.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/include/configs/sun5i.h 2014-04-29 14:29:40.785214754 +0200 +@@ -0,0 +1,24 @@ +/* + * (C) Copyright 2012-2013 Henrik Nordstrom + * + * Configuration settings for the Allwinner A13 (sun5i) CPU + * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++#ifndef __CONFIG_H ++#define __CONFIG_H ++ ++/* ++ * High Level Configuration Options ++ */ ++#define CONFIG_SUN5I /* sun5i SoC generation */ ++ ++#define CONFIG_SYS_PROMPT "sun5i# " ++#define CONFIG_MACH_TYPE 4138 ++ ++/* ++ * Include common sunxi configuration where most the settings are ++ */ ++#include ++ ++#endif /* __CONFIG_H */ +diff -purN u-boot-2014.04/include/configs/sun6i.h u-boot-sunxi/include/configs/sun6i.h +--- u-boot-2014.04/include/configs/sun6i.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/include/configs/sun6i.h 2014-04-29 14:29:40.785214754 +0200 +@@ -0,0 +1,43 @@ ++/* ++ * (C) Copyright 2012-2013 Henrik Nordstrom ++ * (C) Copyright 2013 Luke Kenneth Casson Leighton ++ * (C) Copyright 2013 Maxime Ripard ++ * ++ * Configuration settings for the Allwinner A31 (sun6i) CPU ++ * + * See file CREDITS for list of people who contributed to this + * project. + * @@ -7574,12 +8754,12 @@ index 0000000..87e2349 +#define __CONFIG_H + +/* -+ * High Level Configuration Options ++ * A31 specific configuration + */ -+#define CONFIG_SUN5I /* sun5i SoC generation */ ++#define CONFIG_SUN6I /* sun6i SoC generation */ + -+#define CONFIG_SYS_PROMPT "sun5i# " -+#define CONFIG_MACH_TYPE 4138 ++#define CONFIG_SYS_PROMPT "sun6i# " ++#define CONFIG_MACH_TYPE 3892 + +/* + * Include common sunxi configuration where most the settings are @@ -7587,37 +8767,18 @@ index 0000000..87e2349 +#include + +#endif /* __CONFIG_H */ -diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h -new file mode 100644 -index 0000000..a6ede2a ---- /dev/null -+++ b/include/configs/sun7i.h -@@ -0,0 +1,46 @@ +diff -purN u-boot-2014.04/include/configs/sun7i.h u-boot-sunxi/include/configs/sun7i.h +--- u-boot-2014.04/include/configs/sun7i.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/include/configs/sun7i.h 2014-04-29 14:29:40.785214754 +0200 +@@ -0,0 +1,29 @@ +/* + * (C) Copyright 2012-2013 Henrik Nordstrom + * (C) Copyright 2013 Luke Kenneth Casson Leighton + * + * Configuration settings for the Allwinner A20 (sun7i) CPU + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ -+ +#ifndef __CONFIG_H +#define __CONFIG_H + @@ -7639,12 +8800,42 @@ index 0000000..a6ede2a +#include + +#endif /* __CONFIG_H */ -diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h -new file mode 100644 -index 0000000..a0c41ac ---- /dev/null -+++ b/include/configs/sunxi-common.h -@@ -0,0 +1,476 @@ +diff -purN u-boot-2014.04/include/configs/sun8i.h u-boot-sunxi/include/configs/sun8i.h +--- u-boot-2014.04/include/configs/sun8i.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/include/configs/sun8i.h 2014-04-29 14:29:40.785214754 +0200 +@@ -0,0 +1,28 @@ ++/* ++ * (C) Copyright 2012-2013 Henrik Nordstrom ++ * (C) Copyright 2013 Luke Kenneth Casson Leighton ++ * (C) Copyright 2013 Maxime Ripard ++ * (C) Copyright 2014 Chen-Yu Tsai ++ * ++ * Configuration settings for the Allwinner A23 (sun8i) CPU ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#ifndef __CONFIG_H ++#define __CONFIG_H ++ ++/* ++ * A23 specific configuration ++ */ ++#define CONFIG_SUN8I /* sun8i SoC generation */ ++ ++#define CONFIG_SYS_PROMPT "sun8i# " ++#define CONFIG_MACH_TYPE 4137 ++ ++/* ++ * Include common sunxi configuration where most the settings are ++ */ ++#include ++ ++#endif /* __CONFIG_H */ +diff -purN u-boot-2014.04/include/configs/sunxi-common.h u-boot-sunxi/include/configs/sunxi-common.h +--- u-boot-2014.04/include/configs/sunxi-common.h 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/include/configs/sunxi-common.h 2014-04-29 14:29:40.785214754 +0200 +@@ -0,0 +1,434 @@ +/* + * (C) Copyright 2012-2012 Henrik Nordstrom + * @@ -7654,23 +8845,7 @@ index 0000000..a0c41ac + * + * Configuration settings for the Allwinner sunxi series of boards. + * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SUNXI_COMMON_CONFIG_H @@ -7679,8 +8854,7 @@ index 0000000..a0c41ac +/* + * High Level Configuration Options + */ -+#define CONFIG_ALLWINNER /* It's a Allwinner chip */ -+#define CONFIG_SUNXI /* which is sunxi family */ ++#define CONFIG_SUNXI /* sunxi family */ +#ifdef CONFIG_SPL_BUILD +#ifndef CONFIG_SPL_FEL +#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ @@ -7701,12 +8875,13 @@ index 0000000..a0c41ac +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +/* ns16550 reg in the low bits of cpu reg */ -+#define CONFIG_SYS_NS16550_REG_SIZE (-4) -+#define CONFIG_SYS_NS16550_CLK (24000000) ++#define CONFIG_SYS_NS16550_REG_SIZE -4 ++#define CONFIG_SYS_NS16550_CLK 24000000 +#define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE +#define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE +#define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE +#define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE ++#define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE + +/* DRAM Base */ +#define CONFIG_SYS_SDRAM_BASE 0x40000000 @@ -7721,7 +8896,7 @@ index 0000000..a0c41ac +/* A10 has 1 banks of DRAM, we use only bank 1 in U-Boot */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE -+#ifdef CONFIG_SUN7I ++#if defined(CONFIG_SUN6I) || defined(CONFIG_SUN7I) +#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ +#else +#define PHYS_SDRAM_0_SIZE 0x40000000 /* 1 GiB */ @@ -7741,7 +8916,6 @@ index 0000000..a0c41ac +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_CMDLINE_TAG +#define CONFIG_INITRD_TAG -+#define CONFIG_CMDLINE_EDITING + +/* mmc config */ +/* Can't use MMC slot 0 if the UART is directed there */ @@ -7758,43 +8932,30 @@ index 0000000..a0c41ac +#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ +#endif + -+/* -+ * Size of malloc() pool -+ * 1MB = 0x100000, 0x100000 = 1024 * 1024 -+ */ -+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) -+ -+/* Flat Device Tree (FDT/DT) support */ -+#define CONFIG_OF_LIBFDT -+#define CONFIG_SYS_BOOTMAPSZ (16 << 20) ++/* 4MB of malloc() pool */ ++#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) + +/* + * Miscellaneous configurable options + */ -+#define CONFIG_SYS_LONGHELP /* undef to save memory */ -+#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_CMD_ECHO -+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ ++#define CONFIG_SYS_GENERIC_BOARD + +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + -+/* memtest works on */ -+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (256 << 20)) -+#define CONFIG_SYS_LOAD_ADDR 0x50000000 /* default load address */ ++#define CONFIG_SYS_LOAD_ADDR 0x48000000 /* default load address */ + +/* standalone support */ -+#define CONFIG_STANDALONE_LOAD_ADDR 0x50000000 ++#define CONFIG_STANDALONE_LOAD_ADDR 0x48000000 + +#define CONFIG_SYS_HZ 1000 + -+/* valid baudrates */ ++/* baudrate */ +#define CONFIG_BAUDRATE 115200 -+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* The stack sizes are set up in start.S using the settings below */ +#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ @@ -7839,6 +9000,7 @@ index 0000000..a0c41ac +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS \ ++ "bootm_size=0x10000000\0" \ + "console=ttyS0,115200\0" \ + "panicarg=panic=10\0" \ + "extraargs=\0" \ @@ -7919,21 +9081,11 @@ index 0000000..a0c41ac + "\0" \ + "" + -+#define CONFIG_BOOTDELAY 3 +#define CONFIG_SYS_BOOT_GET_CMDLINE -+#define CONFIG_AUTO_COMPLETE + +#include + -+/* Accept zimage + raw ramdisk without mkimage headers */ -+#define CONFIG_CMD_BOOTZ -+#define CONFIG_SUPPORT_RAW_INITRD -+ -+#define CONFIG_DOS_PARTITION -+#define CONFIG_CMD_FAT /* with this we can access fat bootfs */ +#define CONFIG_FAT_WRITE /* enable write access */ -+#define CONFIG_CMD_EXT2 /* with this we can access ext2 bootfs */ -+#define CONFIG_CMD_EXT4 /* with this we can access ext4 bootfs */ + +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_LIBCOMMON_SUPPORT @@ -7960,7 +9112,7 @@ index 0000000..a0c41ac + +#else /* CONFIG_SPL */ + -+#define CONFIG_SPL_BSS_START_ADDR 0x50000000 ++#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KiB */ + +#define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ @@ -7980,8 +9132,10 @@ index 0000000..a0c41ac + +#endif /* CONFIG_SPL */ +/* end of 32 KiB in sram */ -+#define LOW_LEVEL_SRAM_STACK 0x00008000 ++#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK ++#define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 ++#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ + +#ifdef CONFIG_SPL_OS_BOOT +#define CONFIG_CMD_SPL @@ -7998,7 +9152,9 @@ index 0000000..a0c41ac +#undef CONFIG_CMD_NFS + +/* I2C */ ++#ifndef CONFIG_SUN6I +#define CONFIG_SPL_I2C_SUPPORT ++#endif +#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_HARD_I2C +#define CONFIG_SUNXI_I2C @@ -8016,10 +9172,10 @@ index 0000000..a0c41ac +#define CONFIG_CMD_GPIO + +/* PMU */ -+#if !defined CONFIG_AXP152_POWER && !defined CONFIG_NO_AXP ++#if !defined CONFIG_AXP152_POWER && !defined CONFIG_AXP221_POWER && !defined CONFIG_NO_AXP +#define CONFIG_AXP209_POWER +#endif -+#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER ++#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER +#define CONFIG_SPL_POWER_SUPPORT +#endif + @@ -8074,35 +9230,25 @@ index 0000000..a0c41ac +/* Ethernet support */ +#ifdef CONFIG_SUNXI_EMAC +#define CONFIG_MII /* MII PHY management */ -+#define CONFIG_CMD_MII -+#define CONFIG_CMD_NET +#endif + +#ifdef CONFIG_SUNXI_GMAC +#define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */ +#define CONFIG_DW_AUTONEG +#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ -+#define CONFIG_SYS_DCACHE_OFF /* dw driver doesn't support dcache */ ++#define CONFIG_PHY_ADDR 1 +#define CONFIG_MII /* MII PHY management */ -+#define CONFIG_CMD_MII -+#define CONFIG_CMD_NET ++#define CONFIG_PHYLIB +#endif + +#ifdef CONFIG_CMD_NET -+#define CONFIG_CMD_PING -+#define CONFIG_CMD_DHCP +#define CONFIG_CMD_NFS +#define CONFIG_CMD_SNTP +#define CONFIG_TIMESTAMP /* Needed by SNTP */ +#define CONFIG_CMD_DNS +#define CONFIG_NETCONSOLE -+#define CONFIG_BOOTP_SUBNETMASK -+#define CONFIG_BOOTP_GATEWAY -+#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_NISDOMAIN -+#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_BOOTFILESIZE -+#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_BOOTP_NTPSERVER @@ -8110,7 +9256,6 @@ index 0000000..a0c41ac +#define CONFIG_BOOTP_MAY_FAIL +#define CONFIG_BOOTP_SERVERIP +#define CONFIG_BOOTP_DHCP_REQUEST_DELAY 50000 -+#define CONFIG_CMD_ELF +#endif + +#if !defined CONFIG_ENV_IS_IN_MMC && \ @@ -8120,11 +9265,14 @@ index 0000000..a0c41ac +#define CONFIG_ENV_IS_NOWHERE +#endif + ++#ifndef CONFIG_SPL_BUILD ++#include ++#endif ++ +#endif /* _SUNXI_COMMON_CONFIG_H */ -diff --git a/include/netdev.h b/include/netdev.h -index 47fa80d..300664e 100644 ---- a/include/netdev.h -+++ b/include/netdev.h +diff -purN u-boot-2014.04/include/netdev.h u-boot-sunxi/include/netdev.h +--- u-boot-2014.04/include/netdev.h 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/include/netdev.h 2014-04-29 14:29:40.808214208 +0200 @@ -79,7 +79,8 @@ int sh_eth_initialize(bd_t *bis); int skge_initialize(bd_t *bis); int smc91111_initialize(u8 dev_num, int base_addr); @@ -8135,11 +9283,37 @@ index 47fa80d..300664e 100644 int tsi108_eth_initialize(bd_t *bis); int uec_standard_init(bd_t *bis); int uli526x_initialize(bd_t *bis); -diff --git a/mkconfig b/mkconfig -index b96c81f..8ce67a9 100755 ---- a/mkconfig -+++ b/mkconfig -@@ -172,6 +172,7 @@ done +diff -purN u-boot-2014.04/Makefile u-boot-sunxi/Makefile +--- u-boot-2014.04/Makefile 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/Makefile 2014-04-29 14:29:40.179229151 +0200 +@@ -870,6 +870,13 @@ OBJCOPYFLAGS_u-boot.spr = -I binary -O b + u-boot.spr: spl/u-boot-spl.img u-boot.img FORCE + $(call if_changed,pad_cat) + ++ifneq ($(CONFIG_SUNXI),) ++OBJCOPYFLAGS_u-boot-sunxi-with-spl.bin = -I binary -O binary \ ++ --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff ++u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img FORCE ++ $(call if_changed,pad_cat) ++endif ++ + ifneq ($(CONFIG_TEGRA),) + OBJCOPYFLAGS_u-boot-nodtb-tegra.bin = -O binary --pad-to=$(CONFIG_SYS_TEXT_BASE) + u-boot-nodtb-tegra.bin: spl/u-boot-spl u-boot.bin FORCE +@@ -1081,6 +1088,9 @@ spl/u-boot-spl.bin: spl/u-boot-spl + spl/u-boot-spl: tools prepare + $(Q)$(MAKE) obj=spl -f $(srctree)/spl/Makefile all + ++spl/sunxi-spl.bin: spl/u-boot-spl ++ @: ++ + tpl/u-boot-tpl.bin: tools prepare + $(Q)$(MAKE) obj=tpl -f $(srctree)/spl/Makefile all CONFIG_TPL_BUILD=y + +diff -purN u-boot-2014.04/mkconfig u-boot-sunxi/mkconfig +--- u-boot-2014.04/mkconfig 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/mkconfig 2014-04-29 14:29:40.830213686 +0200 +@@ -174,6 +174,7 @@ done echo "#define CONFIG_SYS_ARCH \"${arch}\"" >> config.h echo "#define CONFIG_SYS_CPU \"${cpu}\"" >> config.h echo "#define CONFIG_SYS_BOARD \"${board}\"" >> config.h @@ -8147,104 +9321,69 @@ index b96c81f..8ce67a9 100755 [ "${vendor}" ] && echo "#define CONFIG_SYS_VENDOR \"${vendor}\"" >> config.h -diff --git a/spl/Makefile b/spl/Makefile -index 5e5472d..436b952 100644 ---- a/spl/Makefile -+++ b/spl/Makefile -@@ -152,6 +152,12 @@ ifdef CONFIG_SAMSUNG - ALL-y += $(obj)$(BOARD)-spl.bin +diff -purN u-boot-2014.04/snapshot.commit u-boot-sunxi/snapshot.commit +--- u-boot-2014.04/snapshot.commit 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/snapshot.commit 2014-04-29 14:29:40.839213473 +0200 +@@ -1 +1 @@ +-dda0dbfc69f3d560c87f5be85f127ed862ea6721 Mon, 14 Apr 2014 15:19:24 -0400 ++$Format:%H %cD$ +diff -purN u-boot-2014.04/spl/Makefile u-boot-sunxi/spl/Makefile +--- u-boot-2014.04/spl/Makefile 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/spl/Makefile 2014-04-29 14:29:40.839213473 +0200 +@@ -188,6 +188,12 @@ ifdef CONFIG_SAMSUNG + ALL-y += $(obj)/$(BOARD)-spl.bin endif +ifdef CONFIG_SUNXI +ifndef CONFIG_SPL_FEL -+ALL-y += $(obj)sunxi-spl.bin ++ALL-y += $(obj)/sunxi-spl.bin +endif +endif + all: $(ALL-y) ifdef CONFIG_SAMSUNG -@@ -164,6 +170,12 @@ $(obj)$(BOARD)-spl.bin: $(obj)u-boot-spl.bin - $(OBJTREE)/tools/mk$(BOARD)spl $(VAR_SIZE_PARAM) $< $@ +@@ -215,6 +221,13 @@ ifneq ($(CONFIG_SPL_TEXT_BASE),) + LDFLAGS_$(SPL_BIN) += -Ttext $(CONFIG_SPL_TEXT_BASE) endif +ifdef CONFIG_SUNXI -+$(obj)sunxi-spl.bin: $(obj)u-boot-spl.bin -+ $(OBJTREE)/tools/mksunxiboot \ -+ $(obj)u-boot-spl.bin $(obj)sunxi-spl.bin ++quiet_cmd_mksunxiboot = MKSUNXI $@ ++cmd_mksunxiboot = $(objtree)/tools/mksunxiboot $< $@ ++$(obj)/sunxi-spl.bin: $(obj)/$(SPL_BIN).bin ++ $(call if_changed,mksunxiboot) +endif + - $(obj)$(SPL_BIN).bin: $(obj)$(SPL_BIN) - $(OBJCOPY) $(OBJCFLAGS) $(SPL_OBJCFLAGS) -O binary $< $@ - -diff --git a/tools/.gitignore b/tools/.gitignore -index cd2f041..2fdc9bd 100644 ---- a/tools/.gitignore -+++ b/tools/.gitignore -@@ -8,6 +8,7 @@ - /mkimage + quiet_cmd_u-boot-spl = LD $@ + cmd_u-boot-spl = cd $(obj) && $(LD) $(LDFLAGS) $(LDFLAGS_$(@F)) \ + $(patsubst $(obj)/%,%,$(u-boot-spl-init)) --start-group \ +diff -purN u-boot-2014.04/tools/.gitignore u-boot-sunxi/tools/.gitignore +--- u-boot-2014.04/tools/.gitignore 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/tools/.gitignore 2014-04-29 14:29:40.840213449 +0200 +@@ -9,6 +9,7 @@ + /mkexynosspl /mpc86x_clk /mxsboot +/mksunxiboot /ncb /proftool /relocate-rela -diff --git a/tools/Makefile b/tools/Makefile -index 328cea3..3eb46e6 100644 ---- a/tools/Makefile -+++ b/tools/Makefile -@@ -56,6 +56,7 @@ BIN_FILES-y += mkimage$(SFX) - BIN_FILES-$(CONFIG_EXYNOS5250) += mk$(BOARD)spl$(SFX) - BIN_FILES-$(CONFIG_EXYNOS5420) += mk$(BOARD)spl$(SFX) - BIN_FILES-$(CONFIG_MX23) += mxsboot$(SFX) -+BIN_FILES-$(CONFIG_SUNXI) += mksunxiboot$(SFX) - BIN_FILES-$(CONFIG_MX28) += mxsboot$(SFX) - BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX) - BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX) -@@ -97,6 +98,7 @@ OBJ_FILES-$(CONFIG_EXYNOS_SPL) += mkexynosspl.o - OBJ_FILES-$(CONFIG_KIRKWOOD) += kwboot.o - OBJ_FILES-$(CONFIG_LCD_LOGO) += bmp_logo.o - OBJ_FILES-$(CONFIG_MX23) += mxsboot.o -+OBJ_FILES-$(CONFIG_SUNXI) += mksunxiboot.o - OBJ_FILES-$(CONFIG_MX28) += mxsboot.o - OBJ_FILES-$(CONFIG_NETCONSOLE) += ncb.o - OBJ_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1.o -@@ -266,6 +268,10 @@ $(obj)mpc86x_clk$(SFX): $(obj)mpc86x_clk.o - $(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^ - $(HOSTSTRIP) $@ +diff -purN u-boot-2014.04/tools/Makefile u-boot-sunxi/tools/Makefile +--- u-boot-2014.04/tools/Makefile 2014-04-14 21:19:24.000000000 +0200 ++++ u-boot-sunxi/tools/Makefile 2014-04-29 14:29:40.840213449 +0200 +@@ -120,6 +120,8 @@ hostprogs-$(CONFIG_MX23) += mxsboot$(SFX + hostprogs-$(CONFIG_MX28) += mxsboot$(SFX) + HOSTCFLAGS_mxsboot$(SFX).o := -pedantic -+$(obj)mksunxiboot$(SFX): $(obj)mksunxiboot.o -+ $(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^ -+ $(HOSTSTRIP) $@ ++hostprogs-$(CONFIG_SUNXI) += mksunxiboot$(SFX) + - $(obj)mxsboot$(SFX): $(obj)mxsboot.o - $(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^ - $(HOSTSTRIP) $@ -diff --git a/tools/mksunxiboot.README b/tools/mksunxiboot.README -new file mode 100644 -index 0000000..5838778 ---- /dev/null -+++ b/tools/mksunxiboot.README -@@ -0,0 +1,13 @@ -+This program make a arm binary file can be loaded by Allwinner A10 and related -+chips from storage media such as nand and mmc. -+ -+More information about A10 boot, please refer to -+http://rhombus-tech.net/allwinner_a10/a10_boot_process/ -+ -+To compile this program, just type make, you will get 'mksunxiboot'. -+ -+To use it, -+$./mksunxiboot u-boot.bin u-boot-mmc.bin -+then you can write it to a mmc card with dd. -+$sudo dd if=u-boot-mmc.bin of=/dev/sdb bs=1024 seek=8 -+then insert your mmc card to your A10 tablet, you can boot from mmc card. -diff --git a/tools/mksunxiboot.c b/tools/mksunxiboot.c -new file mode 100644 -index 0000000..bc41912 ---- /dev/null -+++ b/tools/mksunxiboot.c -@@ -0,0 +1,163 @@ + hostprogs-$(CONFIG_NETCONSOLE) += ncb$(SFX) + hostprogs-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX) + +diff -purN u-boot-2014.04/tools/mksunxiboot.c u-boot-sunxi/tools/mksunxiboot.c +--- u-boot-2014.04/tools/mksunxiboot.c 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/tools/mksunxiboot.c 2014-04-29 14:29:40.848213258 +0200 +@@ -0,0 +1,154 @@ +/* + * (C) Copyright 2007-2011 + * Allwinner Technology Co., Ltd. @@ -8252,22 +9391,8 @@ index 0000000..bc41912 + * + * a simple tool to generate bootable image for sunxi platform. + * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA ++ * SPDX-License-Identifier: GPL-2.0+ + */ -+ +#include +#include +#include @@ -8362,7 +9487,7 @@ index 0000000..bc41912 + + fd_in = open(argv[1], O_RDONLY); + if (fd_in < 0) { -+ perror("Open input file:"); ++ perror("Open input file"); + return EXIT_FAILURE; + } + @@ -8370,25 +9495,27 @@ index 0000000..bc41912 + + /* get input file size */ + file_size = lseek(fd_in, 0, SEEK_END); -+ printf("File size: 0x%x\n", file_size); + + if (file_size > SRAM_LOAD_MAX_SIZE) { + fprintf(stderr, "ERROR: File too large!\n"); + return EXIT_FAILURE; -+ } else ++ } else { + load_size = ALIGN(file_size, sizeof(int)); -+ printf("Load size: 0x%x\n", load_size); ++ } + + fd_out = open(argv[2], O_WRONLY | O_CREAT, 0666); + if (fd_out < 0) { -+ perror("Open output file:"); ++ perror("Open output file"); + return EXIT_FAILURE; + } + + /* read file to buffer to calculate checksum */ + lseek(fd_in, 0, SEEK_SET); + count = read(fd_in, img.code, load_size); -+ printf("Read 0x%x bytes\n", count); ++ if (count != load_size) { ++ perror("Reading input image"); ++ return EXIT_FAILURE; ++ } + + /* fill the header */ + img.header.jump_instruction = /* b instruction */ @@ -8401,10 +9528,30 @@ index 0000000..bc41912 + gen_check_sum((void *)&img); + + count = write(fd_out, (void *)&img, img.header.length); -+ printf("Write 0x%x bytes\n", count); ++ if (count != img.header.length) { ++ perror("Writing output"); ++ return EXIT_FAILURE; ++ } + + close(fd_in); + close(fd_out); + + return EXIT_SUCCESS; +} +diff -purN u-boot-2014.04/tools/mksunxiboot.README u-boot-sunxi/tools/mksunxiboot.README +--- u-boot-2014.04/tools/mksunxiboot.README 1970-01-01 01:00:00.000000000 +0100 ++++ u-boot-sunxi/tools/mksunxiboot.README 2014-04-29 14:29:40.848213258 +0200 +@@ -0,0 +1,13 @@ ++This program make a arm binary file can be loaded by Allwinner A10 and related ++chips from storage media such as nand and mmc. ++ ++More information about A10 boot, please refer to ++http://rhombus-tech.net/allwinner_a10/a10_boot_process/ ++ ++To compile this program, just type make, you will get 'mksunxiboot'. ++ ++To use it, ++$./mksunxiboot u-boot.bin u-boot-mmc.bin ++then you can write it to a mmc card with dd. ++$sudo dd if=u-boot-mmc.bin of=/dev/sdb bs=1024 seek=8 ++then insert your mmc card to your A10 tablet, you can boot from mmc card.