diff --git a/cubox-i-enable_raw_rd.patch b/cubox-i-enable_raw_rd.patch new file mode 100644 index 0000000..c6fb083 --- /dev/null +++ b/cubox-i-enable_raw_rd.patch @@ -0,0 +1,13 @@ +diff --git a/include/configs/mx6_cubox-i.h b/include/configs/mx6_cubox-i.h +index 49b029f..dfd2e46 100644 +--- a/include/configs/mx6_cubox-i.h ++++ b/include/configs/mx6_cubox-i.h +@@ -355,6 +355,8 @@ extern char *config_sys_prompt; + + #ifndef CONFIG_SYS_DCACHE_OFF + #define CONFIG_CMD_CACHE ++ ++#define CONFIG_SUPPORT_RAW_INITRD + #endif + + #endif /* __CONFIG_H * */ diff --git a/cubox-i-v2014.04-port.patch b/cubox-i-v2014.04-port.patch new file mode 100644 index 0000000..01d295c --- /dev/null +++ b/cubox-i-v2014.04-port.patch @@ -0,0 +1,4119 @@ +diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c +index 1725279..9cd183c 100644 +--- a/arch/arm/cpu/armv7/mx6/soc.c ++++ b/arch/arm/cpu/armv7/mx6/soc.c +@@ -311,6 +311,7 @@ void s_init(void) + int is_6q = is_cpu_type(MXC_CPU_MX6Q); + u32 mask480; + u32 mask528; ++ u32 reg; + + /* Due to hardware limitation, on MX6Q we need to gate/ungate all PFDs + * to make sure PFD is working right, otherwise, PFDs may +@@ -331,10 +332,18 @@ void s_init(void) + */ + if (is_6q) + mask528 |= ANATOP_PFD_CLKGATE_MASK(2); +- writel(mask480, &anatop->pfd_480_set); +- writel(mask528, &anatop->pfd_528_set); +- writel(mask480, &anatop->pfd_480_clr); +- writel(mask528, &anatop->pfd_528_clr); ++ ++ reg = readl(&anatop->pfd_480); ++ if (!(reg & ((1 << 6) | (1 << 14) | (1 << 22)))) { ++ writel(mask480, &anatop->pfd_480_set); ++ writel(mask480, &anatop->pfd_480_clr); ++ } ++ ++ reg = readl(&anatop->pfd_528); ++ if (!(reg & ((1 << 6) | (1 << 14) | (1 << 22)))) { ++ writel(mask528, &anatop->pfd_528_set); ++ writel(mask528, &anatop->pfd_528_clr); ++ } + } + + #ifdef CONFIG_IMX_HDMI +@@ -351,6 +360,9 @@ void imx_enable_hdmi_phy(void) + udelay(3000); + reg |= HDMI_PHY_CONF0_GEN2_TXPWRON_MASK; + writeb(reg, &hdmi->phy_conf0); ++ udelay(3000); ++ reg &= ~HDMI_PHY_CONF0_GEN2_PDDQ_MASK; ++ writeb(reg, &hdmi->phy_conf0); + writeb(HDMI_MC_PHYRSTZ_ASSERT, &hdmi->mc_phyrstz); + } + +diff --git a/arch/arm/cpu/armv7/mx6/u-boot-spl.lds b/arch/arm/cpu/armv7/mx6/u-boot-spl.lds +new file mode 100644 +index 0000000..5e93b34 +--- /dev/null ++++ b/arch/arm/cpu/armv7/mx6/u-boot-spl.lds +@@ -0,0 +1,47 @@ ++/* ++ * (C) Copyright 2002 ++ * Gary Jennejohn, DENX Software Engineering, ++ * ++ * (C) Copyright 2010 ++ * Texas Instruments, ++ * Aneesh V ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\ ++ LENGTH = CONFIG_SPL_MAX_SIZE } ++MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \ ++ LENGTH = CONFIG_SPL_BSS_MAX_SIZE } ++ ++OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") ++OUTPUT_ARCH(arm) ++ENTRY(_start) ++SECTIONS ++{ ++ .text : ++ { ++ __start = .; ++ arch/arm/cpu/armv7/start.o (.text*) ++ *(.text*) ++ } >.sram ++ ++ . = ALIGN(4); ++ .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram ++ ++ . = ALIGN(4); ++ .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram ++ ++ . = ALIGN(4); ++ __image_copy_end = .; ++ _end = .; ++ ++ .bss : ++ { ++ . = ALIGN(4); ++ __bss_start = .; ++ *(.bss*) ++ . = ALIGN(4); ++ __bss_end = .; ++ } >.sdram ++} +diff --git a/arch/arm/include/asm/arch-mx6/mx6_ddr_regs.h b/arch/arm/include/asm/arch-mx6/mx6_ddr_regs.h +new file mode 100644 +index 0000000..6aa0cbe +--- /dev/null ++++ b/arch/arm/include/asm/arch-mx6/mx6_ddr_regs.h +@@ -0,0 +1,165 @@ ++/* ++ * Copyright (C) 2013 TechNexion Inc. ++ * ++ * Author: Edward Lin ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++#ifndef __ASM_ARCH_MX6_DDR_REGS_H__ ++#define __ASM_ARCH_MX6_DDR_REGS_H__ ++ ++ ++/* MMDC P0/P1 Registers */ ++struct mmdc_p_regs { ++ u32 mdctl; ++ u32 mdpdc; ++ u32 mdotc; ++ u32 mdcfg0; ++ u32 mdcfg1; ++ u32 mdcfg2; ++ u32 mdmisc; ++ u32 mdscr; ++ u32 mdref; ++ u32 res1[2]; ++ u32 mdrwd; ++ u32 mdor; ++ u32 res2[3]; ++ u32 mdasp; ++ u32 res3[240]; ++ u32 mapsr; ++ u32 res4[254]; ++ u32 mpzqhwctrl; ++ u32 res5[2]; ++ u32 mpwldectrl0; ++ u32 mpwldectrl1; ++ u32 res6; ++ u32 mpodtctrl; ++ u32 mprddqby0dl; ++ u32 mprddqby1dl; ++ u32 mprddqby2dl; ++ u32 mprddqby3dl; ++ u32 res7[4]; ++ u32 mpdgctrl0; ++ u32 mpdgctrl1; ++ u32 res8; ++ u32 mprddlctl; ++ u32 res9; ++ u32 mpwrdlctl; ++ u32 res10[25]; ++ u32 mpmur0; ++}; ++ ++#define MX6DQ_IOM_DDR_BASE 0x020e0500 ++struct mx6qd_iomux_ddr_regs { ++ u32 res1[3]; ++ u32 dram_sdqs5; ++ u32 dram_dqm5; ++ u32 dram_dqm4; ++ u32 dram_sdqs4; ++ u32 dram_sdqs3; ++ u32 dram_dqm3; ++ u32 dram_sdqs2; ++ u32 dram_dqm2; ++ u32 res2[16]; ++ u32 dram_cas; ++ u32 res3[2]; ++ u32 dram_ras; ++ u32 dram_reset; ++ u32 res4[2]; ++ u32 dram_sdclk_0; ++ u32 dram_sdba2; ++ u32 dram_sdcke0; ++ u32 dram_sdclk_1; ++ u32 dram_sdcke1; ++ u32 dram_sdodt0; ++ u32 dram_sdodt1; ++ u32 res5; ++ u32 dram_sdqs0; ++ u32 dram_dqm0; ++ u32 dram_sdqs1; ++ u32 dram_dqm1; ++ u32 dram_sdqs6; ++ u32 dram_dqm6; ++ u32 dram_sdqs7; ++ u32 dram_dqm7; ++}; ++ ++#define MX6DQ_IOM_GRP_BASE 0x020e0700 ++struct mx6qd_iomux_grp_regs { ++ u32 res1[18]; ++ u32 grp_b7ds; ++ u32 grp_addds; ++ u32 grp_ddrmode_ctl; ++ u32 res2; ++ u32 grp_ddrpke; ++ u32 res3[6]; ++ u32 grp_ddrmode; ++ u32 res4[3]; ++ u32 grp_b0ds; ++ u32 grp_b1ds; ++ u32 grp_ctlds; ++ u32 res5; ++ u32 grp_b2ds; ++ u32 grp_ddr_type; ++ u32 grp_b3ds; ++ u32 grp_b4ds; ++ u32 grp_b5ds; ++ u32 grp_b6ds; ++}; ++ ++#define MX6SDL_IOM_DDR_BASE 0x020e0400 ++struct mx6sdl_iomux_ddr_regs { ++ u32 res1[25]; ++ u32 dram_cas; ++ u32 res2[2]; ++ u32 dram_dqm0; ++ u32 dram_dqm1; ++ u32 dram_dqm2; ++ u32 dram_dqm3; ++ u32 dram_dqm4; ++ u32 dram_dqm5; ++ u32 dram_dqm6; ++ u32 dram_dqm7; ++ u32 dram_ras; ++ u32 dram_reset; ++ u32 res3[2]; ++ u32 dram_sdba2; ++ u32 dram_sdcke0; ++ u32 dram_sdcke1; ++ u32 dram_sdclk_0; ++ u32 dram_sdclk_1; ++ u32 dram_sdodt0; ++ u32 dram_sdodt1; ++ u32 dram_sdqs0; ++ u32 dram_sdqs1; ++ u32 dram_sdqs2; ++ u32 dram_sdqs3; ++ u32 dram_sdqs4; ++ u32 dram_sdqs5; ++ u32 dram_sdqs6; ++ u32 dram_sdqs7; ++}; ++ ++#define MX6SDL_IOM_GRP_BASE 0x020e0700 ++struct mx6sdl_iomux_grp_regs { ++ u32 res1[18]; ++ u32 grp_b7ds; ++ u32 grp_addds; ++ u32 grp_ddrmode_ctl; ++ u32 grp_ddrpke; ++ u32 res2[2]; ++ u32 grp_ddrmode; ++ u32 grp_b0ds; ++ u32 res3; ++ u32 grp_ctlds; ++ u32 grp_b1ds; ++ u32 grp_ddr_type; ++ u32 grp_b2ds; ++ u32 grp_b3ds; ++ u32 grp_b4ds; ++ u32 grp_b5ds; ++ u32 res4; ++ u32 grp_b6ds; ++}; ++ ++#endif +diff --git a/arch/arm/include/asm/arch-mx6/spl.h b/arch/arm/include/asm/arch-mx6/spl.h +new file mode 100644 +index 0000000..7af65f2 +--- /dev/null ++++ b/arch/arm/include/asm/arch-mx6/spl.h +@@ -0,0 +1,25 @@ ++/* ++ * Copyright (C) 2013 TechNexion Ltd. ++ * ++ * Author: Richard Hu ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ */ ++ ++#ifndef __ASM_ARCH_SPL_H__ ++#define __ASM_ARCH_SPL_H__ ++ ++#define BOOT_DEVICE_MMC1 0 ++#define BOOT_DEVICE_MMC2 1 ++#define BOOT_DEVICE_MMC2_2 2 ++#define BOOT_DEVICE_NAND 3 ++#define BOOT_DEVICE_SATA 4 ++#define BOOT_DEVICE_NONE 5 ++ ++#endif /* __ASM_ARCH_SPL_H__ */ +diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h +index 38851a1..3c45ad8 100644 +--- a/arch/arm/include/asm/arch-mx6/sys_proto.h ++++ b/arch/arm/include/asm/arch-mx6/sys_proto.h +@@ -11,6 +11,21 @@ + #include + #include "../arch-imx/cpu.h" + ++enum boot_device { ++ MX6_SD0_BOOT, ++ MX6_SD1_BOOT, ++ MX6_MMC_BOOT, ++ MX6_NAND_BOOT, ++ MX6_SATA_BOOT, ++ MX6_WEIM_NOR_BOOT, ++ MX6_ONE_NAND_BOOT, ++ MX6_PATA_BOOT, ++ MX6_I2C_BOOT, ++ MX6_SPI_NOR_BOOT, ++ MX6_UNKNOWN_BOOT, ++ MX6_BOOT_DEV_NUM = MX6_UNKNOWN_BOOT, ++}; ++ + #define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) + u32 get_cpu_rev(void); + +diff --git a/board/solidrun/mx6-microsom/1066mhz_4x128mx16.cfg b/board/solidrun/mx6-microsom/1066mhz_4x128mx16.cfg +new file mode 100644 +index 0000000..19da53e +--- /dev/null ++++ b/board/solidrun/mx6-microsom/1066mhz_4x128mx16.cfg +@@ -0,0 +1,103 @@ ++/* ++ * Copyright (C) 2013 Boundary Devices ++ * Copyright (C) 2013 SolidRun ltd. ++ * Copyright (C) 2013 Jon Nettleton ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not write to the Free Software ++ * Foundation Inc. 51 Franklin Street Fifth Floor Boston, ++ * MA 02110-1301 USA ++ * ++ */ ++/* ++ * Calibrations ++ * ZQ ++ */ ++ ++DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xa1390003 /* 0xa1380003 */ ++DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xa1390003 /* 0xa1380003 */ ++/* write leveling */ ++DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x00000000 ++DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x00000000 ++DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00000000 ++DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00000000 ++/* ++ * DQS gating, read delay, write delay calibration values ++ * based on calibration compare of 0x00ffff00 ++ */ ++DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x0314031c ++DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x023e0304 ++DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x03240330 ++DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x03180260 ++DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x3630323c ++DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x3436283a ++DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x36344038 ++DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x422a423c ++/* read data bit delay */ ++DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333 ++DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333 ++DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333 ++DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333 ++DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333 ++DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333 ++DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333 ++DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333 ++/* Complete calibration by forced measurement */ ++DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 ++DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 ++ ++/* ++ * MMDC init: ++ * in DDR3, 32-bit mode, only MMDC0 is initiated: ++ */ ++DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 ++DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040 ++ ++DATA 4, MX6_MMDC_P0_MDCFG0, 0x54597955 ++DATA 4, MX6_MMDC_P0_MDCFG1, 0xFF328F64 ++DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB ++ ++DATA 4, MX6_MMDC_P0_MDMISC, 0x00011740 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 ++DATA 4, MX6_MMDC_P0_MDRWD, 0x000026d2 ++DATA 4, MX6_MMDC_P0_MDOR, 0x005B0E21 ++DATA 4, MX6_MMDC_P0_MDASP, 0x00000027 ++ ++/* MMDC0_MAARCR ADOPT optimized priorities. Dyn jump disabled */ ++DATA 4, 0x021b0400, 0x11420000 ++ ++DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000 ++ ++/* ++ * Initialize 2GB DDR3 - Samsung K4B2G1646E-BCK0 ++ */ ++DATA 4, MX6_MMDC_P0_MDSCR, 0x02088032 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x0208803A ++DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x0000803B ++DATA 4, MX6_MMDC_P0_MDSCR, 0x00408031 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x00408039 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x09408030 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x09408038 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x04008048 ++ ++/* final DDR setup */ ++DATA 4, MX6_MMDC_P0_MDREF, 0x00005800 ++DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00000007 ++DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00000007 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 ++DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 +diff --git a/board/solidrun/mx6-microsom/1066mhz_4x256mx16.cfg b/board/solidrun/mx6-microsom/1066mhz_4x256mx16.cfg +new file mode 100644 +index 0000000..0800afc +--- /dev/null ++++ b/board/solidrun/mx6-microsom/1066mhz_4x256mx16.cfg +@@ -0,0 +1,103 @@ ++/* ++ * Copyright (C) 2013 Boundary Devices ++ * Copyright (C) 2013 SolidRun ltd. ++ * Copyright (C) 2013 Jon Nettleton ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not write to the Free Software ++ * Foundation Inc. 51 Franklin Street Fifth Floor Boston, ++ * MA 02110-1301 USA ++ * ++ */ ++/* ++ * Calibrations ++ * ZQ ++ */ ++ ++DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xa1390003 /* 0xa1380003 */ ++DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xa1390003 /* 0xa1380003 */ ++/* write leveling */ ++DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x00000000 ++DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x00000000 ++DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00000000 ++DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00000000 ++/* ++ * DQS gating, read delay, write delay calibration values ++ * based on calibration compare of 0x00ffff00 ++ */ ++DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x0314031c ++DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x023e0304 ++DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x03240330 ++DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x03180260 ++DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x3630323c ++DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x3436283a ++DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x36344038 ++DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x422a423c ++/* read data bit delay */ ++DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333 ++DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333 ++DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333 ++DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333 ++DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333 ++DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333 ++DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333 ++DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333 ++/* Complete calibration by forced measurement */ ++DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 ++DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 ++ ++/* ++ * MMDC init: ++ * in DDR3, 32-bit mode, only MMDC0 is initiated: ++ */ ++DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 ++DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040 ++ ++DATA 4, MX6_MMDC_P0_MDCFG0, 0x898E7975 ++DATA 4, MX6_MMDC_P0_MDCFG1, 0xFF328F64 ++DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB ++ ++DATA 4, MX6_MMDC_P0_MDMISC, 0x00011740 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 ++DATA 4, MX6_MMDC_P0_MDRWD, 0x000026d2 ++DATA 4, MX6_MMDC_P0_MDOR, 0x005B0E21 ++DATA 4, MX6_MMDC_P0_MDASP, 0x00000047 ++ ++/* MMDC0_MAARCR ADOPT optimized priorities. Dyn jump disabled */ ++DATA 4, 0x021b0400, 0x11420000 ++ ++DATA 4, MX6_MMDC_P0_MDCTL, 0x841A0000 ++ ++/* ++ * Initialize 2GB DDR3 - Samsung K4B4G1646B-HYK0 ++ */ ++DATA 4, MX6_MMDC_P0_MDSCR, 0x02088032 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x0208803A ++DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x0000803B ++DATA 4, MX6_MMDC_P0_MDSCR, 0x00408031 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x00408039 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x09408030 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x09408038 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x04008048 ++ ++/* final DDR setup */ ++DATA 4, MX6_MMDC_P0_MDREF, 0x00005800 ++DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00000007 ++DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00000007 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 ++DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 +diff --git a/board/solidrun/mx6-microsom/800mhz_4x128mx16.cfg b/board/solidrun/mx6-microsom/800mhz_4x128mx16.cfg +new file mode 100644 +index 0000000..0dea747 +--- /dev/null ++++ b/board/solidrun/mx6-microsom/800mhz_4x128mx16.cfg +@@ -0,0 +1,99 @@ ++/* ++ * Copyright (C) 2013 Boundary Devices ++ * Copyright (C) 2013 SolidRun ltd. ++ * Copyright (C) 2013 Jon Nettleton ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not write to the Free Software ++ * Foundation Inc. 51 Franklin Street Fifth Floor Boston, ++ * MA 02110-1301 USA ++ * ++ */ ++/* ++ * Calibrations ++ * ZQ ++ */ ++DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xa1390003 ++/* write leveling */ ++DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0045004D ++DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x003A0047 ++DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x001F001F ++DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00210035 ++ ++/* ++ * DQS gating, read delay, write delay calibration values ++ * based on calibration compare of 0x00ffff00 ++ */ ++DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x023C0224 ++DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x02000220 ++DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x02200220 ++DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x02040208 ++ ++DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x44444846 ++DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4042463C ++ ++DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x32343032 ++DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x36363430 ++ ++/* read data bit delay */ ++DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333 ++DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333 ++DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333 ++DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333 ++DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333 ++DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333 ++DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333 ++DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333 ++ ++/* Complete calibration by forced measurement */ ++DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 ++DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 ++ ++/* ++ * MMDC init: ++ * in DDR3, 64-bit mode, only MMDC0 is initiated: ++ */ ++DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002d ++DATA 4, MX6_MMDC_P0_MDOTC, 0x00333040 ++DATA 4, MX6_MMDC_P0_MDCFG0, 0x3F4352F3 ++DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66D8B63 ++DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB ++DATA 4, MX6_MMDC_P0_MDMISC, 0x00011740 ++ ++DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 ++DATA 4, MX6_MMDC_P0_MDRWD, 0x000026d2 ++DATA 4, MX6_MMDC_P0_MDOR, 0x00431023 ++DATA 4, MX6_MMDC_P0_MDASP, 0x00000027 ++ ++/* MMDC0_MDCTL- row-14bits */ ++DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000 ++ ++/* ++ * Initialize 2GB DDR3 - Micron MT41J128M ++ */ ++DATA 4, MX6_MMDC_P0_MDSCR, 0x02008032 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x04008031 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x05208030 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 ++ ++/* final DDR setup */ ++DATA 4, MX6_MMDC_P0_MDREF, 0x00007800 ++DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00000007 ++DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00000007 ++DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556d ++DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 ++DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +diff --git a/board/solidrun/mx6-microsom/ddr-1066mhz-64bit-setup.cfg b/board/solidrun/mx6-microsom/ddr-1066mhz-64bit-setup.cfg +new file mode 100644 +index 0000000..1a8af4e +--- /dev/null ++++ b/board/solidrun/mx6-microsom/ddr-1066mhz-64bit-setup.cfg +@@ -0,0 +1,101 @@ ++/* ++ * Copyright (C) 2013 Boundary Devices ++ * Copyright (C) 2013 SolidRun ltd. ++ * Copyright (C) 2013 Jon Nettleton ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not write to the Free Software ++ * Foundation Inc. 51 Franklin Street Fifth Floor Boston, ++ * MA 02110-1301 USA ++ * ++ * Device Configuration Data (DCD) ++ * ++ * Each entry must have the format: ++ * Addr-type Address Value ++ * ++ * where: ++ * Addr-type register length (1,2 or 4 bytes) ++ * Address absolute address of the register ++ * value value to be stored in the register ++ */ ++ ++/* ++ * DDR3 settings ++ * MX6Q ddr is limited to 1066 Mhz currently 1056 MHz(528 MHz clock), ++ * memory bus width: 64 bits x16/x32/x64 ++ * MX6DL ddr is limited to 800 MHz(400 MHz clock) ++ * memory bus width: 64 bits x16/x32/x64 ++ * MX6SOLO ddr is limited to 800 MHz(400 MHz clock) ++ * memory bus width: 32 bits x16/x32 ++ */ ++/* DDR IO TYPE */ ++DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000 ++DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000 ++/* Clock */ ++DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00020030 ++DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00020030 ++/* Address */ ++DATA 4, MX6_IOM_DRAM_CAS, 0x00020030 ++DATA 4, MX6_IOM_DRAM_RAS, 0x00020030 ++DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030 ++/* Control */ ++DATA 4, MX6_IOM_DRAM_RESET, 0x00020030 ++DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 ++DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000 ++DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 ++DATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030 ++DATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030 ++ ++/* ++ * Data Strobe: IOMUXC_SW_PAD_CTL_GRP_DDRMODE_CTL - DDR_INPUT=0, CMOS, ++ * CMOS mode saves power, but have less timing margin in case of DDR ++ * timing issue on your board you can try DDR_MODE: [= 0x00020000] ++ */ ++DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000 ++ ++DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030 ++DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030 ++DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030 ++DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030 ++DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030 ++DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030 ++DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030 ++DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030 ++ ++/* ++ * DATA:IOMUXC_SW_PAD_CTL_GRP_DDRMODE - DDR_INPUT=0, CMOS, ++ * CMOS mode saves power, but have less timing margin in case of DDR ++ * timing issue on your board you can try DDR_MODE: [= 0x00020000] ++ */ ++DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000 ++ ++DATA 4, MX6_IOM_GRP_B0DS, 0x00000030 ++DATA 4, MX6_IOM_GRP_B1DS, 0x00000030 ++DATA 4, MX6_IOM_GRP_B2DS, 0x00000030 ++DATA 4, MX6_IOM_GRP_B3DS, 0x00000030 ++DATA 4, MX6_IOM_GRP_B4DS, 0x00000030 ++DATA 4, MX6_IOM_GRP_B5DS, 0x00000030 ++DATA 4, MX6_IOM_GRP_B6DS, 0x00000030 ++DATA 4, MX6_IOM_GRP_B7DS, 0x00000030 ++ ++DATA 4, MX6_IOM_DRAM_DQM0, 0x00020030 ++DATA 4, MX6_IOM_DRAM_DQM1, 0x00020030 ++DATA 4, MX6_IOM_DRAM_DQM2, 0x00020030 ++DATA 4, MX6_IOM_DRAM_DQM3, 0x00020030 ++DATA 4, MX6_IOM_DRAM_DQM4, 0x00020030 ++DATA 4, MX6_IOM_DRAM_DQM5, 0x00020030 ++DATA 4, MX6_IOM_DRAM_DQM6, 0x00020030 ++DATA 4, MX6_IOM_DRAM_DQM7, 0x00020030 +diff --git a/board/solidrun/mx6-microsom/ddr-800mhz-64bit-setup.cfg b/board/solidrun/mx6-microsom/ddr-800mhz-64bit-setup.cfg +new file mode 100644 +index 0000000..a7a372d +--- /dev/null ++++ b/board/solidrun/mx6-microsom/ddr-800mhz-64bit-setup.cfg +@@ -0,0 +1,100 @@ ++/* ++ * Copyright (C) 2013 Boundary Devices ++ * Copyright (C) 2013 SolidRun ltd. ++ * Copyright (C) 2013 Jon Nettleton ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not write to the Free Software ++ * Foundation Inc. 51 Franklin Street Fifth Floor Boston, ++ * MA 02110-1301 USA ++ * ++ * Device Configuration Data (DCD) ++ * ++ * Each entry must have the format: ++ * Addr-type Address Value ++ * ++ * where: ++ * Addr-type register length (1,2 or 4 bytes) ++ * Address absolute address of the register ++ * value value to be stored in the register ++ */ ++ ++/* ++ * DDR3 settings ++ * MX6Q ddr is limited to 1066 Mhz currently 1056 MHz(528 MHz clock), ++ * memory bus width: 64 bits x16/x32/x64 ++ * MX6DL ddr is limited to 800 MHz(400 MHz clock) ++ * memory bus width: 64 bits x16/x32/x64 ++ * MX6SOLO ddr is limited to 800 MHz(400 MHz clock) ++ * memory bus width: 32 bits x16/x32 ++ */ ++/* DDR IO TYPE */ ++DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000c0000 ++DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000 ++/* Clock */ ++DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00000028 ++DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00000028 ++/* Address */ ++DATA 4, MX6_IOM_DRAM_CAS, 0x00000028 ++DATA 4, MX6_IOM_DRAM_RAS, 0x00000028 ++DATA 4, MX6_IOM_GRP_ADDDS, 0x00000028 ++/* Control */ ++DATA 4, MX6_IOM_DRAM_RESET, 0x00000028 ++DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 ++DATA 4, MX6_IOM_DRAM_SDODT0, 0x00000028 ++DATA 4, MX6_IOM_DRAM_SDODT1, 0x00000028 ++DATA 4, MX6_IOM_GRP_CTLDS, 0x00000028 ++ ++/* ++ * Data Strobe: IOMUXC_SW_PAD_CTL_GRP_DDRMODE_CTL - DDR_INPUT=0, CMOS, ++ * CMOS mode saves power, but have less timing margin in case of DDR ++ * timing issue on your board you can try DDR_MODE: [= 0x00020000] ++ */ ++DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000 ++ ++DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000028 ++DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000028 ++DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000028 ++DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000028 ++DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000028 ++DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000028 ++DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000028 ++DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000028 ++ ++/* ++ * DATA:IOMUXC_SW_PAD_CTL_GRP_DDRMODE - DDR_INPUT=0, CMOS, ++ * CMOS mode saves power, but have less timing margin in case of DDR ++ * timing issue on your board you can try DDR_MODE: [= 0x00020000] ++ */ ++DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000 ++ ++DATA 4, MX6_IOM_GRP_B0DS, 0x00000028 ++DATA 4, MX6_IOM_GRP_B1DS, 0x00000028 ++DATA 4, MX6_IOM_GRP_B2DS, 0x00000028 ++DATA 4, MX6_IOM_GRP_B3DS, 0x00000028 ++DATA 4, MX6_IOM_GRP_B4DS, 0x00000028 ++DATA 4, MX6_IOM_GRP_B5DS, 0x00000028 ++DATA 4, MX6_IOM_GRP_B6DS, 0x00000028 ++DATA 4, MX6_IOM_GRP_B7DS, 0x00000028 ++ ++DATA 4, MX6_IOM_DRAM_DQM0, 0x00000028 ++DATA 4, MX6_IOM_DRAM_DQM1, 0x00000028 ++DATA 4, MX6_IOM_DRAM_DQM2, 0x00000028 ++DATA 4, MX6_IOM_DRAM_DQM3, 0x00000028 ++DATA 4, MX6_IOM_DRAM_DQM4, 0x00000028 ++DATA 4, MX6_IOM_DRAM_DQM5, 0x00000028 ++DATA 4, MX6_IOM_DRAM_DQM6, 0x00000028 ++DATA 4, MX6_IOM_DRAM_DQM7, 0x00000028 +diff --git a/board/solidrun/mx6_c1/Makefile b/board/solidrun/mx6_c1/Makefile +new file mode 100644 +index 0000000..b772936 +--- /dev/null ++++ b/board/solidrun/mx6_c1/Makefile +@@ -0,0 +1,23 @@ ++# ++# Copyright (C) 2012-2013, Guennadi Liakhovetski ++# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. ++# Copyright (C) 2013, Boundary Devices ++# Copyright (C) 2013, Jon Nettleton ++# ++# This program is free software; you can redistribute it and/or ++# modify it under the terms of the GNU General Public License as ++# published by the Free Software Foundation; either version 2 of ++# the License, or (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++# MA 02111-1307 USA ++# ++ ++obj-y := mx6_c1.o +diff --git a/board/solidrun/mx6_c1/mx6_c1.c b/board/solidrun/mx6_c1/mx6_c1.c +new file mode 100644 +index 0000000..d301223 +--- /dev/null ++++ b/board/solidrun/mx6_c1/mx6_c1.c +@@ -0,0 +1,340 @@ ++/* ++ * Copyright (C) 2012 Freescale Semiconductor, Inc. ++ * Copyright (C) 2013 SolidRun ltd. ++ * Copyright (C) 2013 Jon Nettleton . ++ * ++ * Author: Fabio Estevam ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../../../drivers/video/mxcfb.h" ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ ++ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ ++ PAD_CTL_SRE_FAST | PAD_CTL_HYS) ++ ++#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ ++ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ ++ PAD_CTL_SRE_FAST | PAD_CTL_HYS) ++ ++#define USDHC_PAD_CLK_CTRL (PAD_CTL_SPEED_LOW | \ ++ PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | \ ++ PAD_CTL_HYS) ++ ++#define USDHC_PAD_GPIO_CTRL (PAD_CTL_PUS_22K_UP | \ ++ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ ++ PAD_CTL_SRE_FAST | PAD_CTL_HYS) ++ ++#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ ++ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) ++ ++#define ENET_PAD_CTRL_PD (PAD_CTL_PUS_100K_DOWN | \ ++ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) ++ ++#define ENET_PAD_CTRL_CLK (PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE | \ ++ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) ++ ++int dram_init(void) ++{ ++ gd->ram_size = ((phys_size_t)CONFIG_DDR_MB * 1024 * 1024); ++ ++ return 0; ++} ++ ++iomux_v3_cfg_t const uart1_pads[] = { ++ MX6_PAD_CSI0_DAT10__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), ++ MX6_PAD_CSI0_DAT11__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), ++}; ++ ++static void setup_iomux_uart(void) ++{ ++ imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); ++} ++ ++iomux_v3_cfg_t const usdhc2_pads[] = { ++ MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CLK_CTRL), ++ MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ MX6_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ MX6_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ MX6_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ MX6_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ MX6_PAD_GPIO_4__USDHC2_CD | MUX_PAD_CTRL(USDHC_PAD_GPIO_CTRL), ++}; ++ ++#ifdef CONFIG_FSL_ESDHC ++struct fsl_esdhc_cfg usdhc_cfg[1] = { ++ { USDHC2_BASE_ADDR }, ++}; ++ ++int board_mmc_getcd(struct mmc *mmc) ++{ ++ struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; ++ ++ if (cfg->esdhc_base == USDHC2_BASE_ADDR) { ++ return !gpio_get_value(IMX_GPIO_NR(1, 4)); ++ } ++ ++ return 0; ++} ++ ++int board_mmc_init(bd_t *bis) ++{ ++ /* ++ * Only one USDHC controller on titianium ++ */ ++ imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); ++ gpio_direction_input(IMX_GPIO_NR(1, 4)); ++ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); ++ ++ return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); ++} ++#endif ++ ++#ifdef CONFIG_FEC_MXC ++iomux_v3_cfg_t const enet_pads[] = { ++ MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ /* AR8035 reset */ ++ MX6_PAD_KEY_ROW4__GPIO_4_15 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), ++ /* AR8035 interrupt */ ++ MX6_PAD_DI0_PIN2__GPIO_4_18 | MUX_PAD_CTRL(NO_PAD_CTRL), ++ /* GPIO16 -> AR8035 25MHz */ ++ MX6_PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(NO_PAD_CTRL), ++ MX6_PAD_RGMII_TXC__ENET_RGMII_TXC | MUX_PAD_CTRL(NO_PAD_CTRL), ++ MX6_PAD_RGMII_TD0__ENET_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ MX6_PAD_RGMII_TD1__ENET_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ MX6_PAD_RGMII_TD2__ENET_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ MX6_PAD_RGMII_TD3__ENET_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ ++ MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL_CLK), ++ MX6_PAD_RGMII_RXC__ENET_RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ MX6_PAD_RGMII_RD0__ENET_RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), ++ MX6_PAD_RGMII_RD1__ENET_RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), ++ MX6_PAD_RGMII_RD2__ENET_RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ MX6_PAD_RGMII_RD3__ENET_RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), ++}; ++ ++static void setup_iomux_enet(void) ++{ ++ imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); ++ ++ /* ++ * Reset AR8035 PHY. Since it runs 25MHz reference clock, it ++ * requires two resets. ++ */ ++ gpio_direction_output(IMX_GPIO_NR(4, 15), 0); ++ udelay(1000 * 2); ++ gpio_set_value(IMX_GPIO_NR(4, 15), 1); ++ udelay(1000 * 2); ++ gpio_set_value(IMX_GPIO_NR(4, 15), 0); ++ udelay(1000 * 2); ++ gpio_set_value(IMX_GPIO_NR(4, 15), 1); ++ udelay(1000 * 2); ++} ++ ++int board_phy_config(struct phy_device *phydev) ++{ ++ if (phydev->drv->config) ++ phydev->drv->config(phydev); ++ ++ return 0; ++} ++ ++int enable_fec_anatop_clock(void) ++{ ++ u32 reg = 0; ++ s32 timeout = 100000; ++ ++ struct anatop_regs __iomem *anatop = ++ (struct anatop_regs __iomem *)ANATOP_BASE_ADDR; ++ ++ reg = readl(&anatop->pll_enet); ++ reg &= 0xfffffffc; /* Set PLL to generate 25MHz */ ++ writel(reg, &anatop->pll_enet); ++ if ((reg & BM_ANADIG_PLL_ENET_POWERDOWN) || ++ (!(reg & BM_ANADIG_PLL_ENET_LOCK))) { ++ reg &= ~BM_ANADIG_PLL_ENET_POWERDOWN; ++ writel(reg, &anatop->pll_enet); ++ while (timeout--) { ++ if (readl(&anatop->pll_enet) & BM_ANADIG_PLL_ENET_LOCK) ++ break; ++ } ++ if (timeout < 0) ++ return -ETIMEDOUT; ++ } ++ /* Enable FEC clock */ ++ reg |= BM_ANADIG_PLL_ENET_ENABLE; ++ reg &= ~BM_ANADIG_PLL_ENET_BYPASS; ++ writel(reg, &anatop->pll_enet); ++ ++ return 0; ++} ++int board_eth_init(bd_t *bis) ++{ ++ int ret; ++ struct iomuxc_base_regs *const iomuxc_regs ++ = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR; ++ struct anatop_regs __iomem *anatop = ++ (struct anatop_regs __iomem *)ANATOP_BASE_ADDR; ++ u32 reg = 0; ++ s32 timeout = 100000; ++ ++ enable_fec_anatop_clock(); ++ /* set gpr1[21] */ ++ clrsetbits_le32(&iomuxc_regs->gpr[1], 0, (1 << 21)); ++ ++ while (timeout--) { ++ if (readl(&anatop->pll_enet) & BM_ANADIG_PLL_ENET_LOCK) ++ break; ++ } ++ ++ setup_iomux_enet(); ++ ++ ret = cpu_eth_init(bis); ++ if (ret) ++ printf("FEC MXC: %s:failed\n", __func__); ++ ++ return 0; ++} ++#endif ++ ++#ifdef CONFIG_VIDEO_IPUV3 ++static struct fb_videomode const hdmi = { ++ .name = "HDMI", ++ .refresh = 60, ++ .xres = 1024, ++ .yres = 768, ++ .pixclock = 15385, ++ .left_margin = 220, ++ .right_margin = 40, ++ .upper_margin = 21, ++ .lower_margin = 7, ++ .hsync_len = 60, ++ .vsync_len = 10, ++ .sync = FB_SYNC_EXT | FB_SYNC_CLK_LAT_FALL, ++ .vmode = FB_VMODE_NONINTERLACED ++}; ++ ++static int detect_hdmi(void) ++{ ++ struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR; ++ return readb(&hdmi->phy_stat0) & HDMI_DVI_STAT; ++} ++ ++int board_video_skip(void) ++{ ++ int ret; ++ ++ ret = ipuv3_fb_init(&hdmi, 0, IPU_PIX_FMT_RGB24); ++ ++ if (ret) ++ printf("HDMI cannot be configured: %d\n", ret); ++ ++ if (detect_hdmi()) ++ imx_enable_hdmi_phy(); ++ ++ return ret; ++} ++ ++static void setup_display(void) ++{ ++ struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; ++ int reg; ++ ++ enable_ipu_clock(); ++ imx_setup_hdmi(); ++ ++ reg = readl(&mxc_ccm->chsccdr); ++ reg |= (CHSCCDR_CLK_SEL_LDB_DI0 ++ << MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); ++ writel(reg, &mxc_ccm->chsccdr); ++} ++#endif /* CONFIG_VIDEO_IPUV3 */ ++ ++#ifdef CONFIG_USB_EHCI_MX6 ++int board_ehci_hcd_init(int port) ++{ ++ return 0; ++} ++#endif ++ ++int board_early_init_f(void) ++{ ++ setup_iomux_uart(); ++ ++#ifdef CONFIG_VIDEO_IPUV3 ++ setup_display(); ++#endif ++ return 0; ++} ++ ++int board_init(void) ++{ ++ /* address of boot parameters */ ++ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; ++ ++ return 0; ++} ++ ++static char const *board_type = "uninitialized"; ++ ++int checkboard(void) ++{ ++ puts("Board: MX6-C1\n"); ++ board_type = "mx6-c1"; ++ return 0; ++} ++ ++#ifdef CONFIG_CMD_BMODE ++static const struct boot_mode board_boot_modes[] = { ++ /* 4 bit bus width */ ++ {"mmc0", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, ++ {NULL, 0}, ++}; ++#endif ++ ++int board_late_init(void) ++{ ++ int cpurev = get_cpu_rev(); ++ setenv("cpu",get_imx_type((cpurev & 0xFF000) >> 12)); ++ setenv("board",board_type); ++ ++#ifdef CONFIG_CMD_BMODE ++ add_board_boot_modes(board_boot_modes); ++#endif ++ ++ return 0; ++} +diff --git a/board/solidrun/mx6_c1/mx6_c1_bootscript.txt b/board/solidrun/mx6_c1/mx6_c1_bootscript.txt +new file mode 100644 +index 0000000..c061885 +--- /dev/null ++++ b/board/solidrun/mx6_c1/mx6_c1_bootscript.txt +@@ -0,0 +1,30 @@ ++setenv bootargs enable_wait_mode=off ++setenv nextcon 0; ++ ++if test xXGA = "x$panel" ; then ++ setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB24 ++else ++ setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,OC-VGA,if=RGB24 ++fi ++ ++setenv nextcon 1 ++setenv fbmem "fbmem=10M"; ++if hdmidet ; then ++ setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24 ++ setenv fbmem $fbmem,28M; ++ setexpr nextcon $nextcon + 1; ++else ++ echo "------ no HDMI monitor"; ++fi ++ ++while test "4" -ne $nextcon ; do ++ setenv bootargs $bootargs video=mxcfb${nextcon}:off ; ++ setexpr nextcon $nextcon + 1 ; ++done ++ ++setenv bootargs $bootargs $fbmem ++setenv bootargs $bootargs console=ttymxc0,115200 vmalloc=400M consoleblank=0 ; ++${fs}load ${dtype} ${disk}:1 10800000 /boot/uImage ++&& ${fs}load ${dtype} ${disk}:1 12800000 /boot/uramdisk.img ++&& bootm 10800000 12800000 ; ++echo "Error loading kernel image" +diff --git a/board/solidrun/mx6_c1/mx6_c1d.cfg b/board/solidrun/mx6_c1/mx6_c1d.cfg +new file mode 100644 +index 0000000..8211ac8 +--- /dev/null ++++ b/board/solidrun/mx6_c1/mx6_c1d.cfg +@@ -0,0 +1,46 @@ ++/* ++ * Copyright (C) 2013 Boundary Devices ++ * Copyright (C) 2013 Jon Nettleton ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not write to the Free Software ++ * Foundation Inc. 51 Franklin Street Fifth Floor Boston, ++ * MA 02110-1301 USA ++ * ++ * Refer docs/README.imxmage for more details about how-to configure ++ * and create imximage boot image ++ * ++ * The syntax is taken as close as possible with the kwbimage ++ */ ++ ++/* image version */ ++IMAGE_VERSION 2 ++ ++/* ++ * Boot Device : one of ++ * spi, sd (the board has no nand neither onenand) ++ */ ++BOOT_FROM sd ++ ++#define __ASSEMBLY__ ++#include ++#include "asm/arch/mx6-ddr.h" ++#include "asm/arch/iomux.h" ++#include "asm/arch/crm_regs.h" ++ ++#include "../mx6-microsom/ddr-1066mhz-64bit-setup.cfg" ++#include "../mx6-microsom/1066mhz_4x256mx16.cfg" ++#include "../mx6-microsom/clocks.cfg" +diff --git a/board/solidrun/mx6_c1/mx6_c1dl.cfg b/board/solidrun/mx6_c1/mx6_c1dl.cfg +new file mode 100644 +index 0000000..33eddd4 +--- /dev/null ++++ b/board/solidrun/mx6_c1/mx6_c1dl.cfg +@@ -0,0 +1,46 @@ ++/* ++ * Copyright (C) 2013 Boundary Devices ++ * Copyright (C) 2013 Jon Nettleton ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not write to the Free Software ++ * Foundation Inc. 51 Franklin Street Fifth Floor Boston, ++ * MA 02110-1301 USA ++ * ++ * Refer docs/README.imxmage for more details about how-to configure ++ * and create imximage boot image ++ * ++ * The syntax is taken as close as possible with the kwbimage ++ */ ++ ++/* image version */ ++IMAGE_VERSION 2 ++ ++/* ++ * Boot Device : one of ++ * spi, sd (the board has no nand neither onenand) ++ */ ++BOOT_FROM sd ++ ++#define __ASSEMBLY__ ++#include ++#include "asm/arch/mx6-ddr.h" ++#include "asm/arch/iomux.h" ++#include "asm/arch/crm_regs.h" ++ ++#include "../mx6-microsom/ddr-800mhz-64bit-setup.cfg" ++#include "../mx6-microsom/800mhz_4x128mx16.cfg" ++#include "../mx6-microsom/clocks.cfg" +diff --git a/board/solidrun/mx6_c1/mx6_c1q.cfg b/board/solidrun/mx6_c1/mx6_c1q.cfg +new file mode 100644 +index 0000000..8211ac8 +--- /dev/null ++++ b/board/solidrun/mx6_c1/mx6_c1q.cfg +@@ -0,0 +1,46 @@ ++/* ++ * Copyright (C) 2013 Boundary Devices ++ * Copyright (C) 2013 Jon Nettleton ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not write to the Free Software ++ * Foundation Inc. 51 Franklin Street Fifth Floor Boston, ++ * MA 02110-1301 USA ++ * ++ * Refer docs/README.imxmage for more details about how-to configure ++ * and create imximage boot image ++ * ++ * The syntax is taken as close as possible with the kwbimage ++ */ ++ ++/* image version */ ++IMAGE_VERSION 2 ++ ++/* ++ * Boot Device : one of ++ * spi, sd (the board has no nand neither onenand) ++ */ ++BOOT_FROM sd ++ ++#define __ASSEMBLY__ ++#include ++#include "asm/arch/mx6-ddr.h" ++#include "asm/arch/iomux.h" ++#include "asm/arch/crm_regs.h" ++ ++#include "../mx6-microsom/ddr-1066mhz-64bit-setup.cfg" ++#include "../mx6-microsom/1066mhz_4x256mx16.cfg" ++#include "../mx6-microsom/clocks.cfg" +diff --git a/board/solidrun/mx6_c1/mx6_c1solo.cfg b/board/solidrun/mx6_c1/mx6_c1solo.cfg +new file mode 100644 +index 0000000..8acb5ba +--- /dev/null ++++ b/board/solidrun/mx6_c1/mx6_c1solo.cfg +@@ -0,0 +1,46 @@ ++/* ++ * Copyright (C) 2013 Boundary Devices ++ * Copyright (C) 2013 Jon Nettleton ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not write to the Free Software ++ * Foundation Inc. 51 Franklin Street Fifth Floor Boston, ++ * MA 02110-1301 USA ++ * ++ * Refer docs/README.imxmage for more details about how-to configure ++ * and create imximage boot image ++ * ++ * The syntax is taken as close as possible with the kwbimage ++ */ ++ ++/* image version */ ++IMAGE_VERSION 2 ++ ++/* ++ * Boot Device : one of ++ * spi, sd (the board has no nand neither onenand) ++ */ ++BOOT_FROM sd ++ ++#define __ASSEMBLY__ ++#include ++#include "asm/arch/mx6-ddr.h" ++#include "asm/arch/iomux.h" ++#include "asm/arch/crm_regs.h" ++ ++#include "../mx6-microsom/ddr-800mhz-32bit-setup.cfg" ++#include "../mx6-microsom/800mhz_2x128mx16.cfg" ++#include "../mx6-microsom/clocks.cfg" +diff --git a/board/solidrun/mx6_cubox-i/Makefile b/board/solidrun/mx6_cubox-i/Makefile +new file mode 100644 +index 0000000..2de7a70 +--- /dev/null ++++ b/board/solidrun/mx6_cubox-i/Makefile +@@ -0,0 +1,23 @@ ++# ++# Copyright (C) 2012-2013, Guennadi Liakhovetski ++# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. ++# Copyright (C) 2013, Boundary Devices ++# Copyright (C) 2013, Jon Nettleton ++# ++# This program is free software; you can redistribute it and/or ++# modify it under the terms of the GNU General Public License as ++# published by the Free Software Foundation; either version 2 of ++# the License, or (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++# MA 02111-1307 USA ++# ++ ++obj-y := mx6_cubox-i.o mx6_cubox-i_spl.o +diff --git a/board/solidrun/mx6_cubox-i/imx6image.cfg b/board/solidrun/mx6_cubox-i/imx6image.cfg +new file mode 100644 +index 0000000..e9736fb +--- /dev/null ++++ b/board/solidrun/mx6_cubox-i/imx6image.cfg +@@ -0,0 +1,28 @@ ++/* ++ * Maintainer : Richard Hu ++ * ++ * Derived from Nitrogen6x code by Boundary Devices ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ * ++ * Refer doc/README.imximage for more details about how-to configure ++ * and create imximage boot image ++ * ++ * The syntax is taken as close as possible with the kwbimage ++ */ ++ ++/* image version */ ++IMAGE_VERSION 2 ++ ++/* ++ * Boot Device : one of ++ * spi, sd (the board has no nand neither onenand) ++ */ ++BOOT_FROM sd ++ ++#define __ASSEMBLY__ ++#include ++#include "asm/arch/iomux.h" ++#include "asm/arch/crm_regs.h" ++ ++#include "../mx6-microsom/clocks.cfg" +diff --git a/board/solidrun/mx6_cubox-i/mx6_cubox-i.c b/board/solidrun/mx6_cubox-i/mx6_cubox-i.c +new file mode 100644 +index 0000000..61015e9 +--- /dev/null ++++ b/board/solidrun/mx6_cubox-i/mx6_cubox-i.c +@@ -0,0 +1,483 @@ ++/* ++ * Copyright (C) 2012 Freescale Semiconductor, Inc. ++ * Copyright (C) 2013 SolidRun ltd. ++ * Copyright (C) 2013 Jon Nettleton . ++ * ++ * Author: Fabio Estevam ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../../../drivers/video/mxcfb.h" ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++#define MX6QDL_SET_PAD(p, q) \ ++ if (is_cpu_type(MXC_CPU_MX6Q)) \ ++ imx_iomux_v3_setup_pad(MX6Q_##p | q);\ ++ else \ ++ imx_iomux_v3_setup_pad(MX6DL_##p | q) ++ ++#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ ++ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ ++ PAD_CTL_SRE_FAST | PAD_CTL_HYS) ++ ++#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ ++ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ ++ PAD_CTL_SRE_FAST | PAD_CTL_HYS) ++ ++#define USDHC_PAD_CLK_CTRL (PAD_CTL_SPEED_LOW | \ ++ PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | \ ++ PAD_CTL_HYS) ++ ++#define USDHC_PAD_GPIO_CTRL (PAD_CTL_PUS_22K_UP | \ ++ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ ++ PAD_CTL_SRE_FAST | PAD_CTL_HYS) ++ ++#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ ++ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) ++ ++#define ENET_PAD_CTRL_PD (PAD_CTL_PUS_100K_DOWN | \ ++ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) ++ ++#define ENET_PAD_CTRL_CLK (PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ ++ PAD_CTL_SRE_FAST) ++ ++#define LED IMX_GPIO_NR(4, 29) ++ ++int hb_cuboxi_ = 0; /* 1 is HummingBoard, 0 is CuBox-i */ ++int dram_init(void) ++{ ++ uint cpurev, imxtype; ++ u32 sdram_size; ++ ++ cpurev = get_cpu_rev(); ++ imxtype = (cpurev & 0xFF000) >> 12; ++ ++ switch (imxtype){ ++ case MXC_CPU_MX6SOLO: ++ sdram_size = 512u * 1024 * 1024; ++ break; ++ case MXC_CPU_MX6Q: ++ { ++ /* Read first the snoop control unit config register */ ++ u32 scu_config = *(u32 *)(SCU_BASE_ADDR + 0x4); ++ if ((scu_config & 0x3) == 0x3) /* Quad core */ ++ sdram_size = 2u * 1024 * 1024 * 1024; ++ else /* Dual core */ ++ sdram_size = 1u * 1024 * 1024 * 1024; ++ break; ++ } ++ case MXC_CPU_MX6DL: ++ default: ++ sdram_size = 1u * 1024 * 1024 * 1024; ++ break; ++ } ++ gd->ram_size = get_ram_size((void *)PHYS_SDRAM, sdram_size); ++ ++ return 0; ++} ++ ++#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) ++iomux_v3_cfg_t const uart1_pads[] = { ++ MX6_PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), ++ MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), ++}; ++ ++ ++iomux_v3_cfg_t const usdhc2_pads[] = { ++ MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CLK_CTRL), ++ MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), ++ MX6_PAD_GPIO_4__SD2_CD_B | MUX_PAD_CTRL(USDHC_PAD_GPIO_CTRL), ++}; ++iomux_v3_cfg_t const key_row1[] = { ++ /* Following is only for sensing if it's CuBox-i or HummingBoard */ ++ MX6_PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(UART_PAD_CTRL), ++} ++#endif ++ ++static void setup_iomux_uart(void) ++{ ++#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) ++ imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); ++#endif ++#if defined(CONFIG_MX6QDL) ++ MX6QDL_SET_PAD(PAD_CSI0_DAT10__UART1_TX_DATA, MUX_PAD_CTRL(UART_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_CSI0_DAT11__UART1_RX_DATA, MUX_PAD_CTRL(UART_PAD_CTRL)); ++#endif ++} ++ ++#ifdef CONFIG_FSL_ESDHC ++struct fsl_esdhc_cfg usdhc_cfg[1] = { ++ { USDHC2_BASE_ADDR }, ++}; ++ ++int board_mmc_getcd(struct mmc *mmc) ++{ ++ struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; ++ ++ if (cfg->esdhc_base == USDHC2_BASE_ADDR) { ++ return !gpio_get_value(IMX_GPIO_NR(1, 4)); ++ } ++ ++ return 0; ++} ++ ++int board_mmc_init(bd_t *bis) ++{ ++ /* ++ * Only one USDHC controller ++ */ ++#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) ++ imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); ++#endif ++#if defined(CONFIG_MX6QDL) ++ MX6QDL_SET_PAD(PAD_SD2_CLK__SD2_CLK , MUX_PAD_CTRL(USDHC_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_SD2_CMD__SD2_CMD , MUX_PAD_CTRL(USDHC_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_SD2_DAT0__SD2_DATA0, MUX_PAD_CTRL(USDHC_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_SD2_DAT1__SD2_DATA1, MUX_PAD_CTRL(USDHC_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_SD2_DAT2__SD2_DATA2, MUX_PAD_CTRL(USDHC_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_SD2_DAT3__SD2_DATA3, MUX_PAD_CTRL(USDHC_PAD_CTRL)); ++ /* Carrier MicroSD Card Detect */ ++ MX6QDL_SET_PAD(PAD_GPIO_4__SD2_CD_B , MUX_PAD_CTRL(NO_PAD_CTRL)); ++#endif ++ gpio_direction_input(IMX_GPIO_NR(1, 4)); ++ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); ++ ++ return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); ++} ++#endif ++ ++#ifdef CONFIG_FEC_MXC ++#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) ++iomux_v3_cfg_t const enet_pads[] = { ++ MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ /* AR8035 reset */ ++ MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), ++ /* AR8035 interrupt */ ++ MX6_PAD_DI0_PIN2__GPIO4_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL), ++ /* GPIO16 -> AR8035 25MHz */ ++ MX6_PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(NO_PAD_CTRL), ++ MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(NO_PAD_CTRL), ++ MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ ++ MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL_CLK), ++ MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), ++ MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), ++ MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), ++ MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), ++}; ++#endif ++ ++static void setup_iomux_enet(void) ++{ ++#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) ++ imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); ++#endif ++#if defined(CONFIG_MX6QDL) ++ MX6QDL_SET_PAD(PAD_ENET_MDIO__ENET_MDIO, MUX_PAD_CTRL(ENET_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_ENET_MDC__ENET_MDC, MUX_PAD_CTRL(ENET_PAD_CTRL)); ++ /* AR8035 reset */ ++ MX6QDL_SET_PAD(PAD_KEY_ROW4__GPIO4_IO15, MUX_PAD_CTRL(ENET_PAD_CTRL_PD)); ++ /* AR8035 interrupt */ ++ MX6QDL_SET_PAD(PAD_DI0_PIN2__GPIO4_IO18, MUX_PAD_CTRL(NO_PAD_CTRL)); ++ /* GPIO16 -> AR8035 25MHz */ ++ MX6QDL_SET_PAD(PAD_GPIO_16__ENET_REF_CLK, MUX_PAD_CTRL(NO_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_RGMII_TXC__RGMII_TXC, MUX_PAD_CTRL(NO_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_RGMII_TD0__RGMII_TD0, MUX_PAD_CTRL(ENET_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_RGMII_TD1__RGMII_TD1, MUX_PAD_CTRL(ENET_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_RGMII_TD2__RGMII_TD2, MUX_PAD_CTRL(ENET_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_RGMII_TD3__RGMII_TD3, MUX_PAD_CTRL(ENET_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_RGMII_TX_CTL__RGMII_TX_CTL, MUX_PAD_CTRL(ENET_PAD_CTRL)); ++ /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ ++ MX6QDL_SET_PAD(PAD_ENET_REF_CLK__ENET_TX_CLK, MUX_PAD_CTRL(ENET_PAD_CTRL_CLK)); ++ MX6QDL_SET_PAD(PAD_RGMII_RXC__RGMII_RXC, MUX_PAD_CTRL(ENET_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_RGMII_RD0__RGMII_RD0, MUX_PAD_CTRL(ENET_PAD_CTRL_PD)); ++ MX6QDL_SET_PAD(PAD_RGMII_RD1__RGMII_RD1, MUX_PAD_CTRL(ENET_PAD_CTRL_PD)); ++ MX6QDL_SET_PAD(PAD_RGMII_RD2__RGMII_RD2, MUX_PAD_CTRL(ENET_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_RGMII_RD3__RGMII_RD3, MUX_PAD_CTRL(ENET_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_RGMII_RX_CTL__RGMII_RX_CTL, MUX_PAD_CTRL(ENET_PAD_CTRL_PD)); ++#endif ++ /* ++ * Reset AR8035 PHY. Since it runs 25MHz reference clock, it ++ * requires two resets. ++ */ ++ gpio_direction_output(IMX_GPIO_NR(4, 15), 0); ++ udelay(1000 * 2); ++ gpio_set_value(IMX_GPIO_NR(4, 15), 1); ++ udelay(1000 * 2); ++ gpio_set_value(IMX_GPIO_NR(4, 15), 0); ++ udelay(1000 * 2); ++ gpio_set_value(IMX_GPIO_NR(4, 15), 1); ++ udelay(1000 * 2); ++} ++int fecmxc_initialize(bd_t *bd) ++{ ++ /* ++ * Initialize the phy in address 0x0 or 0x4. ++ * The LED_ACT pin on the carrier-one boards had a pull down that ++ * forces the phy address to 0x0; where on CuBox-i and the production ++ * HummingBoard that pin is connected directly to LED that depending ++ * on the pull down strength of the LED it might be sampled ++ * as '0' or '1' thus the phy address might appear as either address ++ * 0x0 or 0x4. ++ */ ++ if (fecmxc_initialize_multi(bd, -1, 0x0, IMX_FEC_BASE) == 0) return 0; ++ return fecmxc_initialize_multi(bd, -1, 0x4, IMX_FEC_BASE); ++} ++ ++int board_phy_config(struct phy_device *phydev) ++{ ++ if (phydev->drv->config) ++ phydev->drv->config(phydev); ++ ++ return 0; ++} ++ ++int board_eth_init(bd_t *bis) ++{ ++ int ret; ++ struct iomuxc_base_regs *const iomuxc_regs ++ = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR; ++ struct anatop_regs __iomem *anatop = ++ (struct anatop_regs __iomem *)ANATOP_BASE_ADDR; ++ u32 reg = 0; ++ s32 timeout = 100000; ++ ++ enable_fec_anatop_clock(ENET_25MHz); ++ /* set gpr1[21] */ ++ clrsetbits_le32(&iomuxc_regs->gpr[1], 0, (1 << 21)); ++ ++ while (timeout--) { ++ if (readl(&anatop->pll_enet) & BM_ANADIG_PLL_ENET_LOCK) ++ break; ++ } ++ ++ setup_iomux_enet(); ++ ++ ret = cpu_eth_init(bis); ++ if (ret) ++ printf("FEC MXC: %s:failed\n", __func__); ++ ++ return 0; ++} ++#endif ++ ++#ifdef CONFIG_VIDEO_IPUV3 ++static struct fb_videomode const hdmi = { ++ .name = "HDMI", ++ .refresh = 60, ++ .xres = 1024, ++ .yres = 768, ++ .pixclock = 15385, ++ .left_margin = 220, ++ .right_margin = 40, ++ .upper_margin = 21, ++ .lower_margin = 7, ++ .hsync_len = 60, ++ .vsync_len = 10, ++ .sync = FB_SYNC_EXT | FB_SYNC_CLK_LAT_FALL, ++ .vmode = FB_VMODE_NONINTERLACED ++}; ++ ++static int detect_hdmi(void) ++{ ++ struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR; ++ return readb(&hdmi->phy_stat0) & HDMI_DVI_STAT; ++} ++ ++int board_video_skip(void) ++{ ++ int ret; ++ ++ ret = ipuv3_fb_init(&hdmi, 0, IPU_PIX_FMT_RGB24); ++ ++ if (ret) ++ printf("HDMI cannot be configured: %d\n", ret); ++ ++ if (detect_hdmi()) ++ imx_enable_hdmi_phy(); ++ ++ return ret; ++} ++ ++static void setup_display(void) ++{ ++ struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; ++ int reg; ++ ++ enable_ipu_clock(); ++ imx_setup_hdmi(); ++ ++ reg = readl(&mxc_ccm->chsccdr); ++ reg |= (CHSCCDR_CLK_SEL_LDB_DI0 ++ << MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); ++ writel(reg, &mxc_ccm->chsccdr); ++} ++#endif /* CONFIG_VIDEO_IPUV3 */ ++ ++#ifdef CONFIG_USB_EHCI_MX6 ++#define USB_OTG_EN IMX_GPIO_NR(3, 22) ++#define USB_H1_EN IMX_GPIO_NR(1, 0) ++#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) ++iomux_v3_cfg_t const usb_en_pads[] = { ++ MX6_PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(UART_PAD_CTRL), ++ MX6_PAD_GPIO_0__GPIO1_IO00 | MUX_PAD_CTRL(UART_PAD_CTRL), ++}; ++iomux_v3_cfg_t const usb_id_pad[] = { ++ MX6_PAD_GPIO_1__USB_OTG_ID, ++}; ++#endif ++ ++int board_ehci_hcd_init(int port) ++{ ++ return 0; ++} ++#endif ++ ++char config_sys_prompt_cuboxi[] = "CuBox-i U-Boot > "; ++char config_sys_prompt_hummingboard[] = "HummingBoard U-Boot > "; ++char *config_sys_prompt = config_sys_prompt_cuboxi; ++static void detect_board(void) ++{ ++ int val; ++#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) ++ imx_iomux_v3_setup_multiple_pads(key_row1, ARRAY_SIZE(key_row1)); ++#endif ++#if defined(CONFIG_MX6QDL) ++ MX6QDL_SET_PAD(PAD_KEY_ROW1__GPIO4_IO09, MUX_PAD_CTRL(UART_PAD_CTRL)); ++#endif ++ gpio_direction_input(IMX_GPIO_NR(4, 9)); ++ val = gpio_get_value(IMX_GPIO_NR(4, 9)); ++ if (val == 0) { ++ hb_cuboxi_ = 0; ++ config_sys_prompt = config_sys_prompt_cuboxi; ++ } else { ++ hb_cuboxi_ = 1; ++ config_sys_prompt = config_sys_prompt_hummingboard; ++ } ++} ++ ++int board_early_init_f(void) ++{ ++ setup_iomux_uart(); ++ detect_board(); ++#ifdef CONFIG_VIDEO_IPUV3 ++ setup_display(); ++#endif ++#ifdef CONFIG_USB_EHCI_MX6 ++#if defined(CONFIG_MX6QDL) ++ MX6QDL_SET_PAD(PAD_EIM_D22__GPIO3_IO22 , MUX_PAD_CTRL(UART_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_GPIO_0__GPIO1_IO00 , MUX_PAD_CTRL(UART_PAD_CTRL)); ++ MX6QDL_SET_PAD(PAD_GPIO_1__USB_OTG_ID, 0); ++#else ++ /* Setup USB OTG ID */ ++ imx_iomux_v3_setup_multiple_pads(usb_id_pad, ARRAY_SIZE(usb_id_pad)); ++ /* Setup enable pads */ ++ imx_iomux_v3_setup_multiple_pads(usb_en_pads, ARRAY_SIZE(usb_en_pads)); ++#endif ++ /* Enable USB OTG and H1 current limiter */ ++ gpio_direction_output(USB_OTG_EN, 1); ++ gpio_direction_output(USB_H1_EN, 1); ++#endif ++ return 0; ++} ++ ++#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) ++iomux_v3_cfg_t const led_pads[] = { ++ MX6_PAD_DISP0_DAT8__GPIO_4_29 | MUX_PAD_CTRL(UART_PAD_CTRL), ++}; ++#endif ++ ++int board_init(void) ++{ ++ /* address of boot parameters */ ++ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; ++ /* ++ * The reason hb_cuboxi_ is not checked here is because it seems to be ++ * overwritten somewhere, somehow ++ */ ++ ++ if (config_sys_prompt == config_sys_prompt_cuboxi) { ++ gd->bd->bi_arch_number = 4821; /* CuBox-i machine ID */ ++ /* Enable front LED */ ++ gpio_direction_output(LED, 0); ++ } else { ++ gd->bd->bi_arch_number = 4773; /* HummingBoard machine ID */ ++ } ++ return 0; ++} ++ ++static char const *board_type = "uninitialized"; ++ ++int checkboard(void) ++{ ++ if (hb_cuboxi_ == 0) { ++ puts("Board: MX6-CuBox-i\n"); ++ board_type = "mx6-cubox-i"; ++ } else { ++ puts("Board: MX6-HummingBoard\n"); ++ board_type = "mx6-hummingboard"; ++ } ++ return 0; ++} ++ ++#ifdef CONFIG_CMD_BMODE ++static const struct boot_mode board_boot_modes[] = { ++ /* 4 bit bus width */ ++ {"mmc0", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, ++ {NULL, 0}, ++}; ++#endif ++ ++int board_late_init(void) ++{ ++ int cpurev = get_cpu_rev(); ++ setenv("cpu",get_imx_type((cpurev & 0xFF000) >> 12)); ++ setenv("board",board_type); ++ ++#ifdef CONFIG_CMD_BMODE ++ add_board_boot_modes(board_boot_modes); ++#endif ++ ++ return 0; ++} +diff --git a/board/solidrun/mx6_cubox-i/mx6_cubox-i_bootscript.txt b/board/solidrun/mx6_cubox-i/mx6_cubox-i_bootscript.txt +new file mode 100644 +index 0000000..c061885 +--- /dev/null ++++ b/board/solidrun/mx6_cubox-i/mx6_cubox-i_bootscript.txt +@@ -0,0 +1,30 @@ ++setenv bootargs enable_wait_mode=off ++setenv nextcon 0; ++ ++if test xXGA = "x$panel" ; then ++ setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB24 ++else ++ setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,OC-VGA,if=RGB24 ++fi ++ ++setenv nextcon 1 ++setenv fbmem "fbmem=10M"; ++if hdmidet ; then ++ setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24 ++ setenv fbmem $fbmem,28M; ++ setexpr nextcon $nextcon + 1; ++else ++ echo "------ no HDMI monitor"; ++fi ++ ++while test "4" -ne $nextcon ; do ++ setenv bootargs $bootargs video=mxcfb${nextcon}:off ; ++ setexpr nextcon $nextcon + 1 ; ++done ++ ++setenv bootargs $bootargs $fbmem ++setenv bootargs $bootargs console=ttymxc0,115200 vmalloc=400M consoleblank=0 ; ++${fs}load ${dtype} ${disk}:1 10800000 /boot/uImage ++&& ${fs}load ${dtype} ${disk}:1 12800000 /boot/uramdisk.img ++&& bootm 10800000 12800000 ; ++echo "Error loading kernel image" +diff --git a/board/solidrun/mx6_cubox-i/mx6_cubox-i_spl.c b/board/solidrun/mx6_cubox-i/mx6_cubox-i_spl.c +new file mode 100644 +index 0000000..53e44ed +--- /dev/null ++++ b/board/solidrun/mx6_cubox-i/mx6_cubox-i_spl.c +@@ -0,0 +1,575 @@ ++/* ++ * Author: Tungyi Lin ++ * ++ * Derived from EDM_CF_IMX6 code by TechNexion,Inc ++ * Ported to SolidRun microSOM by Rabeeh Khoury ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++#include ++#include ++#include ++#ifdef CONFIG_SPL ++#include ++#endif ++ ++#define CONFIG_SPL_STACK 0x0091FFB8 ++ ++#define __REG16(x) (*((volatile u16 *)(x))) ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++#if defined(CONFIG_SPL_BUILD) ++ ++static enum boot_device boot_dev; ++enum boot_device get_boot_device(void); ++ ++static inline void setup_boot_device(void) ++{ ++ uint soc_sbmr = readl(SRC_BASE_ADDR + 0x4); ++ uint bt_mem_ctl = (soc_sbmr & 0x000000FF) >> 4 ; ++ uint bt_mem_type = (soc_sbmr & 0x00000008) >> 3; ++ uint bt_mem_mmc = (soc_sbmr & 0x00001000) >> 12; ++ ++ switch (bt_mem_ctl) { ++ case 0x0: ++ if (bt_mem_type) ++ boot_dev = MX6_ONE_NAND_BOOT; ++ else ++ boot_dev = MX6_WEIM_NOR_BOOT; ++ break; ++ case 0x2: ++ boot_dev = MX6_SATA_BOOT; ++ break; ++ case 0x3: ++ if (bt_mem_type) ++ boot_dev = MX6_I2C_BOOT; ++ else ++ boot_dev = MX6_SPI_NOR_BOOT; ++ break; ++ case 0x4: ++ case 0x5: ++ if (bt_mem_mmc) ++ boot_dev = MX6_SD0_BOOT; ++ else ++ boot_dev = MX6_SD1_BOOT; ++ break; ++ case 0x6: ++ case 0x7: ++ boot_dev = MX6_MMC_BOOT; ++ break; ++ case 0x8 ... 0xf: ++ boot_dev = MX6_NAND_BOOT; ++ break; ++ default: ++ boot_dev = MX6_UNKNOWN_BOOT; ++ break; ++ } ++} ++ ++enum boot_device get_boot_device(void) { ++ return boot_dev; ++} ++ ++#include "asm/arch/mx6_ddr_regs.h" ++ ++static void spl_dram_init_mx6solo_512mb(void); ++static void spl_dram_init_mx6dl_1g(void); ++static void spl_dram_init_mx6dq_1g(void); ++static void spl_dram_init_mx6dq_2g(void); ++static void spl_dram_init(void); ++ ++static void spl_mx6q_dram_setup_iomux(void) ++{ ++ volatile struct mx6qd_iomux_ddr_regs *mx6q_ddr_iomux; ++ volatile struct mx6qd_iomux_grp_regs *mx6q_grp_iomux; ++ ++ mx6q_ddr_iomux = (struct mx6dq_iomux_ddr_regs *) MX6DQ_IOM_DDR_BASE; ++ mx6q_grp_iomux = (struct mx6dq_iomux_grp_regs *) MX6DQ_IOM_GRP_BASE; ++ ++ mx6q_grp_iomux->grp_ddr_type = (u32)0x000c0000; ++ mx6q_grp_iomux->grp_ddrpke = (u32)0x00000000; ++ mx6q_ddr_iomux->dram_sdclk_0 = (u32)0x00020030; ++ mx6q_ddr_iomux->dram_sdclk_1 = (u32)0x00020030; ++ mx6q_ddr_iomux->dram_cas = (u32)0x00020030; ++ mx6q_ddr_iomux->dram_ras = (u32)0x00020030; ++ mx6q_grp_iomux->grp_addds = (u32)0x00000030; ++ mx6q_ddr_iomux->dram_reset = (u32)0x00020030; ++ mx6q_ddr_iomux->dram_sdcke0 = (u32)0x00003000; ++ mx6q_ddr_iomux->dram_sdcke1 = (u32)0x00003000; ++ mx6q_ddr_iomux->dram_sdba2 = (u32)0x00000000; ++ mx6q_ddr_iomux->dram_sdodt0 = (u32)0x00003030; ++ mx6q_ddr_iomux->dram_sdodt1 = (u32)0x00003030; ++ mx6q_grp_iomux->grp_ctlds = (u32)0x00000030; ++ mx6q_grp_iomux->grp_ddrmode_ctl = (u32)0x00020000; ++ mx6q_ddr_iomux->dram_sdqs0 = (u32)0x00000030; ++ mx6q_ddr_iomux->dram_sdqs1 = (u32)0x00000030; ++ mx6q_ddr_iomux->dram_sdqs2 = (u32)0x00000030; ++ mx6q_ddr_iomux->dram_sdqs3 = (u32)0x00000030; ++ mx6q_ddr_iomux->dram_sdqs4 = (u32)0x00000030; ++ mx6q_ddr_iomux->dram_sdqs5 = (u32)0x00000030; ++ mx6q_ddr_iomux->dram_sdqs6 = (u32)0x00000030; ++ mx6q_ddr_iomux->dram_sdqs7 = (u32)0x00000030; ++ mx6q_grp_iomux->grp_ddrmode = (u32)0x00020000; ++ mx6q_grp_iomux->grp_b0ds = (u32)0x00000030; ++ mx6q_grp_iomux->grp_b1ds = (u32)0x00000030; ++ mx6q_grp_iomux->grp_b2ds = (u32)0x00000030; ++ mx6q_grp_iomux->grp_b3ds = (u32)0x00000030; ++ mx6q_grp_iomux->grp_b4ds = (u32)0x00000030; ++ mx6q_grp_iomux->grp_b5ds = (u32)0x00000030; ++ mx6q_grp_iomux->grp_b6ds = (u32)0x00000030; ++ mx6q_grp_iomux->grp_b7ds = (u32)0x00000030; ++ mx6q_ddr_iomux->dram_dqm0 = (u32)0x00020030; ++ mx6q_ddr_iomux->dram_dqm1 = (u32)0x00020030; ++ mx6q_ddr_iomux->dram_dqm2 = (u32)0x00020030; ++ mx6q_ddr_iomux->dram_dqm3 = (u32)0x00020030; ++ mx6q_ddr_iomux->dram_dqm4 = (u32)0x00020030; ++ mx6q_ddr_iomux->dram_dqm5 = (u32)0x00020030; ++ mx6q_ddr_iomux->dram_dqm6 = (u32)0x00020030; ++ mx6q_ddr_iomux->dram_dqm7 = (u32)0x00020030; ++} ++ ++static void spl_mx6dl_dram_setup_iomux(void) ++{ ++ volatile struct mx6sdl_iomux_ddr_regs *mx6dl_ddr_iomux; ++ volatile struct mx6sdl_iomux_grp_regs *mx6dl_grp_iomux; ++ ++ mx6dl_ddr_iomux = (struct mx6sdl_iomux_ddr_regs *) MX6SDL_IOM_DDR_BASE; ++ mx6dl_grp_iomux = (struct mx6sdl_iomux_grp_regs *) MX6SDL_IOM_GRP_BASE; ++ ++ mx6dl_grp_iomux->grp_ddr_type = (u32)0x000c0000; ++ mx6dl_grp_iomux->grp_ddrpke = (u32)0x00000000; ++ mx6dl_ddr_iomux->dram_sdclk_0 = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_sdclk_1 = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_cas = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_ras = (u32)0x00000028; ++ mx6dl_grp_iomux->grp_addds = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_reset = (u32)0x000c0028; ++ mx6dl_ddr_iomux->dram_sdcke0 = (u32)0x00003000; ++ mx6dl_ddr_iomux->dram_sdcke1 = (u32)0x00003000; ++ mx6dl_ddr_iomux->dram_sdba2 = (u32)0x00000000; ++ mx6dl_ddr_iomux->dram_sdodt0 = (u32)0x00003030; ++ mx6dl_ddr_iomux->dram_sdodt1 = (u32)0x00003030; ++ mx6dl_grp_iomux->grp_ctlds = (u32)0x00000028; ++ mx6dl_grp_iomux->grp_ddrmode_ctl = (u32)0x00020000; ++ mx6dl_ddr_iomux->dram_sdqs0 = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_sdqs1 = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_sdqs2 = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_sdqs3 = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_sdqs4 = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_sdqs5 = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_sdqs6 = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_sdqs7 = (u32)0x00000028; ++ mx6dl_grp_iomux->grp_ddrmode = (u32)0x00020000; ++ mx6dl_grp_iomux->grp_b0ds = (u32)0x00000028; ++ mx6dl_grp_iomux->grp_b1ds = (u32)0x00000028; ++ mx6dl_grp_iomux->grp_b2ds = (u32)0x00000028; ++ mx6dl_grp_iomux->grp_b3ds = (u32)0x00000028; ++ mx6dl_grp_iomux->grp_b4ds = (u32)0x00000028; ++ mx6dl_grp_iomux->grp_b5ds = (u32)0x00000028; ++ mx6dl_grp_iomux->grp_b6ds = (u32)0x00000028; ++ mx6dl_grp_iomux->grp_b7ds = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_dqm0 = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_dqm1 = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_dqm2 = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_dqm3 = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_dqm4 = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_dqm5 = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_dqm6 = (u32)0x00000028; ++ mx6dl_ddr_iomux->dram_dqm7 = (u32)0x00000028; ++} ++ ++/* microSOM with Solo processor 512MByte memory */ ++static void spl_dram_init_mx6solo_512mb(void) ++{ ++ volatile struct mmdc_p_regs *mmdc_p0; ++ volatile struct mmdc_p_regs *mmdc_p1; ++ mmdc_p0 = (struct mmdc_p_regs *) MMDC_P0_BASE_ADDR; ++ mmdc_p1 = (struct mmdc_p_regs *) MMDC_P1_BASE_ADDR; ++ ++ /* ZQ */ ++ mmdc_p0->mpzqhwctrl = (u32)0xa1390003; ++ mmdc_p1->mpzqhwctrl = (u32)0xa1390003; ++ /* Write leveling */ ++ mmdc_p0->mpwldectrl0 = (u32)0x0045004D; ++ mmdc_p0->mpwldectrl1 = (u32)0x003A0047; ++ ++ mmdc_p0->mpdgctrl0 = (u32)0x023C0224; ++ mmdc_p0->mpdgctrl1 = (u32)0x02000220; ++ mmdc_p0->mprddlctl = (u32)0x44444846; ++ mmdc_p0->mpwrdlctl = (u32)0x32343032; ++ /* Read data bit delay */ ++ mmdc_p0->mprddqby0dl = (u32)0x33333333; ++ mmdc_p0->mprddqby1dl = (u32)0x33333333; ++ mmdc_p0->mprddqby2dl = (u32)0x33333333; ++ mmdc_p0->mprddqby3dl = (u32)0x33333333; ++ mmdc_p1->mprddqby0dl = (u32)0x33333333; ++ mmdc_p1->mprddqby1dl = (u32)0x33333333; ++ mmdc_p1->mprddqby2dl = (u32)0x33333333; ++ mmdc_p1->mprddqby3dl = (u32)0x33333333; ++ /* Complete calibration by forced measurement */ ++ mmdc_p0->mpmur0 = (u32)0x00000800; ++ mmdc_p0->mdpdc = (u32)0x0002002d; ++ mmdc_p0->mdotc = (u32)0x00333040; ++ mmdc_p0->mdcfg0 = (u32)0x3f435313;//0x3F4352F3;//0x3f435313 ++ mmdc_p0->mdcfg1 = (u32)0xb66e8b63;//0xB66D8B63;//0xb66e8b63 ++ mmdc_p0->mdcfg2 = (u32)0x01ff00db; ++ mmdc_p0->mdmisc = (u32)0x00011740; ++ mmdc_p0->mdscr = (u32)0x00008000; ++ mmdc_p0->mdrwd = (u32)0x000026d2; ++ mmdc_p0->mdor = (u32)0x00431023; ++ mmdc_p0->mdasp = (u32)0x00000017;//0x00000017 ++ mmdc_p0->mdctl = (u32)0x83190000;//0x83190000 <-- this should be it ++ mmdc_p0->mdscr = (u32)0x02008032; ++ mmdc_p0->mdscr = (u32)0x00008033; ++ mmdc_p0->mdscr = (u32)0x04008031; ++ mmdc_p0->mdscr = (u32)0x05208030; ++ mmdc_p0->mdscr = (u32)0x04008040; ++ mmdc_p0->mdref = (u32)0x00007800; ++ mmdc_p0->mpodtctrl = (u32)0x00011117; ++ mmdc_p1->mpodtctrl = (u32)0x00011117; ++ mmdc_p0->mdpdc = (u32)0x0002556d; ++ mmdc_p1->mdpdc = (u32)0x00011006; ++ mmdc_p0->mdscr = (u32)0x00000000; ++} ++ ++/* microSOM with Dual lite processor 1GByte memory */ ++static void spl_dram_init_mx6dl_1g(void) ++{ ++ volatile struct mmdc_p_regs *mmdc_p0; ++ volatile struct mmdc_p_regs *mmdc_p1; ++ mmdc_p0 = (struct mmdc_p_regs *) MMDC_P0_BASE_ADDR; ++ mmdc_p1 = (struct mmdc_p_regs *) MMDC_P1_BASE_ADDR; ++ ++ /* Calibrations */ ++ /* ZQ */ ++ mmdc_p0->mpzqhwctrl = (u32)0xa1390003; ++ mmdc_p1->mpzqhwctrl = (u32)0xa1390003; ++ /* write leveling */ ++ mmdc_p0->mpwldectrl0 = (u32)0x0045004D; ++ mmdc_p0->mpwldectrl1 = (u32)0x003A0047; ++ mmdc_p1->mpwldectrl0 = (u32)0x001F001F; ++ mmdc_p1->mpwldectrl1 = (u32)0x00210035; ++ /* DQS gating, read delay, write delay calibration values ++ based on calibration compare of 0x00ffff00 */ ++ mmdc_p0->mpdgctrl0 = (u32)0x023C0224; ++ mmdc_p0->mpdgctrl1 = (u32)0x02000220; ++ mmdc_p1->mpdgctrl0 = (u32)0x02200220; ++ mmdc_p1->mpdgctrl1 = (u32)0x02040208; ++ mmdc_p0->mprddlctl = (u32)0x44444846; ++ mmdc_p1->mprddlctl = (u32)0x4042463C; ++ mmdc_p0->mpwrdlctl = (u32)0x32343032; ++ mmdc_p1->mpwrdlctl = (u32)0x36363430; ++ /* read data bit delay */ ++ mmdc_p0->mprddqby0dl = (u32)0x33333333; ++ mmdc_p0->mprddqby1dl = (u32)0x33333333; ++ mmdc_p0->mprddqby2dl = (u32)0x33333333; ++ mmdc_p0->mprddqby3dl = (u32)0x33333333; ++ mmdc_p1->mprddqby0dl = (u32)0x33333333; ++ mmdc_p1->mprddqby1dl = (u32)0x33333333; ++ mmdc_p1->mprddqby2dl = (u32)0x33333333; ++ mmdc_p1->mprddqby3dl = (u32)0x33333333; ++ /* Complete calibration by forced measurment */ ++ mmdc_p0->mpmur0 = (u32)0x00000800; ++ mmdc_p1->mpmur0 = (u32)0x00000800; ++ /* MMDC init: ++ in DDR3, 64-bit mode, only MMDC0 is initiated: */ ++ mmdc_p0->mdpdc = (u32)0x0002002d; ++ mmdc_p0->mdotc = (u32)0x00333040; ++ ++ mmdc_p0->mdcfg0 = (u32)0x3F4352F3; ++ mmdc_p0->mdcfg1 = (u32)0xB66D8B63; ++ ++ mmdc_p0->mdcfg2 = (u32)0x01ff00db; ++ mmdc_p0->mdmisc = (u32)0x00011740; ++ mmdc_p0->mdscr = (u32)0x00008000; ++ mmdc_p0->mdrwd = (u32)0x000026d2; ++ mmdc_p0->mdor = (u32)0x00431023; ++ mmdc_p0->mdasp = (u32)0x00000027; ++ mmdc_p0->mdctl = (u32)0x831A0000; ++ ++ /* Initialize 2GB DDR3 - Micron MT41J128M */ ++ /* MR2 */ ++ mmdc_p0->mdscr = (u32)0x02008032; ++ mmdc_p0->mdscr = (u32)0x0200803a; ++ /* MR3 */ ++ mmdc_p0->mdscr = (u32)0x00008033; ++ mmdc_p0->mdscr = (u32)0x0000803b; ++ /* MR1 */ ++ mmdc_p0->mdscr = (u32)0x04008031; ++ mmdc_p0->mdscr = (u32)0x04008039; ++ /* MR0 */ ++ mmdc_p0->mdscr = (u32)0x05208030; ++ mmdc_p0->mdscr = (u32)0x05208038; ++ /* ZQ calibration */ ++ mmdc_p0->mdscr = (u32)0x04008040; ++ mmdc_p0->mdscr = (u32)0x04008040; ++ /* final DDR setup */ ++ mmdc_p0->mdref = (u32)0x00007800; ++ mmdc_p0->mpodtctrl = (u32)0x00000007; ++ mmdc_p1->mpodtctrl = (u32)0x00000007; ++ mmdc_p0->mdpdc = (u32)0x0002556d; ++ mmdc_p1->mapsr = (u32)0x00011006; ++ mmdc_p0->mdscr = (u32)0x00000000; ++} ++ ++/* microSOM with Dual processor 1GByte memory */ ++static void spl_dram_init_mx6dq_1g(void) ++{ ++ volatile struct mmdc_p_regs *mmdc_p0; ++ volatile struct mmdc_p_regs *mmdc_p1; ++ mmdc_p0 = (struct mmdc_p_regs *) MMDC_P0_BASE_ADDR; ++ mmdc_p1 = (struct mmdc_p_regs *) MMDC_P1_BASE_ADDR; ++ ++ /* Calibrations */ ++ /* ZQ */ ++ mmdc_p0->mpzqhwctrl = (u32)0xa1390003; ++ /* write leveling */ ++ mmdc_p0->mpwldectrl0 = (u32)0x00000000; ++ mmdc_p0->mpwldectrl1 = (u32)0x00000000; ++ mmdc_p1->mpwldectrl0 = (u32)0x00000000; ++ mmdc_p1->mpwldectrl1 = (u32)0x00000000; ++ /* DQS gating, read delay, write delay calibration values ++ based on calibration compare of 0x00ffff00 */ ++ mmdc_p0->mpdgctrl0 = (u32)0x0314031c; ++ mmdc_p0->mpdgctrl1 = (u32)0x023e0304; ++ mmdc_p1->mpdgctrl0 = (u32)0x03240330; ++ mmdc_p1->mpdgctrl1 = (u32)0x03180260; ++ ++ mmdc_p0->mprddlctl = (u32)0x3630323c; ++ mmdc_p1->mprddlctl = (u32)0x3436283a; ++ ++ mmdc_p0->mpwrdlctl = (u32)0x36344038; ++ mmdc_p1->mpwrdlctl = (u32)0x422a423c; ++ ++ mmdc_p0->mprddqby0dl = (u32)0x33333333; ++ mmdc_p0->mprddqby1dl = (u32)0x33333333; ++ mmdc_p0->mprddqby2dl = (u32)0x33333333; ++ mmdc_p0->mprddqby3dl = (u32)0x33333333; ++ mmdc_p1->mprddqby0dl = (u32)0x33333333; ++ mmdc_p1->mprddqby1dl = (u32)0x33333333; ++ mmdc_p1->mprddqby2dl = (u32)0x33333333; ++ mmdc_p1->mprddqby3dl = (u32)0x33333333; ++ ++ mmdc_p0->mpmur0 = (u32)0x00000800; ++ mmdc_p1->mpmur0 = (u32)0x00000800; ++ /* MMDC init: ++ in DDR3, 64-bit mode, only MMDC0 is initiated: */ ++ mmdc_p0->mdpdc = (u32)0x00025576; ++ mmdc_p0->mdotc = (u32)0x09444040; ++ mmdc_p0->mdcfg0 = (u32)0x54597955; ++ mmdc_p0->mdcfg1 = (u32)0xFF328F64; ++ mmdc_p0->mdcfg2 = (u32)0x01ff00db; ++ mmdc_p0->mdmisc = (u32)0x00011740; ++ ++ mmdc_p0->mdscr = (u32)0x00008000; ++ mmdc_p0->mdrwd = (u32)0x000026d2; ++ mmdc_p0->mdor = (u32)0x005B0E21; ++ ++ /* 1G */ ++ mmdc_p0->mdasp = (u32)0x00000027; ++ mmdc_p0->mdctl = (u32)0x831a0000; ++ ++ mmdc_p0->mdscr = (u32)0x02088032; ++ mmdc_p0->mdscr = (u32)0x00008033; ++ mmdc_p0->mdscr = (u32)0x00408031; ++ mmdc_p0->mdscr = (u32)0x09408030; ++ mmdc_p0->mdscr = (u32)0x04008040; ++ ++ mmdc_p0->mdref = (u32)0x00005800; ++ ++ mmdc_p0->mpodtctrl = (u32)0x00000007; ++ mmdc_p1->mpodtctrl = (u32)0x00000007; ++ ++ mmdc_p0->mdpdc = (u32)0x00025576; ++ mmdc_p0->mapsr = (u32)0x00011006; ++ mmdc_p0->mdscr = (u32)0x00000000; ++} ++ ++/* microSOM with Quad processor 2GByte memory */ ++static void spl_dram_init_mx6dq_2g(void) ++{ ++ volatile struct mmdc_p_regs *mmdc_p0; ++ volatile struct mmdc_p_regs *mmdc_p1; ++ mmdc_p0 = (struct mmdc_p_regs *) MMDC_P0_BASE_ADDR; ++ mmdc_p1 = (struct mmdc_p_regs *) MMDC_P1_BASE_ADDR; ++ ++ /* Calibrations */ ++ /* ZQ */ ++ mmdc_p0->mpzqhwctrl = (u32)0xa1390003; ++ /* write leveling */ ++ mmdc_p0->mpwldectrl0 = (u32)0x00000000; ++ mmdc_p0->mpwldectrl1 = (u32)0x00000000; ++ mmdc_p1->mpwldectrl0 = (u32)0x00000000; ++ mmdc_p1->mpwldectrl1 = (u32)0x00000000; ++ /* DQS gating, read delay, write delay calibration values ++ based on calibration compare of 0x00ffff00 */ ++ mmdc_p0->mpdgctrl0 = (u32)0x0314031c; ++ mmdc_p0->mpdgctrl1 = (u32)0x023e0304; ++ mmdc_p1->mpdgctrl0 = (u32)0x03240330; ++ mmdc_p1->mpdgctrl1 = (u32)0x03180260; ++ ++ mmdc_p0->mprddlctl = (u32)0x3630323c; ++ mmdc_p1->mprddlctl = (u32)0x3436283a; ++ ++ mmdc_p0->mpwrdlctl = (u32)0x36344038; ++ mmdc_p1->mpwrdlctl = (u32)0x422a423c; ++ ++ mmdc_p0->mprddqby0dl = (u32)0x33333333; ++ mmdc_p0->mprddqby1dl = (u32)0x33333333; ++ mmdc_p0->mprddqby2dl = (u32)0x33333333; ++ mmdc_p0->mprddqby3dl = (u32)0x33333333; ++ mmdc_p1->mprddqby0dl = (u32)0x33333333; ++ mmdc_p1->mprddqby1dl = (u32)0x33333333; ++ mmdc_p1->mprddqby2dl = (u32)0x33333333; ++ mmdc_p1->mprddqby3dl = (u32)0x33333333; ++ ++ mmdc_p0->mpmur0 = (u32)0x00000800; ++ mmdc_p1->mpmur0 = (u32)0x00000800; ++ /* MMDC init: ++ in DDR3, 64-bit mode, only MMDC0 is initiated: */ ++ mmdc_p0->mdpdc = (u32)0x00025576; ++ mmdc_p0->mdotc = (u32)0x09444040; ++ mmdc_p0->mdcfg0 = (u32)0x898E7975; ++ mmdc_p0->mdcfg1 = (u32)0xFF328F64; ++ mmdc_p0->mdcfg2 = (u32)0x01ff00db; ++ mmdc_p0->mdmisc = (u32)0x00011740; ++ ++ mmdc_p0->mdscr = (u32)0x00008000; ++ mmdc_p0->mdrwd = (u32)0x000026d2; ++ mmdc_p0->mdor = (u32)0x005B0E21; ++ ++ /* 2G */ ++ mmdc_p0->mdasp = (u32)0x00000047; ++ mmdc_p0->mdctl = (u32)0x841a0000; ++ ++ mmdc_p0->mdscr = (u32)0x02088032; ++ mmdc_p0->mdscr = (u32)0x00008033; ++ mmdc_p0->mdscr = (u32)0x00408031; ++ mmdc_p0->mdscr = (u32)0x09408030; ++ mmdc_p0->mdscr = (u32)0x04008040; ++ ++ mmdc_p0->mdref = (u32)0x00005800; ++ ++ mmdc_p0->mpodtctrl = (u32)0x00000007; ++ mmdc_p1->mpodtctrl = (u32)0x00000007; ++ ++ mmdc_p0->mdpdc = (u32)0x00025576; ++ mmdc_p0->mapsr = (u32)0x00011006; ++ mmdc_p0->mdscr = (u32)0x00000000; ++} ++ ++static void spl_dram_init(void) ++{ ++ u32 cpurev, imxtype; ++ ++ cpurev = get_cpu_rev(); ++ imxtype = (cpurev & 0xFF000) >> 12; ++ ++ get_imx_type(imxtype); ++ ++ switch (imxtype){ ++ case MXC_CPU_MX6SOLO: ++ spl_mx6dl_dram_setup_iomux(); ++ spl_dram_init_mx6solo_512mb(); ++ break; ++ case MXC_CPU_MX6Q: ++ { ++ /* Read first the snoop control unit config register */ ++ u32 scu_config = *(u32 *)(SCU_BASE_ADDR + 0x4); ++ spl_mx6q_dram_setup_iomux(); ++ if ((scu_config & 0x3) == 0x3) /* Quad core */ ++ spl_dram_init_mx6dq_2g(); ++ else /* Dual core */ ++ spl_dram_init_mx6dq_1g(); ++ break; ++ } ++ case MXC_CPU_MX6DL: ++ default: ++ spl_mx6dl_dram_setup_iomux(); ++ spl_dram_init_mx6dl_1g(); ++ break; ++ } ++} ++ ++void board_init_f(ulong dummy) ++{ ++ /* Set the stack pointer. */ ++ asm volatile("mov sp, %0\n" : : "r"(CONFIG_SPL_STACK)); ++ ++ spl_dram_init(); ++ ++ arch_cpu_init(); ++ ++ /* Clear the BSS. */ ++ memset(__bss_start, 0, __bss_end - __bss_start); ++ ++ /* Set global data pointer. */ ++ gd = &gdata; ++ ++ board_early_init_f(); ++ ++ timer_init(); ++ preloader_console_init(); ++ ++ board_init_r(NULL, 0); ++} ++ ++void spl_board_init(void) ++{ ++ get_clocks(); ++ setup_boot_device(); ++} ++ ++u32 spl_boot_device(void) ++{ ++ puts("Boot Device: "); ++ switch (get_boot_device()) { ++ case MX6_SD0_BOOT: ++ printf("SD0\n"); ++ return BOOT_DEVICE_MMC1; ++ case MX6_SD1_BOOT: ++ printf("SD1\n"); ++ return BOOT_DEVICE_MMC2; ++ case MX6_MMC_BOOT: ++ printf("MMC\n"); ++ return BOOT_DEVICE_MMC2; ++ case MX6_NAND_BOOT: ++ printf("NAND\n"); ++ return BOOT_DEVICE_NAND; ++ case MX6_SATA_BOOT: ++ printf("SATA\n"); ++ return BOOT_DEVICE_SATA; ++ case MX6_UNKNOWN_BOOT: ++ default: ++ printf("UNKNOWN\n"); ++ return BOOT_DEVICE_NONE; ++ } ++} ++ ++u32 spl_boot_mode(void) ++{ ++ switch (spl_boot_device()) { ++ case BOOT_DEVICE_MMC1: ++ case BOOT_DEVICE_MMC2: ++ case BOOT_DEVICE_MMC2_2: ++ return MMCSD_MODE_ANY; ++ break; ++ case BOOT_DEVICE_SATA: ++ return MMCSD_MODE_UNDEFINED; ++ break; ++ //case BOOT_DEVICE_NAND: ++ // return 0; ++ // break; ++ default: ++ puts("spl: ERROR: unsupported device\n"); ++ hang(); ++ } ++} ++ ++void reset_cpu(ulong addr) ++{ ++ __REG16(WDOG1_BASE_ADDR) = 4; ++} ++#endif ++ +diff --git a/boards.cfg b/boards.cfg +index b4203f1..f4baf83 100644 +--- a/boards.cfg ++++ b/boards.cfg +@@ -328,6 +328,15 @@ Active arm armv7 mx6 gateworks gw_ventana + Active arm armv7 mx6 gateworks gw_ventana gwventanaq1g gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6Q,DDR_MB=1024 Tim Harvey + Active arm armv7 mx6 gateworks gw_ventana gwventanaq1gspi gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6Q,DDR_MB=1024,SPI_FLASH Tim Harvey + Active arm armv7 mx6 solidrun hummingboard hummingboard_solo hummingboard:IMX_CONFIG=board/solidrun/hummingboard/solo.cfg,MX6S,DDR_MB=512 Jon Nettleton ++Active arm armv7 mx6 solidrun mx6_c1 mx6_c1solo mx6_c1:IMX_CONFIG=board/solidrun/mx6_c1/mx6_c1solo.cfg,MX6S,DDR_MB=512 ++Active arm armv7 mx6 solidrun mx6_c1 mx6_c1dl mx6_c1:IMX_CONFIG=board/solidrun/mx6_c1/mx6_c1dl.cfg,MX6DL,DDR_MB=1024 ++Active arm armv7 mx6 solidrun mx6_c1 mx6_c1d mx6_c1:IMX_CONFIG=board/solidrun/mx6_c1/mx6_c1d.cfg,MX6Q,DDR_MB=1024 ++Active arm armv7 mx6 solidrun mx6_c1 mx6_c1q mx6_c1:IMX_CONFIG=board/solidrun/mx6_c1/mx6_c1q.cfg,MX6Q,DDR_MB=2048 ++Active arm armv7 mx6 solidrun mx6_cubox-i mx6_cubox-i mx6_cubox-i:IMX_CONFIG=board/solidrun/mx6_cubox-i/imx6image.cfg,MX6QDL,SPL,FSL_ENV_IN_MMC ++Active arm armv7 mx6 solidrun mx6_cubox-i mx6_cubox-i1 mx6_cubox-i:IMX_CONFIG=board/solidrun/mx6_c1/mx6_c1solo.cfg,MX6S,DDR_MB=512 ++Active arm armv7 mx6 solidrun mx6_cubox-i mx6_cubox-i2 mx6_cubox-i:IMX_CONFIG=board/solidrun/mx6_c1/mx6_c1dl.cfg,MX6DL,DDR_MB=1024 ++Active arm armv7 mx6 solidrun mx6_cubox-i mx6_cubox-i2ultra mx6_cubox-i:IMX_CONFIG=board/solidrun/mx6_c1/mx6_c1d.cfg,MX6Q,DDR_MB=1024 ++Active arm armv7 mx6 solidrun mx6_cubox-i mx6_cubox-i4pro mx6_cubox-i:IMX_CONFIG=board/solidrun/mx6_c1/mx6_c1q.cfg,MX6Q,DDR_MB=2048 + Active arm armv7 omap3 - overo omap3_overo - Steve Sakoman + Active arm armv7 omap3 - pandora omap3_pandora - Grazvydas Ignotas + Active arm armv7 omap3 8dtech eco5pk eco5pk - Raphael Assenat +diff --git a/common/Makefile b/common/Makefile +index cecd81a..71ba72c 100644 +--- a/common/Makefile ++++ b/common/Makefile +@@ -42,6 +42,8 @@ obj-$(CONFIG_ENV_IS_IN_FAT) += env_fat.o + obj-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o + obj-$(CONFIG_ENV_IS_IN_NVRAM) += env_nvram.o + obj-$(CONFIG_ENV_IS_IN_ONENAND) += env_onenand.o ++obj-$(CONFIG_ENV_IS_IN_SATA) += env_sata.o ++obj-$(CONFIG_ENV_IS_IN_BOOT_DEVICE) += env_bootdevice.o + obj-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o + obj-$(CONFIG_ENV_IS_IN_REMOTE) += env_remote.o + obj-$(CONFIG_ENV_IS_IN_UBI) += env_ubi.o +diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c +index c53601c..a0003e7 100644 +--- a/common/cmd_nvedit.c ++++ b/common/cmd_nvedit.c +@@ -47,6 +47,8 @@ DECLARE_GLOBAL_DATA_PTR; + !defined(CONFIG_ENV_IS_IN_SPI_FLASH) && \ + !defined(CONFIG_ENV_IS_IN_REMOTE) && \ + !defined(CONFIG_ENV_IS_IN_UBI) && \ ++ !defined(CONFIG_ENV_IS_IN_SATA) && \ ++ !defined(CONFIG_ENV_IS_IN_BOOT_DEVICE) && \ + !defined(CONFIG_ENV_IS_NOWHERE) + # error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|DATAFLASH|ONENAND|\ + SPI_FLASH|NVRAM|MMC|FAT|REMOTE|UBI} or CONFIG_ENV_IS_NOWHERE +diff --git a/common/cmd_sata.c b/common/cmd_sata.c +index fc92131..b729b88 100644 +--- a/common/cmd_sata.c ++++ b/common/cmd_sata.c +@@ -15,7 +15,7 @@ + #include + #include + +-static int sata_curr_device = -1; ++int sata_curr_device = -1; + block_dev_desc_t sata_dev_desc[CONFIG_SYS_SATA_MAX_DEVICE]; + + int __sata_initialize(void) +diff --git a/common/env_sata.c b/common/env_sata.c +new file mode 100644 +index 0000000..31c479d +--- /dev/null ++++ b/common/env_sata.c +@@ -0,0 +1,170 @@ ++/* ++ * (C) Copyright 2010-2011 Freescale Semiconductor, Inc. ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++/* #define DEBUG */ ++ ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#if defined(CONFIG_ENV_SIZE_REDUND) && \ ++ (CONFIG_ENV_SIZE_REDUND != CONFIG_ENV_SIZE) ++#error CONFIG_ENV_SIZE_REDUND should be the same as CONFIG_ENV_SIZE ++#endif ++ ++char *env_name_spec = "SATA"; ++ ++#ifdef ENV_IS_EMBEDDED ++env_t *env_ptr = &environment; ++#else /* ! ENV_IS_EMBEDDED */ ++env_t *env_ptr; ++#endif /* ENV_IS_EMBEDDED */ ++ ++extern int sata_curr_device; ++ ++#if !defined(CONFIG_ENV_OFFSET) ++#define CONFIG_ENV_OFFSET 0 ++#endif ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++int env_init(void) ++{ ++ /* use default */ ++ gd->env_addr = (ulong)&default_environment[0]; ++ gd->env_valid = 1; ++ ++ return 0; ++} ++ ++ ++inline int write_env(block_dev_desc_t *sata, unsigned long size, ++ unsigned long offset, const void *buffer) ++{ ++ uint blk_start, blk_cnt, n; ++ ++ blk_start = ALIGN(offset, sata->blksz) / sata->blksz; ++ blk_cnt = ALIGN(size, sata->blksz) / sata->blksz; ++ ++ n = sata->block_write(sata_curr_device, blk_start, ++ blk_cnt, (u_char *)buffer); ++ ++ return (n == blk_cnt) ? 0 : -1; ++} ++ ++int saveenv(void) ++{ ++ ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1); ++ ssize_t len; ++ char *res; ++ struct block_dev_desc_t *sata = NULL; ++ ++ if (sata_curr_device == -1) { ++ if (sata_initialize()) ++ return 1; ++ sata_curr_device = CONFIG_SATA_ENV_DEV; ++ } ++ ++ if (sata_curr_device >= CONFIG_SYS_SATA_MAX_DEVICE) { ++ printf("Unknown SATA(%d) device for environment!\n", ++ sata_curr_device); ++ return 1; ++ } ++ res = (char *)&env_new->data; ++ len = hexport_r(&env_htab, '\0', 0, &res, ENV_SIZE, 0, NULL); ++ if (len < 0) { ++ error("Cannot export environment: errno = %d\n", errno); ++ return 1; ++ } ++ ++ env_new->crc = crc32(0, &env_new->data[0], ENV_SIZE); ++ ++ sata = sata_get_dev(sata_curr_device); ++ ++ printf("Writing to SATA(%d)... ", sata_curr_device); ++ if (write_env(sata, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, (u_char *)env_new)) { ++ puts("failed\n"); ++ return 1; ++ } ++ ++ puts("done\n"); ++ ++ return 0; ++} ++ ++ ++inline int read_env(block_dev_desc_t *sata, unsigned long size, ++ unsigned long offset, const void *buffer) ++{ ++ uint blk_start, blk_cnt, n; ++ ++ blk_start = ALIGN(offset, sata->blksz) / sata->blksz; ++ blk_cnt = ALIGN(size, sata->blksz) / sata->blksz; ++ ++ n = sata->block_read(sata_curr_device, blk_start, ++ blk_cnt, (uchar *)buffer); ++ ++ return (n == blk_cnt) ? 0 : -1; ++} ++ ++void env_relocate_spec(void) ++{ ++#if !defined(ENV_IS_EMBEDDED) ++ ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE); ++ struct block_dev_desc_t *sata = NULL; ++ int ret = 0; ++ ++ if (sata_curr_device == -1) { ++ if (sata_initialize()) ++ return 1; ++ sata_curr_device = CONFIG_SATA_ENV_DEV; ++ } ++ ++ if (sata_curr_device >= CONFIG_SYS_SATA_MAX_DEVICE) { ++ printf("Unknown SATA(%d) device for environment!\n", ++ sata_curr_device); ++ return 1; ++ } ++ sata = sata_get_dev(sata_curr_device); ++ ++ if (read_env(sata, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, buf)){ ++ printf( "\r\n--->Read environment failed \r\n"); ++ ret = 1; ++ goto err; ++ } ++ ++ gd->env_valid = 1; ++ env_import(buf, 1); ++ ret = 0; ++err: ++ if (ret) ++ set_default_env(NULL); ++#endif ++} ++ ++ ++ +diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c +index fa6f891..847d840 100644 +--- a/common/spl/spl_mmc.c ++++ b/common/spl/spl_mmc.c +@@ -93,26 +93,26 @@ void spl_mmc_load_image(void) + } + + boot_mode = spl_boot_mode(); +- if (boot_mode == MMCSD_MODE_RAW) { +- debug("boot mode - RAW\n"); +-#ifdef CONFIG_SPL_OS_BOOT +- if (spl_start_uboot() || mmc_load_image_raw_os(mmc)) ++ switch (boot_mode) { ++ case MMCSD_MODE_RAW: ++ case MMCSD_MODE_ANY: ++#ifdef CONFIG_SUPPORT_EMMC_BOOT ++ case MMCSD_MODE_EMMCBOOT: + #endif +- err = mmc_load_image_raw(mmc, +- CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR); + #ifdef CONFIG_SPL_FAT_SUPPORT +- } else if (boot_mode == MMCSD_MODE_FAT) { +- debug("boot mode - FAT\n"); +-#ifdef CONFIG_SPL_OS_BOOT +- if (spl_start_uboot() || spl_load_image_fat_os(&mmc->block_dev, +- CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION)) ++ case MMCSD_MODE_FAT: + #endif +- err = spl_load_image_fat(&mmc->block_dev, +- CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION, +- CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME); ++ break; ++ default: ++#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT ++ puts("spl: wrong MMC boot mode\n"); + #endif ++ hang(); ++ break; ++ } ++ + #ifdef CONFIG_SUPPORT_EMMC_BOOT +- } else if (boot_mode == MMCSD_MODE_EMMCBOOT) { ++ if (boot_mode == MMCSD_MODE_EMMCBOOT) { + /* + * We need to check what the partition is configured to. + * 1 and 2 match up to boot0 / boot1 and 7 is user data +@@ -129,18 +129,31 @@ void spl_mmc_load_image(void) + #endif + hang(); + } ++ } ++#endif ++ if (boot_mode == MMCSD_MODE_RAW || boot_mode == MMCSD_MODE_ANY ++ || boot_mode == MMCSD_MODE_EMMCBOOT) ++ { ++ debug("boot mode - RAW\n"); + #ifdef CONFIG_SPL_OS_BOOT + if (spl_start_uboot() || mmc_load_image_raw_os(mmc)) + #endif + err = mmc_load_image_raw(mmc, + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR); ++ } ++#ifdef CONFIG_SPL_FAT_SUPPORT ++ if (boot_mode == MMCSD_MODE_FAT || (boot_mode == MMCSD_MODE_ANY && err)) ++ { ++ debug("boot mode - FAT\n"); ++#ifdef CONFIG_SPL_OS_BOOT ++ if (spl_start_uboot() || spl_load_image_fat_os(&mmc->block_dev, ++ CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION)) + #endif +- } else { +-#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT +- puts("spl: wrong MMC boot mode\n"); +-#endif +- hang(); ++ err = spl_load_image_fat(&mmc->block_dev, ++ CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION, ++ CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME); + } ++#endif + + if (err) + hang(); +diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile +index 02b149c..de5b461 100644 +--- a/drivers/mtd/nand/Makefile ++++ b/drivers/mtd/nand/Makefile +@@ -65,5 +65,6 @@ else # minimal SPL drivers + obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o + obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o + obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o ++obj-$(CONFIG_NAND_MXS) += mxs_nand_spl.o mxs_nand.o + + endif # drivers +diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c +index 036c113..36cfc18 100644 +--- a/drivers/mtd/nand/mxs_nand.c ++++ b/drivers/mtd/nand/mxs_nand.c +@@ -1014,9 +1014,12 @@ static int mxs_nand_scan_bbt(struct mtd_info *mtd) + nand_info->hooked_block_markbad = mtd->_block_markbad; + mtd->_block_markbad = mxs_nand_hook_block_markbad; + } +- ++ #ifdef CONFIG_SPL_BUILD ++ return 0; ++ #else + /* We use the reference implementation for bad block management. */ + return nand_default_bbt(mtd); ++ #endif + } + + /* +diff --git a/drivers/mtd/nand/mxs_nand_spl.c b/drivers/mtd/nand/mxs_nand_spl.c +new file mode 100644 +index 0000000..77e3795 +--- /dev/null ++++ b/drivers/mtd/nand/mxs_nand_spl.c +@@ -0,0 +1,235 @@ ++/* ++ * (C) Copyright 2013 ++ * Richard Hu, Technexion Ltd, richard.hu@technexion.com ++ ++ * (C) Copyright 2006-2008 ++ * Stefan Roese, DENX Software Engineering, sr@denx.de. ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++ ++static nand_info_t mtd; ++static struct nand_chip nand_chip; ++ ++#define CONFIG_SYS_NAND_RESET_CNT 200000 ++ ++ ++static int nand_command_lp(int block, int page, uint32_t column, u8 command) ++{ ++ struct nand_chip *chip = mtd.priv; ++ int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT; ++ uint32_t rst_sts_cnt = CONFIG_SYS_NAND_RESET_CNT; ++ ++ /* Emulate NAND_CMD_READOOB */ ++ if (command == NAND_CMD_READOOB) { ++ column += mtd.writesize; ++ command = NAND_CMD_READ0; ++ } ++ ++ /* Command latch cycle */ ++ chip->cmd_ctrl(&mtd, command & 0xff, ++ NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); ++ ++ if (column != -1 || page_addr != -1) { ++ int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE; ++ ++ /* Serially input address */ ++ if (column != -1) { ++ /* Adjust columns for 16 bit buswidth */ ++ if (chip->options & NAND_BUSWIDTH_16) ++ column >>= 1; ++ chip->cmd_ctrl(&mtd, column, ctrl); ++ ctrl &= ~NAND_CTRL_CHANGE; ++ chip->cmd_ctrl(&mtd, column >> 8, ctrl); ++ } ++ if (page_addr != -1) { ++ chip->cmd_ctrl(&mtd, page_addr, ctrl); ++ chip->cmd_ctrl(&mtd, page_addr >> 8, ++ NAND_NCE | NAND_ALE); ++ #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE ++ chip->cmd_ctrl(&mtd, page_addr >> 16, ++ NAND_NCE | NAND_ALE); ++ #endif ++ } ++ } ++ chip->cmd_ctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); ++ ++ /* ++ * Program and erase have their own busy handlers status, sequential ++ * in, and deplete1 need no delay. ++ */ ++ switch (command) { ++ ++ case NAND_CMD_CACHEDPROG: ++ case NAND_CMD_PAGEPROG: ++ case NAND_CMD_ERASE1: ++ case NAND_CMD_ERASE2: ++ case NAND_CMD_SEQIN: ++ case NAND_CMD_RNDIN: ++ case NAND_CMD_STATUS: ++ case NAND_CMD_DEPLETE1: ++ return; ++ ++ case NAND_CMD_STATUS_ERROR: ++ case NAND_CMD_STATUS_ERROR0: ++ case NAND_CMD_STATUS_ERROR1: ++ case NAND_CMD_STATUS_ERROR2: ++ case NAND_CMD_STATUS_ERROR3: ++ /* Read error status commands require only a short delay */ ++ udelay(chip->chip_delay); ++ return; ++ ++ case NAND_CMD_RESET: ++ if (chip->dev_ready) ++ break; ++ udelay(chip->chip_delay); ++ chip->cmd_ctrl(&mtd, NAND_CMD_STATUS, ++ NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); ++ chip->cmd_ctrl(&mtd, NAND_CMD_NONE, ++ NAND_NCE | NAND_CTRL_CHANGE); ++ while (!(chip->read_byte(&mtd) & NAND_STATUS_READY) && ++ (rst_sts_cnt--)); ++ return; ++ ++ case NAND_CMD_RNDOUT: ++ /* No ready / busy check necessary */ ++ chip->cmd_ctrl(&mtd, NAND_CMD_RNDOUTSTART, ++ NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); ++ chip->cmd_ctrl(&mtd, NAND_CMD_NONE, ++ NAND_NCE | NAND_CTRL_CHANGE); ++ return; ++ ++ case NAND_CMD_READ0: ++ chip->cmd_ctrl(&mtd, NAND_CMD_READSTART, ++ NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); ++ chip->cmd_ctrl(&mtd, NAND_CMD_NONE, ++ NAND_NCE | NAND_CTRL_CHANGE); ++ ++ /* This applies to read commands */ ++ default: ++ /* ++ * If we don't have access to the busy pin, we apply the given ++ * command delay. ++ */ ++ if (!chip->dev_ready) { ++ udelay(chip->chip_delay); ++ return; ++ } ++ } ++ ++ /* ++ * Apply this short delay always to ensure that we do wait tWB in ++ * any case on any machine. ++ */ ++ ndelay(100); ++ ++ while (!chip->dev_ready(&mtd)) ++ ; ++} ++ ++ ++static int nand_is_bad_block(int block) ++{ ++ struct nand_chip *this = mtd.priv; ++ struct mxs_nand_info *nand_info = nand_chip.priv; ++ char bad_mark; ++ ++ nand_command_lp(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB); ++ bad_mark = this->read_byte(&mtd); ++ if (bad_mark != 0xff) { ++ printf("nand_is_bad_block: %lx is bad block:%x !!! \r\n", block, bad_mark); ++ return 1; ++ } ++ ++ return 0; ++} ++ ++static int nand_read_page(int block, int page, void *dst) ++{ ++ struct nand_chip *this = mtd.priv; ++ ++ void (*hwctrl)(struct mtd_info *mtd, int cmd, ++ unsigned int ctrl) = this->cmd_ctrl; ++ ++ nand_command_lp(block, page, 0, NAND_CMD_READ0); ++ this->ecc.read_page(&mtd, &nand_chip, dst, 0, page); ++} ++ ++ ++int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst) ++{ ++ unsigned int block, lastblock; ++ unsigned int page; ++ ++ /* ++ * offs has to be aligned to a page address! ++ */ ++ block = offs / CONFIG_SYS_NAND_BLOCK_SIZE; ++ lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE; ++ page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE; ++ ++ nand_read_page(block, page, dst); ++ ++ ++ while (block <= lastblock) { ++ if (!nand_is_bad_block(block)) { ++ // ++ // Skip bad blocks ++ // ++ while (page < CONFIG_SYS_NAND_PAGE_COUNT) { ++ nand_read_page(block, page, dst); ++ dst += CONFIG_SYS_NAND_PAGE_SIZE; ++ page++; ++ } ++ ++ page = 0; ++ ++ } else { ++ lastblock++; ++ } ++ ++ ++ block++; ++ } ++ ++ ++ return 0; ++} ++ ++/* nand_init() - initialize data to make nand usable by SPL */ ++void nand_init(void) ++{ ++ /* ++ * Init board specific nand support ++ */ ++ mtd.priv = &nand_chip; ++ ++ board_nand_init(&nand_chip); ++ mtd.priv = &nand_chip; ++ ++ if (nand_chip.select_chip) ++ nand_chip.select_chip(&mtd, 0); ++ ++ mtd.writesize = CONFIG_SYS_NAND_PAGE_SIZE; ++ mtd.oobsize = CONFIG_SYS_NAND_OOBSIZE; ++ ++ //Actually, not scan and create bbt, just for setting flash memory geometry to BCH ++ nand_chip.scan_bbt(&mtd); ++ ++ nand_chip.buffers = memalign(ARCH_DMA_MINALIGN, sizeof(*nand_chip.buffers)); ++ nand_chip.oob_poi = nand_chip.buffers->databuf + mtd.writesize; ++ ++} ++ ++/* Unselect after operation */ ++void nand_deselect(void) ++{ ++ if (nand_chip.select_chip) ++ nand_chip.select_chip(&mtd, -1); ++} ++ +diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c +index 4cefda4..8178d4a 100644 +--- a/drivers/net/fec_mxc.c ++++ b/drivers/net/fec_mxc.c +@@ -117,8 +117,10 @@ static int fec_mdio_read(struct ethernet_regs *eth, uint8_t phyAddr, + * it's now safe to read the PHY's register + */ + val = (unsigned short)readl(ð->mii_data); ++#ifdef VERBOSE_DEBUG + debug("%s: phy: %02x reg:%02x val:%#x\n", __func__, phyAddr, + regAddr, val); ++#endif + return val; + } + +@@ -165,8 +167,10 @@ static int fec_mdio_write(struct ethernet_regs *eth, uint8_t phyAddr, + * clear MII interrupt bit + */ + writel(FEC_IEVENT_MII, ð->ievent); ++#ifdef VERBOSE_DEBUG + debug("%s: phy: %02x reg:%02x val:%#x\n", __func__, phyAddr, + regAddr, data); ++#endif + + return 0; + } +@@ -718,9 +722,11 @@ static int fec_send(struct eth_device *dev, void *packet, int length) + if (readw(&fec->tbd_base[fec->tbd_index].status) & FEC_TBD_READY) + ret = -EINVAL; + ++#ifdef VERBOSE_DEBUG + debug("fec_send: status 0x%x index %d ret %i\n", + readw(&fec->tbd_base[fec->tbd_index].status), + fec->tbd_index, ret); ++#endif + /* for next transmission use the other buffer */ + if (fec->tbd_index) + fec->tbd_index = 0; +@@ -752,7 +758,9 @@ static int fec_recv(struct eth_device *dev) + */ + ievent = readl(&fec->eth->ievent); + writel(ievent, &fec->eth->ievent); ++#ifdef VERBOSE_DEBUG + debug("fec_recv: ievent 0x%lx\n", ievent); ++#endif + if (ievent & FEC_IEVENT_BABR) { + fec_halt(dev); + fec_init(dev, fec->bd); +@@ -793,7 +801,9 @@ static int fec_recv(struct eth_device *dev) + invalidate_dcache_range(addr, addr + size); + + bd_status = readw(&rbd->status); ++#ifdef VERBOSE_DEBUG + debug("fec_recv: status 0x%x\n", bd_status); ++#endif + + if (!(bd_status & FEC_RBD_EMPTY)) { + if ((bd_status & FEC_RBD_LAST) && !(bd_status & FEC_RBD_ERR) && +@@ -848,7 +858,9 @@ static int fec_recv(struct eth_device *dev) + fec_rx_task_enable(fec); + fec->rbd_index = (fec->rbd_index + 1) % FEC_RBD_NUM; + } ++#ifdef VERBOSE_DEBUG + debug("fec_recv: stop\n"); ++#endif + + return len; + } +diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h +new file mode 100644 +index 0000000..7ad4c90 +--- /dev/null ++++ b/include/configs/imx6_spl.h +@@ -0,0 +1,50 @@ ++/* ++ * Author: Tungyi Lin ++ * ++ * Derived from EDM_CF_IMX6 code by TechNexion,Inc ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++#ifndef __IMX6_SPL_CONFIG_H ++#define __IMX6_SPL_CONFIG_H ++#ifdef CONFIG_SPL ++ ++#define CONFIG_SPL_FRAMEWORK ++ ++#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/mx6/u-boot-spl.lds" ++#define CONFIG_SPL_TEXT_BASE 0x00908000 ++#define CONFIG_SPL_MAX_SIZE 43008 /* (42 * 1024) */ ++#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7" ++#define CONFIG_SPL_STACK 0x0091FFB8 ++ ++#define CONFIG_SPL_LIBCOMMON_SUPPORT ++#define CONFIG_SPL_LIBGENERIC_SUPPORT ++#define CONFIG_SPL_SERIAL_SUPPORT ++ ++#define CONFIG_SPL_GPIO_SUPPORT ++ ++#define CONFIG_SPL_FAT_SUPPORT ++ ++#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) ++#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 ++#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" ++#define CONFIG_SPL_LIBDISK_SUPPORT ++#endif ++ ++/* #define CONFIG_SPL_SATA_SUPPORT */ ++ ++#define CONFIG_SPL_MMC_SUPPORT ++#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 84 /* offset 69KB */ ++#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ ++#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS/2*1024) ++ ++#define CONFIG_SPL_BOARD_INIT ++ ++#define CONFIG_SPL_BSS_START_ADDR 0x18200000 ++#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ ++#define CONFIG_SYS_SPL_MALLOC_START 0x18300000 ++#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3200000 /* 50 MB */ ++#define CONFIG_SYS_TEXT_BASE 0x17800000 ++#endif ++ ++#endif +diff --git a/include/configs/mx6_c1.h b/include/configs/mx6_c1.h +new file mode 100644 +index 0000000..3a3635f +--- /dev/null ++++ b/include/configs/mx6_c1.h +@@ -0,0 +1,349 @@ ++/* ++ * Copyright (C) 2013 Freescale Semiconductor, Inc. ++ * Copyright (C) 2013 SolidRun ltd. ++ * Copyright (C) 2013 Jon Nettleton ++ * ++ * Configuration settings for the SolidRun carrier-1 (c1) board. ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#ifndef __CONFIG_H ++#define __CONFIG_H ++ ++#include "mx6_common.h" ++#include ++#include ++#include ++ ++#undef DEBUG ++ ++#define CONFIG_MX6 ++#define CONFIG_DISPLAY_CPUINFO ++#define CONFIG_DISPLAY_BOARDINFO ++ ++#define CONFIG_MACH_TYPE 4773 ++ ++#define CONFIG_CMDLINE_TAG ++#define CONFIG_SETUP_MEMORY_TAGS ++#define CONFIG_INITRD_TAG ++#define CONFIG_REVISION_TAG ++ ++/* Size of malloc() pool */ ++#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) ++ ++#define CONFIG_BOARD_EARLY_INIT_F ++#define CONFIG_BOARD_LATE_INIT ++#define CONFIG_MXC_GPIO ++ ++#define CONFIG_CMD_FUSE ++#ifdef CONFIG_CMD_FUSE ++#define CONFIG_MXC_OCOTP ++#endif ++ ++#define CONFIG_MXC_UART ++#define CONFIG_MXC_UART_BASE UART1_BASE ++ ++/* allow to overwrite serial and ethaddr */ ++#define CONFIG_ENV_OVERWRITE ++#define CONFIG_CONS_INDEX 1 ++#define CONFIG_BAUDRATE 115200 ++ ++/* Command definition */ ++#include ++ ++#undef CONFIG_CMD_IMLS ++#undef CONFIG_CMD_I2C ++ ++#define CONFIG_CMD_BMODE ++#define CONFIG_CMD_SETEXPR ++#define CONFIG_CMD_MEMTEST ++#define CONFIG_BOOTDELAY 3 ++ ++#define CONFIG_SYS_MEMTEST_START 0x10000000 ++#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) ++ ++#define CONFIG_LOADADDR 0x10800000 ++#define CONFIG_SYS_TEXT_BASE 0x27800000 ++ ++/* MMC Configuration */ ++#define CONFIG_FSL_ESDHC ++#define CONFIG_FSL_USDHC ++#define CONFIG_SYS_FSL_USDHC_NUM 1 ++#define CONFIG_SYS_FSL_ESDHC_ADDR 0 ++ ++#define CONFIG_MMC ++#define CONFIG_CMD_MMC ++#define CONFIG_GENERIC_MMC ++#define CONFIG_BOUNCE_BUFFER ++#define CONFIG_CMD_EXT2 ++#define CONFIG_CMD_FAT ++#define CONFIG_DOS_PARTITION ++ ++/* Ethernet Configuration */ ++#define CONFIG_FEC_MXC ++#ifdef CONFIG_FEC_MXC ++#define CONFIG_CMD_PING ++#define CONFIG_CMD_DHCP ++#define CONFIG_CMD_MII ++#define CONFIG_CMD_NET ++#define CONFIG_FEC_MXC ++#define CONFIG_MII ++#define IMX_FEC_BASE ENET_BASE_ADDR ++#define CONFIG_FEC_XCV_TYPE RGMII ++#define CONFIG_ETHPRIME "FEC" ++#define CONFIG_FEC_MXC_PHYADDR 0 ++#define CONFIG_PHYLIB ++#define CONFIG_PHY_ATHEROS ++#endif ++ ++/* Framebuffer */ ++#define CONFIG_VIDEO ++#ifdef CONFIG_VIDEO ++#define CONFIG_VIDEO_IPUV3 ++#define CONFIG_IPUV3_CLK 260000000 ++#define CONFIG_CFB_CONSOLE ++#define CONFIG_CFB_CONSOLE_ANSI ++#define CONFIG_VGA_AS_SINGLE_DEVICE ++#define CONFIG_VIDEO_BMP_RLE8 ++#define CONFIG_IMX_HDMI ++ ++#undef CONFIG_SPLASH_SCREEN ++#undef CONFIG_SPLASH_SCREEN_ALIGN ++#define CONFIG_BMP_16BPP ++#undef CONFIG_CMD_BMP ++#define CONFIG_VIDEO_LOGO ++#define CONFIG_VIDEO_BMP_LOGO ++#define CONFIG_CONSOLE_MUX ++#endif ++ ++/* USB Configs */ ++#define CONFIG_CMD_USB ++#ifdef CONFIG_CMD_USB ++#define CONFIG_CMD_FAT ++#define CONFIG_USB_EHCI ++#define CONFIG_USB_EHCI_MX6 ++#define CONFIG_EHCI_IS_TDI ++#define CONFIG_USB_STORAGE ++#define CONFIG_USB_HOST_ETHER ++#define CONFIG_USB_ETHER_ASIX ++#define CONFIG_USB_ETHER_SMSC95XX ++#define CONFIG_MXC_USB_PORT 1 ++#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) ++#define CONFIG_MXC_USB_FLAGS 0 ++#define CONFIG_USB_KEYBOARD ++#define CONFIG_SYS_USB_EVENT_POLL ++#define CONFIG_PREBOOT "usb start" ++#endif ++ ++#define CONFIG_SYS_CONSOLE_IS_IN_ENV ++ ++#define CONFIG_EXTRA_ENV_SETTINGS \ ++ "script=boot.scr\0" \ ++ "bootfile=uImage\0" \ ++ "bootenv=uEnv.txt\0" \ ++ "console=ttymxc0\0" \ ++ "stdin=serial,usbkbd\0" \ ++ "stdout=serial,vga\0" \ ++ "stderr=serial,vga\0" \ ++ "splashpos=m,m\0" \ ++ "fdt_high=0xffffffff\0" \ ++ "initrd_high=0xffffffff\0" \ ++ "fdt_addr=0x11000000\0" \ ++ "boot_fdt=no\0" \ ++ "ip_dyn=yes\0" \ ++ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ ++ "mmcpart=1\0" \ ++ "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ ++ "update_sd_firmware_filename=u-boot.imx\0" \ ++ "update_sd_firmware=" \ ++ "if test ${ip_dyn} = yes; then " \ ++ "setenv get_cmd dhcp; " \ ++ "else " \ ++ "setenv get_cmd tftp; " \ ++ "fi; " \ ++ "if mmc dev ${mmcdev}; then " \ ++ "if ${get_cmd} ${update_sd_firmware_filename}; then " \ ++ "setexpr fw_sz ${filesize} / 0x200; " \ ++ "setexpr fw_sz ${fw_sz} + 1; " \ ++ "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ ++ "fi; " \ ++ "fi\0" \ ++ "mmcargs=setenv bootargs console=${console},${baudrate} " \ ++ "root=${mmcroot}\0" \ ++ "fatloadbootscript=" \ ++ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ ++ "ext2loadbootscript=" \ ++ "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ ++ "bootscript=echo Running bootscript from mmc ...; " \ ++ "source\0" \ ++ "fatloadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0" \ ++ "fatloadbootfile=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \ ++ "fatloadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ ++ "ext2loadbootenv=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0" \ ++ "ext2loadbootfile=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \ ++ "ext2loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ ++ "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ ++ "env import -t ${loadaddr} ${filesize}\0" \ ++ "fatmmcboot=echo Booting from mmc ...; " \ ++ "run mmcargs; " \ ++ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ ++ "if run fatloadfdt; then " \ ++ "if test ${bootfile} = zImage; then " \ ++ "bootz ${loadaddr} - ${fdt_addr}; " \ ++ "else " \ ++ "bootm ${loadaddr} - ${fdt_addr}; " \ ++ "fi; " \ ++ "else " \ ++ "if test ${boot_fdt} = try; then " \ ++ "if test ${bootfile} = zImage; then " \ ++ "bootz; " \ ++ "else " \ ++ "bootm; " \ ++ "fi; " \ ++ "else " \ ++ "echo WARN: Cannot load the DT; " \ ++ "fi; " \ ++ "fi; " \ ++ "else " \ ++ "if test ${bootfile} = zImage; then " \ ++ "bootz; " \ ++ "else " \ ++ "bootm; " \ ++ "fi; " \ ++ "fi;\0" \ ++ "ext2mmcboot=echo Booting from mmc ...; " \ ++ "run mmcargs; " \ ++ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ ++ "if run ext2loadfdt; then " \ ++ "if test ${bootfile} = zImage; then " \ ++ "bootz ${loadaddr} - ${fdt_addr}; " \ ++ "else " \ ++ "bootm ${loadaddr} - ${fdt_addr}; " \ ++ "fi; " \ ++ "else " \ ++ "if test ${boot_fdt} = try; then " \ ++ "if test ${bootfile} = zImage; then " \ ++ "bootz; " \ ++ "else " \ ++ "bootm; " \ ++ "fi; " \ ++ "else " \ ++ "echo WARN: Cannot load the DT; " \ ++ "fi; " \ ++ "fi; " \ ++ "else " \ ++ "if test ${bootfile} = zImage; then " \ ++ "bootz; " \ ++ "else " \ ++ "bootm; " \ ++ "fi; " \ ++ "fi;\0" \ ++ "netargs=setenv bootargs console=${console},${baudrate} " \ ++ "root=/dev/nfs " \ ++ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ ++ "netboot=echo Booting from net ...; " \ ++ "if test ${bootfile} = zImage; then " \ ++ "setenv realfile zImage; " \ ++ "else " \ ++ "setenv realfile uImage; " \ ++ "fi; " \ ++ "run netargs; " \ ++ "if test ${ip_dyn} = yes; then " \ ++ "setenv get_cmd dhcp; " \ ++ "else " \ ++ "setenv get_cmd tftp; " \ ++ "fi; " \ ++ "${get_cmd} ${bootfile}; " \ ++ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ ++ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ ++ "if test ${realfile} = zImage; then " \ ++ "bootz ${loadaddr} - ${fdt_addr}; " \ ++ "else " \ ++ "bootm ${loadaddr} - ${fdt_addr}; " \ ++ "fi; " \ ++ "else " \ ++ "if test ${boot_fdt} = try; then " \ ++ "if test ${bootfile} = zImage; then " \ ++ "bootz; " \ ++ "else " \ ++ "bootm; " \ ++ "fi; " \ ++ "else " \ ++ "echo WARN: Cannot load the DT; " \ ++ "fi; " \ ++ "fi; " \ ++ "else " \ ++ "if test ${bootfile} = zImage; then " \ ++ "bootz; " \ ++ "else " \ ++ "bootm; " \ ++ "fi; " \ ++ "fi;\0" ++ ++#define CONFIG_BOOTCOMMAND \ ++ "mmc dev ${mmcdev}; if mmc rescan; then " \ ++ "if run ext2loadbootscript; then " \ ++ "run bootscript; " \ ++ "elif run fatloadbootscript; then " \ ++ "run bootscript; " \ ++ "else " \ ++ "if run ext2loadbootenv || run fatloadbootenv; then " \ ++ "run importbootenv; " \ ++ "fi; " \ ++ "if run ext2loadbootfile; then " \ ++ "run ext2mmcboot; " \ ++ "elif run fatloadbootfile; then " \ ++ "run fatmmcboot; " \ ++ "else run netboot; " \ ++ "fi; " \ ++ "fi; " \ ++ "else run netboot; fi" ++ ++/* Miscellaneous configurable options */ ++#define CONFIG_SYS_LONGHELP ++#define CONFIG_SYS_HUSH_PARSER ++#define CONFIG_SYS_PROMPT "C1 U-Boot > " ++#define CONFIG_AUTO_COMPLETE ++#define CONFIG_SYS_CBSIZE 1024 ++ ++/* Print Buffer Size */ ++#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) ++#define CONFIG_SYS_MAXARGS 16 ++#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE ++ ++#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR ++#define CONFIG_SYS_HZ 1000 ++ ++#define CONFIG_CMDLINE_EDITING ++ ++/* Physical Memory Map */ ++#define CONFIG_NR_DRAM_BANKS 1 ++#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR ++ ++#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM ++#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR ++#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE ++ ++#define CONFIG_SYS_INIT_SP_OFFSET \ ++ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) ++#define CONFIG_SYS_INIT_SP_ADDR \ ++ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) ++ ++/* FLASH and environment organization */ ++#define CONFIG_SYS_NO_FLASH ++ ++#define CONFIG_ENV_SIZE (8 * 1024) ++ ++#define CONFIG_ENV_IS_IN_MMC ++#define CONFIG_ENV_OFFSET (6 * 64 * 1024) ++#define CONFIG_SYS_MMC_ENV_DEV 0 ++ ++#define CONFIG_OF_LIBFDT ++#define CONFIG_CMD_BOOTZ ++ ++#ifndef CONFIG_SYS_DCACHE_OFF ++#define CONFIG_CMD_CACHE ++#endif ++ ++#endif /* __CONFIG_H * */ +diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h +index 8a8920f..12ef5c7 100644 +--- a/include/configs/mx6_common.h ++++ b/include/configs/mx6_common.h +@@ -29,4 +29,6 @@ + #define CONFIG_SYS_PL310_BASE L2_PL310_BASE + #endif + ++#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 ++ + #endif +diff --git a/include/configs/mx6_cubox-i.h b/include/configs/mx6_cubox-i.h +new file mode 100644 +index 0000000..49b029f +--- /dev/null ++++ b/include/configs/mx6_cubox-i.h +@@ -0,0 +1,360 @@ ++/* ++ * Copyright (C) 2013 Freescale Semiconductor, Inc. ++ * Copyright (C) 2013 SolidRun ltd. ++ * Copyright (C) 2013 Jon Nettleton ++ * ++ * Configuration settings for the SolidRun carrier-1 (c1) board. ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#ifndef __CONFIG_H ++#define __CONFIG_H ++ ++#include "mx6_common.h" ++#include ++#include ++#include ++ ++#include "imx6_spl.h" ++ ++#undef DEBUG ++ ++#define CONFIG_MX6 ++#define CONFIG_DISPLAY_CPUINFO ++#define CONFIG_DISPLAY_BOARDINFO ++ ++#define CONFIG_CMDLINE_TAG ++#define CONFIG_SETUP_MEMORY_TAGS ++#define CONFIG_INITRD_TAG ++#define CONFIG_REVISION_TAG ++ ++/* Size of malloc() pool */ ++#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) ++ ++#define CONFIG_BOARD_EARLY_INIT_F ++#define CONFIG_BOARD_LATE_INIT ++#define CONFIG_MXC_GPIO ++ ++#define CONFIG_CMD_FUSE ++#ifdef CONFIG_CMD_FUSE ++#define CONFIG_MXC_OCOTP ++#endif ++ ++#define CONFIG_MXC_UART ++#define CONFIG_MXC_UART_BASE UART1_BASE ++ ++/* allow to overwrite serial and ethaddr */ ++#define CONFIG_ENV_OVERWRITE ++#define CONFIG_CONS_INDEX 1 ++#define CONFIG_BAUDRATE 115200 ++ ++/* Command definition */ ++#include ++ ++#undef CONFIG_CMD_IMLS ++#undef CONFIG_CMD_I2C ++ ++#define CONFIG_CMD_BMODE ++#define CONFIG_CMD_SETEXPR ++#define CONFIG_CMD_MEMTEST ++#define CONFIG_BOOTDELAY 3 ++ ++#define CONFIG_SYS_MEMTEST_START 0x10000000 ++#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) ++ ++#define CONFIG_LOADADDR 0x10800000 ++/*#define CONFIG_SYS_TEXT_BASE 0x17800000*/ ++ ++/* SATA Configuration */ ++#ifdef CONFIG_CMD_SATA ++#define CONFIG_DWC_AHSATA ++#define CONFIG_SYS_SATA_MAX_DEVICE 1 ++#define CONFIG_DWC_AHSATA_PORT_ID 0 ++#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR ++#define CONFIG_LBA48 ++#define CONFIG_LIBATA ++#endif ++ ++/* MMC Configuration */ ++#define CONFIG_FSL_ESDHC ++#define CONFIG_FSL_USDHC ++#define CONFIG_SYS_FSL_USDHC_NUM 1 ++#define CONFIG_SYS_FSL_ESDHC_ADDR 0 ++ ++#define CONFIG_MMC ++#define CONFIG_CMD_MMC ++#define CONFIG_GENERIC_MMC ++#define CONFIG_BOUNCE_BUFFER ++#define CONFIG_CMD_EXT4 ++#define CONFIG_CMD_FAT ++#define CONFIG_DOS_PARTITION ++#define CONFIG_FS_EXT4 ++#define CONFIG_FS_FAT ++#define CONFIG_CMD_FS_GENERIC ++ ++/* Ethernet Configuration */ ++#define CONFIG_FEC_MXC ++#ifdef CONFIG_FEC_MXC ++#define CONFIG_CMD_PING ++#define CONFIG_CMD_DHCP ++#define CONFIG_CMD_MII ++#define CONFIG_CMD_NET ++#define CONFIG_FEC_MXC ++#define CONFIG_MII ++#define IMX_FEC_BASE ENET_BASE_ADDR ++#define CONFIG_FEC_XCV_TYPE RGMII ++#define CONFIG_ETHPRIME "FEC" ++#define CONFIG_PHYLIB ++#define CONFIG_PHY_ATHEROS ++#endif ++ ++/* Framebuffer */ ++#define CONFIG_VIDEO ++#ifdef CONFIG_VIDEO ++#define CONFIG_VIDEO_IPUV3 ++#define CONFIG_IPUV3_CLK 260000000 ++#define CONFIG_CFB_CONSOLE ++#define CONFIG_CFB_CONSOLE_ANSI ++#define CONFIG_VGA_AS_SINGLE_DEVICE ++#define CONFIG_VIDEO_BMP_RLE8 ++#define CONFIG_IMX_HDMI ++ ++#undef CONFIG_SPLASH_SCREEN ++#undef CONFIG_SPLASH_SCREEN_ALIGN ++#define CONFIG_BMP_16BPP ++#undef CONFIG_CMD_BMP ++#define CONFIG_VIDEO_LOGO ++#define CONFIG_VIDEO_BMP_LOGO ++#define CONFIG_CONSOLE_MUX ++#endif ++ ++/* USB Configs */ ++#define CONFIG_CMD_USB ++#ifdef CONFIG_CMD_USB ++#define CONFIG_USB_EHCI ++#define CONFIG_USB_EHCI_MX6 ++#define CONFIG_EHCI_IS_TDI ++#define CONFIG_USB_STORAGE ++#define CONFIG_USB_HOST_ETHER ++#define CONFIG_USB_ETHER_ASIX ++#define CONFIG_USB_ETHER_SMSC95XX ++#define CONFIG_MXC_USB_PORT 1 ++#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) ++#define CONFIG_MXC_USB_FLAGS 0 ++#define CONFIG_USB_KEYBOARD ++#define CONFIG_SYS_USB_EVENT_POLL ++#define CONFIG_PREBOOT "usb start" ++#endif ++ ++#define CONFIG_SYS_CONSOLE_IS_IN_ENV ++ ++#define CONFIG_EXTRA_ENV_SETTINGS \ ++ "script=boot.scr\0" \ ++ "bootfile=auto\0" \ ++ "bootenv=uEnv.txt\0" \ ++ "boot_prefixes=/ /boot/\0" \ ++ "console=ttymxc0\0" \ ++ "stdin=serial,usbkbd\0" \ ++ "stdout=serial,vga\0" \ ++ "stderr=serial,vga\0" \ ++ "splashpos=m,m\0" \ ++ "fdt_high=0xffffffff\0" \ ++ "initrd_high=0xffffffff\0" \ ++ "fdt_addr=0x18000000\0" \ ++ "ramdiskaddr=0x11800000\0" \ ++ "ramdisk=uInitrd\0" \ ++ "boot_fdt=try\0" \ ++ "ip_dyn=yes\0" \ ++ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ ++ "mmcpart=1\0" \ ++ "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ ++ "update_sd_firmware_filename=u-boot.imx\0" \ ++ "update_sd_firmware=" \ ++ "if test ${ip_dyn} = yes; then " \ ++ "setenv get_cmd dhcp; " \ ++ "else " \ ++ "setenv get_cmd tftp; " \ ++ "fi; " \ ++ "if mmc dev ${mmcdev}; then " \ ++ "if ${get_cmd} ${update_sd_firmware_filename}; then " \ ++ "setexpr fw_sz ${filesize} / 0x200; " \ ++ "setexpr fw_sz ${fw_sz} + 1; " \ ++ "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ ++ "fi; " \ ++ "fi;\0" \ ++ "mmcargs=setenv bootargs console=${console},${baudrate} " \ ++ "root=${mmcroot};\0" \ ++ "loadbootscript=" \ ++ "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${file_prefix}${script};\0" \ ++ "bootscript=echo Running bootscript from mmc ...; " \ ++ "source;\0" \ ++ "autodetectfdt=if test ${cpu} = 6SOLO || test ${cpu} = 6DL; then " \ ++ "setenv fdt_prefix imx6dl; " \ ++ "else " \ ++ "setenv fdt_prefix imx6q; " \ ++ "fi; " \ ++ "if test ${board} = mx6-cubox-i; then " \ ++ "setenv fdt_file ${fdt_prefix}-cubox-i.dtb; " \ ++ "else " \ ++ "setenv fdt_file ${fdt_prefix}-hummingboard.dtb; " \ ++ "fi;\0" \ ++ "loadbootenv=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv};\0" \ ++ "loadfdt=if test ${boottype} = mmc; then " \ ++ "load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${file_prefix}${fdt_file}; " \ ++ "else " \ ++ "${get_cmd} ${fdt_addr} ${fdt_file}; " \ ++ "fi;\0 " \ ++ "loadbootfile=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${file_prefix}${bootfile};\0" \ ++ "loadramdisk=if test -n ${ramdisk}; then " \ ++ "if load mmc ${mmcdev}:${mmcpart} ${ramdiskaddr} ${file_prefix}${ramdisk}; then; else " \ ++ "setenv ramdiskaddr -; " \ ++ "fi; " \ ++ "else " \ ++ " setenv ramdiskaddr -; " \ ++ "fi;\0" \ ++ "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ ++ "env import -t ${loadaddr} ${filesize};\0" \ ++ "autobootfdt=echo Booting ${boot_file}; " \ ++ "if test ${boot_file} = zImage; then " \ ++ "bootz ${loadaddr} ${ramdiskaddr} ${fdt_addr}; " \ ++ "else " \ ++ "bootm ${loadaddr} ${ramdiskaddr} ${fdt_addr}; " \ ++ "fi;\0 " \ ++ "autoboot=echo Booting ${boot_file}; " \ ++ "if test ${boot_file} = zImage; then " \ ++ "bootz ${loadaddr} ${ramdiskaddr}; " \ ++ "else " \ ++ "bootm ${loadaddr} ${ramdiskaddr}; " \ ++ "fi;\0 " \ ++ "bootit=setenv boot_file ${bootfile}; " \ ++ "if test ${boot_file} = zImage; then " \ ++ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ ++ "if run loadfdt; then " \ ++ "run autobootfdt; " \ ++ "else " \ ++ "if test ${boot_fdt} = try; then " \ ++ "echo WARN: Cannot load the DTB and boot file is type zImage;" \ ++ "echo if you have not appended a dtb to the file it may;" \ ++ "echo hang after displaying Starting kernel...;" \ ++ "echo ;" \ ++ "run autoboot; " \ ++ "else " \ ++ "echo WARN: Cannot load the DT; " \ ++ "fi; " \ ++ "fi; " \ ++ "else " \ ++ "run autoboot; " \ ++ "fi; " \ ++ "else " \ ++ "run autoboot; " \ ++ "fi;\0" \ ++ "mmcboot=echo Booting from mmc ...; " \ ++ "run mmcargs; " \ ++ "setenv boottype mmc; " \ ++ "run bootit;\0 " \ ++ "netargs=setenv bootargs console=${console},${baudrate} " \ ++ "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp;\0" \ ++ "netboot=echo Booting from net ...; " \ ++ "run netargs; " \ ++ "setenv boottype net; " \ ++ "if test ${ip_dyn} = yes; then " \ ++ "setenv get_cmd dhcp; " \ ++ "else " \ ++ "setenv get_cmd tftp; " \ ++ "fi; " \ ++ "if test ${bootfile} = auto; then " \ ++ "setenv bootfile zImage; " \ ++ "if ${get_cmd} ${bootfile}; then " \ ++ "run bootit; " \ ++ "else " \ ++ "setenv bootfile uImage; " \ ++ "fi; " \ ++ " fi; " \ ++ "${get_cmd} ${bootfile}; " \ ++ "run bootit;\0 " ++ ++#define CONFIG_BOOTCOMMAND \ ++ "mmc dev ${mmcdev}; if mmc rescan; then " \ ++ "for prefix in ${boot_prefixes}; do " \ ++ "setenv file_prefix ${prefix}; " \ ++ "if run loadbootscript; then " \ ++ "run bootscript; " \ ++ "else " \ ++ "run autodetectfdt; " \ ++ "if run loadbootenv; then " \ ++ "run importbootenv; " \ ++ "fi; " \ ++ "if test ${bootfile} = auto; then " \ ++ "setenv origbootfile auto; " \ ++ "setenv bootfile zImage; " \ ++ "if run loadbootfile; then " \ ++ "run loadramdisk; " \ ++ "run mmcboot; " \ ++ "else " \ ++ "setenv bootfile uImage; " \ ++ "fi; " \ ++ "fi; " \ ++ "if run loadbootfile; then " \ ++ "run loadramdisk; " \ ++ "run mmcboot; " \ ++ "else " \ ++ "setenv bootfile ${origbootfile}; " \ ++ "fi; " \ ++ "fi; " \ ++ "done; " \ ++ "fi; " \ ++ "run netboot;\0 " ++ ++/* Miscellaneous configurable options */ ++#define CONFIG_SYS_LONGHELP ++#define CONFIG_SYS_HUSH_PARSER ++ ++#ifndef __ASSEMBLY__ ++extern char *config_sys_prompt; ++#endif ++#define CONFIG_SYS_PROMPT_MAX_CHARS 32 ++#define CONFIG_SYS_PROMPT config_sys_prompt ++#define CONFIG_AUTO_COMPLETE ++#define CONFIG_SYS_CBSIZE 1024 ++ ++/* Print Buffer Size */ ++#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + CONFIG_SYS_PROMPT_MAX_CHARS + 16) ++#define CONFIG_SYS_MAXARGS 16 ++#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE ++ ++#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR ++#define CONFIG_SYS_HZ 1000 ++ ++#define CONFIG_CMDLINE_EDITING ++ ++/* Physical Memory Map */ ++#define CONFIG_NR_DRAM_BANKS 1 ++#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR ++ ++#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM ++#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR ++#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE ++ ++#define CONFIG_SYS_INIT_SP_OFFSET \ ++ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) ++#define CONFIG_SYS_INIT_SP_ADDR \ ++ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) ++ ++/* FLASH and environment organization */ ++#define CONFIG_SYS_NO_FLASH ++ ++#define CONFIG_ENV_SIZE (8 * 1024) ++ ++#define CONFIG_ENV_IS_IN_MMC ++#define CONFIG_ENV_OFFSET (6 * 64 * 1024) ++#define CONFIG_SYS_MMC_ENV_DEV 0 ++ ++#define CONFIG_OF_LIBFDT ++#define CONFIG_CMD_BOOTZ ++ ++#ifndef CONFIG_SYS_DCACHE_OFF ++#define CONFIG_CMD_CACHE ++#endif ++ ++#endif /* __CONFIG_H * */ +diff --git a/include/spl.h b/include/spl.h +index a7e41da..dd80a81 100644 +--- a/include/spl.h ++++ b/include/spl.h +@@ -17,6 +17,7 @@ + #define MMCSD_MODE_RAW 1 + #define MMCSD_MODE_FAT 2 + #define MMCSD_MODE_EMMCBOOT 3 ++#define MMCSD_MODE_ANY 4 + + struct spl_image_info { + const char *name; +diff --git a/lib/hashtable.c b/lib/hashtable.c +index 4356b23..f33572c 100644 +--- a/lib/hashtable.c ++++ b/lib/hashtable.c +@@ -907,7 +907,7 @@ int himport_r(struct hsearch_data *htab, + printf("himport_r: can't insert \"%s=%s\" into hash table\n", + name, value); + +- debug("INSERT: table %p, filled %d/%d rv %p ==> name=\"%s\" value=\"%s\"\n", ++ debug("INSERT: table %p, filled %d/%d rv %p ==> name=\"%s\" value=\"%.128s\"\n", + htab, htab->filled, htab->size, + rv, name, value); + } while ((dp < data + size) && *dp); /* size check needed for text */ diff --git a/pre_checkin.sh b/pre_checkin.sh index d37a305..6e623ce 100644 --- a/pre_checkin.sh +++ b/pre_checkin.sh @@ -5,7 +5,7 @@ BOARDCONFIG="$2" ARCH_RESTRICTIONS="$3 $4" armv6_boards="rpi_b" -armv7_boards="omap3_beagle omap4_panda am335x_evm arndale highbank mx53loco mx6qsabrelite Cubieboard Cubieboard2 Hyundai_A7HD Mele_A1000 colibri_t20_iris paz00 snow" +armv7_boards="omap3_beagle omap4_panda am335x_evm arndale highbank mx53loco mx6qsabrelite Cubieboard Cubieboard2 Cubietruck Hyundai_A7HD Mele_A1000 colibri_t20_iris paz00 snow mx6_cubox-i" aarch64_boards="vexpress_aemv8a" if [ ! "$1" -o ! "$2" -o ! "$3" ]; then @@ -37,19 +37,22 @@ XLOADER=0 ORIGEN_SPL=0 SUNXI_SPL=0 ARNDALE_SPL=0 +CUBOXI_SPL=0 case "$BOARDCONFIG" in -mx*|efika*) BINEND=imx ;; +mx53loco*|mx6qsabrelite*|efika*) BINEND=imx ;; *omap*|*am335x*) BINEND=bin XLOADER=1 ;; *arndale*) BINEND=bin ARNDALE_SPL=1 ;; -*Cubieboard*) BINEND=bin +*Cubieboard*|Cubietruck*) BINEND=bin SUNXI_SPL=1 ;; *Mele_A1000*) BINEND=bin SUNXI_SPL=1 ;; *Hyundai_A7HD*) BINEND=bin SUNXI_SPL=1 ;; *snow*) BINEND=img ;; +mx6_cubox-i*) BINEND=img + CUBOXI_SPL=1 ;; *) BINEND=bin ;; esac @@ -61,6 +64,7 @@ s/ORIGEN_SPL/$ORIGEN_SPL/g s/ARNDALE_SPL/$ARNDALE_SPL/g s/SUNXI_SPL/$SUNXI_SPL/g s/TEGRA_SPL/$TEGRA_SPL/g +s/CUBOXI_SPL/$CUBOXI_SPL/g s/XLOADER/$XLOADER/g" < u-boot.spec.in > u-boot-$BOARDNAME.spec cp u-boot.changes u-boot-$BOARDNAME.changes diff --git a/u-boot-am335xevm.changes b/u-boot-am335xevm.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot-am335xevm.changes +++ b/u-boot-am335xevm.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-am335xevm.spec b/u-boot-am335xevm.spec index 8e442b9..c5d295a 100644 --- a/u-boot-am335xevm.spec +++ b/u-boot-am335xevm.spec @@ -22,6 +22,7 @@ %define origen_spl 0 %define sunxi_spl 0 %define arndale_spl 0 +%define cuboxi_spl 0 Name: u-boot-am335xevm Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root) diff --git a/u-boot-arndale.changes b/u-boot-arndale.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot-arndale.changes +++ b/u-boot-arndale.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-arndale.spec b/u-boot-arndale.spec index 6121b6e..2ffcb6b 100644 --- a/u-boot-arndale.spec +++ b/u-boot-arndale.spec @@ -22,6 +22,7 @@ %define origen_spl 0 %define sunxi_spl 0 %define arndale_spl 1 +%define cuboxi_spl 0 Name: u-boot-arndale Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root) diff --git a/u-boot-colibrit20iris.changes b/u-boot-colibrit20iris.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot-colibrit20iris.changes +++ b/u-boot-colibrit20iris.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-colibrit20iris.spec b/u-boot-colibrit20iris.spec index 5ee1a3b..7403791 100644 --- a/u-boot-colibrit20iris.spec +++ b/u-boot-colibrit20iris.spec @@ -22,6 +22,7 @@ %define origen_spl 0 %define sunxi_spl 0 %define arndale_spl 0 +%define cuboxi_spl 0 Name: u-boot-colibrit20iris Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root) diff --git a/u-boot-cubieboard.changes b/u-boot-cubieboard.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot-cubieboard.changes +++ b/u-boot-cubieboard.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-cubieboard.spec b/u-boot-cubieboard.spec index 17b115d..6ada0f4 100644 --- a/u-boot-cubieboard.spec +++ b/u-boot-cubieboard.spec @@ -22,6 +22,7 @@ %define origen_spl 0 %define sunxi_spl 1 %define arndale_spl 0 +%define cuboxi_spl 0 Name: u-boot-cubieboard Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root) diff --git a/u-boot-cubieboard2.changes b/u-boot-cubieboard2.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot-cubieboard2.changes +++ b/u-boot-cubieboard2.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-cubieboard2.spec b/u-boot-cubieboard2.spec index 5beabdf..95b9666 100644 --- a/u-boot-cubieboard2.spec +++ b/u-boot-cubieboard2.spec @@ -22,6 +22,7 @@ %define origen_spl 0 %define sunxi_spl 1 %define arndale_spl 0 +%define cuboxi_spl 0 Name: u-boot-cubieboard2 Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root) diff --git a/u-boot-cubietruck.changes b/u-boot-cubietruck.changes new file mode 100644 index 0000000..b7db4c4 --- /dev/null +++ b/u-boot-cubietruck.changes @@ -0,0 +1,466 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + +------------------------------------------------------------------- +Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org + +- add u-boot-mx6qsabrelite (for iMX6 Sabre Lite board) + +------------------------------------------------------------------- +Wed Feb 5 15:07:30 UTC 2014 - guillaume@opensuse.org + +- add u-boot-snow (for Chromebook ARM) + +------------------------------------------------------------------- +Wed Feb 5 14:59:29 UTC 2014 - guillaume@opensuse.org + +- Fix boot.scr location for beagle and origen + +------------------------------------------------------------------- +Thu Jan 30 14:28:34 UTC 2014 - dmueller@suse.com + +- add u-boot-cubieboard2 + +------------------------------------------------------------------- +Thu Jan 30 06:46:45 UTC 2014 - afaerber@suse.de + +- Drop 0006-ARMV7-hardfp-build-fix.patch: + v2014.01 checks if -msoft-float compiles okay, and + U-Boot is soft-float according to Tom Rini + +------------------------------------------------------------------- +Tue Jan 28 15:29:14 UTC 2014 - guillaume@opensuse.org + +- Disable CONFIG_SPL_OS_BOOT for ti armv7 configs with +fix_spl_build_for_am335x.patch to reduce size of am335x SPL + +------------------------------------------------------------------- +Sat Jan 26 22:46:44 UTC 2014 - afaerber@suse.de + +- Update to v2014.01 +* Manually updated 0006-ARMV7-hardfp-build-fix.patch +* Dropped v2013.10-sunxi.patch and created + v2014.01-sunxi.patch by merging u-boot.git v2014.01 onto + u-boot-sunxi.git e4a0232e173577893604b94fc3af7c047570970b +* Added gnuhash.patch to fix .gnu.hash section handling in ldscripts +* Rebased mlo-ext2.patch: + omap4_common.h CONFIG_SUPPORT_RAW_INITRD hunk is now covered by + ti_common_initrd_support.patch. + am335xevm build is known breaking due to size constraints not + trivially solvable without dropping our patch. + +------------------------------------------------------------------- +Sun Jan 26 12:14:10 UTC 2014 - afaerber@suse.de + +- Fix regression in packaging u-boot-dtb-tegra.bin: + There is in fact a u-boot-spl.bin SPL being built, + but it is 0xff-padded as u-boot-spl-pad.bin and then + prepended to u-boot.bin and the .dtb. + u-boot-dtb.bin exists independently as just u-boot.bin and .dtb, + so give preference to u-boot-dtb-tegra.bin over u-boot-dtb.bin. + +------------------------------------------------------------------- +Mon Jan 20 14:05:13 UTC 2014 - agraf@suse.com + +- The "Tegra SPL" is not an SPL but a differently named u-boot.bin + file. Fix up the generation scripts. + +------------------------------------------------------------------- +Sun Jan 19 00:09:41 UTC 2014 - afaerber@suse.de + +- Include Tegra SPL for Colibri T20 + +------------------------------------------------------------------- +Wed Jan 8 17:26:10 UTC 2014 - agraf@suse.com + +- switch raspberry to ext2 + +------------------------------------------------------------------- +Wed Jan 8 13:41:32 UTC 2014 - matwey.kornilov@gmail.com + +- am335x_evm-bootscr.patch: Search for files in /boot, not in /boot/boot + +------------------------------------------------------------------- +Wed Jan 8 02:07:44 UTC 2014 - afaerber@suse.de + +- rpi_b-bootscr.patch: Change rpi_b to use boot.scr + +------------------------------------------------------------------- +Tue Jan 7 16:01:13 UTC 2014 - dmueller@suse.com + +- remove origin flavor + +------------------------------------------------------------------- +Mon Jan 6 22:57:05 UTC 2014 - afaerber@suse.de + +- Enable paz00 config (Toshiba AC100) + +------------------------------------------------------------------- +Mon Jan 6 21:34:03 UTC 2014 - afaerber@suse.de + +- Enable colibri_t20_iris config (Toradex Colibri-T20 on Iris) +- Update u-boot.spec.in copyright and fix typo in comment + +------------------------------------------------------------------- +Sat Jan 4 01:47:50 UTC 2014 - agraf@suse.com + +- prefer u-boot-dtb.bin over u-boot.bin +- simplify files section + +------------------------------------------------------------------- +Fri Jan 3 16:54:30 UTC 2014 - dmueller@suse.com + +- mlo-ext2.patch: Search for files in /boot, not in /boot/boot + +------------------------------------------------------------------- +Mon Dec 30 18:37:50 UTC 2013 - matwey.kornilov@gmail.com + +- Add am335x_evm-bootscr.patch: Add bootscr to AM335x + platform based devices + +------------------------------------------------------------------- +Tue Dec 17 14:33:52 UTC 2013 - guillaume@opensuse.org + +- Remove old unused patches: + * v2013.04-sunxi.patch + * loadaddr-defaults.patch + +------------------------------------------------------------------- +Tue Dec 17 14:10:51 UTC 2013 - guillaume@opensuse.org + +- Add ti_common_initrd_support.patch to enable initrd support for + AM335x boards + +------------------------------------------------------------------- +Tue Dec 17 14:03:50 UTC 2013 - guillaume@opensuse.org + +- Add am335x_evm support which includes: Beagle Bone, + Beagle Bone Black, TI AM335x EVM, TI AM335x EVM-SK + +------------------------------------------------------------------- +Tue Nov 26 13:46:22 UTC 2013 - guillaume@opensuse.org + +- Add Arndale support + +------------------------------------------------------------------- +Tue Nov 26 13:05:10 UTC 2013 - guillaume@opensuse.org + +- Update v2013.04-sunxi.patch to v2013.10-sunxi.patch + +------------------------------------------------------------------- +Mon Nov 25 10:05:48 UTC 2013 - guillaume@opensuse.org + +- Remove kerneladdr and ramdiskaddr definition in u-boot patches + (now done in JeOS image with u-boot hooks) +- Update patches to current version: + * 0006-ARMV7-hardfp-build-fix.patch + * beagle-bootscr.patch + * mx53loco-bootscr.patch + * mlo-ext2.patch +- Merge fix_omap4_ext2_boot.patch in mlo-ext2.patch +- Rename exynos-ext2.patch in origen-ext2.patch + +------------------------------------------------------------------- +Mon Nov 25 09:57:12 UTC 2013 - guillaume@opensuse.org + +- Update to 2013.10 + +------------------------------------------------------------------- +Fri Nov 22 16:25:36 UTC 2013 - guillaume@opensuse.org + +- Fix OMAP4 pandaboard EXT2 boot + +------------------------------------------------------------------- +Fri Sep 13 11:31:14 UTC 2013 - guillaume@opensuse.org + +- Fix u-boot.bin and boot.scr place since they are now in boot/ folder. + +------------------------------------------------------------------- +Wed May 1 20:48:30 UTC 2013 - dmueller@suse.com + +- add support for cubieboard, hyundaia7hd, melea1000 + +------------------------------------------------------------------- +Wed May 1 08:18:26 UTC 2013 - dmueller@suse.com + +- update to 2013.04 + * no upstream changelog available +- remove dead u-boot-raspberrypi* (actually called rpib now) +- add rpib variant + +------------------------------------------------------------------- +Thu Apr 11 17:05:58 UTC 2013 - guillaume.gardet@opensuse.org + +- add omap3_beagle to targets + +------------------------------------------------------------------- +Thu Apr 11 16:05:41 UTC 2013 - dmueller@suse.com + +- remove u8500href subpackage, kernel got dropped + +------------------------------------------------------------------- +Sun Apr 7 14:32:20 UTC 2013 - agraf@suse.com + +- update to 2013.04rc2 +- enable bootz support on all boards + +------------------------------------------------------------------- +Wed Mar 20 07:21:06 UTC 2013 - agraf@suse.com + +- fix mlo-ext2.patch to actually use the ext4 infrastructure + +------------------------------------------------------------------- +Sat Jan 26 10:38:07 UTC 2013 - dmueller@suse.com + +- update mlo-ext2.patch: + * use the ext4 driver now since ext2 got removed + +------------------------------------------------------------------- +Wed Oct 24 22:33:13 UTC 2012 - agraf@suse.com + +- add sdhc-1.patch, sdhc-2.patch, sdhc-3.patch: + * backport upstream sdhc fixes + +------------------------------------------------------------------- +Wed Oct 24 01:37:36 CEST 2012 - agraf@suse.de + +- update to 2012.10: + - refresh patches 0006-ARMV7-hardfp-build-fix.patch, mlo-ext2.patch, + loadaddr-defaults.patch, mx53loco-bootscr.patch + +------------------------------------------------------------------- +Mon Oct 22 12:00:22 UTC 2012 - agraf@suse.com + +- fix origen by putting the ramdisk higher + +------------------------------------------------------------------- +Mon Aug 6 09:39:54 UTC 2012 - dmueller@suse.com + +- remove Marvell sources as they are non-free licensed (bnc#773824) + +------------------------------------------------------------------- +Thu Jul 26 18:21:44 UTC 2012 - agraf@suse.com + +- fix ext2 support for origen +- add origen-spl.bin for origen + +------------------------------------------------------------------- +Thu Jul 26 09:47:31 UTC 2012 - dmueller@suse.com + +- merge u-boot-tools + +------------------------------------------------------------------- +Wed Jul 25 21:05:08 UTC 2012 - agraf@suse.com + +- add ext2 support by default in mx53loco + +------------------------------------------------------------------- +Tue Jul 24 21:28:59 UTC 2012 - agraf@suse.com + +- add support for mx53loco + +------------------------------------------------------------------- +Tue Jul 24 11:25:42 UTC 2012 - dmueller@suse.com + +- remove u-boot-omap3beagle + +------------------------------------------------------------------- +Mon Jul 23 22:34:04 UTC 2012 - agraf@suse.com + +- bump to 2012.04.01 + - fixes bug in cmdline parsing + +------------------------------------------------------------------- +Mon Jul 23 22:26:47 UTC 2012 - agraf@suse.com + +- add calxeda highbank support + +------------------------------------------------------------------- +Thu Jul 12 12:51:56 UTC 2012 - agraf@suse.com + +- autoload boot.scr on beagle, so we can boot again + +------------------------------------------------------------------- +Thu Jul 12 08:12:15 UTC 2012 - agraf@suse.com + +- update to upstream u-boot 2012.04 + -> gets rid of linaro fork, only mainline now + -> gets us omap3 MLO support, no more need for x-loader + -> potentially fixes voltage issues on omap4 + +------------------------------------------------------------------- +Thu Jun 14 09:04:53 UTC 2012 - adrian@suse.de + +- add SUSE style conflicts to avoid installation of multiple + boot loaders + +------------------------------------------------------------------- +Tue Apr 17 11:59:55 UTC 2012 - joop.boonen@opensuse.org + +- Included u-boot.spec.in and gen_spec.sh in the spec file + +------------------------------------------------------------------- +Mon Feb 6 13:25:09 UTC 2012 - agraf@suse.com + +- use ext2 on panda + +------------------------------------------------------------------- +Tue Dec 20 02:36:05 UTC 2011 - agraf@suse.com + +- use ttyO2 as default console= on OMAP boards + +------------------------------------------------------------------- +Mon Dec 19 20:21:21 UTC 2011 - agraf@suse.com + +- add u8500_href and origen configs + +------------------------------------------------------------------- +Fri Dec 16 16:03:01 UTC 2011 - agraf@suse.com + +- fix lint failures + +------------------------------------------------------------------- +Fri Dec 16 14:46:53 CET 2011 - agraf@suse.com + +- don't install map + +------------------------------------------------------------------- +Fri Dec 16 02:16:19 UTC 2011 - agraf@suse.com + +- generalize spec file to be able to build for more boards +- add beagle board spec file +- remove boot.scr + +------------------------------------------------------------------- +Fri Dec 16 01:15:47 UTC 2011 - agraf@suse.com + +- rename to u-boot-omap4panda + +------------------------------------------------------------------- +Tue Dec 13 17:24:45 UTC 2011 - dkukawka@suse.de + +- new package based on u-boot-omap4panda but use linaro u-boot git + repo (http://git.linaro.org/git/boot/u-boot-linaro-stable.git) + instead of mainline u-boot. This package also contains the MLO + (this package obsoletes the x-loader package) + +------------------------------------------------------------------- +Tue Nov 29 22:53:44 UTC 2011 - joop.boonen@opensuse.org + +- COPYING CREDITS README are now in the standard package + +------------------------------------------------------------------- +Thu Nov 24 21:08:58 UTC 2011 - joop.boonen@opensuse.org + +- Corrected the links + +------------------------------------------------------------------- +Tue Nov 22 17:47:17 UTC 2011 - joop.boonen@opensuse.org + +- Build without u-boot tools as we have a u-boot-tools packages + +------------------------------------------------------------------- +Sun Nov 20 17:00:43 UTC 2011 - joop.boonen@opensuse.org + +- Cleaned the spec file up the spec file +- The name is the same as the package name + +------------------------------------------------------------------- +Sun Nov 13 13:13:39 UTC 2011 - joop.boonen@opensuse.org + +- Build u-boot according to http://elinux.org/Panda_How_to_MLO_&_u-boot +- Using .txt config file instead of .scr it's gerated via mkimage + +------------------------------------------------------------------- +Wed Nov 09 22:55:09 UTC 2011 - joop.boonen@opensuse.org + +- Used scr file based on http://elinux.org definition +- Build u-boot 20111109 +- Used the Meego panda u-boot as a base + +------------------------------------------------------------------- +Fri Feb 18 00:00:00 UTC 2011 - raghuveer.murthy@ti.com> +- 2010.09-MeeGo +- Fix for u-boot fails to compile on armv7hl, BMC#13140 + +------------------------------------------------------------------- +Thu Nov 18 00:00:00 UTC 2010 - peter.j.zhu@intel.com> +- 2010.09-MeeGo +- Don't build against i586, BMC#10159 + +------------------------------------------------------------------- +Tue Oct 10 00:00:00 UTC 2010 - nm@ti.com> +- 2010.09-MeeGo +- Add Das u-boot package - FEA#9723 + +------------------------------------------------------------------- +Tue Oct 10 00:00:00 UTC 2010 - nm@ti.com> +- 2010.09.rc1-MeeGo +- Added option to enable boot.scr generation and copy + +------------------------------------------------------------------- +Mon Oct 04 00:00:00 UTC 2010 - nm@ti.com> +- 2010.09.rc1-MeeGo +- Update to 2010.09 + +------------------------------------------------------------------- +Wed Sep 14 00:00:00 UTC 2010 - nm@ti.com> +- 2010.09.rc1-MeeGo +- Update to 2010.09.rc1 +- MeeGo customization +- Enabled PandaBoard, Beagleboard build + +------------------------------------------------------------------- +Wed Mar 31 00:00:00 UTC 2010 - silvan.calarco@mambasoft.it> +- 2009.11.1-1mamba +- update to 2009.11.1 + +------------------------------------------------------------------- diff --git a/u-boot-cubietruck.spec b/u-boot-cubietruck.spec new file mode 100644 index 0000000..79fd373 --- /dev/null +++ b/u-boot-cubietruck.spec @@ -0,0 +1,165 @@ +# +# spec file for package u-boot-cubietruck +# +# Copyright (c) 2014 SUSE LINUX Products GmbH, Nuernberg, Germany. +# Copyright (c) 2010 Texas Instruments Inc by Nishanth Menon +# Copyright (c) 2007-2010 by Silvan Calarco +# +# All modifications and additions to the file contributed by third parties +# remain the property of their copyright owners, unless otherwise agreed +# upon. The license for this file, and modifications and additions to the +# file, is the same license as for the pristine package itself (unless the +# license for the pristine package is not an Open Source License, in which +# case the license is the MIT License). An "Open Source License" is a +# license that conforms to the Open Source Definition (Version 1.9) +# published by the Open Source Initiative. + +# Please submit bugfixes or comments via http://bugs.opensuse.org/ +# + + +%define x_loader 0 +%define origen_spl 0 +%define sunxi_spl 1 +%define arndale_spl 0 +%define cuboxi_spl 0 + +Name: u-boot-cubietruck +Version: 2014.04 +Release: 0 +Summary: The u-boot firmware for the cubietruck arm platform +License: GPL-2.0 +Group: System/Boot +Url: http://www.denx.de/wiki/U-Boot +Source: ftp://ftp.denx.de/pub/u-boot/u-boot-%{version}.tar.bz2 +Source1: openSUSE_panda.txt +Source2: arndale-bl1.img +Source300: rpmlintrc +Patch2: mlo-ext2.patch +Patch3: ti_common_initrd_support.patch +Patch4: beagle-bootscr.patch +Patch5: mx53loco-bootscr.patch +Patch6: origen-ext2.patch +Patch7: arndale.patch +Patch8: v2014.04-sunxi.patch +Patch9: am335x_evm-bootscr.patch +Patch10: rpi_b-bootscr.patch +Patch12: fix_spl_build_for_am335x.patch +Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch +Patch20: fix_exynos5_text_base.patch +Patch21: fix_snow_config.patch +Patch22: exynos5-dt.h.patch +BuildRoot: %{_tmppath}/%{name}-%{version}-build +# Arndale board need DTC >= 1.4 +BuildRequires: dtc >= 1.4.0 +Provides: u-boot-loader +Conflicts: otherproviders(u-boot-loader) +%if %x_loader == 1 +Obsoletes: x-loader-cubietruck +Provides: x-loader-cubietruck +%endif +ExclusiveArch: armv7l armv7hl + +%description +Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. +This package contains the firmware for the cubietruck arm platform. + +%package doc +Summary: Documentation for the u-boot Firmware +Group: Documentation/Other + +%description doc +Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. +This package contains documentation for u-boot firmware + +%prep +%setup -q -n u-boot-%{version} +# is non-free licensed, and we don't need it (bnc#773824) +rm -rf board/Marvell +# Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i +%patch2 +%endif +%patch3 +%patch4 +%patch5 +%patch6 +%patch7 +%patch8 -p1 +%patch9 -p1 +%patch10 +%patch12 +%patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif +%if "%{name}" == "u-boot-snow" +# Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) +%patch20 +%patch21 +%patch22 +%endif + +%build +make %{?jobs:-j %jobs} CFLAGS="$RPM_OPT_FLAGS" Cubietruck_config +# temporary disable of --build-id +#make CFLAGS="$RPM_OPT_FLAGS" USE_PRIVATE_LIBGG=yes +make %{?jobs:-j %jobs} USE_PRIVATE_LIBGG=yes +%if "%{name}" == "u-boot-snow" +# Chromebook ARM (snow) need a uImage format +export TEXT_START=$(awk '$NF == "_start" { printf "0x"$1 }' System.map) +./tools/mkimage -A arm -O linux -T kernel -C none -a $TEXT_START -e $TEXT_START -n uboot -d u-boot-dtb.bin u-boot.img +%endif + +%install +install -D -m 0644 u-boot.bin %{buildroot}/boot/u-boot.bin +# Some times u-boot needs a dtb to configure itself appended to the binary. +# In that case prefer the one with a working dtb already appended. +if [ -f u-boot-dtb-tegra.bin ]; then + install -D -m 0644 u-boot-dtb-tegra.bin %{buildroot}/boot/u-boot.bin +elif [ -f u-boot-dtb.bin ]; then + install -D -m 0644 u-boot-dtb.bin %{buildroot}/boot/u-boot.bin +else + install -D -m 0644 u-boot.bin %{buildroot}/boot/u-boot.bin +fi +%if %x_loader == 1 +install -D -m 0755 MLO %{buildroot}/boot/MLO +%endif +%if %origen_spl == 1 +install -D -m 0755 spl/origen-spl.bin %{buildroot}/boot/origen-spl.bin +%endif +%if %arndale_spl == 1 +install -D -m 0755 spl/arndale-spl.bin %{buildroot}/boot/arndale-spl.bin +install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img +%endif +%if %sunxi_spl == 1 +install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin +%endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif + +%files +%defattr(-,root,root) +/boot/* +%doc Licenses/gpl-2.0.txt CREDITS README + +%files doc +%defattr(-,root,root) +# Generic documents +%doc doc/README.JFFS2 doc/README.JFFS2_NAND doc/README.commands +%doc doc/README.autoboot doc/README.commands doc/README.console doc/README.dns +%doc doc/README.hwconfig doc/README.nand doc/README.NetConsole doc/README.serial_multi +%doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb +%doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem +# Copy some useful kermit scripts as well +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image +# Now any h/w dependent Documentation +%doc doc/README.ARM-SoC doc/README.ARM-memory-map + +%changelog diff --git a/u-boot-highbank.changes b/u-boot-highbank.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot-highbank.changes +++ b/u-boot-highbank.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-highbank.spec b/u-boot-highbank.spec index 05d83c1..0644787 100644 --- a/u-boot-highbank.spec +++ b/u-boot-highbank.spec @@ -22,6 +22,7 @@ %define origen_spl 0 %define sunxi_spl 0 %define arndale_spl 0 +%define cuboxi_spl 0 Name: u-boot-highbank Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root) diff --git a/u-boot-hyundaia7hd.changes b/u-boot-hyundaia7hd.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot-hyundaia7hd.changes +++ b/u-boot-hyundaia7hd.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-hyundaia7hd.spec b/u-boot-hyundaia7hd.spec index 7e453d1..bd5def5 100644 --- a/u-boot-hyundaia7hd.spec +++ b/u-boot-hyundaia7hd.spec @@ -22,6 +22,7 @@ %define origen_spl 0 %define sunxi_spl 1 %define arndale_spl 0 +%define cuboxi_spl 0 Name: u-boot-hyundaia7hd Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root) diff --git a/u-boot-melea1000.changes b/u-boot-melea1000.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot-melea1000.changes +++ b/u-boot-melea1000.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-melea1000.spec b/u-boot-melea1000.spec index 80fd1fc..a118ab2 100644 --- a/u-boot-melea1000.spec +++ b/u-boot-melea1000.spec @@ -22,6 +22,7 @@ %define origen_spl 0 %define sunxi_spl 1 %define arndale_spl 0 +%define cuboxi_spl 0 Name: u-boot-melea1000 Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root) diff --git a/u-boot-mx53loco.changes b/u-boot-mx53loco.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot-mx53loco.changes +++ b/u-boot-mx53loco.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-mx53loco.spec b/u-boot-mx53loco.spec index dcfd9c7..eae4ff1 100644 --- a/u-boot-mx53loco.spec +++ b/u-boot-mx53loco.spec @@ -22,6 +22,7 @@ %define origen_spl 0 %define sunxi_spl 0 %define arndale_spl 0 +%define cuboxi_spl 0 Name: u-boot-mx53loco Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root) diff --git a/u-boot-mx6cubox-i.changes b/u-boot-mx6cubox-i.changes new file mode 100644 index 0000000..b7db4c4 --- /dev/null +++ b/u-boot-mx6cubox-i.changes @@ -0,0 +1,466 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + +------------------------------------------------------------------- +Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org + +- Enhance pre_checkin.sh script to handle arch restrictions + +------------------------------------------------------------------- +Tue Apr 29 13:18:48 UTC 2014 - guillaume@opensuse.org + +- Fix builds : + * 'tools' target is now 'tools-only' + * kermit scripts moved from 'tools/scripts' to 'tools/kermit/' + * Enhanced pre_checkin.sh script to handle uppercases in config name + * Renamed config from cubieboard to Cubieboard + * Renamed config from cubieboard2 to Cubieboard2 + * Renamed config from hyundai_a7hd to Hyundai_A7HD + * Renamed config from mele_a1000 to Mele_A1000 + +------------------------------------------------------------------- +Tue Apr 29 13:06:57 UTC 2014 - guillaume@opensuse.org + +- Add vexpress_aemv8a board + +------------------------------------------------------------------- +Tue Apr 29 08:33:48 UTC 2014 - guillaume@opensuse.org + +- Update to v2014.04 + * Update mlo-ext2.patch + * Update mx53loco-bootscr.patch + * Update origen-ext2.patch + * Dropped v2014.01-sunxi.patch and created + v2014.04-sunxi.patch by diffing u-boot-2014.04 with + u-boot-sunxi.git d9fe0a1e061e2bde6c24a0f7cef4f5023f3bd579 + * Update rpi_b-bootscr.patch + * Drop gnuhash.patch (upstreamed) + +------------------------------------------------------------------- +Thu Mar 27 14:22:23 UTC 2014 - guillaume@opensuse.org + +- add u-boot-mx6qsabrelite (for iMX6 Sabre Lite board) + +------------------------------------------------------------------- +Wed Feb 5 15:07:30 UTC 2014 - guillaume@opensuse.org + +- add u-boot-snow (for Chromebook ARM) + +------------------------------------------------------------------- +Wed Feb 5 14:59:29 UTC 2014 - guillaume@opensuse.org + +- Fix boot.scr location for beagle and origen + +------------------------------------------------------------------- +Thu Jan 30 14:28:34 UTC 2014 - dmueller@suse.com + +- add u-boot-cubieboard2 + +------------------------------------------------------------------- +Thu Jan 30 06:46:45 UTC 2014 - afaerber@suse.de + +- Drop 0006-ARMV7-hardfp-build-fix.patch: + v2014.01 checks if -msoft-float compiles okay, and + U-Boot is soft-float according to Tom Rini + +------------------------------------------------------------------- +Tue Jan 28 15:29:14 UTC 2014 - guillaume@opensuse.org + +- Disable CONFIG_SPL_OS_BOOT for ti armv7 configs with +fix_spl_build_for_am335x.patch to reduce size of am335x SPL + +------------------------------------------------------------------- +Sat Jan 26 22:46:44 UTC 2014 - afaerber@suse.de + +- Update to v2014.01 +* Manually updated 0006-ARMV7-hardfp-build-fix.patch +* Dropped v2013.10-sunxi.patch and created + v2014.01-sunxi.patch by merging u-boot.git v2014.01 onto + u-boot-sunxi.git e4a0232e173577893604b94fc3af7c047570970b +* Added gnuhash.patch to fix .gnu.hash section handling in ldscripts +* Rebased mlo-ext2.patch: + omap4_common.h CONFIG_SUPPORT_RAW_INITRD hunk is now covered by + ti_common_initrd_support.patch. + am335xevm build is known breaking due to size constraints not + trivially solvable without dropping our patch. + +------------------------------------------------------------------- +Sun Jan 26 12:14:10 UTC 2014 - afaerber@suse.de + +- Fix regression in packaging u-boot-dtb-tegra.bin: + There is in fact a u-boot-spl.bin SPL being built, + but it is 0xff-padded as u-boot-spl-pad.bin and then + prepended to u-boot.bin and the .dtb. + u-boot-dtb.bin exists independently as just u-boot.bin and .dtb, + so give preference to u-boot-dtb-tegra.bin over u-boot-dtb.bin. + +------------------------------------------------------------------- +Mon Jan 20 14:05:13 UTC 2014 - agraf@suse.com + +- The "Tegra SPL" is not an SPL but a differently named u-boot.bin + file. Fix up the generation scripts. + +------------------------------------------------------------------- +Sun Jan 19 00:09:41 UTC 2014 - afaerber@suse.de + +- Include Tegra SPL for Colibri T20 + +------------------------------------------------------------------- +Wed Jan 8 17:26:10 UTC 2014 - agraf@suse.com + +- switch raspberry to ext2 + +------------------------------------------------------------------- +Wed Jan 8 13:41:32 UTC 2014 - matwey.kornilov@gmail.com + +- am335x_evm-bootscr.patch: Search for files in /boot, not in /boot/boot + +------------------------------------------------------------------- +Wed Jan 8 02:07:44 UTC 2014 - afaerber@suse.de + +- rpi_b-bootscr.patch: Change rpi_b to use boot.scr + +------------------------------------------------------------------- +Tue Jan 7 16:01:13 UTC 2014 - dmueller@suse.com + +- remove origin flavor + +------------------------------------------------------------------- +Mon Jan 6 22:57:05 UTC 2014 - afaerber@suse.de + +- Enable paz00 config (Toshiba AC100) + +------------------------------------------------------------------- +Mon Jan 6 21:34:03 UTC 2014 - afaerber@suse.de + +- Enable colibri_t20_iris config (Toradex Colibri-T20 on Iris) +- Update u-boot.spec.in copyright and fix typo in comment + +------------------------------------------------------------------- +Sat Jan 4 01:47:50 UTC 2014 - agraf@suse.com + +- prefer u-boot-dtb.bin over u-boot.bin +- simplify files section + +------------------------------------------------------------------- +Fri Jan 3 16:54:30 UTC 2014 - dmueller@suse.com + +- mlo-ext2.patch: Search for files in /boot, not in /boot/boot + +------------------------------------------------------------------- +Mon Dec 30 18:37:50 UTC 2013 - matwey.kornilov@gmail.com + +- Add am335x_evm-bootscr.patch: Add bootscr to AM335x + platform based devices + +------------------------------------------------------------------- +Tue Dec 17 14:33:52 UTC 2013 - guillaume@opensuse.org + +- Remove old unused patches: + * v2013.04-sunxi.patch + * loadaddr-defaults.patch + +------------------------------------------------------------------- +Tue Dec 17 14:10:51 UTC 2013 - guillaume@opensuse.org + +- Add ti_common_initrd_support.patch to enable initrd support for + AM335x boards + +------------------------------------------------------------------- +Tue Dec 17 14:03:50 UTC 2013 - guillaume@opensuse.org + +- Add am335x_evm support which includes: Beagle Bone, + Beagle Bone Black, TI AM335x EVM, TI AM335x EVM-SK + +------------------------------------------------------------------- +Tue Nov 26 13:46:22 UTC 2013 - guillaume@opensuse.org + +- Add Arndale support + +------------------------------------------------------------------- +Tue Nov 26 13:05:10 UTC 2013 - guillaume@opensuse.org + +- Update v2013.04-sunxi.patch to v2013.10-sunxi.patch + +------------------------------------------------------------------- +Mon Nov 25 10:05:48 UTC 2013 - guillaume@opensuse.org + +- Remove kerneladdr and ramdiskaddr definition in u-boot patches + (now done in JeOS image with u-boot hooks) +- Update patches to current version: + * 0006-ARMV7-hardfp-build-fix.patch + * beagle-bootscr.patch + * mx53loco-bootscr.patch + * mlo-ext2.patch +- Merge fix_omap4_ext2_boot.patch in mlo-ext2.patch +- Rename exynos-ext2.patch in origen-ext2.patch + +------------------------------------------------------------------- +Mon Nov 25 09:57:12 UTC 2013 - guillaume@opensuse.org + +- Update to 2013.10 + +------------------------------------------------------------------- +Fri Nov 22 16:25:36 UTC 2013 - guillaume@opensuse.org + +- Fix OMAP4 pandaboard EXT2 boot + +------------------------------------------------------------------- +Fri Sep 13 11:31:14 UTC 2013 - guillaume@opensuse.org + +- Fix u-boot.bin and boot.scr place since they are now in boot/ folder. + +------------------------------------------------------------------- +Wed May 1 20:48:30 UTC 2013 - dmueller@suse.com + +- add support for cubieboard, hyundaia7hd, melea1000 + +------------------------------------------------------------------- +Wed May 1 08:18:26 UTC 2013 - dmueller@suse.com + +- update to 2013.04 + * no upstream changelog available +- remove dead u-boot-raspberrypi* (actually called rpib now) +- add rpib variant + +------------------------------------------------------------------- +Thu Apr 11 17:05:58 UTC 2013 - guillaume.gardet@opensuse.org + +- add omap3_beagle to targets + +------------------------------------------------------------------- +Thu Apr 11 16:05:41 UTC 2013 - dmueller@suse.com + +- remove u8500href subpackage, kernel got dropped + +------------------------------------------------------------------- +Sun Apr 7 14:32:20 UTC 2013 - agraf@suse.com + +- update to 2013.04rc2 +- enable bootz support on all boards + +------------------------------------------------------------------- +Wed Mar 20 07:21:06 UTC 2013 - agraf@suse.com + +- fix mlo-ext2.patch to actually use the ext4 infrastructure + +------------------------------------------------------------------- +Sat Jan 26 10:38:07 UTC 2013 - dmueller@suse.com + +- update mlo-ext2.patch: + * use the ext4 driver now since ext2 got removed + +------------------------------------------------------------------- +Wed Oct 24 22:33:13 UTC 2012 - agraf@suse.com + +- add sdhc-1.patch, sdhc-2.patch, sdhc-3.patch: + * backport upstream sdhc fixes + +------------------------------------------------------------------- +Wed Oct 24 01:37:36 CEST 2012 - agraf@suse.de + +- update to 2012.10: + - refresh patches 0006-ARMV7-hardfp-build-fix.patch, mlo-ext2.patch, + loadaddr-defaults.patch, mx53loco-bootscr.patch + +------------------------------------------------------------------- +Mon Oct 22 12:00:22 UTC 2012 - agraf@suse.com + +- fix origen by putting the ramdisk higher + +------------------------------------------------------------------- +Mon Aug 6 09:39:54 UTC 2012 - dmueller@suse.com + +- remove Marvell sources as they are non-free licensed (bnc#773824) + +------------------------------------------------------------------- +Thu Jul 26 18:21:44 UTC 2012 - agraf@suse.com + +- fix ext2 support for origen +- add origen-spl.bin for origen + +------------------------------------------------------------------- +Thu Jul 26 09:47:31 UTC 2012 - dmueller@suse.com + +- merge u-boot-tools + +------------------------------------------------------------------- +Wed Jul 25 21:05:08 UTC 2012 - agraf@suse.com + +- add ext2 support by default in mx53loco + +------------------------------------------------------------------- +Tue Jul 24 21:28:59 UTC 2012 - agraf@suse.com + +- add support for mx53loco + +------------------------------------------------------------------- +Tue Jul 24 11:25:42 UTC 2012 - dmueller@suse.com + +- remove u-boot-omap3beagle + +------------------------------------------------------------------- +Mon Jul 23 22:34:04 UTC 2012 - agraf@suse.com + +- bump to 2012.04.01 + - fixes bug in cmdline parsing + +------------------------------------------------------------------- +Mon Jul 23 22:26:47 UTC 2012 - agraf@suse.com + +- add calxeda highbank support + +------------------------------------------------------------------- +Thu Jul 12 12:51:56 UTC 2012 - agraf@suse.com + +- autoload boot.scr on beagle, so we can boot again + +------------------------------------------------------------------- +Thu Jul 12 08:12:15 UTC 2012 - agraf@suse.com + +- update to upstream u-boot 2012.04 + -> gets rid of linaro fork, only mainline now + -> gets us omap3 MLO support, no more need for x-loader + -> potentially fixes voltage issues on omap4 + +------------------------------------------------------------------- +Thu Jun 14 09:04:53 UTC 2012 - adrian@suse.de + +- add SUSE style conflicts to avoid installation of multiple + boot loaders + +------------------------------------------------------------------- +Tue Apr 17 11:59:55 UTC 2012 - joop.boonen@opensuse.org + +- Included u-boot.spec.in and gen_spec.sh in the spec file + +------------------------------------------------------------------- +Mon Feb 6 13:25:09 UTC 2012 - agraf@suse.com + +- use ext2 on panda + +------------------------------------------------------------------- +Tue Dec 20 02:36:05 UTC 2011 - agraf@suse.com + +- use ttyO2 as default console= on OMAP boards + +------------------------------------------------------------------- +Mon Dec 19 20:21:21 UTC 2011 - agraf@suse.com + +- add u8500_href and origen configs + +------------------------------------------------------------------- +Fri Dec 16 16:03:01 UTC 2011 - agraf@suse.com + +- fix lint failures + +------------------------------------------------------------------- +Fri Dec 16 14:46:53 CET 2011 - agraf@suse.com + +- don't install map + +------------------------------------------------------------------- +Fri Dec 16 02:16:19 UTC 2011 - agraf@suse.com + +- generalize spec file to be able to build for more boards +- add beagle board spec file +- remove boot.scr + +------------------------------------------------------------------- +Fri Dec 16 01:15:47 UTC 2011 - agraf@suse.com + +- rename to u-boot-omap4panda + +------------------------------------------------------------------- +Tue Dec 13 17:24:45 UTC 2011 - dkukawka@suse.de + +- new package based on u-boot-omap4panda but use linaro u-boot git + repo (http://git.linaro.org/git/boot/u-boot-linaro-stable.git) + instead of mainline u-boot. This package also contains the MLO + (this package obsoletes the x-loader package) + +------------------------------------------------------------------- +Tue Nov 29 22:53:44 UTC 2011 - joop.boonen@opensuse.org + +- COPYING CREDITS README are now in the standard package + +------------------------------------------------------------------- +Thu Nov 24 21:08:58 UTC 2011 - joop.boonen@opensuse.org + +- Corrected the links + +------------------------------------------------------------------- +Tue Nov 22 17:47:17 UTC 2011 - joop.boonen@opensuse.org + +- Build without u-boot tools as we have a u-boot-tools packages + +------------------------------------------------------------------- +Sun Nov 20 17:00:43 UTC 2011 - joop.boonen@opensuse.org + +- Cleaned the spec file up the spec file +- The name is the same as the package name + +------------------------------------------------------------------- +Sun Nov 13 13:13:39 UTC 2011 - joop.boonen@opensuse.org + +- Build u-boot according to http://elinux.org/Panda_How_to_MLO_&_u-boot +- Using .txt config file instead of .scr it's gerated via mkimage + +------------------------------------------------------------------- +Wed Nov 09 22:55:09 UTC 2011 - joop.boonen@opensuse.org + +- Used scr file based on http://elinux.org definition +- Build u-boot 20111109 +- Used the Meego panda u-boot as a base + +------------------------------------------------------------------- +Fri Feb 18 00:00:00 UTC 2011 - raghuveer.murthy@ti.com> +- 2010.09-MeeGo +- Fix for u-boot fails to compile on armv7hl, BMC#13140 + +------------------------------------------------------------------- +Thu Nov 18 00:00:00 UTC 2010 - peter.j.zhu@intel.com> +- 2010.09-MeeGo +- Don't build against i586, BMC#10159 + +------------------------------------------------------------------- +Tue Oct 10 00:00:00 UTC 2010 - nm@ti.com> +- 2010.09-MeeGo +- Add Das u-boot package - FEA#9723 + +------------------------------------------------------------------- +Tue Oct 10 00:00:00 UTC 2010 - nm@ti.com> +- 2010.09.rc1-MeeGo +- Added option to enable boot.scr generation and copy + +------------------------------------------------------------------- +Mon Oct 04 00:00:00 UTC 2010 - nm@ti.com> +- 2010.09.rc1-MeeGo +- Update to 2010.09 + +------------------------------------------------------------------- +Wed Sep 14 00:00:00 UTC 2010 - nm@ti.com> +- 2010.09.rc1-MeeGo +- Update to 2010.09.rc1 +- MeeGo customization +- Enabled PandaBoard, Beagleboard build + +------------------------------------------------------------------- +Wed Mar 31 00:00:00 UTC 2010 - silvan.calarco@mambasoft.it> +- 2009.11.1-1mamba +- update to 2009.11.1 + +------------------------------------------------------------------- diff --git a/u-boot-mx6cubox-i.spec b/u-boot-mx6cubox-i.spec new file mode 100644 index 0000000..febb015 --- /dev/null +++ b/u-boot-mx6cubox-i.spec @@ -0,0 +1,165 @@ +# +# spec file for package u-boot-mx6cubox-i +# +# Copyright (c) 2014 SUSE LINUX Products GmbH, Nuernberg, Germany. +# Copyright (c) 2010 Texas Instruments Inc by Nishanth Menon +# Copyright (c) 2007-2010 by Silvan Calarco +# +# All modifications and additions to the file contributed by third parties +# remain the property of their copyright owners, unless otherwise agreed +# upon. The license for this file, and modifications and additions to the +# file, is the same license as for the pristine package itself (unless the +# license for the pristine package is not an Open Source License, in which +# case the license is the MIT License). An "Open Source License" is a +# license that conforms to the Open Source Definition (Version 1.9) +# published by the Open Source Initiative. + +# Please submit bugfixes or comments via http://bugs.opensuse.org/ +# + + +%define x_loader 0 +%define origen_spl 0 +%define sunxi_spl 0 +%define arndale_spl 0 +%define cuboxi_spl 1 + +Name: u-boot-mx6cubox-i +Version: 2014.04 +Release: 0 +Summary: The u-boot firmware for the mx6cubox-i arm platform +License: GPL-2.0 +Group: System/Boot +Url: http://www.denx.de/wiki/U-Boot +Source: ftp://ftp.denx.de/pub/u-boot/u-boot-%{version}.tar.bz2 +Source1: openSUSE_panda.txt +Source2: arndale-bl1.img +Source300: rpmlintrc +Patch2: mlo-ext2.patch +Patch3: ti_common_initrd_support.patch +Patch4: beagle-bootscr.patch +Patch5: mx53loco-bootscr.patch +Patch6: origen-ext2.patch +Patch7: arndale.patch +Patch8: v2014.04-sunxi.patch +Patch9: am335x_evm-bootscr.patch +Patch10: rpi_b-bootscr.patch +Patch12: fix_spl_build_for_am335x.patch +Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch +Patch20: fix_exynos5_text_base.patch +Patch21: fix_snow_config.patch +Patch22: exynos5-dt.h.patch +BuildRoot: %{_tmppath}/%{name}-%{version}-build +# Arndale board need DTC >= 1.4 +BuildRequires: dtc >= 1.4.0 +Provides: u-boot-loader +Conflicts: otherproviders(u-boot-loader) +%if %x_loader == 1 +Obsoletes: x-loader-mx6cubox-i +Provides: x-loader-mx6cubox-i +%endif +ExclusiveArch: armv7l armv7hl + +%description +Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. +This package contains the firmware for the mx6cubox-i arm platform. + +%package doc +Summary: Documentation for the u-boot Firmware +Group: Documentation/Other + +%description doc +Das U-Boot (or just "U-Boot" for short) is Open Source Firmware for Embedded PowerPC, ARM, MIPS and x86 processors. +This package contains documentation for u-boot firmware + +%prep +%setup -q -n u-boot-%{version} +# is non-free licensed, and we don't need it (bnc#773824) +rm -rf board/Marvell +# Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i +%patch2 +%endif +%patch3 +%patch4 +%patch5 +%patch6 +%patch7 +%patch8 -p1 +%patch9 -p1 +%patch10 +%patch12 +%patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif +%if "%{name}" == "u-boot-snow" +# Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) +%patch20 +%patch21 +%patch22 +%endif + +%build +make %{?jobs:-j %jobs} CFLAGS="$RPM_OPT_FLAGS" mx6_cubox-i_config +# temporary disable of --build-id +#make CFLAGS="$RPM_OPT_FLAGS" USE_PRIVATE_LIBGG=yes +make %{?jobs:-j %jobs} USE_PRIVATE_LIBGG=yes +%if "%{name}" == "u-boot-snow" +# Chromebook ARM (snow) need a uImage format +export TEXT_START=$(awk '$NF == "_start" { printf "0x"$1 }' System.map) +./tools/mkimage -A arm -O linux -T kernel -C none -a $TEXT_START -e $TEXT_START -n uboot -d u-boot-dtb.bin u-boot.img +%endif + +%install +install -D -m 0644 u-boot.img %{buildroot}/boot/u-boot.img +# Some times u-boot needs a dtb to configure itself appended to the binary. +# In that case prefer the one with a working dtb already appended. +if [ -f u-boot-dtb-tegra.bin ]; then + install -D -m 0644 u-boot-dtb-tegra.img %{buildroot}/boot/u-boot.img +elif [ -f u-boot-dtb.img ]; then + install -D -m 0644 u-boot-dtb.img %{buildroot}/boot/u-boot.img +else + install -D -m 0644 u-boot.img %{buildroot}/boot/u-boot.img +fi +%if %x_loader == 1 +install -D -m 0755 MLO %{buildroot}/boot/MLO +%endif +%if %origen_spl == 1 +install -D -m 0755 spl/origen-spl.bin %{buildroot}/boot/origen-spl.bin +%endif +%if %arndale_spl == 1 +install -D -m 0755 spl/arndale-spl.bin %{buildroot}/boot/arndale-spl.bin +install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img +%endif +%if %sunxi_spl == 1 +install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin +%endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif + +%files +%defattr(-,root,root) +/boot/* +%doc Licenses/gpl-2.0.txt CREDITS README + +%files doc +%defattr(-,root,root) +# Generic documents +%doc doc/README.JFFS2 doc/README.JFFS2_NAND doc/README.commands +%doc doc/README.autoboot doc/README.commands doc/README.console doc/README.dns +%doc doc/README.hwconfig doc/README.nand doc/README.NetConsole doc/README.serial_multi +%doc doc/README.SNTP doc/README.standalone doc/README.update doc/README.usb +%doc doc/README.video doc/README.VLAN doc/README.silent doc/README.POST doc/README.Modem +# Copy some useful kermit scripts as well +%doc tools/kermit/dot.kermrc tools/kermit/flash_param tools/kermit/send_cmd tools/kermit/send_image +# Now any h/w dependent Documentation +%doc doc/README.ARM-SoC doc/README.ARM-memory-map + +%changelog diff --git a/u-boot-mx6qsabrelite.changes b/u-boot-mx6qsabrelite.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot-mx6qsabrelite.changes +++ b/u-boot-mx6qsabrelite.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-mx6qsabrelite.spec b/u-boot-mx6qsabrelite.spec index 0170c49..c4a2739 100644 --- a/u-boot-mx6qsabrelite.spec +++ b/u-boot-mx6qsabrelite.spec @@ -22,6 +22,7 @@ %define origen_spl 0 %define sunxi_spl 0 %define arndale_spl 0 +%define cuboxi_spl 0 Name: u-boot-mx6qsabrelite Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root) diff --git a/u-boot-omap3beagle.changes b/u-boot-omap3beagle.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot-omap3beagle.changes +++ b/u-boot-omap3beagle.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-omap3beagle.spec b/u-boot-omap3beagle.spec index 1dede14..45ff35a 100644 --- a/u-boot-omap3beagle.spec +++ b/u-boot-omap3beagle.spec @@ -22,6 +22,7 @@ %define origen_spl 0 %define sunxi_spl 0 %define arndale_spl 0 +%define cuboxi_spl 0 Name: u-boot-omap3beagle Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root) diff --git a/u-boot-omap4panda.changes b/u-boot-omap4panda.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot-omap4panda.changes +++ b/u-boot-omap4panda.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-omap4panda.spec b/u-boot-omap4panda.spec index c17edd9..7728520 100644 --- a/u-boot-omap4panda.spec +++ b/u-boot-omap4panda.spec @@ -22,6 +22,7 @@ %define origen_spl 0 %define sunxi_spl 0 %define arndale_spl 0 +%define cuboxi_spl 0 Name: u-boot-omap4panda Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root) diff --git a/u-boot-paz00.changes b/u-boot-paz00.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot-paz00.changes +++ b/u-boot-paz00.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-paz00.spec b/u-boot-paz00.spec index 80492eb..5fa3991 100644 --- a/u-boot-paz00.spec +++ b/u-boot-paz00.spec @@ -22,6 +22,7 @@ %define origen_spl 0 %define sunxi_spl 0 %define arndale_spl 0 +%define cuboxi_spl 0 Name: u-boot-paz00 Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root) diff --git a/u-boot-rpib.changes b/u-boot-rpib.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot-rpib.changes +++ b/u-boot-rpib.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-rpib.spec b/u-boot-rpib.spec index c72d2ea..dc91416 100644 --- a/u-boot-rpib.spec +++ b/u-boot-rpib.spec @@ -22,6 +22,7 @@ %define origen_spl 0 %define sunxi_spl 0 %define arndale_spl 0 +%define cuboxi_spl 0 Name: u-boot-rpib Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root) diff --git a/u-boot-snow.changes b/u-boot-snow.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot-snow.changes +++ b/u-boot-snow.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-snow.spec b/u-boot-snow.spec index 38de306..4370bfd 100644 --- a/u-boot-snow.spec +++ b/u-boot-snow.spec @@ -22,6 +22,7 @@ %define origen_spl 0 %define sunxi_spl 0 %define arndale_spl 0 +%define cuboxi_spl 0 Name: u-boot-snow Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root) diff --git a/u-boot-vexpressaemv8a.changes b/u-boot-vexpressaemv8a.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot-vexpressaemv8a.changes +++ b/u-boot-vexpressaemv8a.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot-vexpressaemv8a.spec b/u-boot-vexpressaemv8a.spec index a529241..93c0bb5 100644 --- a/u-boot-vexpressaemv8a.spec +++ b/u-boot-vexpressaemv8a.spec @@ -22,6 +22,7 @@ %define origen_spl 0 %define sunxi_spl 0 %define arndale_spl 0 +%define cuboxi_spl 0 Name: u-boot-vexpressaemv8a Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root) diff --git a/u-boot.changes b/u-boot.changes index 9d2bb9b..b7db4c4 100644 --- a/u-boot.changes +++ b/u-boot.changes @@ -1,3 +1,19 @@ +------------------------------------------------------------------- +Sat Jun 14 11:58:43 UTC 2014 - afaerber@suse.de + +- add u-boot-cubietruck for Cubietruck (Cubieboard 3) + +------------------------------------------------------------------- +Thu Jun 12 18:52:26 UTC 2014 - josua.m@t-online.de + +- add u-boot-mx6cubox-i for Cubox-i and Hummingboard + * currently conflicts with mlo-ext2 patch for omap4 + so only for cubox-i target mlo-ext2.patch is skipped + and cubox-i patches are applied + * patch source: https://github.com/vorlonofportland/u-boot/ + cubox-i-v2014.04-port.patch + cubox-i-enable_raw_rd.patch + ------------------------------------------------------------------- Tue Apr 29 13:41:18 UTC 2014 - guillaume@opensuse.org diff --git a/u-boot.spec.in b/u-boot.spec.in index 0ea033d..e170a65 100644 --- a/u-boot.spec.in +++ b/u-boot.spec.in @@ -22,6 +22,7 @@ %define origen_spl ORIGEN_SPL %define sunxi_spl SUNXI_SPL %define arndale_spl ARNDALE_SPL +%define cuboxi_spl CUBOXI_SPL Name: u-boot-BOARDNAME Version: 2014.04 @@ -45,6 +46,8 @@ Patch9: am335x_evm-bootscr.patch Patch10: rpi_b-bootscr.patch Patch12: fix_spl_build_for_am335x.patch Patch13: fix_sabrelite_boot.scr.patch +Patch14: cubox-i-v2014.04-port.patch +Patch15: cubox-i-enable_raw_rd.patch Patch20: fix_exynos5_text_base.patch Patch21: fix_snow_config.patch Patch22: exynos5-dt.h.patch @@ -76,7 +79,10 @@ This package contains documentation for u-boot firmware # is non-free licensed, and we don't need it (bnc#773824) rm -rf board/Marvell # Any custom patches to be applied on top of mainline u-boot +%if "%{name}" != "u-boot-mx6cubox-i" +# conflicts with cubox-i-v2014.04-port.patch, skip it when building for cubox-i %patch2 +%endif %patch3 %patch4 %patch5 @@ -87,6 +93,11 @@ rm -rf board/Marvell %patch10 %patch12 %patch13 +%if "%{name}" == "u-boot-mx6cubox-i" +# Conflicts with mlo-ext2.patch, so apply only for cubox-i now +%patch14 -p1 +%patch15 -p1 +%endif %if "%{name}" == "u-boot-snow" # Still WIP, so only apply Chromebook ARM (snow) patches for u-boot-snow to avoid to break other boards (Arndale board) %patch20 @@ -129,6 +140,9 @@ install -D -m 0755 %{SOURCE2} %{buildroot}/boot/arndale-bl1.img %if %sunxi_spl == 1 install -D -m 0755 spl/sunxi-spl.bin %{buildroot}/boot/sunxi-spl.bin %endif +%if %cuboxi_spl == 1 +install -D -m 0755 SPL %{buildroot}/boot/cuboxi-spl.bin +%endif %files %defattr(-,root,root)