forked from pool/u-boot
Guillaume GARDET
111c122751
- Add qemu-riscv64spl Patch queue updated from git://github.com/openSUSE/u-boot.git tumbleweed-2021.01 * Patches added: 0031-efi_loader-Avoid-emitting-efi_var_b.patch - Drop pcm051rev3 for Phytec Wega board - Fix binary extension for sunxi based boards - Add Pinephone - Fix documentation location Update to v2021.01. Patch queue updated from git://github.com/openSUSE/u-boot.git tumbleweed-2021.01 * Patches dropped: 0028-usb-xhci-xhci_bulk_tx-Don-t-BUG-whe.patch 0029-Revert-Fix-data-abort-caused-by-mis.patch 0030-usb-xhci-pci-Add-DM_FLAG_OS_PREPARE.patch 0031-pci-brcmstb-Cleanup-controller-stat.patch * Patches added: 0028-usb-xhci-pci-Add-DM_FLAG_OS_PREPARE.patch 0029-pci-brcmstb-Cleanup-controller-stat.patch 0030-fs-btrfs-Select-SHA256-in-Kconfig.patch OBS-URL: https://build.opensuse.org/request/show/872955 OBS-URL: https://build.opensuse.org/package/show/hardware:boot/u-boot?expand=0&rev=127
56 lines
1.8 KiB
Diff
56 lines
1.8 KiB
Diff
From 9b76a8d285bac34d64d8c544931625bcaa83dfaa Mon Sep 17 00:00:00 2001
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From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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Date: Thu, 14 Jan 2021 16:49:01 +0100
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Subject: [PATCH] pci: brcmstb: Cleanup controller state before handover
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Make sure we handover the PCIe controller in a clean state. Some of the
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devices hanging from the PCIe bus might need to be properly reset
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through #PERST in order for Linux to be able to initialize them.
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This is specially important in order to properly initialize Raspberry Pi
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4 B and 400's USB chip.
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Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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---
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drivers/pci/pcie_brcmstb.c | 20 ++++++++++++++++++++
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1 file changed, 20 insertions(+)
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diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c
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index f6e8ad0d0a..c87a5dce4d 100644
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--- a/drivers/pci/pcie_brcmstb.c
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+++ b/drivers/pci/pcie_brcmstb.c
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@@ -577,6 +577,24 @@ static int brcm_pcie_probe(struct udevice *dev)
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return 0;
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}
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+static int brcm_pcie_remove(struct udevice *dev)
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+{
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+ struct brcm_pcie *pcie = dev_get_priv(dev);
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+ void __iomem *base = pcie->base;
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+
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+ /* Assert fundamental reset */
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+ setbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_PERST_MASK);
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+
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+ /* Turn off SerDes */
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+ setbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG,
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+ PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
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+
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+ /* Shutdown bridge */
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+ setbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_INIT_MASK);
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+
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+ return 0;
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+}
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+
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static int brcm_pcie_ofdata_to_platdata(struct udevice *dev)
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{
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struct brcm_pcie *pcie = dev_get_priv(dev);
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@@ -616,6 +634,8 @@ U_BOOT_DRIVER(pcie_brcm_base) = {
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.ops = &brcm_pcie_ops,
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.of_match = brcm_pcie_ids,
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.probe = brcm_pcie_probe,
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+ .remove = brcm_pcie_remove,
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.ofdata_to_platdata = brcm_pcie_ofdata_to_platdata,
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.priv_auto_alloc_size = sizeof(struct brcm_pcie),
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+ .flags = DM_FLAG_OS_PREPARE,
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};
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