45 lines
1.9 KiB
Diff
45 lines
1.9 KiB
Diff
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# Commit fe360c90ea13f309ef78810f1a2b92f2ae3b30b8
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# Date 2015-10-29 13:35:07 +0100
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# Author Jan Beulich <jbeulich@suse.com>
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# Committer Jan Beulich <jbeulich@suse.com>
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x86: guard against undue super page PTE creation
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When optional super page support got added (commit bd1cd81d64 "x86: PV
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support for hugepages"), two adjustments were missed: mod_l2_entry()
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needs to consider the PSE and RW bits when deciding whether to use the
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fast path, and the PSE bit must not be removed from L2_DISALLOW_MASK
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unconditionally.
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This is CVE-2015-7835 / XSA-148.
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Reported-by: "栾尚聪(好风)" <shangcong.lsc@alibaba-inc.com>
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Signed-off-by: Jan Beulich <jbeulich@suse.com>
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Reviewed-by: Tim Deegan <tim@xen.org>
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--- a/xen/arch/x86/mm.c
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+++ b/xen/arch/x86/mm.c
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@@ -160,7 +160,10 @@ static void put_superpage(unsigned long
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static uint32_t base_disallow_mask;
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/* Global bit is allowed to be set on L1 PTEs. Intended for user mappings. */
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#define L1_DISALLOW_MASK ((base_disallow_mask | _PAGE_GNTTAB) & ~_PAGE_GLOBAL)
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-#define L2_DISALLOW_MASK (base_disallow_mask & ~_PAGE_PSE)
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+
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+#define L2_DISALLOW_MASK (unlikely(opt_allow_superpage) \
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+ ? base_disallow_mask & ~_PAGE_PSE \
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+ : base_disallow_mask)
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#define l3_disallow_mask(d) (!is_pv_32bit_domain(d) ? \
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base_disallow_mask : 0xFFFFF198U)
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@@ -1839,7 +1842,10 @@ static int mod_l2_entry(l2_pgentry_t *pl
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}
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/* Fast path for identical mapping and presence. */
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- if ( !l2e_has_changed(ol2e, nl2e, _PAGE_PRESENT) )
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+ if ( !l2e_has_changed(ol2e, nl2e,
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+ unlikely(opt_allow_superpage)
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+ ? _PAGE_PSE | _PAGE_RW | _PAGE_PRESENT
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+ : _PAGE_PRESENT) )
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{
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adjust_guest_l2e(nl2e, d);
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if ( UPDATE_ENTRY(l2, pl2e, ol2e, nl2e, pfn, vcpu, preserve_ad) )
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