40 lines
1.4 KiB
Diff
40 lines
1.4 KiB
Diff
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# HG changeset patch
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# User Boris Ostrovsky <boris.ostrovsky@amd.com>
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# Date 1335358394 -3600
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# Node ID ed9c557f8a35a6deb7e6df0679f24a2121fd1172
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# Parent 7ba11d9b1d23633b5c42fadddad17b6dcb686141
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svm: Do not intercept RDTSC(P) when TSC scaling is supported by hardware
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When running in TSC_MODE_ALWAYS_EMULATE mode on processors that
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support TSC scaling we don't need to intercept RDTSC/RDTSCP
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instructions.
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Signed-off-by: Boris Ostrovsky <boris.ostrovsky@amd.com>
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Acked-by: Wei Huang <wei.huang2@amd.com>
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Tested-by: Wei Huang <wei.huang2@amd.com>
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Committed-by: Keir Fraser <keir@xen.org>
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--- a/xen/arch/x86/hvm/svm/svm.c
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+++ b/xen/arch/x86/hvm/svm/svm.c
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@@ -633,12 +633,19 @@ static void svm_set_rdtsc_exiting(struct
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{
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struct vmcb_struct *vmcb = v->arch.hvm_svm.vmcb;
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u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb);
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+ u32 general2_intercepts = vmcb_get_general2_intercepts(vmcb);
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general1_intercepts &= ~GENERAL1_INTERCEPT_RDTSC;
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- if ( enable )
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+ general2_intercepts &= ~GENERAL2_INTERCEPT_RDTSCP;
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+
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+ if ( enable && !cpu_has_tsc_ratio )
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+ {
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general1_intercepts |= GENERAL1_INTERCEPT_RDTSC;
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+ general2_intercepts |= GENERAL2_INTERCEPT_RDTSCP;
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+ }
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vmcb_set_general1_intercepts(vmcb, general1_intercepts);
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+ vmcb_set_general2_intercepts(vmcb, general2_intercepts);
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}
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static unsigned int svm_get_insn_bytes(struct vcpu *v, uint8_t *buf)
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