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- bnc#591799 - The status of Caps Lock is incorrect in domU

capslock_enable.patch

- bnc#607219 - AMD Erratum 383 workaround for Xen
  21408-amd-erratum-383.patch

OBS-URL: https://build.opensuse.org/package/show/Virtualization/xen?expand=0&rev=51
This commit is contained in:
Charles Arnold 2010-05-25 16:28:20 +00:00 committed by Git OBS Bridge
parent 41f2467ce8
commit 42c5e53074
4 changed files with 171 additions and 0 deletions

141
21408-amd-erratum-383.patch Normal file
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@ -0,0 +1,141 @@
# HG changeset patch
# User Keir Fraser <keir.fraser@citrix.com>
# Date 1274178085 -3600
# Node ID f40acba36be886e4b4e87afeacf39688f316dfe4
# Parent e4028345ad48c442eb55b7bc08afdf1aede0aa2e
svm: Fix for AMD erratum 383 on Family 10h CPUs
This patches implements the workaround of AMD erratum 383 on family
10h CPUs. It destroys the guest VM when a MC error with a special
pattern is detected. Without this patch, a guest VM failure can
potentially crash Xen hypervisor and the whole system. The erratum
will be published in next version of guide.
Signed-off-by: Wei Huang <wei.huang2@amd.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Christoph Egger <christoph.egger@amd.com>
Index: xen-4.0.0-testing/xen/arch/x86/hvm/svm/svm.c
===================================================================
--- xen-4.0.0-testing.orig/xen/arch/x86/hvm/svm/svm.c
+++ xen-4.0.0-testing/xen/arch/x86/hvm/svm/svm.c
@@ -72,6 +72,8 @@ static void *hsa[NR_CPUS] __read_mostly;
/* vmcb used for extended host state */
static void *root_vmcb[NR_CPUS] __read_mostly;
+static bool_t amd_erratum383_found __read_mostly;
+
static void inline __update_guest_eip(
struct cpu_user_regs *regs, unsigned int inst_len)
{
@@ -822,6 +824,20 @@ static int svm_cpu_prepare(unsigned int
return 0;
}
+static void svm_init_erratum_383(struct cpuinfo_x86 *c)
+{
+ uint64_t msr_content;
+
+ /* only family 10h is affected */
+ if ( c->x86 != 0x10 )
+ return;
+
+ rdmsrl(MSR_AMD64_DC_CFG, msr_content);
+ wrmsrl(MSR_AMD64_DC_CFG, msr_content | (1ULL << 47));
+
+ amd_erratum383_found = 1;
+}
+
static int svm_cpu_up(struct cpuinfo_x86 *c)
{
u32 eax, edx, phys_hsa_lo, phys_hsa_hi;
@@ -847,6 +863,9 @@ static int svm_cpu_up(struct cpuinfo_x86
phys_hsa_hi = (u32)(phys_hsa >> 32);
wrmsr(MSR_K8_VM_HSAVE_PA, phys_hsa_lo, phys_hsa_hi);
+ /* check for erratum 383 */
+ svm_init_erratum_383(c);
+
/* Initialize core's ASID handling. */
svm_asid_init(c);
@@ -1244,6 +1263,47 @@ static void svm_vmexit_ud_intercept(stru
}
}
+extern unsigned int nr_mce_banks; /* from mce.h */
+
+static int svm_is_erratum_383(struct cpu_user_regs *regs)
+{
+ uint64_t msr_content;
+ uint32_t i;
+ struct vcpu *v = current;
+
+ if ( !amd_erratum383_found )
+ return 0;
+
+ rdmsrl(MSR_IA32_MC0_STATUS, msr_content);
+ /* Bit 62 may or may not be set for this mce */
+ msr_content &= ~(1ULL << 62);
+
+ if ( msr_content != 0xb600000000010015ULL )
+ return 0;
+
+ /* Clear MCi_STATUS registers */
+ for (i = 0; i < nr_mce_banks; i++)
+ wrmsrl(MSR_IA32_MCx_STATUS(i), 0ULL);
+
+ rdmsrl(MSR_IA32_MCG_STATUS, msr_content);
+ wrmsrl(MSR_IA32_MCG_STATUS, msr_content & ~(1ULL << 2));
+
+ /* flush TLB */
+ flush_tlb_mask(&v->domain->domain_dirty_cpumask);
+
+ return 1;
+}
+
+static void svm_vmexit_mce_intercept(
+ struct vcpu *v, struct cpu_user_regs *regs)
+{
+ if ( svm_is_erratum_383(regs) )
+ {
+ gdprintk(XENLOG_ERR, "SVM hits AMD erratum 383\n");
+ domain_crash(v->domain);
+ }
+}
+
static void wbinvd_ipi(void *info)
{
wbinvd();
@@ -1432,6 +1492,7 @@ asmlinkage void svm_vmexit_handler(struc
/* Asynchronous event, handled when we STGI'd after the VMEXIT. */
case VMEXIT_EXCEPTION_MC:
HVMTRACE_0D(MCE);
+ svm_vmexit_mce_intercept(v, regs);
break;
case VMEXIT_VINTR:
Index: xen-4.0.0-testing/xen/include/asm-x86/msr-index.h
===================================================================
--- xen-4.0.0-testing.orig/xen/include/asm-x86/msr-index.h
+++ xen-4.0.0-testing/xen/include/asm-x86/msr-index.h
@@ -146,6 +146,11 @@
#define MSR_IA32_MC8_ADDR 0x00000422
#define MSR_IA32_MC8_MISC 0x00000423
+#define MSR_IA32_MCx_CTL(x) (MSR_IA32_MC0_CTL + 4*(x))
+#define MSR_IA32_MCx_STATUS(x) (MSR_IA32_MC0_STATUS + 4*(x))
+#define MSR_IA32_MCx_ADDR(x) (MSR_IA32_MC0_ADDR + 4*(x))
+#define MSR_IA32_MCx_MISC(x) (MSR_IA32_MC0_MISC + 4*(x))
+
#define MSR_P6_PERFCTR0 0x000000c1
#define MSR_P6_PERFCTR1 0x000000c2
#define MSR_P6_EVNTSEL0 0x00000186
@@ -224,6 +229,7 @@
/* AMD64 MSRs */
#define MSR_AMD64_NB_CFG 0xc001001f
+#define MSR_AMD64_DC_CFG 0xc0011022
#define AMD64_NB_CFG_CF8_EXT_ENABLE_BIT 46
/* AMD Family10h machine check MSRs */

15
capslock_enable.patch Normal file
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@ -0,0 +1,15 @@
diff -r c2f19aa8a584 tools/ioemu-remote/vnc.c
--- a/tools/ioemu-remote/vnc.c Wed Apr 07 11:13:49 2010 +0800
+++ b/tools/ioemu-remote/vnc.c Mon May 24 13:56:22 2010 +0800
@@ -1326,6 +1326,11 @@
}
break;
case 0x3a: /* CapsLock */
+ if(!down){
+ vs->modifiers_state[keycode] ^= 1;
+ kbd_put_keycode(keycode | 0x80);
+ }
+ return;
case 0x45: /* NumLock */
if (down) {
kbd_put_keycode(keycode & 0x7f);

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@ -1,3 +1,14 @@
-------------------------------------------------------------------
Mon May 24 15:10:12 CST 2010 - jsong@novell.com
- bnc#591799 - The status of Caps Lock is incorrect in domU
capslock_enable.patch
-------------------------------------------------------------------
Wed May 19 13:23:36 MDT 2010 - carnold@novell.com
- bnc#607219 - AMD Erratum 383 workaround for Xen
21408-amd-erratum-383.patch
-------------------------------------------------------------------
Wed May 19 08:09:41 MDT 2010 - carnold@novell.com

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@ -102,6 +102,7 @@ Patch24: 21349-x86-memcpy.patch
Patch25: 21360-x86-mce-polling-diabled-init.patch
Patch26: 21372-x86-cross-cpu-wait.patch
Patch27: 21373-dummy-domain-io-caps.patch
Patch28: 21408-amd-erratum-383.patch
# Our patches
Patch300: xen-config.diff
Patch301: xend-config.diff
@ -185,6 +186,7 @@ Patch427: xen-ioemu-hvm-pv-support.diff
Patch428: qemu-dm-segfault.patch
Patch429: hibernate.patch
Patch430: del_usb_xend_entry.patch
Patch431: capslock_enable.patch
# Jim's domain lock patch
Patch450: xend-domain-lock.patch
# Hypervisor and PV driver Patches
@ -570,6 +572,7 @@ Authors:
%patch25 -p1
%patch26 -p1
%patch27 -p1
%patch28 -p1
%patch300 -p1
%patch301 -p1
%patch302 -p1
@ -648,6 +651,7 @@ Authors:
%patch428 -p1
%patch429 -p1
%patch430 -p1
%patch431 -p1
%patch450 -p1
%patch500 -p1
%patch501 -p1