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18481-amd-microcode-update-fix.patch
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37
18481-amd-microcode-update-fix.patch
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# HG changeset patch
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# User Keir Fraser <keir.fraser@citrix.com>
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# Date 1221489878 -3600
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# Node ID 75c4a603d9cd7f73366986261e1078fce1ead815
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# Parent 59aba2cbbb58111de1aba6b173800d62956cf26f
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x86: Fix 32-bit build after AMD microcode update patch.
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Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
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Index: xen-3.3.1-testing/xen/arch/x86/microcode_amd.c
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===================================================================
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--- xen-3.3.1-testing.orig/xen/arch/x86/microcode_amd.c
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+++ xen-3.3.1-testing/xen/arch/x86/microcode_amd.c
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@@ -170,11 +170,10 @@ out:
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static int apply_microcode_amd(int cpu)
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{
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unsigned long flags;
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- unsigned int eax, edx;
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- unsigned int rev;
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+ uint32_t eax, edx, rev;
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int cpu_num = raw_smp_processor_id();
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struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
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- unsigned long addr;
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+ uint64_t addr;
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/* We should bind the task to the CPU */
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BUG_ON(cpu_num != cpu);
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@@ -185,8 +184,8 @@ static int apply_microcode_amd(int cpu)
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spin_lock_irqsave(µcode_update_lock, flags);
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addr = (unsigned long)&uci->mc.mc_amd->hdr.data_code;
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- edx = (unsigned int)((unsigned long)(addr >> 32));
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- eax = (unsigned int)((unsigned long)(addr & 0xffffffff));
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+ edx = (uint32_t)(addr >> 32);
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+ eax = (uint32_t)addr;
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asm volatile("movl %0, %%ecx; wrmsr" :
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: "i" (MSR_AMD_PATCHLOADER), "a" (eax), "d" (edx) : "ecx");
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