diff --git a/21542-amd-erratum-411.patch b/21542-amd-erratum-411.patch
new file mode 100644
index 0000000..9322bce
--- /dev/null
+++ b/21542-amd-erratum-411.patch
@@ -0,0 +1,51 @@
+# HG changeset patch
+# User Keir Fraser <keir.fraser@citrix.com>
+# Date 1275892689 -3600
+# Node ID 0251bbc0a9a879126bce65e47e4410575cfa73de
+# Parent  7ff0e885b5c30cc8573b52144b274509e04759fd
+AMD: Workaround for erratum 411
+
+Clear APIC TMICT when we mask APIC LVTT.
+
+Signed-off-by: Wei Wang <wei.wang2@amd.com>
+
+Index: xen-4.0.0-testing/xen/arch/x86/apic.c
+===================================================================
+--- xen-4.0.0-testing.orig/xen/arch/x86/apic.c
++++ xen-4.0.0-testing/xen/arch/x86/apic.c
+@@ -195,6 +195,9 @@ void clear_local_APIC(void)
+ 
+     maxlvt = get_maxlvt();
+ 
++    /* Work around AMD Erratum 411. This is a nice thing to do anyway. */
++    apic_write_around(APIC_TMICT, 0);
++
+     /*
+      * Masking an LVT entry on a P6 can trigger a local APIC error
+      * if the vector is zero. Mask LVTERR first to prevent this.
+@@ -1184,7 +1187,10 @@ void disable_APIC_timer(void)
+ {
+     if (using_apic_timer) {
+         unsigned long v;
+-        
++
++        /* Work around AMD Erratum 411. This is a nice thing to do anyway. */
++        apic_write_around(APIC_TMICT, 0);
++
+         v = apic_read(APIC_LVTT);
+         apic_write_around(APIC_LVTT, v | APIC_LVT_MASKED);
+     }
+Index: xen-4.0.0-testing/xen/arch/x86/hpet.c
+===================================================================
+--- xen-4.0.0-testing.orig/xen/arch/x86/hpet.c
++++ xen-4.0.0-testing/xen/arch/x86/hpet.c
+@@ -659,8 +659,7 @@ void hpet_broadcast_enter(void)
+     if ( hpet_attach_channel )
+         hpet_attach_channel(cpu, ch);
+ 
+-    /* Cancel any outstanding LAPIC timer event and disable interrupts. */
+-    reprogram_timer(0);
++    /* Disable LAPIC timer interrupts. */
+     disable_APIC_timer();
+ 
+     cpu_set(cpu, ch->cpumask);
diff --git a/xen.changes b/xen.changes
index 9ef59e9..2862a1b 100644
--- a/xen.changes
+++ b/xen.changes
@@ -1,3 +1,10 @@
+-------------------------------------------------------------------
+Mon Jun  7 10:55:20 MDT 2010 - carnold@novell.com
+
+- bnc#612189 - Clear APIC Timer Initial Count Register when masking
+  timer interrupt
+  21542-amd-erratum-411.patch
+
 -------------------------------------------------------------------
 Fri Jun  4 10:48:30 MDT 2010 - carnold@novell.com
 
diff --git a/xen.spec b/xen.spec
index afca081..2cf8c1f 100644
--- a/xen.spec
+++ b/xen.spec
@@ -108,6 +108,7 @@ Patch30:        21421-vts-ats-enabling.patch
 Patch31:        21435-vmx-retain-global-controls.patch
 Patch32:        21459-block-script.patch
 Patch33:        21460-xend-timeoffset.patch
+Patch34:        21542-amd-erratum-411.patch
 # Our patches
 Patch300:       xen-config.diff
 Patch301:       xend-config.diff
@@ -585,6 +586,7 @@ Authors:
 %patch31 -p1
 %patch32 -p1
 %patch33 -p1
+%patch34 -p1
 %patch300 -p1
 %patch301 -p1
 %patch302 -p1